New Materials Are Being Integrated Into High Volume Manufacturing

8/18/2019 New Materials Are Being Integrated Into High Volume Manufacturing

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New materials are being integrated into High Volume Manufacturing (HVM) of semiconductorICs, while old materials are being extended with more stringent specications !efectswithin materials cause "ield losses in HVM fabs, and engineers must identif" the specicsource of an obser#ed defect before correcti#e steps can be ta$en Hone"well %lectronicMaterials has been using molecular modeling software pro#ided b" &cienomics to bothde#elop new materials and to modif" old materials Modeling allowed Hone"well to unco#er

the origin of subtle sol#ation'based lm defects within ottom nti'*e+ecti#e Coatings(*C) which were degrading "ield in a customers lithographic process module&cienomics sponsored a Materials Modeling and &imulations online seminar on -ebruar"./th of this "ear, featuring !r Nanc" Iwamoto of Hone"well discussing how &cienomicssoftware was used to accelerate response to a customers manufacturing "ield loss 01hiswas a product running at a customer line,2 explained Iwamoto, 0and we needed to nd thesolution2 1he product was a ottom nti'*e+ecti#e Coating (*C) organo'silicate pol"merdeli#ered in solution form and then spun on wafers to a precise thic$ness

3riginall" obser#ed during optical inspection b" fab engineers as 4'. micron si5ed #aguespots in the *C, the new defect t"pe was di6cult to see "et could be correlated tolithographic "ield loss 1he defects appeared to be discrete within the lm instead of on thetop surface, so the source was li$el" some manner of particle, "et lters did not capture

these particles

1he lter captured some particles rich in silicon, as well as other particles rich in carbon&e7uential ltration showed that particles were passing through impossibl" small pores,which suggested that the particles were built of deformable gel'li$e phases 1he challengewas to nd the material handling or processing situation, which resulted inthermod"namicall" possible and $ineticall" probable conditions that could form such gels

-ig8 Materials 9rocesses and &imulations (M9&) gi#es researchers access to #isuali5ationand anal"sis tools in a single user interface together with access to multiple simulationengines (&ource8 &cienomics)

Molecular modeling and simulation is a powerful techni7ue that can be used for materialsdesign, functional upgrades, process optimi5ation, and manufacturing The Figure shows adashboard for &cienomics modeling platform est practices in molecular modeling to ndout'of'control parameters in HVM include a se7uential wor$+ow8

• uild correct models based on experimental obser#ables,• &imulate potential molecular structures based on $nown chemicals and hierarchical

models,• nal"5e manufacturing #ariabilities to identif" excursion sources, and

• 9ropose remed" for failure eliminationHone"well %lectronic Materials researchers had #er" few experimental obser#ables fromwhich to start8 phenomenon is rare ("et e:ects "ield), not lterable, "et fromthermod"namic h"drol"sis parameters it must be 7uasi'stable *e'testing of product and re'examination of 3utgoing ;ualit" Control (3;C) data at the Hone"well production site

http://www.honeywell.com/industries/chemicals-specialty-materials-and-fertilizers/electronic-materialshttp://www.honeywell.com/industries/chemicals-specialty-materials-and-fertilizers/electronic-materialshttp://scienomics.com/http://scienomics.com/http://www.honeywell.com/industries/chemicals-specialty-materials-and-fertilizers/electronic-materialshttp://www.honeywell.com/industries/chemicals-specialty-materials-and-fertilizers/electronic-materials


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showed that the molecular weight of the product was consistent with the desireddistribution 1here was also an obser#ed *C thic$ness increase of el'li$e agglomerations

could certainl" be formed under the wrong conditions 3nce the agglomerations form, the"are not #er" stable so the" can probabl" dis'aggregate when being forced through a lterand then re'aggregate on the other side

?hat conditions could induce gel formation@ fter a few wee$s of modeling, it wasdetermined that temperature #ariations had the greatest in+uence on the agglomeration,and that #ariabilit" was strongest at the


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*ecent impro#ements in %=V source technolog" OB? source power had been shown b" theend of .B4J, 4OA? b" the end of .B4A, and .BB? has now been shown b" &MKha#ebeen enabled b" multiple laser pulses tuned to the best produce plasma from tin droplets

1&MC reports that A4O wafers per da" were processed b" their &MK %=V stepper, and thetool was a#ailable


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1o pre#ent pattern collapse, the thic$ness of resist is reduced proportionall" to the minimumhalf'pitch (H9) of linesFspaces (&ource8 Q&* Micro)

Q%I!%C researchers presented their summar" of the trade'o: between sensiti#it" and K?*for metal'oxide'based %=V resists8 ultra high sensiti#it" of mQFcm. to pattern 4nm lineswith A/nm K?*, or low sensiti#it" of EE mQFcm. to pattern .Enm lines with EOnm K?*

In a $e"note presentation, &eong'&ue Dim of &amsung %lectronics stated that, 0*esistpattern defecti#it" remains the biggest issue Metal'oxide resist de#elopment needs to beexpedited2 1he challenge is that defecti#it" at the nanometer'scale deri#es from0stochastics,2 which means random processes that are not full" predictableStochastics of Nanopatterningnna Kio, from Intels 9ortland 1echnolog" !e#elopment group, stated that the challenges ofcontrolling resist stochastics, 0could be the deal brea$er2 Intel ran a 'month test of #ias

made using %=VK, and found that #ia critical dimensions (C!), edge'placement'error (%9%),and chain resistances all showed good results compared to 4SEi Howe#er, there areinherent control issues due to the random nature of phenomena in#ol#ed in resistpatterning8 incident 0photons2, absorption, freed electrons, acid generation, acid7uenching, protection groups, de#elopment processes, etc

&tochastics for no#el chemistries can onl" be controlled b" understanding in detail thesources of #ariabilit" -rom rst'principles, %=V resist reactions are not photon'chemistr",but are reall" radiation'chemistr" with man" di:erent radiation paths and electrons whichcan be generated If e#er" #ia in an ad#anced logic IC must wor$ then the failure rate mustbe on the order of 4 part'per'trillion (ppt), and stochastic #ariabilit" from non'homogeneouschemistries must be eliminated

Consider that for a C* designed for 4AmQFcm. sensiti#it", there will be Tust8

4JA photonsFnm. for 4SE, and

4B photonsFnm. for %=V

1o impro#e sensiti#it" and suppress failures from photon shot'noise, we need to increaseresist absorption, and also re'consider chemical amplication mechanisms 01he

https://en.wikipedia.org/wiki/Stochastichttps://en.wikipedia.org/wiki/Stochastic


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re7uirements will be the same for an" resist and an" chemistr",2 reminded Kio 0?e need toe#aluate all resists at the same exposure le#els and at the same rules, and loo$ at di:erentfeatures to show stochastics li$e in the tails of distributions *esolution is important butstochastics will rule our world at the dimensions were dealing with2

—E.K.

1ags8 4Bnm, 4Jnm, ..nm, Anm, nm, ad#anced, control, %=V, %=VK, HVM, IC, Imec, Intel, litho,lithograph", mas$, node, patterning, random, resist, resolution, &amsung, sensiti#it", &9I%'K, &&1 1op &tor" *ight, stochastic, 1&MC9osted in !esign, 1op &tories No Comments

Many Mixes to Match Litho Apps 1hursda", March Erd, .B4/

By Ed Korczynski, Sr. Technical Editor 0Mix and Match2 has long been a mantra for lithographers in the deep'sub'wa#elength eraof IC de#ice manufacturing In general, forming patterns with resolution at minimum pitch assmall as 4FJ the wa#elength of light can be done using o:'axis illumination (3I) throughreticle enhancement techni7ues (*%1) on mas$s, using optical proximit" correction (39C)perhaps deri#ed from in#erse lithograph" technolog" (IK1) Kithographers can form JB'JAnmwide lines and spaces at the same half'pitch using 4SEnm light (from r- lasers) in a singleexposure

Figure 1 shows that application'specic tri'la"er photoresists are used to reach theminimum resolution of 4SEnm'immersion (4SEi) steppers in a single exposure 1ighter half'pitch features can be created using all manner of multi'patterning processes, includingKitho'%tch'Kitho'%tch (K%K% or K%.) using two mas$s for a single la"er or &elf'ligned !ouble9atterning (&!9) using sidewall spacers to accomplish pitch'splitting &!9 has been usedin high #olume manufacturing (HVM) of logic and memor" ICs for man" "ears now, and &elf'ligned ;uadruple 9atterning (&;9) has been used in HVM b" at least one leading memor"fab

-ig48 asic tri'la"er resist (1K*) technolog" uses thin 9hotoresist o#er silicon'containingHard'Mas$ o#er &pin'3n Carbon (&3C), for patterning critical la"ers of ad#anced ICs(&ource8 rewer &cience)

http://semimd.com/blog/tag/10nm/http://semimd.com/blog/tag/14nm/http://semimd.com/blog/tag/22nm/http://semimd.com/blog/tag/5nm/http://semimd.com/blog/tag/7nm/http://semimd.com/blog/tag/advanced/http://semimd.com/blog/tag/control/http://semimd.com/blog/tag/euv/http://semimd.com/blog/tag/euvl/http://semimd.com/blog/tag/euvl/http://semimd.com/blog/tag/hvm/http://semimd.com/blog/tag/ic/http://semimd.com/blog/tag/imec/http://semimd.com/blog/tag/intel/http://semimd.com/blog/tag/intel/http://semimd.com/blog/tag/litho/http://semimd.com/blog/tag/litho/http://semimd.com/blog/tag/lithography/http://semimd.com/blog/tag/mask/http://semimd.com/blog/tag/node/http://semimd.com/blog/tag/patterning/http://semimd.com/blog/tag/random/http://semimd.com/blog/tag/random/http://semimd.com/blog/tag/resist/http://semimd.com/blog/tag/resist/http://semimd.com/blog/tag/resolution/http://semimd.com/blog/tag/samsung/http://semimd.com/blog/tag/sensitivity/http://semimd.com/blog/tag/spie-al/http://semimd.com/blog/tag/spie-al/http://semimd.com/blog/tag/sst-top-story-right/http://semimd.com/blog/tag/stochastic/http://semimd.com/blog/tag/tsmc/http://semimd.com/technology-features/design/http://semimd.com/top-stories/http://semimd.com/blog/2016/03/04/euv-resists-and-stochastic-processes/#respondhttp://semimd.com/blog/2016/03/03/many-mixes-to-match-litho-apps/http://semimd.com/blog/tag/10nm/http://semimd.com/blog/tag/14nm/http://semimd.com/blog/tag/22nm/http://semimd.com/blog/tag/5nm/http://semimd.com/blog/tag/7nm/http://semimd.com/blog/tag/advanced/http://semimd.com/blog/tag/control/http://semimd.com/blog/tag/euv/http://semimd.com/blog/tag/euvl/http://semimd.com/blog/tag/hvm/http://semimd.com/blog/tag/ic/http://semimd.com/blog/tag/imec/http://semimd.com/blog/tag/intel/http://semimd.com/blog/tag/litho/http://semimd.com/blog/tag/litho/http://semimd.com/blog/tag/lithography/http://semimd.com/blog/tag/mask/http://semimd.com/blog/tag/node/http://semimd.com/blog/tag/patterning/http://semimd.com/blog/tag/random/http://semimd.com/blog/tag/resist/http://semimd.com/blog/tag/resolution/http://semimd.com/blog/tag/samsung/http://semimd.com/blog/tag/sensitivity/http://semimd.com/blog/tag/spie-al/http://semimd.com/blog/tag/spie-al/http://semimd.com/blog/tag/sst-top-story-right/http://semimd.com/blog/tag/stochastic/http://semimd.com/blog/tag/tsmc/http://semimd.com/technology-features/design/http://semimd.com/top-stories/http://semimd.com/blog/2016/03/04/euv-resists-and-stochastic-processes/#respondhttp://semimd.com/blog/2016/03/03/many-mixes-to-match-litho-apps/


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Next'>eneration Kithograph" (N>K) generall" refers to an" post'optical technolog" with atleast some uni7ue niche patterning capabilit" of interest to IC fabs8 %xtreme =ltra'Violet(%=V), !irected &elf'ssembl" (!&), and Nano'Imprint Kithograph" (NIK) 1houghproponents of each N>K ha#e dutifull" shown capabilities for targeted mas$ la"ers for logicor memor", the capabilities of r- dr" and immersion (r-i) scanners to process U.ABwafersFhour with high uptime dominates the economics of HVM lithograph"

1he worlds leading lithographers gather each "ear in &an Qose, California at &9I%s d#ancedKithograph" conference to discuss how to extend optical lithograph" &o of all the N>Ktechnologies, which will win out in the end@It is loo$ing most li$el" that the answer is 0all of the abo#e2 %=V and NIK could be used forsingle la"ers -or other uni7ue patterning application, r-Fr-i steppers will be used tocreate a basic gridFtemplate which will be cutFtrimmed using one of the a#ailable N>K %achmas$ la"er in an ad#anced fab will need application'specic patterning integration, and oneof the rare commonalities between all integrated litho modules is the o#erwhelming need toimpro#e pattern o#erla" performance

Naga Chandrase$aran, Micron Corp #ice president of 9rocess *!, pro#ided a fantastico#er#iew of the patterning re7uirements for ad#anced memor" chips in a presentation

during Ni$ons KithoVision technical s"mposium held -ebruar" .4st in &an Qose, Californiaprior to the start of &9I%'K ?hile resolution impro#ements are alwa"s desired, in the mix'and'match era the greatest challenges in#ol#e pattern o#erla" issues 0In high #olumemanufacturing, e#er" nanometer #ariation translates into "ield loss, so what is the besto#erla" that we can deli#er as a holistic solution not Tust considering stepper resolution@2as$s Chandrase$aran 0?e should tal$ about cost per nanometer o#erla" impro#ement2Extree U!tra"Vio!et #EUV$s touted b" &MK at &9I%'K, the brightness and stabilit" and a#ailabilit" of tin'plasma %=Vsources continues to impro#e to .BB? in the lab 0for one hour, with full dose control,2according to Michael Kercel, &MKs director of strategic mar$eting &MKs new 1?IN&CNNW%8EEAB %=VK scanners are now being shipped with 4.A? power sources, and Intel and&amsung %lectronics reported run their %=V power sources at OB? o#er extended periods!uring Ni$ons KithoVision e#ent, Mar$ 9hillips, Intel -ellow and !irector of Kithograph"

1echnolog" !e#elopment for Kogic, summari5ed recent progress of %=VK technolog"8 reg McInt"rereminds us that !& could sa#e one mas$ in the patterning of #ias which can all becombined into doubletsFtriplets, since two mas$s would otherwise be needed to use 4SEi todo K%K% for such a #ia arra" 01here ha#e been a lot of patterning tric$s de#eloped o#er thelast few "ears to be able to reduce #ariabilit" another few nanometers &o all sorts of self'alignments2

http://spie.org/conferences-and-exhibitions/advanced-lithographyhttp://spie.org/conferences-and-exhibitions/advanced-lithographyhttps://lithovision.com/http://semimd.com/blog/2016/02/25/asml-details-advances-in-duv-metrology-euv/http://electroiq.com/blog/2016/02/imec-reveals-impact-of-dsa-process-variations-on-electrical-performance-of-dsa-formed-vias/http://spie.org/conferences-and-exhibitions/advanced-lithographyhttp://spie.org/conferences-and-exhibitions/advanced-lithographyhttps://lithovision.com/http://semimd.com/blog/2016/02/25/asml-details-advances-in-duv-metrology-euv/http://electroiq.com/blog/2016/02/imec-reveals-impact-of-dsa-process-variations-on-electrical-performance-of-dsa-formed-vias/


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?hile !& can be used for shrin$ing #ias that are not doubledFtripled, there arecommerciall" pro#en spin'on shrin$ materials that cost much less to use as shown b" Da#eri

Qain and &cott Kight from Micron in their &9I%'K presentation, 0-undamental characteri5ationof shrin$ techni7ues on negati#e'tone de#elopment based dense contact holes2 Chemicalshrin$ processes primaril" re7uire control o#er times, temperatures, and ambients inside alitho trac$ tool to be able repeatabl" shrin$ contact hole diameters b" 4A'.A nm

Nano"'print Litho #N'L$-or ad#anced IC fab applications, the man" di:erent options for NIK technolog" ha#e beennarrowed to Tust one for IC HVM 1he step'and'pattern technolog" that had been de#elopedand trademar$ed as 0Qet and -lash Imprint Kithograph"2 or 0Q'-IK2 b", has beencommerciali5ed for HVM b" Canon Nano1echnologies, formerl" $nown as Molecular ImprintsCanon shows impro#ements in the NIK mas$'replication process, since each production mas$will need to be replicated from a written master 1o use NIK in HVM, mas$ image placementerrors from replication will ha#e to be reduced to


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#olume mass production2 1he team categori5ed defects that must be minimi5ed intofundamentall" di:erent categoriestemplate, non'lling, separation'related, and patterncollapseand determined parallel paths to defect reduction to allow for using NIK in HVM ofmemor" chips with Y.Bnm half'pitch features

—E.K.

1ags8 4SE, 4SEi, ad#anced, application'specic, r-, r-i, &MK, !&, %=V, %=VK, HVM, IC, IK 1, Imec,integration, Intel, K%K%, litho, lithograph", Micron, module, multi'pattern, N>K, 39C,optical, pattern,process, *!, resist, *%1, &!9, &;9, &9I%'K, &&1 News, tri'la"er9osted in !esign, 1op &tories No Comments

Measuring )n Partic!es 'n"LineMonda", No#ember EBth, .B4ABy Ed Korczynski, Sr. Technical Editor Industrial 1echnolog" *esearch Institute (I1*I) (https8FFwwwitriorgtwF) wor$ed with 1&MC(http8FFwwwtsmccom) in 1aiwan on a cle#er in'line monitor technolog" that transformsli7uids and automaticall"'diluted'slurries into aerosols for subse7uent airbornmeasurements 1he" call this 0&uper&i5er2 technolog", and claim that tests ha#e shownresolution o#er the astounding range of Anm to 4 micron, and with abilit" to accuratel"represent si5e distributions o#er that range n" dissol#ed gas bubbles in the li7uid are lost

in the aerosol process, which allows the tool to unambiguousl" count solid impurities TheFigure shows the compact components within the tool that produce the aerosol

erosol sub's"stem inside 0&uper&i5er2 in'line particle si5ing tool co'de#eloped b"I1*IF1&MC (&ource8 I1*I)

&emiconductor fabrication (fab) lines re7uire in'line measurement and control of particles incritical li7uids and slurries ?ith the exception of those carefull" added to chemical'mechanical planari5ation (CM9) slurries, most particles in fabs are accidental "ield'$illers

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that must be $ept to an absolute minimum to ensure proper "ield in IC fabs, and e#erdecreasing IC de#ice feature si5es result in e#er smaller particles that can $ill a chip&tandard in'line tools to monitor particles rel" on laser scattering through the li7uid, andsuch technolog" allows for resolution of particle si5es as small as JBnm &ince we cannotcontrol what we cannot measure, the IC fab industr" needs this new abilit" to measureparticles as small as Anm for next'generation manufacturing

1here are two actual measurement technologies used downstream of the &uper&i5er aerosolmodule8 a di:erential mobilit" anal"5er (!M), and a condensation particle counter (C9C)

1he aerosol rst mo#es through the !M column, where particle si5es are measured basedon the force balance between air +ow speed in the axial direction and an electric eld in theradial direction 1he subse7uent C9C then pro#ides particle concentration data

Combining both data streams properl" allows for automated output of information onparticle si5es down to Anm, si5e distributions, and impurit" concentrations in li7uids &incethe tool is intended for monitoring semiconductor high'#olume manufacturing (HVM), themeasurement data is automaticall" categori5ed, anal"5ed, and reported according to theneeds of the fabs automated "ield management s"stem =sers can edit the measurementse7uences or recipes to monitor di:erent chemicals or slurries under di:erent conditions

and schedules

?hen used to control a CM9 process, the &uper&i5er can be congured to measure not Tustimpurities but also the essential slurr" particles themsel#es !uring dilution andhomogeneous mixing of the slurr" prior to aerosoli5ation, mechanical agitation needs to bea#oided so as to pre#ent particle agglomeration which causes scratch defects 1his new tooluses pressured gas as the dri#ing force for solution transporting and mixing, so that an"measured agglomeration in the slurr" can be assigned to a source somewhere else in thefab

1&MC has been using this tool since .B4J to measure particles in solutions including slurries,chemicals, and ultra'pure water I1*I, which owns the technolog" and related patents, can

now ta$e orders to manufacture the product, but the research organi5ation plans to licensethe technolog" to a compan" in 1aiwan for #olume manufacturing %%1imes reports(http8FFwwweetimescomFdocumentasp@docZid[4E.O.OE) that the current list price for atool capable of monitoring ultra'pure water is


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primaril" dri#en b" the man" Coe6cient of 1hermal %xpansion (C1%) mismatches withinand between chips and pac$agesin+uence the electrical properties of ICs In this era, theindustr" needs to be able to model and control the mechanical and thermal properties of thecombined chip'pac$age, and so we need wa"s to feed data bac$ and forth betweendesigners, chip fabs, and 3ut'&ourced ssembl" and 1est (3&1) companies ?ithaccelerated "ield ramps needed for High Volume Manufacturing (HVM) of consumer mobile

products, to minimi5e ris$ of expensi#e ?or$ In 9rogress (?I9) mo#ing through the suppl"chain a lot of data needs to feed'forward and feedbac$

Cal#in Cheung, &% >roup Vice 9resident of usiness !e#elopment %ngineering, discussedthese trends in the 0&caling the ?alls of &ub'4Jnm Manufacturing2 $e"note paneldiscussion during the recent &%MIC3N ?est .B4A 0In the old da"s it used to ta$e 4.'4Omonths to ramp "ield, but the product lifetime for mobile chips toda" can be onl" S months,2reminded Cheung 0In the old da"s we used to tal$ about ramping a few thousand chips,while toda" wor$ing with ;ualcomm the" want to ramp millions of chips 7uic$l" -rom an3&1 point of #iew, we pride oursel#es on being a #irtual arm of the manufacturers anddesigners,2 said Cheung, 0but as technolog" gets more complex and ]$nowledge'base'centric2 we see less release of information from foundries ?e used to ha#e larger teams infoundries2 !ic$ Qames of Chip?or$s details the complexit" of the &i9 used in the pple

?atch in his recent blog post at &emiM!, and documents the details behind the assumptionthat &% is the 3&1?ith single'chip &"stem'on'Chip (&oC) designs the ]nal test can be at the wafer'le#el, butwith &i9 based on chips from multiple #endors the ]nal test now must happen at thepac$age'le#el, and this changes the !esign -or 1est (!-1) wor$ +ows !*M in a E! stac$(Figure 1) will ha#e an interconnect test and memor" uilt'In &elf'1est (I&1) applied fromI&1 resident on the logic die connected to the memor" stac$ using 1hrough'&ilicon Vias(1&V)

-ig48 &chematic cross'sections of di:erent E! &"stem'in'9ac$age (&i9) design t"pes(&ource8 Mentor >raphics)

http://www.semiconwest.org/node/14416http://www.semiconwest.org/node/14416http://semimd.com/chipworks/2015/08/18/apple-watch-and-ase-start-new-era-in-sip/http://semimd.com/chipworks/2015/08/18/apple-watch-and-ase-start-new-era-in-sip/http://www.semiconwest.org/node/14416http://www.semiconwest.org/node/14416http://semimd.com/chipworks/2015/08/18/apple-watch-and-ase-start-new-era-in-sip/http://semimd.com/chipworks/2015/08/18/apple-watch-and-ase-start-new-era-in-sip/


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01he test of dice in a pac$age can mostl" be Tust re'used die'le#el tests based onhierarchical pattern re'targeting which is used in man" #er" large designs toda",2 said *on9ress, technical mar$eting director of &ilicon 1est &olutions, Mentor >raphics, in discussionwith SemiMD 0dditional interconnect tests between die would be added using boundar"scans at die inputs and outputs, or an e7ui#alent method ?e put together .A! and E!methodologies that are in some of the foundr" reference +ows It still isnt certain if

speciali5ed tests will be re7uired to monitor for 1&V partial failures20Man" fabless semiconductor companies toda" use solutions li$e scan test diagnosis toidentif" product'specic "ield problems, and these solutions re7uire a combination of testfail data and design data,2 explained >eir %die, Mentor >raphics product mar$etingmanager of &ilicon 1est &olutions 0>etting data from one part of the fabless organi5ation toanother can often be more challenging than what one should expect &o, whats oftenneeded is a set of ]best practices that co#ers the entire "ield learning +ow acrossorgani5ations2

0?e do need a standard for structuring and transmitting test and operations meta'data in atimel" fashion between companies in this relati#el" new dis'aggregated semiconductorworld across -abless, -oundr", 3&1, and 3%M,2 asserted Qohn Carulli, >K3K-3=N!*I%&deput" director of 1est !e#elopment !iagnosis, in an exclusi#e discussion with SemiMD

09resentl" the databases are still proprietar" ^ either internal to the compan" or as part ofthird'part" #endors applications2 Most of the test'related #endors and users are supportingde#elopment of the new *ich Interacti#e 1est !atabase (*I1db) data format to replacethe &tandard 1est !ata -ormat (&1!-) originall" de#eloped b" 1erad"ne01he collaboration across the semiconductor ecos"stem placed features in *I1db thatunderstand the end'to'end data needs including securit"Fpro#enance,2 explainedCarulli Figure ( shows that since *I1db is a structured data construct, an" data froman"where in the suppl" chain could be easil" communicated, supported, and scaledregardless of 3&1 or -abless customer test program infrastructure 0If *I1db is trul"adopted and some certication s"stem can be placed around it to $eep it from di#erging,then it pro#ides a standard core to transmit data with $nown meaning across our dis'aggregated semiconductor world nother $e" part is the 1est Cell Communication &tandard?or$ing >roup_ when integrated with *I1db, the impro#ed automation and control path

would greatl" reduce manuall" communicated understanding of operational practicesFissuesacross companies that impact "ield and 7ualit"2

https://en.wikipedia.org/wiki/Standard_Test_Data_Formathttps://en.wikipedia.org/wiki/Standard_Test_Data_Formathttps://en.wikipedia.org/wiki/Standard_Test_Data_Formathttp://www.semi.org/en/industrysegments/test/casthttp://www.semi.org/en/industrysegments/test/casthttps://en.wikipedia.org/wiki/Standard_Test_Data_Formathttp://www.semi.org/en/industrysegments/test/casthttp://www.semi.org/en/industrysegments/test/cast


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-ig.8 &tructure of the *ich Interacti#e 1est !atabase (*I1db) industr" standard, showing howdata can mo#e through the suppl" chain (&ource8 1exas Instruments)

9hil Nigh, >K3K-3=N!*I%& &enior 1echnical &ta:, explained to SemiMD that forheterogeneous integration of di:erent chip t"pes the industr" has on'chip temperaturemeasurement circuits which can monitor temperature at a gi#en time, but not necessaril"

identif" issues cause b" thermalFmechanical stresses 0!uring production testing, we shoulddetect mechanicalFthermal stress ]failures using product testing methods such as I3lea$age, chip lea$age, and other chip performance measurements such as -MW,2 remindedNighMode! &ut +erifyMetrolog" tool supplier Nanometrics has uni7ue perspecti#e on the data needs of E!pac$ages since the compan" has deli#ered do5ens of tools for 1&V metrolog" to the world

1he compan"s =ni-ire SBB ?afer'&cale 9ac$aging (?&9) Metrolog" &"stem uses white'lightinterferometr" to measure critical dimensions (C!), o#erla", and lm thic$nesses of 1&V,micro'bumps, *e'!istribution Ka"er (*!K) structures, as well as the co'planarit" of CubumpsFpillars *obert -iordalice, Nanometrics Vice 9resident of =ni-ire business group,mentioned to &emiM! in an exclusi#e inter#iew that new 1&V structures certainl" bringabout new "ield loss mechanisms, e#en if electrical tests show standard results such as

]partial open -iordalice said that, 0we#e had a lot of pull to ta$e our 1&V metrolog" tool,and de#elop a 1&V inspection tool to chec$ e#er" #ia on e#er" wafer2 1&V inspection toolsare now in beta'tests at customerss reported at E!incites, Mentor >raphics showed results at !C.B4A of the use of CalibreE!&1CD b" an 3&1 to create a rule le for their -an'3ut ?afer'Ke#el 9ac$age (-3?K9)process 1his rule le can be used b" an" designer targeting this pac$age technolog" at thisassembl" house, and chec$s the manufacturing constraints of the pac$age *!K and theconnecti#it" through the pac$age from die'to'die and die'to'> ased on pac$ageinformation including die order, xF" position, rotation and orientation, Calibre E!&1CDperforms chec$s on the interface geometries between chips connected using bumps, pillars,and 1&Vs n assembl" design $it pro#ides a standardi5ed process both chip designcompanies and assembl" houses can use to ensure the manufacturabilit" and performanceof E! &i9

—E.K. 1ags8 E!, ad#anced, ssembl", i&1, chip, C1%, design, !-M, !-1, die, %!, fab, foundr",>lobal-oundries, heterogeneous, HVM, IC, inspection, integration, manufacturing, Mentor>raphics,metrolog", Nanometrics, 3&1, pac$age, ramp, *!K, *I1db, &%MI, &%MIC3N, &ilicon, &i9, &&1 News,test, 1&V, wafer, "ield9osted in !esign, 1op &tories No Comments

Techno!ogies for Ad+anced Systes Sho,n at 'ME- Tech Foru USA 1uesda", Qul" 4Jth, .B4A

By Ed Korczynski, Sr. Technical Editor Kuc Van den ho#e, president and C%3, imec opened the Imec 1echnolog" -orum ^ =& in &an-rancisco on Qul" 4E b" reminding us of the grand #ision and moti#ation behind the wor$ ofour industr" to empower indi#iduals with micro' and nano'technologies in his tal$, 0-rom thehapp" few to the happ" man"2 ?hile the imec consortium continues to lead the world inpure materials engineering and de#ice exploration, the" now wor$ on s"stems'integration

http://nanometrics.com/products/unifire.htmlhttp://nanometrics.com/products/unifire.htmlhttp://www.3dincites.com/2015/08/assembly-design-kits-are-the-future-of-package-design-verification/https://dac.com/eventshttp://www.mentor.com/products/ic_nanometer_design/verification-signoff/physical-verification/calibre-3dstackhttp://www.mentor.com/products/ic_nanometer_design/verification-signoff/physical-verification/calibre-3dstackhttp://semimd.com/blog/tag/3d/http://semimd.com/blog/tag/advanced/http://semimd.com/blog/tag/assembly/http://semimd.com/blog/tag/bist/http://semimd.com/blog/tag/chip/http://semimd.com/blog/tag/cte/http://semimd.com/blog/tag/cte/http://semimd.com/blog/tag/design-2/http://semimd.com/blog/tag/dfm/http://semimd.com/blog/tag/dft/http://semimd.com/blog/tag/dft/http://semimd.com/blog/tag/die/http://semimd.com/blog/tag/die/http://semimd.com/blog/tag/eda/http://semimd.com/blog/tag/fab/http://semimd.com/blog/tag/foundry/http://semimd.com/blog/tag/globalfoundries/http://semimd.com/blog/tag/globalfoundries/http://semimd.com/blog/tag/heterogeneous/http://semimd.com/blog/tag/hvm/http://semimd.com/blog/tag/ic/http://semimd.com/blog/tag/inspection/http://semimd.com/blog/tag/integration/http://semimd.com/blog/tag/manufacturing/http://semimd.com/blog/tag/mentor-graphics/http://semimd.com/blog/tag/mentor-graphics/http://semimd.com/blog/tag/metrology/http://semimd.com/blog/tag/nanometrics/http://semimd.com/blog/tag/nanometrics/http://semimd.com/blog/tag/osat/http://semimd.com/blog/tag/osat/http://semimd.com/blog/tag/package/http://semimd.com/blog/tag/ramp/http://semimd.com/blog/tag/rdl/http://semimd.com/blog/tag/rdl/http://semimd.com/blog/tag/ritdb/http://semimd.com/blog/tag/semi/http://semimd.com/blog/tag/semicon/http://semimd.com/blog/tag/silicon/http://semimd.com/blog/tag/sip/http://semimd.com/blog/tag/sst-news/http://semimd.com/blog/tag/test/http://semimd.com/blog/tag/tsv/http://semimd.com/blog/tag/wafer/http://semimd.com/blog/tag/yield/http://semimd.com/technology-features/design/http://semimd.com/top-stories/http://semimd.com/blog/2015/08/24/managing-dis-aggregated-data-for-sip-yield-ramp/#respondhttp://semimd.com/blog/2015/07/14/technologies-for-advanced-systems-shown-at-imec-tech-forum-usa/http://nanometrics.com/products/unifire.htmlhttp://www.3dincites.com/2015/08/assembly-design-kits-are-the-future-of-package-design-verification/https://dac.com/eventshttp://www.mentor.com/products/ic_nanometer_design/verification-signoff/physical-verification/calibre-3dstackhttp://www.mentor.com/products/ic_nanometer_design/verification-signoff/physical-verification/calibre-3dstackhttp://semimd.com/blog/tag/3d/http://semimd.com/blog/tag/advanced/http://semimd.com/blog/tag/assembly/http://semimd.com/blog/tag/bist/http://semimd.com/blog/tag/chip/http://semimd.com/blog/tag/cte/http://semimd.com/blog/tag/design-2/http://semimd.com/blog/tag/dfm/http://semimd.com/blog/tag/dft/http://semimd.com/blog/tag/die/http://semimd.com/blog/tag/eda/http://semimd.com/blog/tag/fab/http://semimd.com/blog/tag/foundry/http://semimd.com/blog/tag/globalfoundries/http://semimd.com/blog/tag/globalfoundries/http://semimd.com/blog/tag/heterogeneous/http://semimd.com/blog/tag/hvm/http://semimd.com/blog/tag/ic/http://semimd.com/blog/tag/inspection/http://semimd.com/blog/tag/integration/http://semimd.com/blog/tag/manufacturing/http://semimd.com/blog/tag/mentor-graphics/http://semimd.com/blog/tag/mentor-graphics/http://semimd.com/blog/tag/metrology/http://semimd.com/blog/tag/nanometrics/http://semimd.com/blog/tag/osat/http://semimd.com/blog/tag/package/http://semimd.com/blog/tag/ramp/http://semimd.com/blog/tag/rdl/http://semimd.com/blog/tag/ritdb/http://semimd.com/blog/tag/semi/http://semimd.com/blog/tag/semicon/http://semimd.com/blog/tag/silicon/http://semimd.com/blog/tag/sip/http://semimd.com/blog/tag/sst-news/http://semimd.com/blog/tag/test/http://semimd.com/blog/tag/tsv/http://semimd.com/blog/tag/wafer/http://semimd.com/blog/tag/yield/http://semimd.com/technology-features/design/http://semimd.com/top-stories/http://semimd.com/blog/2015/08/24/managing-dis-aggregated-data-for-sip-yield-ramp/#respondhttp://semimd.com/blog/2015/07/14/technologies-for-advanced-systems-shown-at-imec-tech-forum-usa/


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complexities with o#er 4BB applications partners from agriculture, energ", healthcare, andtransportation industries

?e are now li#ing in an era where new chip technologies re7uire trade'o:s between power,performance, and bandwidth, and such trade'o:s must be carefull" explored for di:erentapplications spaces such as cloud clusters or sensor nodes n &teegen, senior #ice

president process technolog", imec, discussed the details of new CM3& chip extensions aswell as post'CM3& de#ice possibilities for di:erent applications spaces in her presentationon 01echnolog" inno#ation8 an Io1 era2 %=V lithograph" technolog" continues to bede#eloped, targeting a single'exposure using BEE Numerical perture (N) re+ecti#e lensesto pattern features as small as 4Onm half'pitch, which would meet the Metal4 densit"specications for the industr"s so'called 0nm node2 9atterning below 4.nm half'pitchwould seem to need higher'N which is not an automatic extension of current %=Vtechnolog"

&o while there is now some clarit" regarding the pre'competiti#e process'technologies thatwill be needed to fabricate next'generation de#ice, there is less clarit" regarding which newde#ice structures will best ser#e the needs of di:erent electronics applications CM3& n-%1susing strained silicon'doped'with'>ermanium &i(>e) will e#entuall" be replaced b" gate'all'

around (>) nano'wires (N?) using alternate'channel materials (CM) with highermobilities such as >e and indium'gallium'arsenide (In>as) ?hile man" measures of CM3&performance impro#e with scaling to smaller dimensions, e#entuall" lea$age current andparasitic capacitances will impede further progress

Figure 1 shows a summar" of energ"'#s'dela" anal"ses b" imec for all manner of de#iceswhich could be used as switches in logic arra"s &pin'wa#e de#ices such as spin'transfer'tor7ue *M (&11'*M) can run at low power consumption but are inherentl" slower thanCM3& de#ices 1unnel'-%1 (1-%1) de#ices can be as fast or faster than CM3& while runningat lower operating power due to reduced electrostatics, leading to promising *! wor$

-ig48 %nerg" #s dela" for #arious logic switches (&ource8 imec)

In an exclusi#e inter#iew, &teegen explained how the consortium balances the needs of allpartners in *!, 0?hen "ou tr" to predict future roadmaps "ou prefer to start from themainstream 1r"ing to nd the mainstream, so that customers can build deri#ati#es fromthat, is what imec does ?ere getting closer to s"stems, and s"stems are reaching down to


14/25

technolog",2 said &teegen 0?e reach out to each other, while we continue to be experts inour own domains If Im inserting future memor" into ser#ers, the s"stem architecture needsto change so we need to tal$ to the s"stems people Its a natural trend that has e#ol#ed2

Networ$ e:ects from 0the cloud2 and from future smart Io1 nets re7uire high'bandwidth andso impro#ed electrical and optical connections at multiple le#els are being explored at imec

Qoris Van Campenhout, program director optical IF3, imec, discussed 0&caling the cloud usingsilicon photonics2 1he challenge is how to build a 4BB>bFs bandwidth in the near term, andthen scale to JBB> and then 4/1 though parallelism of wa#elength di#ision multiplexing_the best results to date for a transmitter and recei#er reach AB>bFs " le#eraging theexisting CM3& manufacturing and E'! assembl" infrastructure, the h"brid CM3& siliconphotonics platform enables high integration densit" and reduced power consumption, aswell as high "ield and low manufacturing cost &upported b" %! tools including those fromMentor >raphics, there ha#e been tape'outs of de#ices in the last "ear using a 9rocess!esign Dit (9!D) ?hen combined with laser sources and a JBnm node foundr" CM3& chip, acomplete integrated solution exists rra"s of AB>bFs structures can allow for JBB>bFssolutions b" next "ear, and optical bac$planes for ser#er farms in another few "earsHowe#er, to bring photonics closer to the chip in an optical interposer will re7uire radicalnew new approaches to reduce costs, including integration of more e6cient laser arra"s

lexander Mit"ashin, proTect manager thin lm electronics, imec, explained wh" we need,0thin lm electronics for smart applications2 1here are billions of items in our world thatcould be made smarter with electronics, pro#ided we can use additi#e thin'lm processes toma$e ultra'low'cost thin'lm transistors (1-1) that t di:erent mar$et demands =singamorphous indium'gallium'5inc'oxide (a'I>X3) deposited at low'temperature as the acti#ela"er on a plastic substrate, imec has been able to produce U4B$ 1-1sFcm. using Tust J'Alithograph" mas$s Figure ( shows these 1-1 integrated into a near'eld communications(N-C) chip as rst disclosed at I&&CC earlier this "ear in the paper, 0I>X3 thin'lm transistorbased +exible N-C tags powered b" commercial =& reader de#ice at 4EA/MH52 ?or$ingwith 9anasonic in .B4E, imec showed a +exible organic light'emitting diode (3K%!) displa"of Tust B4Amm thic$ness that can be processed at 4OBC In collaboration with the HolstCenter, the" ha#e wor$ed on disposable +exible sensors that can adhere to human s$in

-ig.8 1hin'-ilm 1ransistors (1-1) fabricated on plastic using -lat 9anel !ispla" (-9!)manufacturing tools (&ource8 imecFHolst Center)


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Qim 3Neill, Chief 1echnolog" 36cer of %ntegris, expanded on the s"stems'le#el theme of theforum in his presentation on 09utting the pieces together ^ Materials inno#ation in adisrupti#e en#ironment2 ?ith so man" additional materials being integrated into newde#ice structures, there are inherentl" new "ield'limiting defect mechanisms that will ha#eto be controlled ?ith demand for chips now being dri#en primaril" b" high'#olumeconsumer applications, the time between rst commercial sample and HVM has compressed

such that greater coordination is needed between de#ice, e7uipment, and materialscompanies -or example, instead of de#eloping a wet chemical formulation on a tool andthen optimi5ing it with the right lter or dispense technolog", the 9rocess %ngineer can starten#isioning a 0bottle'to'no55le wetted surface solution2 " considering not Tust the intendedreactions on the wafer but the unintended reactions that can occur up'steam and down'stream of the process chamber, full solutions to the semiconductor industr"s mostchallenging "ield problems can be more 7uic$l" found

—E.K. 1ags8 E!, CM, CM3&, %=V, n-%1, >, >e, >ermanium, HVM, I>X3, Imec, Io1, lithograph",materials, n?, photonics, &i, &ilicon, &&1 News, 1-%1, 1-19osted in !esign, 1op &tories 4 Comment

App!ied Materia!s. /!ypia AL% Spins Po,erfu! Ne, -apa&i!ities

Monda", Qul" 4Eth, .B4A

By Ed Korczynski, Sr. Technical Editor pplied Materials toda" un#eiled the pplied 3l"mpia K! s"stem, using thermal se7uential'K! technolog" for the high'#olume manufacturing (HVM) of leading'edge E! memor" andlogic chips &trictl" spea$ing this is a mini'batch tool, since four EBBmm wafers are loaded

onto a turn'table in the chamber that continuousl" rotates through four gas'isolated modularprocessing 5ones %ach 5one can be congured to +ow an" arbitrar" K! precursor or toexposure the surface to *apid'1hermal'9rocessing (*19) illumination, so an extraordinar"combination of K! processes can be run in the tool 0?hat are the applications that willresult from this@ ?e dont $now "et because the world has ne#er before had a tool whichcould pro#ide these capabilities,2 said !a#id Chu, &trategic Mar$eting, pplieds !ielectric&"stems and Modules group

http://semimd.com/blog/tag/3d/http://semimd.com/blog/tag/acm/http://semimd.com/blog/tag/cmos/http://semimd.com/blog/tag/euv/http://semimd.com/blog/tag/finfet/http://semimd.com/blog/tag/gaa/http://semimd.com/blog/tag/ge/http://semimd.com/blog/tag/ge/http://semimd.com/blog/tag/germanium/http://semimd.com/blog/tag/germanium/http://semimd.com/blog/tag/hvm/http://semimd.com/blog/tag/igzo/http://semimd.com/blog/tag/imec/http://semimd.com/blog/tag/iot/http://semimd.com/blog/tag/lithography/http://semimd.com/blog/tag/materials/http://semimd.com/blog/tag/nw/http://semimd.com/blog/tag/photonics/http://semimd.com/blog/tag/si/http://semimd.com/blog/tag/si/http://semimd.com/blog/tag/silicon/http://semimd.com/blog/tag/silicon/http://semimd.com/blog/tag/sst-news/http://semimd.com/blog/tag/tfet/http://semimd.com/blog/tag/tft/http://semimd.com/technology-features/design/http://semimd.com/top-stories/http://semimd.com/blog/2015/07/14/technologies-for-advanced-systems-shown-at-imec-tech-forum-usa/#commentshttp://semimd.com/blog/2015/07/13/applied-materials-olympia-ald-spins-powerful-new-capabilities/http://semimd.com/blog/tag/3d/http://semimd.com/blog/tag/acm/http://semimd.com/blog/tag/cmos/http://semimd.com/blog/tag/euv/http://semimd.com/blog/tag/finfet/http://semimd.com/blog/tag/gaa/http://semimd.com/blog/tag/ge/http://semimd.com/blog/tag/germanium/http://semimd.com/blog/tag/hvm/http://semimd.com/blog/tag/igzo/http://semimd.com/blog/tag/imec/http://semimd.com/blog/tag/iot/http://semimd.com/blog/tag/lithography/http://semimd.com/blog/tag/materials/http://semimd.com/blog/tag/nw/http://semimd.com/blog/tag/photonics/http://semimd.com/blog/tag/si/http://semimd.com/blog/tag/silicon/http://semimd.com/blog/tag/sst-news/http://semimd.com/blog/tag/tfet/http://semimd.com/blog/tag/tft/http://semimd.com/technology-features/design/http://semimd.com/top-stories/http://semimd.com/blog/2015/07/14/technologies-for-advanced-systems-shown-at-imec-tech-forum-usa/#commentshttp://semimd.com/blog/2015/07/13/applied-materials-olympia-ald-spins-powerful-new-capabilities/


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-ig48 1he four 5ones within the 3l"mpia se7uential'K! chamber can be congured to usean" combination of precursors or treatments (&ource8 pplied Materials)

Figure 1 shows that in addition to a high'throughput simple K! process such that waferswould rotate through ''' precursors in se7uence, or 5ones congured in an ''C'se7uence to produce a nano'laminate such as Xirconia'lumina'Xirconia (XX), almost an"

combination of pre' and post'treatments can be used 1he gas'panel and chemical sourcesub's"stems in the tool allow for the use up to J precursors Conse7uentl", 3l"mpia opensthe wa" to depositing the widest spectrum of next'generation atomic'scale conformal lmsincluding ad#anced patterning lms, higher' and lower'$ dielectrics, low'temperature lms,and nano'laminates01he 3l"mpia s"stem o#ercomes fundamental limitations chipma$ers are experiencing withcon#entional K! technologies, such as reduced chemistr" control of single'wafer solutionsand long c"cle times of furnaces,2 !r Mu$und &rini#asan, #ice president and generalmanager of pplieds !ielectric &"stems and Modules group 0ecause of this, were seeingstrong mar$et response, with 3l"mpia s"stems installed at multiple customers to supporttheir mo#e to 4Bnm and be"ond2 -uture de#ice structures will need more and moreconformal K!, as new materials will ha#e to coat new E! features

?hen engineering e#en'smaller structures using K!, thermal budgets inherentl" decreaseto pre#ent atomic inter'di:usion Compared to thermal K!, 9lasma'%nhanced K! (9%K!)functions at reduced temperatures but tend to induce impurities in the lm because ofexcess energ" in the chamber 1he abilit" of 3l"mpia to do *19 for each se7uentiall"deposited atomic'la"er leads to nal lm properties that are inherentl" superior indefecti#it" le#els to 9%K! lms at the same thermal budget8 alumina, silica, silicon'nitride,titania, and titanium'nitride depositions into high aspect'ratio structures ha#e been shown

Purging #fro the too!$ pup"purge


17/25

-ab engineers who ha#e to deal with K! technolog"from process to facilitiesshould be#er" happ" wor$ing with 3l"mpia because the precursors +ow through the chambercontinuousl" instead of ha#ing to use the pump'purge se7uences t"pical of single'wafer andmini'batch K! tools used for IC fabrication 9ump'purge se7uences in K! tools result inthe following wastes8

G ?asted chemistr" since tools generall" shunt precursor' past the chamber directl" to thepump'line when precursor' is +owing and #ice'#ersa,

G More wasted chemistr" because the entire chamber gets coated along with the wafer,

G ?asted cleaning chemistr" during routine chamber and pump pre#entati#e'maintenance,

G ?asted downtime to clean the chamber and pump, and

G ?asted de#ice "ield because precursors +owing in the same space at di:erent times canaccidentall" o#erlap and create defects

01oda" there are chemistries that are more or less compatible with tools,2 reminded Chu0?hen "ou tr" to use less'compatible chemistries, the purge times in single'wafer toolsreall" begin to reduce the producti#it" of the process 1here are chemistries out there toda"that would be desirable to use that are not pursued due to the limitations of pump'purgechambers2

—E.K. 1ags8 EBBmm, K!, M1, pplied Materials, atomic la"erdeposition, control, HVM, IC, materials, mini'batch, nano'laminate, 9%K!, producti#it", *19,&emiconductor, se7uential'K!, &&1 1op &tor" Keft,temperature9osted in 1op &tories No Comments

EM-(01) Ne, %e+ices2 /!d Tric3s

1uesda", Qune EBth, .B4ABy Ed Korczynski, Sr. Technical Editor

1he Ath annual %lectronic Materials Conference (http8FFwwwmrsorgFAth'emcF), held Qune.J'./ in Columbus, 3hio, showcased research and de#elopment (*!) of new de#icestructures, as well as new insights into the process'structure'properties relationships ofelectronic de#ices now running in high'#olume manufacturing (HVM) lines globall" plethora of papers on compound'semiconductor 7uantum'dots and nanorods, K%!s and7uantum'dot detectors, power electronics, and +exible and bio'compatible de#ices all showthat inno#ation will not slow down despite the limitations of !ennard &caling and MooresKaw ?ith E! stac$ing of existing de#ices on no#el substrates an ongoing integrationchallenge for HVM, the conference also explored substrate engineering and E! stac$ingtechnologiesC%'Ketis 0&mart'cut2 technolog" has been used for o#er .B "ears to clea#e cr"stalline

la"ers for transfer and bonding to stac$ substrate functionalities, such as &ilicon'3n'Insulator (&3I) wafers *esearchers from Keti loo$ed at the discrete steps in#ol#ed in theh"drogen implantation, annealing to create the buried plane of micro'bubbles within thecr"stal, and then the acoustic wa#e that tra#els through the plane to complete the clea#e periodic wa#e pattern is d"namicall" generation during clea#ing, with the e#ol#ingwa#efront dependent upon the contribution of all the past fracture fronts to an" particularpoint 1he clea#ed roughness is related to the speed of the fracture wa#e mo#ing throughthe wafer plane, and that depends on the micro'crac$s the are originall" present due to themicro'bubbles

http://semimd.com/blog/tag/300mm/http://semimd.com/blog/tag/300mm/http://semimd.com/blog/tag/ald/http://semimd.com/blog/tag/amat/http://semimd.com/blog/tag/applied-materials/http://semimd.com/blog/tag/atomic-layer-deposition/http://semimd.com/blog/tag/atomic-layer-deposition/http://semimd.com/blog/tag/control/http://semimd.com/blog/tag/hvm/http://semimd.com/blog/tag/hvm/http://semimd.com/blog/tag/ic/http://semimd.com/blog/tag/materials/http://semimd.com/blog/tag/materials/http://semimd.com/blog/tag/mini-batch/http://semimd.com/blog/tag/mini-batch/http://semimd.com/blog/tag/nano-laminate/http://semimd.com/blog/tag/nano-laminate/http://semimd.com/blog/tag/nano-laminate/http://semimd.com/blog/tag/peald/http://semimd.com/blog/tag/productivity/http://semimd.com/blog/tag/productivity/http://semimd.com/blog/tag/rtp/http://semimd.com/blog/tag/semiconductor/http://semimd.com/blog/tag/semiconductor/http://semimd.com/blog/tag/sequential-ald/http://semimd.com/blog/tag/sst-top-story-left/http://semimd.com/blog/tag/sst-top-story-left/http://semimd.com/blog/tag/temperature/http://semimd.com/top-stories/http://semimd.com/blog/2015/07/13/applied-materials-olympia-ald-spins-powerful-new-capabilities/#respondhttp://semimd.com/blog/2015/06/30/emc2015-new-devices-old-tricks/http://www.mrs.org/57th-emc/http://semimd.com/blog/tag/300mm/http://semimd.com/blog/tag/ald/http://semimd.com/blog/tag/amat/http://semimd.com/blog/tag/applied-materials/http://semimd.com/blog/tag/atomic-layer-deposition/http://semimd.com/blog/tag/atomic-layer-deposition/http://semimd.com/blog/tag/control/http://semimd.com/blog/tag/hvm/http://semimd.com/blog/tag/ic/http://semimd.com/blog/tag/materials/http://semimd.com/blog/tag/mini-batch/http://semimd.com/blog/tag/nano-laminate/http://semimd.com/blog/tag/peald/http://semimd.com/blog/tag/productivity/http://semimd.com/blog/tag/rtp/http://semimd.com/blog/tag/semiconductor/http://semimd.com/blog/tag/sequential-ald/http://semimd.com/blog/tag/sst-top-story-left/http://semimd.com/blog/tag/temperature/http://semimd.com/top-stories/http://semimd.com/blog/2015/07/13/applied-materials-olympia-ald-spins-powerful-new-capabilities/#respondhttp://semimd.com/blog/2015/06/30/emc2015-new-devices-old-tricks/http://www.mrs.org/57th-emc/


18/25

Keti researchers also reported on 0Copper grain'si5e e:ects on direct metallic bondingmechanisms2 such as will be used in E! chip'stac$ing 1he main limitation on the densit" ofE! copper (Cu) connections between chips is the micro'bump pitch, with Cu'Cu bondspro#iding both electrical and mechanical connections &ince the grain'si5e of annealed Cuthin'lms depends on lm thic$ness, the" used electro'chemical deposition (%C!) to growtwo di:erent thic$nesses, annealed each at JBBC for 4B hours to allow for maximum grain

growth, and then used CM9 to get all samples to the same nal thic$ness 1he result wasne'grain Cu bumps with B/ micron diameter grains, and large'grain bumps with


19/25

By Ed Korczynski, Senior Technical Editor, Solid State Technology &lightl" more than one "ear after ;ualcomm 1echnologies announced that it was assessingC%'Ketis monolithic E! (ME!) transistor stac$ing technolog", ;ualcomm has nowannounced that ME! will be used instead of through'silicon #ias (1&V) in the compan"s nextgeneration of cellphone handset chips &ince ;ualcomm had also been a leading industrialproponent of 1&V o#er the last few "ears while participating in the imec *! consortium,this endorsement of ME! is particularl" rele#ant

Ketis approach to E! stac$ing of transistors starts with a con#entionall" built and locall"'interconnected bottom la"er of transistors, which are then co#ered with a top la"er oftransistors built using relati#el" low'temperature processes branded as 0CoolCube2 -igure 4

shows a simplied cross'sectional schematic of a CoolCube stac$ of transistors andinterconnects CoolCube ME! does not transfer a la"er of built de#ices as in the approachusing 1&V, but instead transfers Tust a nm'thin la"er of homogenous semiconductingmaterial for subse7uent de#ice processing

-ig 48 &implied cross'sectional rendering of Monolithic E! (ME!) transistor stac$s, withcritical process integration challenges indicated (&ource8 C%'Keti)

1he reason that completed transistors are not transferred in the rst place is because ofintrinsic alignment issues, which are eliminated when transistors are instead fabricated onthe same wafer 0?e ha#e lots of data to pro#e that alignment precision is as good as can beseen in .! lithograph", t"picall" Enm,2 explained Maud Vinet, Ketis ad#anced CM3&laborator" manager in an exclusi#e inter#iew withSST s discussed in a blog post online at Semiconductor Manufacturing andDesign(http8FFsemimdcomFharsF.B4JFBJFBSFgoing'up'monolithic'Ed'as'an'alternati#e'to'cmos'scalingF) last "ear b" Keti researchers, the ME! approach consists of se7uentiall"

processing8• processing a bottom M3& transistor la"er with local interconnects,

• bonding a wafer substrate to the bottom transistor la"er,

• chemical'mechanical planari5ation (CM9) and &9% of the top la"er,

• processing the top de#ice la"er,

• forming metal #ias between the two de#ice la"ers as interconnects, and

• standard copperFlow'$ multi'le#el interconnect formation 1o transfer a la"er of silicon for the top la"er of transistors, a clea#e'la"er is needed withinthe bul$ silicon or else time and mone" would be wasted in grinding awa" USAP of the

http://electroiq.com/blog/2014/12/leti-will-discuss-coolcube-technology-for-3d-transistor-stacking-at-workshop-preceding-iedm-2014/http://electroiq.com/blog/2014/12/leti-will-discuss-coolcube-technology-for-3d-transistor-stacking-at-workshop-preceding-iedm-2014/


20/25

silicon bul$ from the bac$side -or CM3&8CM3& ME! thin silicon'on'insulator (&3I) is thetransferred top la"er, a logical extension of wor$ done b" Keti for decades 1he hea#" doseion'implantation that creates the clea#e'la"er lea#es defects in cr"stalline silicon whichre7uire excessi#el" high temperatures to anneal awa" Ketis tric$ to o#ercome this thermal'budget issue is to use pre'amorphi5ing implants (9I) to completel" dis'order the siliconbefore transfer and then solid'phase epitax" (&9%) post'transfer to grow de#ice'grade single'

cr"stal silicon at


21/25

-ig .8 1hermal processing ranges for process modules need to be below


22/25

we ha#e seen non'e7uilibrium anneals slowl" ta$ing the place of con#entional *19,2 clariedbhilash Ma"ur, senior director, -ront %nd 9roducts, pplied Materials 0-or approximatepercentages, I would sa" about .A percent of thermal processing for logic at the ..nm'nodeis non'e7uilibrium, and seen to be heading toward AB percent at the 4Bnm'node or lower2

Ma"ur further explained some of the trade'o:s in wor$ing on the leading'edge of thermal

processing for demanding HVM customers 9ulse'times are in the tens of nsec, with longerpulses tending to allow the heat to di:use deeper and ad#ersel" alter the lower la"ers, andwith shorter pulses tending to induce surface damage or ablation 03ur roadmap is to ensure+exibilit" in the pulse shape to tailor the heat +ow to the specic application,2 said Ma"ur

Now that ;ualcomm has endorsed CoolCube ME! as a preferred approach to CM3&8CM3&transistor stac$ing in the near'term, we ma" assume that *! in no#el unit'processes hasmostl" concluded 9resumabl" there are pilot lots of wafers now being run throughcommercial foundries to ne'tune ME! integration ?ith a roadmap for long'termheterogeneous integration that seems both low'cost and low'ris$, ME! using non'e7uilibrium*19 will li$el" be an important wa" to integrate new functionalities into future ICs

1ags8 E!, adiabatic, C%'Keti, CoolCube, >e, HVM, III'V, integration, materials, node, non'e7uilibrium,9I, process, ;ualcomm, *19, &i, &ilicon, &3I, &9%, &&1 News, stac$, 1&V9osted in News &tories, 1op &tories 4 Comment

The 7ee3 in Re+ie,8 /cto&er (92 (019-rida", 3ctober .Jth, .B4JIM and >K3K-3=N!*I%& this wee$ announced that >K3K-3=N!*I%& will ac7uire IMsglobal commercial semiconductor technolog" business, including IMs intellectual propert",technologists and technologies IM will pa" >K3K-3=N!*I%& \4A billion in cash o#er thenext three "ears to ta$e the chip operations o: its hands 1he cash consideration will beadTusted b" the amount of wor$ing capital which is estimated to be \.BB millionCapped b" last wee$s announcement that ;ualcomm Inc would bu" C&* 9KC, theautomoti#e semiconductor industr" recentl" has been undergoing a wa#e of merger andac7uisition acti#it" that has sha$en up the competiti#e order of the mar$et, according

to IH& 1echnolog"dl"te Inc, a de#eloper of high'brightness extreme light sources for ad#ancedsemiconductor inspection and metrolog" applications, announced it has reached a $e"performance benchmar$ for its extreme ultra#iolet (%=V) light source for high'#olumemanufacturing (HVM)'readiness>igaphoton Inc, a lithograph" light source manufacturer, announced that it has succeededin achie#ing E'hour continuous operation of its protot"pe K99 %=V light source at AB percentdut" c"cle and J.'? output, e7ui#alent to usage in a high'#olume'manufacturing (HVM)en#ironmentNorth merica'based manufacturers of semiconductor e7uipment posted \44 billion inorders worldwide in &eptember .B4J (three'month a#erage basis) and a boo$'to'bill ratio ofBSJ, according to the &eptember %M!& oo$'to'ill *eport published toda"b" &%MI boo$'to'bill of BSJ means that \SJ worth of orders were recei#ed for e#er"\4BB of product billed for the month

1ags8 dl"te_ IM, automoti#e, boo$'to'bill, %=V, >igaphoton, >lobal-oundries, HVM, &%MI9osted in News &tories No Comments Next 9age

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23/25

Mar$et for >aN and &iC power semiconductors to top \4 in .B.B_ -ront'end fab e7uipmentspending_ *esearchers ta$e giant step towards ]hol" grail of silicon photonics_&emiconductor unit shipments to top 4 trillion b" .B4O

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%FM8 7hat is it and ,hat ,i!! it do;%#er"bod"s tal$ing about it, but Tust what is !-M@ ccording to #arious %! compan"websites, design for manufacturing can be8 generation of "ield optimi5ed cells_ la"out

compaction_ wafer mapping optimi5ation_ planarit" ll_ or, statistical timing among otherdenitions 3b#iousl", there is #er" little consensus -or me, !-M is what ma$es m" Tobhard8 Characteri5ing it, and de#eloping tools for it, is the most important item on m"agenda

Via %ou&!ing to 'pro+e *ie!dIn nanometer designs, the number of single #ias, and the number of #ia transitions withminimal o#erlap, can contribute signicantl" to "ield loss Let doubling e#er" #ia leads toother "ield'related problems and has a huge impact on design si5e ?hile there is stillconcern o#er of how man" #ias can be xed without rerouting and without creating !*C

http://semimd.com/blog/tag/hvm/technology-features/podcasts-videos-webcasts/http://semimd.com/blog/2016/04/01/goodbye-edac-hello-esd-alliance/#comment-208849http://semimd.com/blog/2015/08/20/neon-gas-supply-issues-dog-the-semiconductor-industry/#comment-193599http://semimd.com/blog/2016/03/04/the-future-is-flexible-and-printed/#comment-193524http://semimd.com/blog/2016/02/24/laser-suppliers-move-past-the-neon-gas-crisis/#comment-187658http://semimd.com/blog/2016/02/24/laser-suppliers-move-past-the-neon-gas-crisis/#comment-187640http://semimd.com/blog/2016/02/18/familiar-phrase-returns-to-the-fray-at-ev-group-conference/#comment-184706http://semimd.com/blog/2016/01/22/imagining-chinas-ic-fab-industry-in-2035/#comment-179753http://semimd.com/eds-threads/2016/02/25/litho-becomes-patterning/#comment-5647http://semimd.com/insights-from-leading-edge/2016/03/02/iftle-276-semi-iss-2016-the-focus-shifts-to-packaging/#comment-5794http://semimd.com/eds-threads/2016/02/25/litho-becomes-patterning/#comment-5614http://semimd.com/eds-threads/2016/02/25/litho-becomes-patterning/#comment-5614https://twitter.com/Solid_StateTechhttp://semimd.com/blog/2013/12/05/rf-soi-wafers-for-wireless-applications/http://semimd.com/blog/2013/10/24/dfm-what-is-it-and-what-will-it-do/http://semimd.com/blog/2013/10/24/via-doubling-to-improve-yield/http://semimd.com/blog/tag/hvm/technology-features/podcasts-videos-webcasts/http://semimd.com/blog/2016/04/01/goodbye-edac-hello-esd-alliance/#comment-208849http://semimd.com/blog/2015/08/20/neon-gas-supply-issues-dog-the-semiconductor-industry/#comment-193599http://semimd.com/blog/2016/03/04/the-future-is-flexible-and-printed/#comment-193524http://semimd.com/blog/2016/02/24/laser-suppliers-move-past-the-neon-gas-crisis/#comment-187658http://semimd.com/blog/2016/02/24/laser-suppliers-move-past-the-neon-gas-crisis/#comment-187640http://semimd.com/blog/2016/02/18/familiar-phrase-returns-to-the-fray-at-ev-group-conference/#comment-184706http://semimd.com/blog/2016/01/22/imagining-chinas-ic-fab-industry-in-2035/#comment-179753http://semimd.com/eds-threads/2016/02/25/litho-becomes-patterning/#comment-5647http://semimd.com/insights-from-leading-edge/2016/03/02/iftle-276-semi-iss-2016-the-focus-shifts-to-packaging/#comment-5794http://semimd.com/eds-threads/2016/02/25/litho-becomes-patterning/#comment-5614https://twitter.com/Solid_StateTechhttp://semimd.com/blog/2013/12/05/rf-soi-wafers-for-wireless-applications/http://semimd.com/blog/2013/10/24/dfm-what-is-it-and-what-will-it-do/http://semimd.com/blog/2013/10/24/via-doubling-to-improve-yield/


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#iolations, the Calibre #ia doubling tool can identif" #ia transitions and recommend areas forsecond #ia insertion without increasing area

The 'pact /f 19"n Photoas3 Uncertainties on -oputationa!Lithography So!utionsCertain measurement methodologies can be inaccurate e#en if the"re precise, and there

are $nown errors associated with certain s"stem parameters

A Study /f Mode!"


25/25

SEM'-/N 7est (01>

&an -rancisco, Chttp8FFwwwsemiconwestorg

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MEMS ? Sensors 'ndustry =roup -onference Asia (01>&hanghai, Chinahttp8FFwwwmemsindustr"grouporgFe#entsFe#entZdetailsasp@id[.//Ogroup[&eptember B4, .B4/ ' &eptember EB, .B4/

more e#ents
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New Materials Are Being Integrated Into High Volume Manufacturing

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