n-MOS Fabrication Process
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Transcript of n-MOS Fabrication Process
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Semi Design Presents..
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N-MOS Fabrication Process
Fig. (1) Pure Si single crystal
Si-substrate
Fig. (2) P-type impurity is lightly doped
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N-MOS Fabrication Process
Fig. (3) SiO2 Deposited over si surface
Fig. (4) Photoresist is deposited over SiO2 layer
Thick SiO2
(1 µm)
Photoresist
Thick SiO2
(1 µm)
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N-MOS Fabrication Process
Fig. (5) Photoresist layer is exposed to UV Light through a
mask
Photoresist
Thick SiO2
(1 µm)
UV Light
Mask-1
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Mask-1 is used to expose the SiO2
where S, D and G is to be formed.
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N-MOS Fabrication Process
Fig. (6) Developer removes unpolymerised photoresist. It will cause no effect on Si surface
Polymerised
Photoresist
Thick SiO2
(1 µm)
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N-MOS Fabrication Process
Fig. (7) Etching [HF acid is used] will remove SiO2 layer which is in direct contact with etching solution
Thick SiO2
(1 µm)- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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N-MOS Fabrication Process
Fig. (7) unpolymerised photoresist is also etched away [using H2SO4]
Thick SiO2
(1 µm)- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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N-MOS Fabrication Process
Fig. (8) A thin layer of SiO2 grown over the entire chip surface
Thick SiO2
(1 µm)
Thin SiO2
(0.1 µm)
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N-MOS Fabrication Process
Fig. (9) A thin layer of polysilicon is grown over the entire chip surface to form GATE
Thick SiO2
(1 µm)
Thin SiO2
(0.1 µm)
Polysilicon layer
(1 – 2 µm)
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N-MOS Fabrication Process
Fig. (10) A layer of photoresist is grown over polysilicon layer
Thick SiO2
(1 µm)
Thin SiO2
(0.1 µm)
Polysilicon
layer
Photoresist
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N-MOS Fabrication Process
Fig. (11) Photoresist is exposed to UV Light
UV Light
Mask-2
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Mask-2 is used to deposit Polysilicon to form gate.
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N-MOS Fabrication Process
Fig. (12) Etching will remove that portion of Thin SiO2 which is not exposed to UV light
Thick SiO2
(1 µm)
Thin SiO2
(0.1 µm)
Polysilicon
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N-MOS Fabrication Process
Fig. (13) Polymerised photoresist is also stripped away
Thick SiO2
(1 µm)
Thin SiO2
(0.1 µm)
Polysilicon used as GATE
(1 – 2 µm)
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N-MOS Fabrication Process
Fig. (14) n+ Doping to form SOURCE and DRAIN
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Thick SiO2
(1 µm)
Thin SiO2
(0.1 µm)
GATE
- - -
- - -
n+
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- -
n+
SOURCE DRAIN
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N-MOS Fabrication Process
Step - Metallization
Fig. (15) A thick layer of SiO2 (1 µm) is again grown.
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Thick SiO2
(1 µm)
- - -
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n+
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n+ Thick SiO2
(1 µm)
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N-MOS Fabrication Process
Step - Metallization
Fig. (16) Photoresist is grown over thick SiO2. Selected areas of the poly GATE and SOURCE and
DRAIN are exposed where contact cuts are to be made
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Thick SiO2
(1 µm)
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n+
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n+ Thick SiO2
(1 µm)
Photoresist
Mask-3
UV Light
Mask-3 is used to make contact cuts for S, D and G.
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N-MOS Fabrication Process
Step - Metallization
Fig. (17) The region of photoresist which is not exposed by UV light will become soft. This
unpolymerised photoresist and SiO2 below it are etched away.
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Thick SiO2
(1 µm)
- - -
- - -
n+
- - - -
- -
n+ Thick SiO2
(1 µm)
Photoresist
Mask-3
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N-MOS Fabrication Process
Step - Metallization
Fig. (18) The contact cuts are formed for S, D and G (hardened photoresist is stripped away).
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Thick SiO2
(1 µm)
- - -
- - -
n+
- - - -
- -
n+ Thick SiO2
(1 µm)
Photoresist
Mask-3
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N-MOS Fabrication Process
Step - Metallization
Fig. (19) Metal (aluminium) is deposited over the surface of whole chip (1 µm thickness).
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Thick SiO2
(1 µm)
- - -
- - -
n+
- - - -
- -
n+ Thick SiO2
(1 µm)
Metal (1µm)
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N-MOS Fabrication Process
Step - Metallization
Fig. (20) Photoresist is deposited over the metal.
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Thick SiO2
(1 µm)
- - -
- - -
n+
- - - -
- -
n+ Thick SiO2
(1 µm)
Metal (1µm)
Photoresist
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N-MOS Fabrication Process
Step - Metallization
Fig. (21) UV Light is passed through Mask-4 (with a aim of removing all metal other than metal in
contact-cuts).
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Thick SiO2
(1 µm)
- - -
- - -
n+
- - - -
- -
n+ Thick SiO2
(1 µm)
Metal (1µm)Photoresist
UV Light
Mask-4
Mask-4 is used to deposit metal in contact cuts of S, D and G.
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N-MOS Fabrication Process
Step - Metallization
Fig. (22) Photoresist and metal which is not exposed to UV light are etched away.
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Thick SiO2
(1 µm)
- - -
- - -
n+
- - - -
- -
n+ Thick SiO2
(1 µm)
Metal (1µm)Photoresist
Mask-4
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N-MOS Fabrication Process
Step - Metallization
Fig. (23) Final n-MOS Transistor
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n+
SOURCE DRAIN
GATE