Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design...

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Multiple Multiple Output SOP Output SOP Minimization Minimization

Transcript of Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design...

Page 1: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

Multiple Output Multiple Output SOP MinimizationSOP Minimization

Page 2: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

Multiple-Output Minimization• Frequently, practical logic design problems require minimization

of multiple-output functions all of which are functions of the same input variables.

• This is such a tedious task that we relegate it to a computer program, eg, Espresso in the SIS package we see later in the course.

• Here, we will show what needs to be considered in multiple-output minimization, but advise that all such work be performed with the aid of a computer, ie, use a CAD tool.

Page 3: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

Example of Multiple-output Minimization

• To illustrate multiple-output minimization, consider the following three output expressions, each of three variables:

f A B C m

f A B C m

f A B C m

1

2

3

0 3 4 5 6

1 2 4 6 7

13 4 5 6

( , , ) ( , , , , )

( , , ) ( , , , , )

( , , ) ( , , , , )

Page 4: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

Minimizing f1

f1 = B’C’ + AB’ + AC’ + A’BC

1 1

BC

A 00 01

1

0 1

54

0

3 2

67

11 10

A

B

C

0

1 0 11 1

Page 5: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

Minimizing f2

f2 = A’B’C + BC’ + AB + AC’

0 0

BC

A 00 01

1

0 1

54

1

3 2

67

11 10

A

B

C

1

0 1 11

Page 6: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

Minimizing f3

f3 = A’C + AB’ + B’C + AC’

0 1

BC

A 00 01

1

0 1

54

0

3 2

67

11 10

A

B

C

1

1 0 11

Page 7: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

Shared Shared Prime Prime

ImplicantsImplicants

Page 8: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

Using Shared PIsUsing Shared PIs

• The object is to minimize each of the three functions in such a way as to retain as many shared terms between them as possible, thus optimizing the combinational logic of this system.

• Hence, we now need to look at the shared terms.

Page 9: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

AND-ed functions: f1.f2

f1 . f2 = AC’

0 0

BC

A 00 01

1

0 1

54

0

3 2

67

11 10

A

B

C

0

0 0 11

)6,4(. 21 mff

Page 10: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

AND-ed functions: f2.f3

f2 . f3 = AC’ + A’B’C

0 0

BC

A 00 01

1

0 1

54

0

3 2

67

11 10

A

B

C

1

0 0 11

f f m2 3 1 4 6. ( , , )

Page 11: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

AND-ed functions: f3.f1

f3 . f1 = AC’ + AB’ + A’BC

0 1

BC

A 00 01

1

0 1

54

0

3 2

67

11 10

A

B

C

0

1 0 11

f f m3 1 3 4 5 6. ( , , , )

Page 12: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

AND-ed functions: f1.f2 .f3

f1 . f2 . f3 = AC’

0 0

BC

A 00 01

1

0 1

54

0

3 2

67

11 10

A

B

C

0

0 0 11

f f f m1 2 3 4 6. . ( , )

Page 13: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

Summarizing Product Terms The original functions are:

f1 = B’C’ + AB’ + AC’ + A’BC

f2 = A’B’C + BC’ + AB + AC’

f3 = A’C + AB’ + B’C + AC’

The product terms, which must be included in the optimized expressions, are: f1 . f2 . f3 = AC’ - common to all three.

f1 . f2 = AC’

f2 . f3 = AC’ + A’B’C

f3 . f1 = AC’ + AB’ + A’BC

Page 14: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

Including Shared PI: AC’

1 1

BC

A 00 01

1

0 1

54

0

3 2

67

11 10

A

B

C

0

1 0 11

0 0

BC

A 00 01

1

0 1

54

1

3 2

67

11 10

A

B

C

1

0 1 11

0 1

BC

A 00 01

1

0 1

54

0

3 2

67

11 10

A

B

C

1

1 0 11

f1 = AC’

f2 = AC’

f3 = AC’

Page 15: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

Including Shared PI: A’B’C

1 1

BC

A 00 01

1

0 1

54

0

3 2

67

11 10

A

B

C

0

1 0 11

0 0

BC

A 00 01

1

0 1

54

1

3 2

67

11 10

A

B

C

1

0 1 11

0 1

BC

A 00 01

1

0 1

54

0

3 2

67

11 10

A

B

C

1

1 0 11

f1 = AC’

f2 = AC’ + A’B’C

f3 = AC’ + A’B’C

Page 16: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

Including Shared PI: AB’

1 1

BC

A 00 01

1

0 1

54

0

3 2

67

11 10

A

B

C

0

1 0 11

0 0

BC

A 00 01

1

0 1

54

1

3 2

67

11 10

A

B

C

1

0 1 11

0 1

BC

A 00 01

1

0 1

54

0

3 2

67

11 10

A

B

C

1

1 0 11

f1 = AC’ + AB’

f2 = AC’ + A’B’C

f3 = AC’ + A’B’C + AB’

Page 17: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

Including Shared PI: A’BC

1 1

BC

A 00 01

1

0 1

54

0

3 2

67

11 10

A

B

C

0

1 0 11

0 0

BC

A 00 01

1

0 1

54

1

3 2

67

11 10

A

B

C

1

0 1 11

0 1

BC

A 00 01

1

0 1

54

0

3 2

67

11 10

A

B

C

1

1 0 11

f1 = AC’ + AB’ + A’BC

f2 = AC’ + A’B’C

f3 = AC’ + A’B’C + AB’ + A’BC

Page 18: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

Including Remaining PIs

1 1

BC

A 00 01

1

0 1

54

0

3 2

67

11 10

A

B

C

0

1 0 11

0 0

BC

A 00 01

1

0 1

54

1

3 2

67

11 10

A

B

C

1

0 1 11

0 1

BC

A 00 01

1

0 1

54

0

3 2

67

11 10

A

B

C

1

1 0 11

f1 = AC’ + AB’ + A’BC + B’C’

f2 = AC’ + A’B’C + AB + BC’

f3 = AC’ + A’B’C + AB’ + A’BC

Page 19: Multiple Output SOP Minimization. Multiple-Output Minimization Frequently, practical logic design problems require minimization of multiple-output functions.

What have we learnt?• Multiple-output minimization is not for the faint hearted.• You should be able to find reasonably good solutions

from 5-variable Kmaps.• Good understanding of these principles will help you to

understand how software for SOP minimization works, coming very soon

• For any practical problem, use a suitable CAD package.• The principles illustrated above are used to create

efficient programs for multiple-output minimization.