Lecture07 Ee620 Pll Units Noise
description
Transcript of Lecture07 Ee620 Pll Units Noise
![Page 1: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/1.jpg)
Sam Palermo Analog & Mixed-Signal Center
Texas A&M University
ECEN620: Network Theory Broadband Circuit Design
Fall 2012
Lecture 7: PLL Units & Noise Transfer Functions
![Page 2: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/2.jpg)
Announcements & Agenda
• HW1 now due on Friday
• PLL Units • PLL Noise Transfer Functions
2
![Page 3: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/3.jpg)
References
• Chapter 2, 3, 5, & 12 of Phaselock Techniques, F. Gardner, John Wiley & Sons, 2005.
• M. Mansuri, “Low-Power Low-Jitter On-Chip Clock Generation,” Ph.D. thesis, UCLA, 2003.
3
![Page 4: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/4.jpg)
PLL Units w/ Dimensionless Filter (Non-Charge-Pump PLL)
4
![Page 5: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/5.jpg)
Phase Detector
• Detects phase difference between feedback clock and reference clock
• The loop filter will filter the phase detector output, thus to characterize phase detector gain, extract average output voltage
• The KPD factor can change depending on the specific phase detector circuit
5 V/rad are units
:filter loop less-dimension w/ PLL
PDK
![Page 6: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/6.jpg)
Dimension-Less Loop Filter
• Lowpass filter extracts average of phase detector signal
• No units for the dimension-less loop filter 6
( ) ( )
CRCR
sssF
2211
21
2
11
==
+++
=
ττ
τττ
Example: Passive Lag-Lead Loop Filter [Allen]
![Page 7: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/7.jpg)
Voltage-Controlled Oscillator
• Time-domain phase relationship
7
VDDVDD/20
ω0 1KVCO
( ) ( ) ( )tvKtt cVCOoutout +=∆+= 00 ωωωω
( ) ( ) ( )∫ ∫=∆= dtdt tvKtt cVCOoutout ωφLaplace Domain Model
φout(t) ( )
Vsrad102
VMHz12
Vsrad are units
6
⋅×=
⋅
ππ
VCOK
![Page 8: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/8.jpg)
Loop Divider
• Time-domain model
8
( ) ( )tN
t outfb ωω 1=
( ) ( ) ( )∫ == tN
tN
t outoutfb φωφ 1dt1
[Perrott]
φout(t) φfb(t)
• The loop divider is dimension-less in the PLL linear model
![Page 9: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/9.jpg)
PLL Units w/ Dimensionless Filter (Non-Charge-Pump PLL)
9 less-unit isDivider Loop
Vsrad are units
less-unit isFilter LoopV/rad are units
⋅VCO
PD
K
K
![Page 10: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/10.jpg)
10
[Mansuri]
PLL Units w/ Impedance Filter (Charge-Pump PLL)
=π2CP
PDDIKK
![Page 11: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/11.jpg)
Phase Frequency Detector (PFD) • Phase Frequency Detector allows for wide
frequency locking range, potentially entire VCO tuning range
• 3-stage operation with UP and DOWN outputs
• Edge-triggered results in duty cycle insensitivity
• The un-averaged PFD gain is typically “1” and dimension-less
11
![Page 12: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/12.jpg)
Averaged PFD Transfer Characteristic
• Constant slope and polarity asymmetry about zero phase allows for wide frequency range operation
• The averaged PFD gain is typically “1/(2*pi)” with units of rad-1
12
UP=1 & DN=-1
[Perrott]
![Page 13: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/13.jpg)
Charge Pump
• Converts PFD output signals to charge
• Charge is proportional to PFD pulse widths
13
( )
used isdetector phasedifferent a ifcan vary gain Thisrad
Amps 2
Gain Pump-Charge & PFD Total
radAmps
2 Gain Pump-Charge Averaged
Amps Gain Pump-Charge Averaged-Un
=
=
=
π
π
CP
CP
CP
I
II
![Page 14: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/14.jpg)
Loop Filter
• Lowpass filter extracts average of phase detector error pulses
• The units of the filter are ohms 14
I
I
VCO ControlVoltage
C1
R
C2
Charging
Discharging
VDD
VSSF(s)
( )sRC
sRsF
+
= 1
1
( )
++
+
=
21
21
12
11
CRCCCss
RCs
CsF
w/o C2
w/ C2
![Page 15: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/15.jpg)
15
[Mansuri]
PLL Units w/ Impedance Filter (Charge-Pump PLL)
=π2CP
PDDIKK
less-unit isdivider LoopVs
rad are units
radA of units hasgain combined Pump-Charge &Detector Phase Total
averaged if radA averaged,-un ifA are unitsGain Pump Charge
averaged if rad of units averaged,-un if less-unit is -1
⋅VCO
PD
K
K
![Page 16: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/16.jpg)
PLL Noise Transfer Function
16
[Mansuri]
![Page 17: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/17.jpg)
Input Noise Transfer Function
17
( ) 222 2
221
nn
nn
n
outn ss
sN
RCKKss
RCsNK
sHIN
IN ωζωζωζω
φφ
++
+=
++
+
==
( )
++
+
=
==
RCKKsss
RCsNKK
sK
vsT
oo
n
out
n
outn
ININ
IN2
1
φφφ
sKo
Input Phase Noise:
Voltage Noise on Input Clock Source:
[Mansuri]
)1 (assumes 2
:factorgain loop aw/ == PDVCOCP KN
RKIKπ
![Page 18: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/18.jpg)
Input Noise Transfer Function
18
( ) 222 2
221
nn
nn
n
outn ss
sN
RCKKss
RCsNK
sHIN
IN ωζωζωζω
φφ
++
+=
++
+
==
( )
++
+
=
==
RCKKsss
RCsNKK
sK
vsT
oo
n
out
n
outn
ININ
IN2
1
φφφ
Input Phase Noise:
Voltage Noise on Input Clock Source:
( )
( )VCO0
VCOn
,10 ,12
26.1 ,253
1N ,12 ,rad 2
10
10*2 ,1 ,1*2
Parameters Simulation
ωωπ
ππµ
πωζπω
===
Ω==
===
===
bufdelay
VCOPD
VpsK
VMHzK
kRpFC
VGHzKAK
GHzMHz
![Page 19: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/19.jpg)
VCO Noise Transfer Function
19
( ) 22
2
2
2
2 nnn
outn ss
s
RCKKss
ssHVCO
VCO ωζωφφ
++=
++==
( )
RCKKss
sKs
Kv
sT VCOVCO
n
out
n
outn
VCOVCO
VCO
++=
==
2φφφ
VCO Phase Noise:
Voltage Noise on VCO Inputs:
KVCO is different if the input is at the Vcntrl input (KVCO) or supply (KVdd)
[Mansuri]
![Page 20: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/20.jpg)
VCO Noise Transfer Function
20
( ) 22
2
2
2
2 nnn
outn ss
s
RCKKss
ssHVCO
VCO ωζωφφ
++=
++==
( )
RCKKss
sKs
Kv
sT VCOVCO
n
out
n
outn
VCOVCO
VCO
++=
==
2φφφ
VCO Phase Noise:
Voltage Noise on VCO Inputs:
( )
( )VCO0
VCOn
,10 ,12
26.1 ,253
1N ,12 ,rad 2
10
10*2 ,1 ,1*2
Parameters Simulation
ωωπ
ππµ
πωζπω
===
Ω==
===
===
bufdelay
VCOPD
VpsK
VMHzK
kRpFC
VGHzKAK
GHzMHz
![Page 21: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/21.jpg)
Clock Buffer Noise Transfer Function
21
( ) 22
2
2
2
2 nnn
outn ss
s
RCKKss
ssHbuf
buf ωζωφφ
++=
++==
( )
RCKKss
sK
RCKKss
ss
Ks
Kv
sT VCOdelay
buf
VCOdelay
buf
VCOdelay
n
out
n
outn
bufbuf
buf
++≈
++
+=
+
==
2
2
2
2
11
ω
ω
ω
ω
ωφφφ
Output Phase Noise:
Voltage Noise on Buffer Inputs:
Kdelay units = (s/V)
[Mansuri]
![Page 22: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/22.jpg)
Clock Buffer Noise Transfer Function
22
( ) 22
2
2
2
2 nnn
outn ss
s
RCKKss
ssHbuf
buf ωζωφφ
++=
++==
( )
RCKKss
sK
RCKKss
ss
Ks
Kv
sT VCOdelay
buf
VCOdelay
buf
VCOdelay
n
out
n
outn
bufbuf
buf
++≈
++
+=
+
==
2
2
2
2
11
ω
ω
ω
ω
ωφφφ
Output Phase Noise:
Voltage Noise on Buffer Inputs:
( )
( )VCO0
VCOn
,10 ,12
26.1 ,253
1N ,12 ,rad 2
10
10*2 ,1 ,1*2
Parameters Simulation
ωωπ
ππµ
πωζπω
===
Ω==
===
===
bufdelay
VCOPD
VpsK
VMHzK
kRpFC
VGHzKAK
GHzMHz
![Page 23: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/23.jpg)
PLL Noise Transfer Function Take-Away Points
• The way a PLL shapes phase noise depends on where the noise is introduced in the loop
• Optimizing the loop bandwidth for one noise source may enhance other noise sources
• Generally, the PLL low-pass shapes input phase noise, band-pass shapes VCO input voltage noise, and high-pass shapes VCO/clock buffer output phase noise
23
![Page 24: Lecture07 Ee620 Pll Units Noise](https://reader030.fdocuments.net/reader030/viewer/2022020122/552a72254a7959756d8b460d/html5/thumbnails/24.jpg)
Next Time
• PLL System Analysis • Transient Response
24