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    ELEN E6321

    Advanced Digital Electronics Circuits

    Lecture 15: Power Supply

    Acknowledgement: Prof Dennis Sylvester and David Blaauw

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    Outline

    Power supply

    Packaging Power grid

    ELEN E6321 W12 Power Supply- 2Advanced Digital Electronics Design

    On-chip decoupling capacitors

    Transient analysis

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    Power supply

    Goal:

    Supply a constant voltage (temporal/spatial)

    to all devices on chip

    Problem:

    ELEN E6321 W12 Power Supply- 3Advanced Digital Electronics Design

    Must get current from voltage regulator to chip

    Supply system does not start from chip

    pins but includes board Supply network design is very difficult,

    even though small number of transistors

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    From the regulator to the chip

    Decoupling cap Flip chip C4

    ELEN E6321 W12 Power Supply- 4Advanced Digital Electronics Design

    C4: Controlled Collapsed Chip Connects

    Decoupling cap

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    Supply network model

    ChipPCB Package

    ELEN E6321 W12 Power Supply- 5Advanced Digital Electronics Design

    Decoupling cap

    Shorter wires, more R than L

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    ITRS

    ELEN E6321 W12 Power Supply- 6Advanced Digital Electronics Design

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    Voltage drop (1/2)

    IR drop

    Max at peak current

    Scaling of Idc P V I

    P=15W Vdd=2.5V

    IRVIR =

    20P

    I

    = =

    ELEN E6321 W12 Power Supply- 7Advanced Digital Electronics Design

    P=150W (10x) Vdd=1.25V (0.5x)

    Ldi/dt drop

    Due to change in current

    Scaling of Vac dI dt dI/dt

    f=200MHz

    f=1GHz (5x)

    V

    dt

    dILVL =

    7 35LI V = =

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    Voltage drop (2/2)

    Time of drop is different. Do not strictly add

    I

    Pulsed noise

    ELEN E6321 W12 Power Supply- 8Advanced Digital Electronics Design

    IRV

    LV

    dropV

    DC noise (sustained) under/over shoot

    Supply variation

    both: Time (temporal)

    Area (spatial)

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    Problems due to power grid noise (1/3)

    Sustained drop: Performance degradation

    tssddtgsd VVVVVI

    CV

    t

    11

    dtV

    ELEN E6321 W12 Power Supply- 9Advanced Digital Electronics Design

    Acts as standard noise pulse

    Difference not absolute

    voltage drop Uniform drop is OK

    Vo,driver Vg,receiver

    Vs,driver Vs,receiver

    DRIVER RECEIVER

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    Problems due to power grid noise (2/3)

    TDDB: Time Dependent Dielectric

    Breakdown

    Due to overshoots (inductance)

    Hot electrons cause injection into gate oxide,

    ELEN E6321 W12 Power Supply- 10Advanced Digital Electronics Design

    may get trapped degrade the performanceof the transistor

    Limit on Vdd

    Electromigration

    High current densities displace metal atoms

    out of place due to momentum transfer.

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    Problems due to power grid noise (3/3)

    ELEN E6321 W12 Power Supply- 11Advanced Digital Electronics Design

    Cu is better than Al AC vs DC signal

    AC has e- moving in both directions

    DC only moves e- in one direction

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    Board design (1/3)

    Decoupling capFlip chip C4

    ELEN E6321 W12 Power Supply- 13Advanced Digital Electronics Design

    Decoupling cap

    w

    Z

    C

    wr

    LCr

    1=

    Cj

    LjRZ

    1

    ++=

    Due to inductance

    Desired

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    Board design (2/3)

    Decoupling capFlip chip C4

    ELEN E6321 W12 Power Supply- 14Advanced Digital Electronics Design

    Decoupling cap

    Low freq

    Big Cap

    High freq

    Small Cap

    Chip

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    Board design (3/3)

    Make sure resistance is small

    Decap design: act to filter high frequency

    current

    Small cap w/low L near chip to suppress

    ELEN E6321 W12 Power Supply- 15Advanced Digital Electronics Design

    high frequency current Try to get as close to chip as possible

    Large cap w/higher L further away from

    chip

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    Package types (1/3)

    ELEN E6321 W12 Power Supply- 16Advanced Digital Electronics Design

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    Package types (2/3)

    Wire bonding Advantages:

    Cheap

    Allows for thermalexpansion

    Disadvantages:

    ELEN E6321 W12 Power Supply- 17Advanced Digital Electronics Design

    g n uc ance(typical 5nH)

    Limited pads (~200)

    To reduce R More

    metal layers To reduce L Lower

    distance fromconnections, bring cap

    closer

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    Package types (3/3)

    Flip-chip or C4 (controlled collapse chip connect)

    Advantages:

    Lower inductance (0.1nH) lower distance High number of pads (~1000)

    ELEN E6321 W12 Power Supply- 18Advanced Digital Electronics Design

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    Pentium Package

    ELEN E6321 W12 Power Supply- 19Advanced Digital Electronics Design

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    Power Integrity & Package Package design becoming increasingly complicated

    Detailed 3D modeling and simulation is necessary

    Magnetic coupling affects supply voltage integrity

    Runtime effects!

    Large number of power/ground layers in current packages

    ELEN E6321 W12 Power Supply- 20Advanced Digital Electronics Design

    chip

    capacitorcapacitor

    chip carrier

    Solder balls

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    Power Supply Variations Package Effects

    C4s

    Balls

    Planes

    VDD

    GND

    ELEN E6321 W12 Power Supply- 21Advanced Digital Electronics Design

    Power IR Drop by the

    package

    Is usually non- uniform across

    the various C4 Can be difficult to predict and

    analyze

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    On-Chip Power Delivery

    Connection

    to package

    C4 balls

    ELEN E6321 W12 Power Supply- 22Advanced Digital Electronics Design

    Connection to circuits

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    Results: VDD Profile

    ELEN E6321 W12 Power Supply- 23Advanced Digital Electronics Design

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    Power Grid design (1/3)

    Tree

    Local grids

    Simple Metal utilization is

    efficient

    ELEN E6321 W12 Power Supply- 25Advanced Digital Electronics Design

    Single wire failure

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    Power Grid design (2/3)

    Grid

    High end processor

    Lots of metal Lower resistance

    ELEN E6321 W12 Power Supply- 26Advanced Digital Electronics Design

    Less J, betterelectromigration

    Spatial variation is lower

    Highly redundant

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    Power Grid design (3/3)

    Plane

    Power planes, reserve two

    layers of metal Good to reduce inductive

    coupling

    ELEN E6321 W12 Power Supply- 27Advanced Digital Electronics Design

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    Decoupling cap Implicit (1/3)

    ELEN E6321 W12 Power Supply- 28Advanced Digital Electronics Design

    n-well cap

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    Decoupling cap Implicit (2/3)

    Cdb

    Cgd

    Vdd grid Vdd grid

    Cdb,N

    Cgd,N/P

    ELEN E6321 W12 Power Supply- 29Advanced Digital Electronics Design

    Csb

    Cgs

    GND grid

    ( ) ( ) PgdNgdVddigndiPgsPdbNgsNdbeff CCCCCCCCC ,,,,,,,, 2121 +++++++=

    GND grid

    Ci,gnd Cgs,N

    Depends on state of circuit

    Current injected/extracted at different locations

    Includes both device and interconnect parasitics

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    Decoupling cap Back of the envelope (3/3)

    Implicit decoupling capacitance is the

    capacitance that is not switching

    Assuming a switching factor of s

    ELEN E6321 W12 Power Supply- 30Advanced Digital Electronics Design

    2

    2

    dd

    switch

    ddswitch

    fV

    PC

    VfCP

    =

    =

    ( )

    2

    1

    1

    dd

    decap

    totaldecap

    totalswitch

    fV

    P

    s

    sC

    CsC

    sCC

    =

    =

    =

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    Decoupling cap explicit (1/4)

    ELEN E6321 W12 Power Supply- 31Advanced Digital Electronics Design

    Reliability: Thin oxide

    gate can short. Yield

    problem

    High gate leakage

    Short only if double failure

    Gate voltage is half, less

    sensitive to gate failure

    Less cap

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    Decoupling cap explicit (2/4)

    ELEN E6321 W12 Power Supply- 32Advanced Digital Electronics Design

    Turns off the cap in caseof oxid