Jobins FET

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J-FET (Junction Field Effect Transistor) Introduction The field-effect transistor (FET) controls the current between two points but it is different from bipolar transistor. The FET operates by the effects of an electric field on the flow of electrons through a single type of semiconductor material. This is why the FET is sometimes called a unipolar transistor.J-FET (Junction Field Effect Transistor)Introductioncont

Current moves within the FET in a channel, from the source (S) connection to the drain (D) connection. A gate (G) terminal generates an electric field that controls the current .The channel is made of either N-type or P-type semiconductor material; an FET is specified as either an N-channel or P-channel device Majority carriers flow from source to drain. In N-channel devices, electrons flow so the drain potential must be higher than that of the Source (VDS > O)- In P-channel devices, the flow of holes requires that VDS < 0

FET ( Field Effect Transistor)Unipolar device i. e. operation depends on only one type of charge carriers (h or e) Voltage controlled Device (gate voltage controls drain current)Very high input impedance (109-1012 )Source and drain are interchangeable in most Low-frequency applicationsLow Voltage Low Current Operation is possible (Low-power consumption)Less Noisy as Compared to BJTNo minority carrier storage (Turn off is faster) Self limiting deviceVery small in size, occupies very small space in ICsLow voltage low current operation is possible in MOSFETS Zero temperature drift of out put is possibleFew important advantages of FET over conventional TransistorsTypes of Field Effect Transistors (The Classification) JFETMOSFET (IGFET)n-Channel JFETp-Channel JFETn-Channel EMOSFET p-Channel EMOSFET Enhancement MOSFETDepletion MOSFETn-Channel DMOSFET p-Channel DMOSFET FETFigure: n-Channel JFET.

The Junction Field Effect Transistor (JFET)Figure: n-Channel JFET and Biasing Circuit.

Biasing the JFET

Figure: The nonconductive depletion region becomes broader with increased reverse bias. (Note: The two gate regions of each FET are connected to each other.)

Operation of JFET at Various Gate Bias Potentials Figure: n-Channel FET for vGS = 0.

Simple Operation and Break down of n-Channel JFET

Figure: If vDG exceeds the breakdown voltage VB, drain current increases rapidly.

Break Down RegionN-Channel JFET Characteristics and BreakdownFigure: Typical drain characteristics of an n-channel JFET.

VD-ID Characteristics of EMOS FETSaturation or Pinch off Reg.Locus of pts where

Figure: Transfer (or Mutual) Characteristics of n-Channel JFET

IDSSVGS (off)=VPTransfer (Mutual) Characteristics of n-Channel JFETFigure: Circuit for drain characteristics of the n-channel JFET and its Drain characteristics.

Non-saturation (Ohmic) Region:

The drain current is given by

Where, IDSS is the short circuit drain current, VP is the pinch off voltageOutput or Drain (VD-ID) Characteristics of n-JFETSaturation (or Pinchoff) Region:

January 2004ELEC 12118

MOSFETsMOSFETs have characteristics similar to JFETs and additional characteristics that make then very useful

There are 2 types of MOSFETs:Depletion mode MOSFET (D-MOSFET)Operates in Depletion mode the same way as a JFET when VGS 0Operates in Enhancement mode like E-MOSFET when VGS > 0Enhancement Mode MOSFET (E-MOSFET)Operates in Enhancement modeIDSS = 0 until VGS > VT (threshold voltage)Importance for LSI/VLSILow fabrication costSmall sizeLow power consumptionApplicationsMicroprocessorsMemoriesPower DevicesBasic PropertiesUnipolar deviceVery high input impedanceCapable of power gainTwo possible device types: enhancement mode; depletion modeTwo possible channel types: n-channel; p-channel19SymbolsGDSBGDSBp Channel MOSFETn Channel MOSFET20

pn+n+metalsourceSgateGdrainDbodyBoxide+-+++++++++ VDS largeThe saturation region is when the MOSFET experiences pinch-off. Pinch-off occurs when VG - VD is less than VT.

Figure 5.46 n-Channel depletion MOSFET.

Depletion mode n-MOSFETJanuary 2004ELEC 12128

Depletion Mode MOSFET ConstructionThe Drain (D) and Source (S) leads connect to the to n-doped regionsThese N-doped regions are connected via an n-channelThis n-channel is connected to the Gate (G) via a thin insulating layer of SiO2The n-doped material lies on a p-doped substrate that may have an additional terminal connection called SS