Industry Conference and Exhibition - TPCA Industry Conference and Exhibition INFORMATION that...

®

www.IPCAPEXEXPO.org

The Premier Electronics Industry Conference and Exhibition

INFORMATION that INSPIRES INNOVATION

DESIGN • BOARDS • ELECTRONICS ASSEMBLY • TEST • PRINTED ELECTRONICS

Please refer to www.IPCAPEXEXPO.org for the most up-to-date information.

www.IPCAPEXEXPO.org

THIS EVENT IS …

Produced by: IPC — Association Connecting Electronics Industries®

Sponsored by:

China Printed Circuit Association (CPCA)European Institute of Printed Circuits (EIPC)Hong Kong Printed Circuit Association (HKPCA) International Electronics Manufacturing Initiative (iNEMI)Indian Printed Circuit Association (IPCA) International Microelectronics and Packaging Society

(IMAPS)JPCA-Japan Electronics Packaging and Circuits

Association Japan Robotics Association (JARA)JEDEC Solid State Technology Association Korea Printed Circuit Association (KPCA) Microelectronics Packaging and Test Engineering Council

(MEPTEC)Surface Mount and Circuit Board Association (SMCBA)Taiwan External Trade Development Council (TAITRA)

Taiwan Printed Circuit Association (TPCA)

With support from: •ASSEMBLY •Circuit Cellar •Circuitnet•Circuits Assembly •Dempa Publications, Inc. •Electronics Assembly• Electronics Industry

Update•Electronics Protection •Elektor USA•EMChina.org.cn •EMSNow •EMT Worldwide •FLEX007 •Global PCB Marketplace •Global SMT & Packaging

•MedicalDeviceNow.com • Medical Product

Outsourcing •Metal Finishing •PCB007•PCBCafé.com •PCBDESIGN007 • Printed Circuit Design

& Fab •Printed Circuit Journal •Printed Circuit World •SMT magazine •SMTnet.com •Surface Mount World •U.S. Tech •Wiring Harness News

IPC APEX EXPO® — There’s no other event like it in the world!Industry’s Premier Technical Conference • Focused Exhibition • Professional Development • Networking Opportunities • Certification • Standards DevelopmentJoin your colleagues from around the world at IPC APEX EXPO® 2012 in San Diego for some inspiration in the sun.

PRINTED ELECTRONICS

FIRST ANNUAL IPC APEX EXPO Hand Soldering Competition

BRING IT!

in Technical Conference, Standards Development Meetings and Exhibition

OPENING KEYNOTEWilliam Shatner

NEW IN 2012

February 28–March 1, 2012®

1WELCOME

WELCOME

An invitation to get inspired …Innovation is a state of mind, and I invite you to open yourself up to it at IPC APEX EXPO 2012. Surround yourself with the experts, colleagues, companies and learning environment that possess the knowledge to help lead you to solutions, breakthroughs and ideas for genuine innovation.

This year, we welcome William Shatner as our opening keynote speaker. He will provide an entertaining and thoughtful address on the inspirations in life that have helped him gain so many achievements as well as guided him in difficult times with an unbreakable spirit.

Throughout IPC APEX EXPO, you’ll discover critical information to boost your expertise and learning through premier technical conference sessions, professional development courses and standards development meetings.

New features like the New Product Zone in the exhibit hall and the addition of a printed electronics focus to the technical conference, standards development meetings and exhibition will shed light on new ways to address challenges and potential growth opportunities for you and your company.

New information, research and conversations can incite great ideas for problem solving and genuine innovation. Join your colleagues and experts in the electronics industry in San Diego and let the sunshine and new ideas stimulate your senses.

Sincerely,

TABLE OF CONTENTS

Schedule of Events 2

Exhibitors 3

On the Show Floor 6

Keynote Sessions 7

Networking Opportunities 8

Programs for Designers 9

Programs for Executives 10

BUZZ Sessions 11

IPC Technical Conference 12

Professional Development Courses 20

Standards Development Meetings 36

Hand Soldering Competition 43

Hotel & Travel 44

Registration Options 45

The show, conference and meetings will take place at the San Diego Convention Center, 111 W. Harbor Drive, San Diego, California USA.

Policies

Any function that is not part of the “official program” is prohibited, from the first meeting to the close of the event.

IPC does not permit solicitation by nonexhibiting companies. Any individual who is observed participating in activities to solicit or sell products to event attendees or exhibitors without having a booth at the event will be asked to leave immediately.

Robert J. FergusonChairman, IPC Board of Directors Executive Vice President, Electronic Materials & North AsiaAvantor Performance Materials


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SCHEDULE OF EVENTS

Exhibits OpenTuesday, February 28 10:00 am–6:00 pm

Wednesday, February 29 10:00 am–6:00 pm

Thursday, March 1 10:00 am–2:00 pm

Sunday, February 268:00 am–6:00 pm IPC Standards Development

Committee Meetings

9:00 am–12:00 pm Professional Development Courses

10:00 am–7:00 pm IPC CCA Golf Tournament followed by Reception

2:00 pm–5:00 pm Professional Development Courses

Monday, February 277:30 am–9:00 pm IPC PCB Executive

Management Meeting & Dinner

7:30 am–9:00 pm IPC EMS Management Council Meeting & Dinner

7:30 am–1:30 pm IPC Designers Forum

8:00 am–5:00 pm IPC Standards Development Committee Meetings


12:00 pm–1:30 pm Event Awards Luncheon


5:30 pm–6:30 pm International Reception

Tuesday, February 287:30 am–8:30 am IPC First-Timers’ Welcome

Breakfast

8:30 am–9:30 am Opening Keynote Session

9:45 am–10:00 am Ribbon Cutting Ceremony


10:00 am–6:00 pm Exhibits Open

12:00 pm–1:30 pm Event Luncheon & IPC Annual Meeting

1:30 pm–4:45 pm BUZZ Sessions

1:30 pm–5:00 pm Technical Conference Sessions

6:00 pm Exhibitor Networking Functions

Wednesday, February 297:30 am–8:30 am Women in Electronics

Networking Meeting

8:00 am–9:30 am Keynote Session


9:00 am–11:45 am Technical Conference Sessions

9:00 am–11:45 am BUZZ Sessions


12:00 pm–1:30 pm Event Awards Luncheon

1:30 pm–3:30 pm Technical Conference Sessions

1:30 pm–3:30 pm BUZZ Session

3:30 pm–4:30 pm Poster Presentations by Authors

4:00 pm–6:00 pm Show Floor Reception

Thursday, March 18:00 am–12:00 pm IPC Standards Development

Committee Meetings

8:30 am–11:45 am BUZZ Sessions

9:00 am–11:45 am Technical Conference Sessions




Select IPC Standards Development Meetings will take place on Saturday, February 25.

Certification programs for designers and EMS program managers will take place throughout the week; see pages 9 and 10, respectively, for dates and times of those programs.

All events in gold are FREE with pre-registration

As of October 14, 2011. Subject to change. Visit www.IPCAPEXEXPO.org for the most current schedule.



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3M Electronic Solutions Division

A.I. Technology, Inc.

AccuAssembly

Acculogic Inc.

ACD

ACE Production Technologies

ADS Gold Inc.

Advanced Electronic Technology HK Limited

Advanced West

Aegis Industrial Software

Agilent Technologies, Inc.

AIM

Air & Water Systems

Air Products

Airtech International, Inc.

AIR-VAC Engineering Company

All Flex Flexible Circuits

All4-PCB (North America) Inc.

Alltemated Inc.

Alpha 1 Technologies

Alpha-Cookson Electronics

AmeriVacS

Amistar Automation, Inc.

Amtech - Advanced SMT Solder Products

Apexyl Enterprises Ltd./JiuJiang Flex Co., Ltd.

Apollo Seiko

Aqueous Technologies

Arc-Tronics, Inc.

Argosy Industries, Inc.

Arlon Technology Enabling Innovation

ASC International

Ascentec Engineering

Ascentech-GEN3

ASM Assembly Systems

Assembléon America

Assembly

ASYS Group Americas Inc.

AT&S Americas LLC

atg-LM

Atotech USA, Inc.

Austin American Technology Corp.

Aven Inc.

AXTEL, Inc.

Bare Board Group

Besi North America, Inc.

Blackfox Training Institute, LLC

Bliss Industries, Inc.

BPM Microsystems

Brock Electronics

BTU International, Inc.

Bürkle North America, Inc.

C. A. Picard Inc.

cab Technology, Inc.

Caltex Scientific

Camtek USA, Inc.

CCI

Cencorp Americas LLC

Chad Industries

CheckSum LLC

CHEMCUT Corporation

China Printed Circuit Association

Christopher Associates, Inc.

Cimnet Systems, a Consona ERP Solution

Cincinnati Sub-Zero

Circuit Cellar

Circuit Foil Luxembourg

Circuitnet

Circuits Assembly

Cirris Systems

Cobar Solder Products Inc.

Cogiscan Inc.

Computrol Inc.

Control Micro Systems, Inc.

Conveyor Technologies of Sanford, NC, Inc.

Count On Tools

Crystal Mark, Inc.

Custer Consulting Group

CyberOptics Corporation

Data I/O Corporation

Datapaq, Inc.

DDM Novastar, Inc.

De Nora Tech, Inc.

DEK International

Dempa Publications, Inc.

Digicom Electronics, Inc.

Digitaltest, Inc.

DIS Inc.

Divsys International, LLC

DMI

Dow Electronic Materials

DuPont Electronic Technologies

DV Test

EXHIBITORS

Exhibits OpenTuesday, February 28 10:00 am–6:00 pm

Wednesday, February 29 10:00 am–6:00 pm

Thursday, March 1 10:00 am–2:00 pm

See and compare equipment. Discover new processes to gain greater effi-ciency. Find new suppliers to save you hundreds of thousands of dollars. Uncover new solutions that will improve your bottom line.

Every year, attendees tell us that they’ve learned something important or found a critical new supplier, often with a big impact on their companies. That can be your story, too!

Exhibits Only registration is FREE to individuals who pre-register online at www.IPCAPEXEXPO.org. Register today!


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Eastman Kodak Company

Easy Braid Co.

ECD

EIPC

ELANTAS PDG, Inc.

Electra Polymers Ltd.

Electronics Assembly

Electronics Protection

Elektor US

EMCHINA.org.cn

EMSNow

EMT Worldwide

EPTAC Corporation

Equipment Technologies, Inc.

ERSA North America

ESSEMTEC USA

Europlacer North America

Excellon Automation

Exopack Advanced Coatings

Fancort Industries, Inc.

FASTechnologies

FCT Assembly

FEASA

Finetech (parent co. of Martin)

Fischer Technology, Inc.

Fisnar Inc.

FKN Systek

FlexLink Systems, Inc.

FocalSpot, Inc.

Fuji America Corporation

Glenbrook Technologies, Inc.

Global PCB Marketplace

Global SMT & Packaging

GOEPEL Electronics

Gordon Brush Mfg. Co., Inc.

GPD Global, Inc.

GSC

Guangdong Shengyi Sci. Tech./ Paramount Laminates

Hamamatsu Corporation

Heller Industries

Henkel Electronic Materials LLC

HEPCO, Inc.

Heraeus Materials Technology

Hesse & Knipps

HIROX-USA, Inc.

Hisco

Hitachi High Technologies America, Inc.

Hitachi Via Mechanics (USA), Inc.

Hong Kong Printed Circuit Association

HumiSeal, Chase Electronic Coatings

I Source Technical Services, Inc.

IBE SMT Equipment

IBL Technologies, LLC

ICAPE Group

I-Connect007

Indium Corporation

Inovaxe Corporation

Insulectro

InsulFAB PCB Tooling

Integrated Ideas & Technologies

Integrated Process Systems

Integrated Systems Technology Inc.

Interconnect Systems, Inc.

INVENTEC Performance Chemicals

Isola Group

ITC Intercircuit

JBC Tools

Jevco/ABBA Roller LLC.

JMW Enterprises

JNJ Industries

JOT Automation Ltd.

JPCA-Japan Electronics Packaging & Circuit Association

JTAG Technologies

JTech Solutions Inc.

Juki Automation Systems

KIC

KM USA LLC

Koh Young Technology, Inc.

Kuper Technologies

KVMS/Europe-SMT

Kyzen Corporation

LaserJob Inc.

LCOA

Lista International

LPKF Laser & Electronics

M+B Plating Racks

MacDermid Inc.

Machine Vision Products, Inc.

Malcomtech International

Manncorp

Maskless Lithography, Inc.

MatriX Technologies GmbH

Maxpcb, LLC

Mentor Graphics

MEPTEC

MET Associates

Metal Finishing

Metro SMT Ltd.

Metrohm USA

MicroCraft

Micron Laser Technology

Micronic North America

Microscan Systems Inc.

MicroScreen, LLC

Microtek Labs

Mid America Taping & Reel

Mirae Corporation

MIRTEC Corp.

ML System Inc.

MPO/MedicalDeviceNow.com

mta automation inc.

MYDATA automation Inc.

National Graphic Supply

Nihon Superior Co., Ltd.

Nikon Metrology, Inc.

NIX OF AMERICA

Nordson ASYMTEK

Nordson DAGE

Nordson EFD

Nordson YESTECH

North Star Imaging, Inc.

NPL Process Defect Clinic

Nujay Technologies Inc.

Nutek Americas Inc.

Oak Mitsui Inc.

OEM Press Systems, Inc.

Ohmega Technologies Inc.

OK International

OLAMEF USA

OMG Electronic Chemicals, LLC

Omni Training

Omron Inspection Systems

On Site Gas Systems, Inc.

Orpro Vision LLC

Orbotech

Ovation Products

P. Kay Metal, Inc.

EXHIBITORS



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PAC TECH USA, Inc.

PACE Incorporated

Panasonic Factory Solutions Company of America

Para Tech Coating, Inc.

Park Electrochemical Corp.

PARMI Co., Ltd.

PCB Planet (India) Limited

PCBCafé

PCQR2 - A Partnership between CAT & IPC

Pemtron Technology

Pentagon EMS

Phibro-Tech, Inc.

Photo Stencil

Pillarhouse USA Inc.

Plasma Etch, Inc.

Pluritec North America Ltd.

Polar Instruments, Inc.

Polyonics

Posalux SA

Precision Placement Machines

Printed Circuit Girls and Geeks

Printed Circuit Design & Fab

Printed Circuit Journal

Production Solutions

ProEx Device Programming

PROMATION, Inc.

Prototron Circuits

PVA

Q 1 Test Inc.

Q Corporation

QA Technology Company, Inc.

Qualectron Systems Corporation

Qualitek International, Inc.

Quality Tech Tool Inc.

Quasys AG

Quik-Tool, LLC

QxQ, Inc.

RBP Chemical Technology, Inc.

Real-Time with ... IPC

Rogers Corporation

RPS Automation

Saki America, Inc.

Samsung/Dynatech

Saturn Electronics Corporation

ScanCAD International, Inc.

Schleuniger, Inc.

List of exhibitors continued on next page

Schmid Systems Inc. USA

Schmitt Industries, Inc.

Scienscope International

SEHO North America, Inc.

SEICA USA

Seika Machinery, Inc.

Semblant

Semco Packaging & Applications Systems

Senju Comtek Corp.

Shanghai Fast-PCB Circuit Technology Corp. Ltd.

Shenmao America, Inc.

Shenzhen Kunqi Xinhua Technology Co., Ltd.

Shenzhen Wellink Industrial Development Co.

Siemens PLM Software

SiFO

Simplimatic Automation

Smart Sonic Stencil Cleaning Systems

SMT Hybrid Packaging 2012

SMT North America, Inc.

SMTnet.com

SMTS LTD.

SmtXtra LTD.

Learn about all the companies exhibiting.•Search for companies by keyword, category, and more.•View exhibiting companies on the floor plan.•Read up on exhibitors’ products and services.• Access photos, press releases, company contacts and

more.

It’s all at your fingertips in your planner — so you can make informed buying decisions once you’re on-site.

Create your own personal itinerary for the event.• Communicate with exhibitors in advance of the show

and schedule appointments with them. Once your appointments are confirmed, add them to your agenda!

• Plan out your days so overlapping appointments won’t catch you off guard on-site. Attending the technical conference, BUZZ sessions or other event activities? No problem! Schedule all your activities into your planner.

• Download or print your itinerary to Outlook® so you have it at all times.

Expand your network of professional and business contacts with MY APEX EXPO.• Catch up with colleagues and meet others with similar

interests. My APEX EXPO will match you with other attendees so you can start the networking even before you arrive!

Check out My APEX EXPO interactive planner and get a head start on your show experience!

www.IPCAPEXEXPO.org/My-show


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EXHIBITORS

Sonoscan, Inc.

Sono-Tek Corporation

SPEA America

Specialty Coating Systems

Speedline Technologies, Inc.

Spindle Dynamics LLC

Stellar Technical Products

STI Electronics, Inc.

Stoelting

Taconic

Taiwan Printed Circuit Association

Taiwan Union Technology Corporation

Taiyo America, Inc.

TAMURA H.A./EUNIL H.A.

Tapco Circuit Supply

TDK - Lambda Americas

TEAM A.T.E.

Technic Inc.

Technical Devices Company

Test Research USA, Inc.

Texmac/Takaya Inc.

Ticer Technologies

Tintronics Industries

TMP Inc. A Division of French

TongLing Chao Yuan Precision Electronics Co

TopLine

Toshi Technology Inc.

Transition Automation Inc.

TUV Rheinland

U.S. Tech

Ucamco USA

UL (Underwriters Laboratories)

UNICOTE - Halco LLC

United Resin Corporation

Universal Instruments Corporation

UPA Technology

Uyemura International Corporation

Ventec-USA

Vi TECHNOLOGY

Virtual Industries, Inc.

Viscom Inc.

Vision Engineering

Vitronics Soltec

ViTrox Technologies Sdn Bhd

VJ Electronix, Inc.

V-TEK, Inc.

WAGO Corporation

Weller

Wiring Harness News

Wise srl

World Equipment Source Owned By: R-1 Source, Inc.

XACT PCB

XJTAG

X-Line Asset Management

Yamaha Motor Co., Ltd.

YXLON

ZESTRON

(as of October 11, 2011)

NEW New Product Zone

View cutting-edge products and services in the new, New Product Zone located in the Sails Pavilion. Get a sneak preview of the equipment, materials and services that are breaking new ground in our industry.

NEW IPC APEX EXPO Hand Soldering Competition

February 28–29 and March 1 Who’s the Best-of-the-Best?The first annual IPC APEX EXPO Hand Soldering Competition and the IPC HAND SOLDERING GRAND CHAMPIONSHIP will determine the answer.

Do you think you have what it takes to win at soldering? Does your company brag about how many IPC Certified Specialists it has on staff? It’s time to belly up to the booth and find out who the best-of-the-best is at hand soldering. If you think you have what it takes to be the Top Gun of soldering, BRING IT! See page 43 for details.

NPL Defect Database Clinic Live

Get your toughest challenges resolved! Take advantage of the Defect Database Clinic on the show floor in the Sails Pavilion and get free, unbiased help from international consultant and IPC course instructor Bob Willis on all of your process-related issues. Bring board assemblies for examination or process problems for discussion. Inspection equipment will assist in understanding the process problem and suggested solutions.

NEW THIS YEAR … Mini seminars will take place in the booth each day:

How to conduct dye & pry on area array packagesHow to test circuit boards for outgassing for FREEHow to test component solderability for a few dollarsHow to monitor PCB solderability for FREE in production

The clinic is organized by IPC & National Physical Laboratory (NPL). Sponsored by Global SMT & Packaging.

Show Floor Reception

Wednesday,February29•4:00pm–6:00pmKick back with your colleagues at IPC’s very own happy hour. Walk the exhibition, scope out all the new exhibitor offerings, and catch up with colleagues.

FREE Activities On the Show Floor

For details on these activities, visit www.IPCAPEXEXPO.org/special-events.



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Keynote SessionsOpening Keynote: William Shatner Captain’s Log — Boldly going where no man has gone before

Tuesday,February28•8:30am–9:30amOne of Hollywood’s most recognizable figures, William Shatner has cultivated a career spanning more than 50 years as an award-winning actor, director, producer, writer, recording artist, horseman and a major philanthropist.

Perhaps best recognized for his role as Captain James T. Kirk, Shatner’s accomplishments in television, film, and stage are numerous, including Emmys, Golden Globes and SAG award nods. Ironically enough, his true mission has had him exploring “strange new worlds” and seeking out “new life.”

There are many sides to Shatner beyond his portrayals of Captain Kirk, Denny Crane (The Practice and Boston Legal) and Priceline’s infamous

negotiator. Even at the tender age of 80, he, like his horses, does not like to stand still.

Off the screen and broadcast waves, Shatner has authored nearly 30 best-sellers in both the fiction and nonfiction genres. His autobiography, Up Till Now, was a New York Times best-seller. Shatner’s newest book, Shatner Rules: Your Guide to Understanding the Shatnerverse and the World at Large, was released in October 2011. While he admits that many of the rules are tongue-in-cheek, he stands by the fact that, “in their amusement, there is a truth.”

Join your colleagues for an intimate visit with this illustrious American icon and learn what inspires him to keep boldly going …

Keynote Session: Gazing into the Crystal Ball

Wednesday,February29•8:00am–9:30amPanelists: Phil Plonski, Managing Partner, Prismark Partners; Peter Irvine, President, PCM, DuPont; and Cary Wood, President and CEO, Sparton Corporation

We are shaking up the Wednesday morning keynote. What will the game changers be for the printed circuit board and electronics assembly industries?

Is it printed electronics, nanotechnology, environmental regulations or new quality and reliability drivers? Our panel of industry experts will look into the future and predict the shocks to our industry … and opportunities.

The presentations will be short — 15 minutes at the most — allowing plenty of time for questions and answers. There will be no Powerpoint presentations — no proceedings — we’re relying on the ancient method of speech to communicate these exciting new trends … just the power of the word. So get your coffee buzz going — you won’t want to miss a word!

SPECIAL EVENTS

William Shatner Book Signing

Tuesday,February28•10:00am Sails Pavilion (upper level exhibit hall)Beam on up to the Sails Pavilion and meet William Shatner in person. He’ll be signing copies of his latest book, Shatner Rules: Your Guide to Understanding the Shatnerverse and the World at Large.

Copies will be available for purchase on-site.


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FREE International Reception

Monday,February27•5:30pm–6:30pmOur international friends are invited to relax, have a bite to eat and meet their colleagues from around the world at this festive gathering.

FREE First-Timers’ Welcome Breakfast

Tuesday,February28•7:30am–8:30amMaximize your time at IPC APEX EXPO with some advice from a few insiders. Enjoy a continental breakfast while your colleagues share the ins and outs of this event. Learn how to put IPC’s resources to use for you and your company and find out how to take advantage of everything this event has to offer. Even if you’re not a first-timer, join us for a refresher course on IPC programs and activities.

FREE Women in Electronics Networking Meeting

Wednesday, February 29 Breakfast7:30am•Meeting7:45am–8:30amWomen continue to make great strides in all areas of the electronic interconnect industry. Join your colleagues from across the supply chain to share your ideas and

experiences as a woman and build your industry network.

Please RSVP for this free meeting through the online registration process. For more information, contact [email protected].

IPC APEX EXPO Golf Tournament & Reception

Coronado Municipal Golf Course, Coronado, Calif.Sunday, February 26Registration: 10:00 amShot-Gun Start: 11:00 amNetworking on a golf course just doesn’t get any better than this. Coronado Municipal Golf Course boasts immaculately manicured greens, wide inviting fairways and dramatic views of the Coronado Bay Bridge, the famous Hotel Del Coronado, San Diego Bay and the stunning San Diego skyline. For details and to register, visit www.IPCAPEXEXPO.org/golf.

Awards Luncheons Monday,February27•12:00pm–1:30pmWednesday,February29•12:00pm–1:30pm

Event Luncheon and IPC Annual Meeting Tuesday,February28•12:00pm–1:30pm

Meet & Eat

Need dinner plans? Join other IPC APEX EXPO participants for some good food and good conversation at one of the selected unique dining venues within walking distance of the convention center and event hotels. Dinner reservations at 6:30 pm on Tuesday, February 28 and Wednesday, February 29 will be available for sign-up at the Restaurant Information Center in the convention center.

GREAT NETWORKING OPPORTUNITIES

IPC Event Luncheons (registration required)

FREE IPC Government Relations Committee Open ForumTuesday,February28•11:00am–12:00pmMikel Williams, DDi Corp.What are your international, national, and regional concerns regarding government regulations, and laws impacting your company’s ability to compete globally? How can IPC help you make your business more profitable? Join members of the IPC Government Relations Committee for this important forum to receive updates on key issues impacting your company’s bottom line as well as an overview of IPC efforts to support the prosperity of the global electronic interconnect industry, including advocacy efforts on export controls reform and the conflict minerals regulation. After the overview, there will be open discussion on future issues for the committee to address. In short, the IPC Government Relations Committee wants to know what it can do for you.

Get Connected! Five easy ways!☞ My APEX EXPO: Use IPCAPEXEXPO.org/My-show to

connect with exhibitors and attendees and plan your itinerary before the show!

☞ Twitter: Use #IPCShow☞ Facebook: www.IPC.org/facebook☞ Linkedin: Find our group under IPC-Association

Connecting Electronics Industries☞ IPC Technet: Ask questions and connect with experts

at www.ipc.org/technet.



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Continuing Education with a Focus on DesignMake the most of your time and training budget in just one trip. Education and networking activities will benefit all individuals with interest in design: engineering staff and managers in design, sales, purchasing and quality teams.

• Full technical conference• Designers Forum• Half-day professional development courses• Professional certification program (CID and CID+)

Designers Forum

Monday,February27•7:30am–1:30pmThis program of education and networking is for all individuals with an interest in design. Designers Forum registration includes a networking boxed lunch following the program.

Designers Forum Agenda

7:30 am Check-in and Networking Breakfast

8:00 am The Next Level of Information Exchange Dieter Bergman, IPC Director of Technology Transfer

8:45 am Documentation Paradigm Shift: Drawings to Data Karen McConnell, CID, Manager of Electrical Design

Automation, Northrop Grumman

10:00 am Optimal Design Starts in the CAD Library Tom Hausherr, CID+, President, PCBpod

11:00 am Flexible Circuit Applications and Design Standards Vern Solberg, Principal, Solberg Consulting

12:00 pm Tough Choices: Cost-Quality Trade-Offs Rick Hartley, CID, Senior Engineer, L-3 Communications

1:00 pm Lunch

1:30 pm Adjourn

IPC Designer Certification (CID and CID+)

This program provides objective evaluation of core competencies, based upon industry standards. Courses enhance and assess knowledge: how to transform an electrical circuit description into a PCB design that can be manufactured, assembled, tested.

CID (certified interconnect designer-basic) and CID+ (advanced) are credentials recognized throughout the electronics industry. Commitment to professional development makes a difference to your customers and suppliers.

Workshop: CID and CID+Two days of classroom instruction with design expertsFriday,February24•8:30am–5:00pmSaturday,February25•8:30am–5:00pm

Exam: CID and CID+Test followed by instructor consultationSunday,February26•8:30am–3:00pm

Participants are expected to be familiar with course materials prior to the session. Register today at www.ipc.org/Designer-Certification to allow time for materials to be shipped in advance!

For more information on IPC APEX EXPO design-related programs, visit www.IPCAPEXEXPO.org/design.

PROGRAMS FOR DESIGNERS

I came away with valuable process

improvement tips that can save our company

enough money to pay for the trip and then some!

Wayne SortwellSr. PCB Designer

BittWare Inc.


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IPC PCB Executive Management Meeting

Monday, February27•8:00am–5:00pmNetworking Breakfast: 7:30 am–8:00 amNetworking Reception and Dinner: 6:00 pm–9:00 pm

Before the action begins on the show floor, leaders of the PCB industry will meet to solve common challenges.

Hear from noted industry experts on issues impacting your business and learn how other PCB executives are resolving problems that you are also facing. You will:

• Hear from a major OEM on opportunities for PCB fabricators

• Learn what political and environmental issues will impact your business the most

• Discover what the latest shoring trends mean for your company

• Gain a global perspective of the industry from a panel of international PCB executives

• Learn from the experiences of your peers during roundtable discussions

No other forum provides me with such access to my peers and industry experts. The topics reflect the issues that I am facing as an executive and the speakers provide me with answers. More

importantly, the honest, open high-level peer-to-peer discussions provide me with the insight I

need to do my job.

Al Wasserzug, Director of Corporate Development, Vulcan Flex Circuit Corporation

IPC EMS Management Council Meeting

Monday, February27•8:00am–5:00pmNetworking Breakfast: 7:30 am–8:00 amNetworking Reception and Dinner: 6:00 pm–9:00 pm

Receive the information you need to lead. With a unique high-level focus, this event will keep you up on current trends and strategies so you can make the best choices for your company’s future. You will:

• Learn what EMS companies in other regions are planning

• Hear from a major OEM on opportunities for EMS companies

• Discover what cloud computing means for ERP systems

• Find out the latest in distribution trends

• Hear the latest developments on conflict minerals and RoHS and what they mean for your company

• Learn from the experiences of your peers during roundtable discussions

The IPC EMS Management Meeting is an invaluable resource for me. I receive high level

information on where the industry is going so I can make decisions on how to prepare for Ascentron’s

future. I find answers to the challenges I must solve. I have the opportunity to exchange war

stories with other EMS executives and learn from their experiences. I never miss a meeting.

David Hollingsworth, Vice President of Business Development, Ascentron, Inc.

EXCLUSIVE PROGRAMS FOR EXECUTIVES

The IPC EMS Program Manager Training and Certification Program

An EMS program manager needs a multitude of skills to be successful. The EMS Program Manager Training and Certification Program is a four-part course that tailors topics, such as operations management, finance management, contract management, and leadership skills, to the EMS industry. To learn more about the program or to download a registration form, visit www.ipc.org/EMSCERT.

For more information on the EMS and PCB executive management programs, visit www.IPCAPEXEXPO.org/executives.

Introduction to the EMS Industry and Program Management Monday, February 27•8:00 am–5:00 pm Tuesday, February 28•8:00 am–1:00 pm

EMS Program Manager Training and Certification IIThursday,March1•8:00am–5:00pmFriday,March2•8:00am–5:00pm

EMS Leadership Training: Thursday,March1•8:00am–5:00pmFriday,March2•8:00am–5:00pm

EMS Program Manager Training and Certification Exam Saturday,March3•8:00am–12:00pm



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BZ1 Tin Whiskers, Delamination, Copper Dissolution, CAF, Coating Adhesion

Tuesday, February 28 : 1:30 pm–3:00 pm Bob Willis, National Physical Laboratory (NPL), and Christopher Hunt, Ph.D., National Physical Laboratory

Whiskers, delamination, dissolution, CAF and coatings are all questions that engineers need answers to. This BUZZy session will give you the latest results, projects results, documented reports and an insight into current industry projects. Hunt and Willis will give a joint presentation on some of the most interesting and innovative research work conducted at NPL in the last couple of years. Participants can receive copies of any of the NPL research reports free of charge.

BZ2 2012 IPC International Technology Roadmap

Tuesday, February 28 : 3:15 pm–4:45 pm John Fisher, Interconnect Technology Analysis, Inc.

Learn how you can use the critical information contained in the 2012 IPC International Technology Roadmap as your company’s own GPS to help you make strategic planning decisions. A key figure in the Roadmap’s development, Jack Fisher will explain how it can be used to develop business and market strategies and to validate and justify capital investment or to guide development activities.

BZ3 Embedded: Emerging TechnologiesWednesday, February 29 : 9:00 am–10:00 am Vern Solberg, Solberg Technical Consulting, and Mark Beesley, MB Manufacturing

In the past, the PCB served as an interconnection platform for device mounting. With the demand for greater functionality however, the PCB is morphing into a “component” in its own right and is now moving toward miniaturization through the embedding of both active and passive devices. This session brings together two renowned experts in embedded technology who will give you an in-depth look at where embedded technology is going and what you will be seeing in the coming years.

BZ4 Are Conflict Minerals the New RoHS?Wednesday, February 29 : 10:15 am–11:45 am Moderator: Fern Abrams, IPCPanelists: Bhawnesh Mathur, Epic Technologies; John Plyler, Research In Motion; and Chris Schwarz, Canyon Snow Consulting

Under Section 1502 of the Dodd-Frank Act, publicly traded companies will be burdened with submitting detailed reports to the SEC if their products which contain the conflict minerals tin, tantalum, gold, or tungsten cannot be proven to be “conflict-free.” Although the reporting requirements apply only to publicly traded companies, it is expected that the requirements will rapidly flow through the entire supply chain in a manner similar to RoHS. Our expert panel will provide the latest information on the SEC regulations, guidance, and industry tools to help you meet legal and customer requirements.

BZ5 SolarWednesday, February 29 : 1:30 pm–3:30 pm Dongkai Shangguan, Ph.D., Flextronics International

Solar power is a renewable energy source you’ll find on the “sunny side” of the energy grid. For the last two years, a world-renowned panel of experts provided attendees with the latest on this hot technology. By popular demand, the solar power topic is back with a new panel of experts to give you an update on this growing-alternative energy market. If your company is considering solar power, you won’t want to miss coming to this “bright and sunny” session.

BZ6 International Academic Paper Competition

Thursday, March 1 : 8:30 am–10:00 am Dave Torp, IPC

What’s hot in assembly and fab research being done in academia? Find out directly from the winners of IPC’s Academic Paper Competition. Three authors will present the best in academic research. Meet the research stars from national and international universities and get a peek into hot new technologies! Tune in for more information coming January 2012 when the winning university papers will be announced. Interested in participating? Visit www.IPCAPEXEXPO.org/academic.

BZ7 Supply Line IssuesThursday, March 1 : 10:15 am–11:45 am James Carrigan, Premier Semiconductor Services; Michael Ford, Mentor Graphics; and Rick Stanton, CIT, ProSkill Training Group

In today’s rapidly changing market, your supply chain can make or break your business. If the issues of price, quality and delivery weren’t enough to manage, you must now, because of rapid changes in technology, deal with obsolescence, quality and compliance of your parts and counterfeit parts in the supply chain. This three-speaker session will provide expert views on how to deal with these supply chain issues. Join us for in-depth discussion of how to make the supply chain work for you.

It was great to visit with the companies, to see the technologies they had to offer, and to interact with fellow associates and suppliers in just a few

days. I just wish I had more time.

Gregory A. BodziakSenior Manufacturing Engineer

Orbital Sciences Corporation

FREE BUZZ SESSIONS

What’s the BUZZ all about? Check out these FREE sessions on hot topics that have people BUZZ’n.


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S01 Environmental ComplianceTuesday,February28•1:30pm–3:00pmSusan Landry, Albemarle Corporation

In the environmental area, it is always good to know: a) what the regulatory bodies want from you, b) what you can do early in your product development process to “green” your product, and c) what the real environmental burden posed by your electronic products or electronic products is in general. In this session, industry experts will step through the regulatory status, the design process to achieve compliance and the reality of regulatory compliance issues in the electronics industry. Get an in-depth look at the real issues in environmental compliance today.Environmental Compliance Reporting – Mastering a Moving TargetPeter Robinson, Total Parts PlusNew Techniques to Scale the Use of LCA in Product DevelopmentJorgen Vos, PTCElemental Compositions of Over Two Dozen Cell PhonesBeverley Christian, Ph.D., Research In Motion Limited

S02 Tin WhiskersTuesday,February28•1:30pm–3:00pmJames Carrigan, Premier Semiconductor Services, LLC

In the move to lead free, the issue of tin finishes and their ability to “whisker” has generated much concern. Is there an inherent reliability risk every time a pure or almost pure tin finish is used? The three papers in this session examine the risk of whiskers in cable plating, the mechanism of whisker formation and alternative finishes for minimizing tin whisker formation. If you are considering or using tin finishes, this session is what you need to ground you in the risks, science and prevention of whisker formation.Whiskers and Alternative Surface Finishes at Press-In TechnologyHans-Peter Tranitz, Continental Automotive GmbHWhisker Growth on Tin Coated Wire and CableThomas Lesniewski, Northrop Grumman Aerospace SystemsImpact of Tin Grain Aspect Ratios on the Whiskering of Plated FilmsDavid Lee, Ph.D., Johns Hopkins University

S03 Test I: In Circuit TestTuesday,February28•1:30pm–3:00pmLars-Olof Wallin, IPC European Representative Office

In-circuit test (ICT) is a mainstay of electronics quality. But it needs to do more than catch and diagnose problems: it needs to be efficient and cost effective. The papers in this session analyze strategies for deployment of ICT and the choice of test probes. Find out how you can maximize your profits and improve your ICT.Integrated Electrical Test Within the Production LineMichael Smith, TeradyneEffective Test-Probe Assignment on PCB Electrical TestingTakeo Negishi, Gardien Japan Co. Ltd

S04 Voiding I: Process and TestTuesday,February28•1:30pm–3:00pmJianbiao Pan, Cal Poly State University

Solder joint voids have become more common with the higher assembly temperatures of lead free; the smaller size of today’s solder joints means that their impact can be greater than ever before. In this first of two sessions on voids, three papers analyze what technologies you can use to reduce voiding, the reliability impact of voids in solder and the best methods to detect voids in your products. If there is a “void” in your solder process, then this session is for you!Reduction of Voids in Solder Joints. An Alternative to Vacuum SolderingChristian Ott, SEHO Toratec ShanghaiThermal Cycle Reliability Study of Vapor Phase BGA Solder JointsWard Gatza, Agilent TechnologiesBefore and After Reflow Characterization of FCBGA Voiding Utilizing High Resolution CT Scan, X-Ray (2-D & 3-D) Imaging, and Cross Section with Digital ImagingGordon O’Hara and Matthew Vandiver, Flextronics

The IPC APEX EXPO technical conference is known worldwide as one of the finest and most selective in the world. Learn about new research and innovations from key industry players in the areas of board fabrication and design and electronics assembly.

Sign up for one day, the full conference or get the most for your money with the All-Access Package. Register by January 28 and save 20%.


13TECHNICAL CONFERENCE 13

February 28–March 1, 2012®Visit www.IPCAPEXEXPO.org/technical-conference for the most

up-to-date information.

S05 PCB DesignTuesday,February28•1:30pm–3:00pmPatricia Goldman, P.J. Goldman Consulting

The first paper in this session addresses the optimization of the flow from design through manufacturing and the best methods to reduce cost and increase efficiency. The next two papers explore the real-world consequences of how design impacts PCBs in a high temperature lead-free world. Take an enlightening journey down the path of product development to the assembly process.A Time Dependent Analytical Analysis of Heat Transfer in a PCB During a Thermal ExcursionJ. Lee Parker, Ph.D., JLPA New Paradigm for Design Through ManufactureMichael Ford, Mentor GraphicsDesign and Construction Effects on PWB ReliabilityPaul Reid, PWB Interconnect Solutions Inc.

S06 Printing ITuesday,February28•3:15pm–4:45pmRussell Nowland, Alcatel-Lucent

Efficient printing is crucial to achieving a high yield in manufacturing, but with new packages being introduced all the time and package footprints constantly decreasing in size, manufacturing is continually challenged to optimize and re-optimize the paste printing process. The three papers in this first session on printing will cover the stencil design and coating choices that are being developed to ensure the printing process stays a high-output/zero-defect process for today’s new packages and small footprints. If you want the latest in printing technology, this session will give you the solutions you seek.Stencil Printing of Small AperturesWilliam Coleman, Ph.D., Photo Stencil Inc.Solder Paste Deposits and the Precision of Aperture SizesAhne Oosterhof, LPKF Laser & Electronics Stencil Printing Process Tools for Miniaturization and High Yield ProcessingClive Ashmore, DEK International GmbH

S07 Signal Integrity ITuesday,February28•3:15pm–4:45pmLouis Hart, Compunetics Inc.

Just about everybody wants more bandwidth in life, in work and in performance of high speed electronics. But what good is a big data pipe if the validity of the flowing information can’t be guaranteed? In this session, three papers will address signal integrity starting with board design and moving into test validation. If you are working in that “high speed” world, this session will give you the latest on how to keep your “signal integrity” high.Impedance Impact of Localized PCB Copper DensityGary Brist, Intel CorporationFirst High-Volume Manufacturing Printed Circuit Board Insertion Loss Study Using a New Low-Cost MetrologyJerry Chia, Intel Corporation

S08 AOI TestTuesday,February28•3:15pm–4:45pmKrista Crotty, Alberi EcoTech

It seems the more complex a product, the more possibility that something can go wrong with it. So what’s the best test strategy to ensure things work as they’re designed? Given the variety of tests available, one of the fastest is AOI/AXI. In this three-paper session on the ins and outs of AOI/AXI, you will learn the latest on these technologies and how they can be integrated into your process to improve quality and ensure products work as designed.TDI Imaging – An Efficient AOI and AXI toolYakov Bulayev, Hamamatsu CorporationAnalysis of Optical Inspection from AOI and AXI MachinesAdam Yin, Gardien Pacific Ltd.Revolutionizing Problem Solving Using TRIZ & Lean to Achieve Manufacturing ExcellenceDarin Moreira, Intel Microelectronics

S09 Voiding II: Component EffectsTuesday,February28•3:15pm–4:45pmJianbiao Pan, Cal Poly State University

Voids are a reliability concern in today’s products. This second session on voids focuses on the impact of component type on void formation. Get an in-depth look at why voids form in particular component types and what you can do to a-void them.Reducing QFN and LGA Voiding with Solder PreformsRonald Lasky, Ph.D., PE, Indium Corporation of AmericaInclusion Voiding in Gull Wing Solder JointsTheron Lewis, IBM Corporation

As a young engineer I was able to build a great base for my network at IPC APEX EXPO.

I met with numerous industry professionals who were all very helpful in sharing the wealth

of knowledge they possess. Kevin Kusiak

PWB Producibility EngineerRaytheon


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S10 PCB MaterialsTuesday,February28•3:15pm–4:45pmPatricia Goldman, P.J. Goldman Consulting

PCB materials are constantly evolving in response to solder process development and the push for “greener” material technology. This session looks at the latest developments in PCB materials to meet the challenges of higher temperature solders and regulatory concerns. If you are involved in PCB material choice, this session will help you make the choices that meet process and regulatory challenges.Evaluation of Laminates in Lead-Free HASL Process and Lead-Free Assembly EnvironmentMei Ming Khaw, Agilent Technologies MalaysiaA Novel Material for High Layer Count and High Reliability Printed Circuit BoardsMaggie Man, Guangdong Shengyi Sci.Tech Co.Polyphenylene Ether Macromonomers. XI. Use in Non-Epoxy Printed Wiring BoardsEdward Peters, Ph.D., Sabic Innovative Plastics

S11 Solder Joint MorphologyWednesday,February29•9:00am–10:00amR. Johnson, Ph.D., Auburn University

The solder process is the very heart of electronics assembly. All the best parts in the best design in the world can’t do anything if they can’t communicate with one another through interconnections — and the vast majority of those interconnections are made in the solder process. This session’s two papers take an in-depth look at the anatomy of the solder joint in today’s environment and how that “make up” impacts the reliability of your products. If you want to learn more about what is at the heart of a reliable solder joint, you won’t want to miss this session.Evolution of Solder Joint Morphology in Lead-Free Solder Joints Containing GoldJulie Silk, Agilent TechnologiesEffect of Cooling Rate on the Intermetallic Layer in Solder JointsKeith Sweatman, Nihon Superior Co., Ltd.

S12 FluxWednesday,February29•9:00am–10:00amMichael Szuch, Nordson Asymtek

As solder continues to evolve in response to industry and regulatory pressure, solder’s partner in interconnect formation, soldering flux, also is evolving. This session’s papers focus on no-clean and VOC fluxes and will provide you with detailed information on what to look for in a solder flux.No-Clean Flux Residue and Underfill Compatibility Effects on Electrical ReliabilityEric Bastow, Indium Corporation of AmericaVOC-Free Flux StudyKarl Seelig, AIM, Inc.

S13 BIST/Boundary ScanWednesday,February29•9:00am–10:00amKrista Crotty, Alberi EcoTech

Built-in self test (BIST) and boundary scan are two important test techniques that can help you improve your test coverage and reduce product failures. Learn how to use these important test methods to improve your testing process. Application of Built-in Self-Test in Functional Test of SONETYa Jun Gu, Flextronics Tech (Shanghai) Co., Ltd.Boundary Scan Advanced Diagnostic MethodsChristopher Cain, Agilent Technologies

S14 CleaningWednesday,February29•9:00am–10:00amSal Sparacino, ZESTRON America

Cleaning can be a critical operation in today’s assembly processes. The difference between “clean” and “not quite clean” can be the difference between “successful product” and “returned for repair.” The two papers in this session cover cleaning as it applies to high interconnect density electronics and the VOC emission aspects of defluxing. If cleaning is part of your process, this informative session will give you the information you need to have a “successful product.”Effectiveness of Vapor Recovery for PCB DefluxingHarald Wack, Ph.D., ZESTRON AmericaCleaning Challenges in an HDI WorldMike Bixenman, DBA, Kyzen Corporation

S15 PCB TestingWednesday,February29•9:00am–10:00amPaul Reid, PWB Interconnect Solutions Inc.

Why do people test? On the assembly line, test weeds out the good from the bad and gives feedback to assembly on how to improve in real time. In the long run, testing of products can provide valuable information on product reliability and detect common failure modes. This session‘s papers cover both those topics in depth. Gain a long-term view of how test can improve your product’s performance.PWB Stress Testing Correlation: Accelerated vs. Application — The Round Robin BeginsMark Northrup, IEC Electronics Corp.An Easy, Low-Cost Approach to Microsectioning MicroviasRussell Dudek and Louis Hart, Compunetics Inc.





S16 Lead-Free AlloysWednesday, February 29 : 10:15 am–11:45 am Carol Handwerker, Sc.D., Purdue University

After years of lead free, there are still struggles with the “how to” of assembly. If you are still less than comfortable with lead free, this session will give you the latest research from industry experts on developments in lead-free alloy developments.The Effect of Nickel on the Impact Strength of Low-Silver and No-Silver Lead-Free SoldersKeith Sweatman, Nihon Superior Co., Ltd.High Melting Lead-Free Mixed BiAgX Solder Paste SystemKeith Sweatman, Nihon Superior Co., Ltd.An Investigation into Low-Temperature Tin-Bismuth and Tin-Bismuth-Silver Lead-Free Alloy Solder Pastes for Electronics Manufacturing ApplicationsJasbir Bath, Christopher Associates Inc.

S17 Solder AssemblyWednesday, February 29 : 10:15 am–11:45 am Alan Rae, Ph.D., TPF Enterprises LLC

Is your solder process all reflow solder? Is it all wave solder? A little of both? If you have both in your solder assembly, this session is for you! Learn about the latest in vapor phase soldering, dealing with bottom side components and what to do with thick, thermally challenging boards. This session will cover the spectrum in solder variety and will give you valuable information on mixed solder processes.The Pros and Cons of Vapor Phase SolderingIvan Castellanos, Indium Corporation of AmericaAssembly Challenges on Bottom Terminated ComponentsJennifer Nguyen, Flextronics InternationalLead-Free Selective Wave Solder Guidelines for Thermally Challenging PCBsRamon Tapia, Celestica Monterrey

S18 PackagingWednesday, February 29 : 10:15 am–11:45 am R. Johnson, Ph.D., Auburn University

New packages for electronics appear daily. But what’s the best package for a particular functionality? How should assemblers put these package choices together in a working product? This informative session on package innovation and qualification will provide you with the latest on three package types: capacitors, air cavity packages and flip chip ICs. Identification of Quality and Reliability Indicators of Solid Tantalum CapacitorsThomas Fritzler, University of MarylandFlip Chip Package Qualification of RF-IC PackagesMumtaz Bora, CID, Peregrine Semiconductor

S19 PCB Hole FillWednesday, February 29 : 10:15 am–11:45 am Beverley Christian, Ph.D., Research in Motion Ltd.

In the high temperature world of lead free, package and board warpage become critical issues if solder interconnections are to be formed successfully. This three-paper session will give you the latest on strategies for prevention of board warpage and methods of co-planarity/warpage measurement. To make sure your process stays “on the level” you won’t want to miss this fact-filled session!Effect of Chemical and Processing Parameters on Hole Filling Characteristics of Copper ElectroplatingMaria Nikolova, MacDermid, Inc.New Challenges for Higher Aspect Ratio: Filling Through Holes and Blind Micro Vias with Copper by Reverse Pulse PlatingMichael Palazzola, Atotech USA Inc.

S20 iNEMI Halogen-FreeWednesday, February 29 : 10:15 am–11:45 am Lameck Banda, Ph.D., Dow Chemical USA

Halogen-free is on the way due to regulatory and marketing pressure. In response to industry needs, iNEMI will present three papers on halogen-free technology’s impact on signal integrity, board reliability and issues in a transition to HFR (halogenated flame retardant)-free. If you are moving toward halogen-free, this informative session will bring you up-to-speed on what can be expected in a halogen-free world. iNEMI HFR-Free Signal Integrity Project: An Investigation to Identify Degradation of Electrical Signals in HFR-Free PCB MaterialsStephen Hall, Intel CorporationiNEMI HFR-Free High Reliability Project, an Investigation to Identify Technology Readiness, Supply Capability, and Standards Development Opportunities for “Halogen-Free” AlternativesStephen Tisdale, Intel CorporationiNEMI HFR-Free PCB Materials Project: An Investigation to Identify Technology Limitations Involved in Transitioning to HFR-Free PCB MaterialsJohn Davignon, Intel Corporation

The show and conference enabled me to meet new suppliers, network with my fellow colleagues

to explore new ideas, and consult with industry experts. I see it as One Stop Shopping!

Randy Cherry, Principal Engineer, Tellabs, Inc.


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S21 Solder Joint Testing and PerformanceWednesday,February29•1:30pm–3:30pmJasbir Bath, Christopher Associates Inc.

What are your choices for lead-free solder alloys? How can you tell what is best for your needs? In the long term, how can you be sure the alloy you choose is reliable? The papers in this session consider the how’s and why’s of alloy choice, process requirements and reliability testing for lead-free solders. Improve your range of options by joining this session as industry experts give you the latest information on developments in lead-free assembly, testing and performance.Characterizing Process Requirements for Alternative Lead-Free AlloysRonald Lasky, Ph.D., PE, Indium Corporation of AmericaSuperior Drop Test Performance of SAC105Ti Solder AlloyNing-Cheng Lee, Ph.D., Indium Corporation of AmericaLow-Cycle Fatigue Behavior of Multi-Joint Sample in Mechanical TestingChristopher Hunt, Ph.D., National Physical Laboratory

S22 Surface Insulation ResistanceWednesday,February29•1:30pm–3:30pmLameck Banda, Ph.D., Dow Chemical USA

Surface insulation resistance (SIR) provides a measure of both the cleanliness of a PCB and the propensity of an assembly to undergo unwanted corrosion or surface leakage at some point in its lifecycle. The four papers in this session look at SIR from the aspects of flux and cleaning processes used in assembly, the relation of SIR to flux testing, coatings to improve SIR performance and methods of investigating conductive anodic failure (CAF) under laboratory test conditions and for product in the field. Get a comprehensive look at SIR/CAF and their causes and cures.An Evaluation of the Insulation Resistance and Surface Contamination of Printed Circuit Board AssembliesXiaofei He, University of MarylandCorrelation of SIR Halide Halogen and Copper Mirror TestsNicole Palma, Indium Corporation of AmericaEffect of Silicone Conformal Coating on Surface Insulation Resistance (SIR) for Printed Circuit Board AssembliesCarlos Montemayor, Dow Corning CorporationInvestigation of Conductive Anodic Filament Failures in Printed Circuit BoardsAravind Munukutla, Intel Corporation

S23 Test Process and SpecificationWednesday,February29•1:30pm–3:30pmChristopher Muller, Purafil, Inc.

This four-paper session will cover a wide range of topics on test. Learn about test requirements and standards, especially IPC and military requirements, design for test and reliability and balancing test loads in a variety of production environments. If you are faced with testing challenges, this session will give you an in-depth look at testing.Testing — Understanding the Proper Testing Processes and Requirements for Electronics, Electronic Components and Printed Circuit BoardsAaron Robinson, Envirotronics, Inc.Testing Your Way to a Reliable ProductRichard Fitzgerald, Qual-Pro CorporationOvercoming Logistical, Economic and Technical Challenges to Implementing Functional Test in High-Mix/High-Volume Production EnvironmentsCraig Pynn, SiFOIPC-9252A — Electrical Test Considerations. Class I-III (and the shadowed 3/A)Todd Kolmodin, Gardien Services USA, Inc.

S24 Signal Integrity II: High SpeedWednesday,February29•1:30pm–3:30pmGary Ferrari, CID+, CIT FTG Circuits

In this second session on signal integrity, the issues of high speed and signal loss as they are affected by copper foil technologies will be addressed. If you find high-speed board manufacture a challenge, this session on fabrication technologies and their effects on signals is a must.Newest ED Copper Foils for High Speed PCBs and for IC-Packaging ApplicationRaymond Gales, Circuit Foil Luxembourg SARLDetermination of Copper Foil Surface Roughness from Microsection PhotographsScott Hinaga, Cisco Systems Inc.A Designed Experiment for the Influence of Copper Foils on Impedance, DC Line Resistance and Insertion Loss.Alexander Ippich, Multek Europe GmbH & Co. KG

S25A Surface ContaminationWednesday,February29•1:30pm–2:30pmGreg Papandrew, Bare Board Group

This session has a split personality. In the first two papers (25A), the issue of surface contamination as it impacts assemblies in manufacturing and in field deployment is covered. This session is a must if you are wrestling with contamination issues and are looking for solutions.Effect of Silicone Contamination on Assembly ProcessesCarlyn Smith, Harris Corporation, GCSDImpact of Dust on Printed Circuit Assembly ReliabilityKelly Bo, University of Maryland





S25B CoatingWednesday,February29•2:30pm–3:30pmPhil Kinner, Precision Value and Automation

In a continuation from S25A, the topic of coating as protection for assemblies is covered. If you are wrestling with contamination issues, this session will give you the solutions you are looking for.Plasma Polymerization: A Versatile and Attractive Process for Conformal CoatingTim Von Werne, Semblant Ltd.Revolutionary Solution for the PCB Industry: Digital Ink Jet Solder Mask PrintingTomer Segev, Camtek USA, Inc.

S26 Solder PasteThursday,March1•9:00am–10:00amMario Scalzo III, Indium Corporation of America

Solder paste has long since passed bar wave solder as the primary solder alloy interconnection media. In this two-paper session, you will learn about new technologies in flux and powder for solder pastes that will meet your surface mount reflow needs in the lead-free/halogen-free world of finer and finer pitch packages.Application of the Advanced Activator Technology on the Solder Paste DevelopmentXiang Wei, KesterThe Effect of Powder Surface Area and Oxidation on the Voiding Performance of PoP Solder PastesBrandon Judd, Indium Corporation of America

S27 Printing IIThursday,March1•9:00am–10:00amAnurag Bansal, Cisco Systems Inc.

In this second session on printing, industry experts will address the issues associated with cavity and step stencils. If you are facing problems with component mixes that demand new stencil solutions, this session is a must.SMT Manufacturability and Reliability in PCB CavitiesMarkus Leitgeb, AT&S Austria Technologie & Systemtechnik AGChallenges for Step Stencils with Design Guidelines for Solder Paste PrintingCarmina Laentzsch, LaserJob GmbH

S28 Design for Test (DFT)Thursday,March1•9:00am–10:00amLars-Olof Wallin, IPC European Representative Office

To fail to plan is often described as “planning to fail.” For test, planning means using good design for test (DFT) rules. In this session, test design techniques for boundary scan of assemblies and chips will be discussed in light of the latest developments in test standardization. Learn how to plan your test strategy better by using boundary scan and the latest test standards.Virtual Access Technique Augments Test Coverage on Limited Access PCB AssembliesAnthony Suto, Teradyne Inc.Testing DDR Memory — How On-Chip DFT HelpsJohn Pendlebury, Agilent Technologies

S29 Surface Finishes IThursday,March1•9:00am–10:00amDennis Fritz, MacDermid, Inc.

This first session on surface finishes will address the issues of surface finish and corrosion in harsh environments. Both the comparative corrosion resistance of finishes in harsh environments and the performance of various finishes in standardized corrosion tests will be covered in detail. Discover what you need to know about lead-free finish performance in unfriendly environments in this session.Corrosion Resistance of Different PCB Surface Finishes in Harsh EnvironmentsMustafa Oezkoek, Atotech Deutschland GmbHThe Surface Finish Effect on the Creep Corrosion in PCBCherie Chen, Integrated Service Technology–ISTi

S30 Signal Integrity III: Flex and RigidThursday,March1•9:00am–10:00amGary Ferrari, CID+, CIT, FTG Circuits

The third and final session on signal integrity will address two different types of substrates and their performance in high speed designs. Both flexible and rigid laminates will be discussed and you will learn how various transmission line structures perform and how the properties of the laminate affect high speed performance. Get a “high speed” look at high speed laminates in this session.Detailed Analysis of Impedance and Loss Versus Frequency for Transmission Lines Made from Flexible Circuit MaterialsGlenn Oliver, DuPontThermal Characteristics of PCB Laminates Used in High Frequency ApplicationsJohn Coonrod, Rogers Corporation


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S31 Pad CrateringThursday,March1•10:15am–11:45amCheryl Tulkoff CRE, DfR Solutions

In the switch to lead free, one of the unpleasant side effects of the use of higher temperatures in assembly has been pad cratering. This session brings in experts from assembly who will discuss tests to predict and diagnose pad cratering. If you have had a lead-free process “crater,” then the information in this session is what you need!The Application of Spherical Bend Testing to Predict Safe Working Manufacturing Process StrainsJohn McMahon, CelesticaInvestigation of Pad Cratering in Large Flip-Chip BGA Using Acoustic EmissionAnurag Bansal, Cisco Systems Inc.

S32 BGA ReliabilityThursday,March1•10:15am–11:45amRussell Nowland, Alcatel-Lucent

Array packages are continuing to increase in I/O. In this lead-free world, as the area and I/O increase, so do concerns about reliability, especially for backwards compatible processes and repairs. Those topics: high reliability applications of large arrays, backwards compatibility and repair are the meat of this session. For your complex, high-reliability designs migrating into a lead-free world, the information in this session will be invaluable.Assembly and Reliability of 1704 I/O FCBGA and FPBGAsReza Ghaffarian, Ph.D., Jet Propulsion LaboratoryThe Relationship Between Backward Compatible Assembly, Microstructure, and Component Warpage on the Thermal Fatigue Reliability of an Extremely Large Ball Grid ArrayRichard Coyle, Alcatel-LucentReliability of BGA Solder Joints After Re-Balling ProcessMo Biglari, Mat-Tech BV

S33 PCB Hole FillThursday,March1•10:15am–11:45amGreg Papandrew, Bare Board Group

Layer-to-layer interconnection is critical to the performance of a complex PCB. This session will describe the latest in technologies to ensure reliable hole fill in PCB fabrication. The experimental data presented here will provide you with a deeper understanding of the best ways to improve your fabrication process.Developing Warpage Reduction Technologies in Coreless SubstrateJinho (Paul) Kim, Samsung Electro-Mechanics Co., Ltd.iNEMI Board Co-Planarity in SMT Project: An Investigation of the Predictability of Room Temperature Co-Planarity Measurements on the Co-Planarity at Lead-Free Assembly TemperaturesJohn Davignon, Intel Corporation

Projection Moiré vs. Shadow Moiré for Warpage Measurement and Failure Analysis of Advanced PackagesJoseph Thomas, ZN Technologies

S34 Surface Finishes IIThursday,March1•10:15am–11:45amGary Ferrari, CID+, CIT FTG Circuits

The final session in surface finishes will cover Pd/ENIG finishes and a hot new technology for protecting surface finishes. If you are using Pd or ENIG finishes for soldering or bonding and if you have surface protection concerns, this session is for you!Wire Bonding and Soldering on ENEPIG and ENEP Surface Finishes with Pure Pd-LayersGustavo Ramos, Atotech Deutschland GmbHA Plasma Deposited Surface Finish for Printed Circuit BoardsTim Von Werne, Semblant Ltd.Influence of Pd Thickness on Micro-Void Formation of Solder Joints in ENEPIG Surface FinishYeonseop Yu, Samsung Electro-Mechanics Co

S35 Halogen-FreeThursday,March1•10:15am–11:45amDennis Fritz, MacDermid, Inc.

Lead free came about through legislative fiat and halogen-free appears as though it may become an industry reality through the same mechanism. The first paper in this session, will cover the status of the regulatory environment, while papers two and three will cover new halogen-free alternatives. If you are considering halogen-free or want to know where the regulations are and what alternatives are available for your laminates, this fact-filled session is for you!The Regulatory and Environment Status of Tetrabromobisphenol-A in Printed Wiring BoardsSusan Landry, Albemarle CorporationNew Halogen-Free & High CTI (Comparative Tracking Index) RCC Used in Printed Circuit ApplicationYin Simon, Shengyi Technology Co., Ltd.New Developments in PCB LaminatesJohn Coonrod, Rogers Corporation

We were able to evaluate two different AOI technologies and four different companies right

on the spot to get a true assessment of their capabilities. By seeing them all under one roof, we

saved time and money.Rodney Doss

Board Processing TechnicianSamtec, Inc.





S36 Printed ElectronicsWednesday,February29•9:00am–10:00am Daniel Gamota, Printovate Technologies, Inc.

The adoption of standards can facilitate the growth of printed electronics and reduce the burden placed on individual companies to invest significant resources in the development of company specific compliance documentation. This session will highlight the various opportunities for standards development along the printed electronics supply chain as well as the progress of the four IPC-initiated standards activities: 1) base material, 2) additive material standard, 3) standard design guideline, and 4) final assembly standard.Technical Drivers for Printed ElectronicsDaniel Gamota, Printovate Technologies, Inc.

S37 Advanced Materials for Printed Electronics

Wednesday,February29•10:15am–11:45amDaniel Gamota, Printovate Technologies, Inc.

An often overlooked design parameter for printed electronics based products is the selection of an appropriate substrate. During this session, subject matter experts will provide an overview of key substrate material properties (e.g. mechanical, electrical, thermal, optical) that determine high yield manufacturing as well as in-field product performance. Also, presenters will highlight advanced substrate development efforts underway to meet the needs of designers in the final stages of new product introduction programs.Performance Requirements for Substrates for Printed ElectronicsNeil Bolding, MacDermid Autotype Inc.Advances in Conductive Inks Across Multiple Deposition PlatformsScott Gordon, DuPont

S38 Emerging Technologies and Manufacturing Processes for Printed Electronics

Wednesday,February29•1:30pm–3:30pmSteve Tomas, Flexcon Company

Printed electronics applications using advanced functional printing techniques and new ink technology continue to expand worldwide. Learn how to leverage the technical capabilities and experience of your suppliers as well as customers in order to stay abreast of the rapid changes and new opportunities that are available in printed electronics.New and Emerging Technologies in Printed ElectronicsDon Banfield, Conductive CompoundsRoll-to-Roll Manufacturing of Printed Interconnect SystemsFrank Egitto, Voya Markovich and Mark Poliks, Ph.D., Endicott Interconnect Technologies Inc.

Printed Electronics — Coming of Age at IPC APEX EXPOIf you listen very carefully in the electronics industry, you will hear a low pitched hum from a technology that has been building momentum for quite some time. Printed electronics is beginning to show significant signs of becoming a key enabling technology for several market segments. Organic LEDs, flexible displays, RFID tags, printed discrete devices, as well as printed photovoltaic devices are making an impact in consumer, commercial, medical and specialty electronics markets.

The most important benefit of printed electronics is the use of printing technologies for low-cost volume fabrication of electronic products. In addition, the ability to print on flexible substrates allows electronics to be placed on curved surfaces, for example, placing solar modules on vehicle roofs. Conventional semiconductors justify their much higher costs by providing much higher performance. Conversely, printed electronics is being promoted as a lower-cost technology that provides greater product design freedom.

Want to keep up with rapidly changing printed electronic innovations? IPC is bringing the newest developments to you! Attend our special printed electronics technical track at IPC APEX EXPO (S36–S38). Leaders from the printed electronics industry will present the latest technical information on materials, processes, and equipment on Wednesday, February 29. The sessions will feature presentations discussing not only the printed electronics standards IPC is developing (page 41), but also new materials and processes for printed electronics — from inks to flexible substrates to roll-to-roll manufacturing.

In addition to the technical conference, the show floor will include exhibitors who are literally changing the face of our industry. After visiting the exhibitors, you will definitely have “seen the light” of printed electronics.

Learn about and contribute to this defining technology!


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Assembly Processes for 20 Lead Free and Tin-Lead

Cleaning/Coating/Contamination 25

Design 26

Emerging Technologies 29

PCB Fabrication and Materials 30

Quality, Reliability and Test 32

Supply Chain/Business Issues 34

ASSEMBLY PROCESSES FOR LEAD FREE AND TIN-LEAD

PD05 Troubleshooting SMT: Part I — Defining the Problem, Determining the Cause

Monday,February27•9:00am–12:00pmS. Manian Ramkumar, Ph.D., Rochester Institute of TechnologyBASIC

This two-part course will provide an understanding of a systematic approach that can be employed in troubleshooting the surface mount technology (SMT) and through-hole electronics packaging process. Discussions on analytical processes to use will engage attendees in actively solving the case studies presented. Participants will work in teams of three and will solve problems by thoroughly defining the problem, finding the root cause(s) and determining the appropriate fix. Learn how to enhance product development, manufacturing and yield, and the best way to systematically address the root causes of any problem. For maximum benefit, registering for both this session and Part II (PD06) in the afternoon is highly recommended.What You Will Learn•Systematicapproachtoproblemsolving•SkillstoaddresstherootcauseofproblemsAbout the Instructor

Dr. S. Manian Ramkumar teaches courses in SMT electronics packaging and manufacturing automation. He was instrumental in developing the CIM and Surface Mount Electronics Manufacturing Laboratory and curriculum at RIT, and has been the principal investigator for several applied research projects.

PD06 Troubleshooting SMT: Part II — Finding the Fix and Preventive Action

Monday,February27•2:00pm–5:00pmS. Manian Ramkumar, Ph.D., Rochester Institute of TechnologyBASIC

The second half of a two-part course, this session will continue the learning to understand the systematic approaches that can be employed in troubleshooting the surface mount technology (SMT) and through-hole electronics packaging process. For maximum benefit, enrollment in both this session and Part I (PD05) in the morning is highly recommended.What You Will Learn•Developamethodologytofindsolutions•Understandhowtheanalyticalmethodologycanbe

applied to different situationsAbout the Instructor

See PD05 on this page.

PD13 Best Practices in Electronics Assembly Processes — Part I

Sunday,February26•9:00am–12:00pmJoseph Belmonte, W. James Hall, and Phil Zarrow, ITM Consulting Inc.BASIC

Delve into best practices that can improve productivity of a surface-mount or mixed-technology assembly operation and find out how to get the most from your existing line. In this course, participants will learn how nonoptimal assembly practices and processes (the “deadly sins” of SMT assembly) impact product quality and financial success. The instructors will present a comprehensive perspective on problem issues for the most critical electronics assembly processes, materials (existing and emerging), equipment, procedures and methods — and provide practical solutions to those challenges. Key issues that consistently result in assembly problems and low yields will also be identified and resolved. Participants should register for this session and Part II (PD-17) in the afternoon.What You Will Learn

Best practices for:•Assemblyprocess•Solderpasteprintingprocess•Pickandplace•Reflowsoldering

Find out about the latest in advanced technologies, design, lead-free technologies, materials, process improvements, solder joint reliability and more. Courses are listed by general categories to help you find just what you’re looking for.

Get the most for your money by registering for the All-Access Package and selecting half-day courses that meet your professional needs. Register by January 28 to save 20% off registration fees.


21PROFESSIONAL DEVELOPMENTCOURSES

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February 28–March 1, 2012®Visit www.IPCAPEXEXPO.org/courses for complete course

information and full instructor bios.

•Waveandselectivesoldering•Conformalcoating•QFNs•Ultra-miniaturecomponents•Data-drivenprocessdesign(includingDOEandSPC)About the Instructors

Joe Belmonte is a principal consultant with ITM Consulting. A process engineer and manager for more than 25 years, Belmonte has experience in all aspects of electronic product assembly operations. He is the co-holder of a patent for high speed electronic systems and methods.

Jim Hall is a principal consultant and resident Lean Six Sigma Master Black Belt with ITM Consulting. A pioneer in reflow technology, Hall has been actively involved in electronic assembly technology for more than 26 years. His expertise spans process development and integration, fluid and thermodynamics and computer control systems.

Phil Zarrow has been involved with PCB fabrication and assembly for more than thirty years. His expertise includes the manufacture of equipment for PCB fabrication and assembly of through-hole and surface mount technologies. He has chaired and instructed at conferences around the world, and is a published author.

PD15 Preventing Production Defects and Failures

Monday,February27•2:00pm–5:00pmJennie Hwang, Ph.D., H-Technologies GroupINTERMEDIATE

Considering the new and anticipated developments in packaging and assembly, this course focuses on how to prevent prevailing production defects — and take remedial measures — through an understanding of potential causes. Defects such as pad cratering, BGA head-on-pillow, passive 01005 issues, copper dissolution and lead-free through-hole barrel filling problems will be covered. PCB thermal properties and halogen-free PCB laminates will be discussed. New developments in tin whisker and mitigating measures will also be outlined. Attendees are encouraged to bring their issues for discussion.What You Will Learn•Productiondefectsandissuesinlead-freeassembly•PCBpadcratering—causesandsolutions•BGAhead-on-pillowdefect—causes,factors,remedies•Copperdissolution—processfactors,impacton

through-hole solder joint reliability, mitigation•Lead-freethrough-holebarrelfilling—material,process,

solder joint integrity•Passive01005assembly—process,factors,best

practices•Newdevelopmentsincharacteristicsand

characterization of PCB laminates•Tinwhiskers—newdevelopmentsandmitigation

About the InstructorDr. Jennie Hwang has been a major contributor to the

implementation of SMT manufacturing and lead-free electronics. An author and frequent lecturer at international events, she earned four academic degrees. Dr. Hwang is president of H-Technologies Group and is an invited distinguished adj. professor at Case Western Reserve University.

PD16 Mastering Lead-Free and Tin-Lead Selective Soldering

Sunday,February26•2:00pm–5:00pmBob Klenke, ITM Consulting Inc.INTERMEDIATE

Forming through-hole interconnections on circuit boards of ever-increasing densities is a critical issue for board-level assemblers. This course will provide a review of lead-free selective soldering and describe the most common methods of site-specific selective soldering available, including aperture pallets, fountain soldering, solder robots, laser soldering, focused light, molten wave and multi-wave. Selective soldering with lead-free alloys will be discussed in detail, covering the differences in process parameters compared to tin-lead solder, such as solderability aspects, wetting behavior of lead-free alloys, and higher operating temperatures.What You Will Learn•Componentlimitations,clearancerestrictions,thermal

requirements and solder joint reliability issues•Selectivesoldering—methodsandbenefits•Selectingtherightsystemforanapplication•Designguidelines•Increasingroleofselectivesoldering•Technologydrivers•TrendsofthefutureAbout the Instructor

Bob Klenke is a consultant in the PCB assembly industry, working with EMS companies and OEMs to solve assembly problems and optimize facility operations. His career spans more than 25 years at Siemens, Plexus and Philips.

PD17 Best Practices in Electronics Assembly Processes — Part II

Sunday,February26•2:00pm–5:00pmJoseph Belmonte, W. James Hall, and Phil Zarrow, ITM Consulting Inc.BASIC

Part II of this full-day course builds on the morning session. It is highly recommended that participants register for both this session and Part I (PD13) in the morning. See full description in PD13 on page 20.


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PD18 Design of Experiment for SMT Processes

Sunday,February26•2:00pm–5:00pmRita Mohanty, Ph.D., Speedline Technologies, Inc.INTERMEDIATE

Design of experiment (DOE) is a key statistical tool that helps design and process engineers make breakthrough improvements. DOE is a structured, organized method for determining the relationship between input (independent) factors, affecting a process/product and the output (response) of the process. Input factors are manipulated in a specific way, and the effects of these changes on the response are measured. This course is based on the principle of Six Sigma methodology and will focus on using application tools, such as EXCEL, MiniTab and JMP in designing and analyzing the most common and powerful DOE called two-level factorial (full and fractional) design.What You Will Learn•Factorsaffectingsolderpasteprintingprocess•Howtoidentifyandmanipulatefactorstoobtain

highest yield.•AspectsofDOE,fromconceptiontoconclusion,willbe

demonstrated using a specific print optimization projectAbout the Instructor

Dr. Rita Mohanty is the director of advanced development at Speedline Technologies and a Six Sigma Master Black Belt instructor. She has more than fifteen years of work experience relating to engineering and electronic polymers, electronic packaging and assembly. Her B.S., M.S., and Ph.D. are in chemical engineering.

PD22 Physics of FailureSunday,February26•2:00pm–5:00pmMichael Osterman, Ph.D., University of MarylandADVANCED

Failure analysis is an important tool in the effort to ensure reliability of electronic products and systems throughout the lifecycle. This course will explain key elements of root cause analysis, and present failure analysis within that context as a logical sequence of nondestructive and destructive analytical techniques. Emphasis will be placed on specific preparation techniques of components with combinations of materials that have varying properties. In addition, case studies will illustrate successful cross-sectioning analysis techniques for printed circuit boards, BGAs, solar thin films and micro vias.What You Will Learn•Methodsforcharacterizationoffailuremodes•Relationshipstofundamentalmechanical,electrical,

chemical and electrochemical failure mechanisms•Identificationoffailuresites•Verificationoffailuremechanisms•Cross-sectionalanalysisandmaterialscharacterization

About the InstructorDr. Michael Osterman is a senior research scientist and

the director of the CALCE Electronic Products and System Consortium at the University of Maryland, where he earned his doctorate in mechanical engineering. A principal researcher in the failure of lead-free solders, Dr. Osterman has led CALCE in the study of tin whiskers since 2002.

PD26 PoP and BTC Assembly — Material, Process and Reliability

Monday,February27•9:00am–12:00pmJennie Hwang, Ph.D., H-Technologies GroupINTERMEDIATE

Get up-to-date on the new and emerging developments in solder materials, bare boards, modular process and reliability for both lead-free and tin-lead (SnPb) assemblies. This course focuses on package-on-package (PoP) and bottom termination components (BTCs, e.g. QFN, LGA, MLF, SON, DFN). The industry trends and the evolutionary path of advanced packages will be outlined. The best practices of assembling BTCs and PoPs, including solder material, PCB assembly process and rework, as well as the occurring production defects and remedies will be discussed. Applicable practices in solder paste deposition techniques (printing vs. dipping) and halogen-free solder paste will be discussed. The course will also cover solder joint reliability of PoP and BTC assembly and what it takes to make reliable solder joints. Participants are encouraged to bring their issues for discussion.What You Will Learn•Overviewoftrendsinsemiconductors,packagesand

assembly •PoPchallenges,material,process,reliability•BTCchallenges,material,process,reliability•Halogen–freesolderpaste—bestpractice•Solderpasteprinting—pasterheology,stencildesign,

performance•Solderpastedipping—pasterheology,process

parameters•Reflowtechniques—convectionvs.vaporphase•Reflowprofilingforlead-freeassembly—bestpractices,

optimal profiling•ReliabilityofPoPandBTCs—datavs.performanceAbout the Instructor

See PD15 on page 21.



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PD30 Ball Grid Array (BGA): Principles and Practice

Monday,February27•9:00am–12:00pmRay Prasad, Ray Prasad Consultancy GroupADVANCED

This interactive course will identify the technical issues in BGA design and manufacturing that must be resolved for effective implementation on a mixed technology board. Gain insight into the details of BGA to resolve implementation and vendor issues and learn the technical details of design and manufacturing problems.•FlavorsofBGA,includingfrowningandsmilingBGAs•Drivingforces•BGAlimitationsandissues—implementation,reliability,

and design considerations•BGAassemblyprocessesandrepair,failurecasestudies,

troubleshooting•CSPandflipchip•Trade-offsbetweenBGAandfine-pitchcomponents•BGAapplications•QualifyingasubcontractorforBGAassembly•DesignformanufacturabilityandyieldAbout the Instructor

Prior to starting his consulting practice, Ray Prasad held key technology positions at Boeing and Intel. A published author, he chaired the committee that drafted IPC-7095. Prasad has a B.S. in metallurgical engineering, an M.S. in materials science and engineering and an MBA. Prasad has received the IPC Presidents Award.

PD31 SMT Process Fundamentals for Tin-Lead and Lead-Free Assembly

Sunday,February26•9:00am–12:00pmS. Manian Ramkumar, Ph.D., Rochester Institute of TechnologyBASIC

Gain a solid understanding of surface mount and mixed-technology assembly processes for lead-based and lead-free electronics packaging. Discussion will cover a comparison of lead-based and lead-free processes, including implementation issues, critical design tips for ease of manufacture and assembly, and tradeoff decisions between different materials and equipment types, troubleshooting and process control.What You Will Learn•Electronicspackagingandlevels•Packagingandthermalmanagementissues•Assemblydefectidentificationandcorrectiveaction•Inspection,testing,reworkandrepairtechniques•Assemblytypesandassemblyprocesssequence•PCBtypes,materialsandmanufacturing•Componenttypes—passiveandactive•Stencilprinting—materialsandprocess•Automatedcomponentplacementandpackaging

•Soldering—reflow,waveandselective•Lead-freesolderandprofilingchanges•Cleaningmaterials,processandtestingAbout the Instructor


PD34 HDI: Introduction to Processes and Products

Monday,February27•2:00pm–5:00pmChristopher Ryder, AT&S Austria Technologie & Systemtechnik AGBASIC

HDI (high density interconnect) PCB manufacturing entails several process and material variations when compared to standard multi-layer PCB production. This course is designed to provide an introduction to current processes, materials and products, with specific focus on laser-drilled microvia interconnect technology. Basic quality tests and methods will be discussed to illustrate manufacturing challenges. Engineering staff and managers in manufacturing and quality will benefit from this course.What You Will Learn•HDIstack-upnomenclature•BasicHDIPCBmanufacturingprocessflow•CommonbasematerialsemployedinHDI•Qualitycontroltestsandmethods•Commonprocessdefects•Laserviaprocess,includinggeneralindustryvariationsAbout the Instructor

Christopher Ryder is global customer quality manager at AT&S. A prolific contributor to the technical domain, he has delivered and co-authored technical papers on a variety of topics including reliability of embedded components and multi-depth cavity PCBs. Ryder is a member of the J-STD-003 and IPC-650-TM committees.


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PD37 Lead-Free Assembly for High Yields and Reliability

Monday,February27•2:00pm–5:00pmRonald Lasky, Ph.D., PE, Indium Corporation of AmericaINTERMEDIATE

There is a strong need for a systematic approach to meet the challenges of compliance with global environmental regulations. This course will cover logistical and technical issues of assembly environments (PCB finishes, components and alloys) and review implementations of small and large board assembly. Process and product reliability data will also be presented, with case studies. In addition, the root causes of electronic product failure: long-term use, solder joint reliability, and PCB survival during the soldering process will be addressed. This course will provide a framework for discussion of quality, manufacturability and reliability — and for examination of material properties and design parameters. Discussion will explore options for increasing the reliability of electronics assemblies.What You Will Learn•Currentalloysystemsinuse•PreferredPCBfinishesforlead-freeassembly•Concernswithlead-freecomponents•ImplementationofDFRprocedures•Solderbehaviorunderload,solder-jointfatigue•Processingissues,andhowtoaddressthemAbout the Instructor

Dr. Ronald Lasky is a senior technologist at Indium Corp., and a professor at Dartmouth College where he is also the Six Sigma Program director. An author and licensed professional engineer, he holds numerous patent disclosures. He earned his Ph.D. from Cornell University in materials science.

PD39 Design and Assembly Challenges of Ball Grid Arrays (BGAs) and Bottom Termination Components

Monday,February27•2:00pm–5:00pmRay Prasad, Ray Prasad Consultancy GroupINTERMEDIATE

Lead-free has impacted the entire electronics industry, especially for those who must deal with backward and forward compatibility issues. Designing for BGA and BTC can involve trial and error and lot of frustration, compounded by fast-paced changes in packaging technologies. This course deals with real-world problems in lead-free implementation and includes updated information on BTCs based on the newly-released IPC-7093. Learn to identify design and process issues in BGAs and BTCs, and the issues that must be resolved for effective implementation of mixed assembly electronics products — for both tin-lead and lead free.

What You Will Learn•OverviewofBGA,CSPandemergingtechnologies,such

as BTCs (QFN, DFN and MLF) •BGAandBTCimplementationatalowercostandhigher

yield•TroubleshootingBGAandBTCproblems•Bestwaytodealwithbackwardandforward

compatibility situations: lead-free and tin-lead components on the same board

•Metallurgyoflead-freesolder•Keystrategiesindesignandmanufacturingprocessesto

prevent field returns•DesignandprocessguidelinesforBGAsandBTCsAbout the Instructor


PD46 Lead-Free for the Exemptee: Surviving in a Lead-Free World

Monday,February27•9:00am–12:00pmJoseph Belmonte, W. James Hall, and Phil Zarrow, ITM Consulting Inc.ADVANCED

Exemptions are changing. As much of the industry heads toward 100 percent lead-free, your supply chain and competitive edge are affected. This survival course will provide RoHS exemptees with the background and guidance to protect the long-term viability and reliability of their products and business. It will define the current realities of lead-free, and examine strategies for coping with — and adapting to — the elimination or reduced availability of tin-lead components. Tin whiskers and backward compatibility will also be examined. Because the long-term reliability of lead-free solder joints is a key reason for RoHS exemption, testing parameters, acceleration factors and modeling will be discussed.What You Will Learn•RoHSandotherregulations•Reliabilityissues•Supplychainissues•BackwardcompatibilitystrategiesAbout the Instructors


PD51 Practical Tips for Rework of Advanced Packages — Reballing BGAs, Leadless Device Rework

Thursday,March1•9:00am–12:00pmNorman Mier Jr., and Robert Wettermann, MIT, BEST Inc.INTERMEDIATE

With the advent of fewer lead-free packages and the unavailability of some devices in a lead-free alloy, many users find they do not have the right balls on the devices they are using. Offering a combination of hands-on demo, lecture and basic skills development, this course tackles methods of reballing, including the solder preform and



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stencil technique. Following instruction on the practical aspects of the various techniques, participants will have the opportunity to reball several BGAs. Participants will also learn about the various methods used to rework bottom-terminated components, such as QFNs, LGAs and the like; and have the opportunity to rework a leadless device in class. Techniques for high density, fine pitch component rework will also be demonstrated.What You Will Learn•Handlingofpartsanditems/toolsforreballing•Processflowandmethods•IPC-A-610inspectioncriteria•IPC-7711/7721procedures•HowtodealwithfinepitchBGAs,deviceswithunderfill,

mask damage/repair, heat spreaders and ridged parts•Bakeanddrypackaging,reflowprofilingandpartmarking

issues•Reworkingofsingleballs—demo•Plasticandceramicpackagereballingprocess—demo•Leadlessdeviceprocess—demo•Leadeddevicereworkconnector/QFP—demoAbout the Instructors

Norman Mier Jr. has more than 20 years of experience in the electronics rework and repair industry. An IPC-certified Master Instructor, Mier provides training to engineers and technicians in surface mount and advanced surface mount technologies.

Bob Wettermann is president of BEST, Inc. He is an electrical engineer with extensive experience in marketing, sales and design. Wettermann holds several patents in surface science and factory automation products.

PD52 LGA, QFN, BMC Assembly & ReworkSunday,February26•2:00pm–5:00pmBob Willis, ASKbobwillis.comINTERMEDIATE

LGA and QFN have quickly become common package types. This session will provide design, process and quality engineers with “how to” information and practical applications to meet the challenges associated with LGA, QFN and bottom mounted component (BMC) packages. This course will review each step of the implementation process for LGA/QFN devices, along with results of practice process trials with these devices. Attendees will receive a set of optical and X-ray inspection charts for use in manufacture.What You Will Learn•Componentpackagingandplacement•LGA/QFNreworkandreplacement•Arraysolderjointreliabilityandtesting•Printedboardlayoutonrigidandflexiblecircuits•Soldermasklayoutoptions•Lead-freestencilprintingoptions•Convectionandvaporphasesolderingyields•Inspectioncriteria

About the InstructorBob Willis operates a training and consultancy business

based in England. With a special focus in lead-free manufacturing, his expertise is in contract assembly, PCB manufacturing, failure analysis and environmental test facilities. Willis received the SOLDERTEC/Tin Technology Global Lead-Free Award.

CLEANING/COATING/CONTAMINATION

PD04 Cleaning Guidelines for Boards and Assemblies: Developing a Successful Process with the NEW IPC-CH-65B

Sunday,February26•9:00am–12:00pmMike Bixenman, DBA, Kyzen CorporationINTERMEDIATE

How clean is “clean enough” to produce reliable hardware? Cleaning challenges grow as conductors and circuit traces diminish in size, and what is acceptably clean for one segment of the industry may be unacceptable for others. Learn how to develop a successful cleaning process, discover the latest technologies for controlling emissive sources and get up-to-date on IPC-CH-65B, Guidelines for Cleaning of Printed Boards and Assemblies. Gain a greater understanding of cleaning forces: soil, heat exposure, component type and standoff, cleaning agent and the cleaning machine.What You Will Learn•Designingassembliesforcleaning•Processdevelopmentandverification•Assemblyresidues/cleaningconsiderations•Materialscompatibility•Cleaningagentoptions•Cleaningequipment•Environmentalconsiderations•ReworkandrepairAbout the Instructor

Dr. Mike Bixenman is co-founder and CTO of Kyzen Corporation. An active researcher and innovator in the field of precision cleaning, he chaired the committee that developed IPC Cleaning & Alternatives Handbook and IPC Stencil Cleaning Handbook. Dr. Bixenman holds four degrees, including a doctorate in business administration.

The IPC APEX EXPO professional development courses provided me with a toolbox of ideas

that I was able to bring back to my company and implement with measurable results.

James A. Leske

Purchasing ManagerMettrix Technology Corporation


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PD20 Troubleshooting Your Cleaning Process for High Reliability

Sunday,February26•2:00pm–5:00pmUmut Tosun, ZESTRON AmericaINTERMEDIATE

The precision cleaning market has gained tremendous momentum due to the move to lead-free pastes and the corresponding increased reflow profiles. Low standoff devices and miniaturization have raised the bar for cleaning performance when the demand for high reliability is paramount. As a result, equipment and chemical suppliers are driven to innovate like never before. While limited budget and staff can decrease focus on the cleaning process, daily operational procedures and “how-to” tools are available. Gain insight into these procedures and tools, and get practical solutions to your process problems.What You Will Learn•Processproblemidentification•Generalmechanicalandchemicalinteractionsandimpact•Hands-on,troubleshootingguidelines(foaming,rinsing,

drying, etc.)•Identifyingcostdriversandimplementingcost-savings

measuresAbout the Instructor

Umut Tosun is the application technology manager at ZESTRON. He has published numerous articles in electronics publications and presented technical papers and studies. Tosum has bachelor‘s and master’s degrees in chemical engineering from the Technical University of Hamburg, Germany.

PD25 Conformal Coatings: Types, Uses and Specifications

Sunday,February26•9:00am–12:00pmDouglas Pauls, Rockwell CollinsBASIC

Learn the basics of conformal coating and coating processes. Suitable for anyone new to conformal coating, this course introduces the fundamentals and assumes no prior knowledge of coatings. Topics will include popular myths and misconceptions as well as common causes of coating problems. The second half of the course is dedicated to discussion about conformal coating in the manufacturing environment.What You Will Learn•Conformalcoatinguses•Coatingtypesandspecifications•Engineeringtrade-offs•SelectingaconformalcoatingAbout the Instructor

Doug Pauls is Rockwell Collins’ expert on conformal coatings. He serves as chairman of the IPC Cleaning and Coating Committee and has been involved in cleaning and coating processes for more than 25 years. Pauls has been a part of MIL-I-46058 and IPC-CC-830 as well as the IPC handbook on conformal coating, IPC-HDBK-830.

PD33 Conformal Coating Applications, Inspection, Rework & Quality Control

Monday,February27•9:00am–12:00pmBob Willis, ASKbobwillis.comINTERMEDIATE

Conformal coating has provided benefits in the high-reliability and extreme-conditions sectors as well as in consumer applications. Selective coating has also been used in the telecommunications and automotive sectors, but for different reasons. This course will provide a guide to the use of coatings: application and process, product benefits, inspection and quality control. An opportunity to examine coated boards using different materials and inspect the coating application will be provided. Each participant will receive a set of inspection wall charts for use on the manufacturing shop floor illustrating coating application and common defects.What You Will Learn•Whyconformalcoating•Tocleanornottoclean•Coatingmaterialsandprocessoptions•Costofcoatingassemblies•SIRandcleanlinesstesting•Reliability•Reworkandrepairofboardassemblies•Testing,inspection,qualitycontrolandevaluation•Designforcoating•MaskingoptionsandmethodsAbout the Instructor


DESIGN

PD08 Design for Manufacturing — DFMSunday,February26•9:00am–12:00pmCheryl Tulkoff, CRE, DfR SolutionsINTERMEDIATE

Get first-hand information on issues that impact leaded and lead-free manufacturability and performance requirements. The course will offer practical recommendations for meeting the challenges of managing the interconnection of both through-hole and SMT at the bare board level. Sophisticated PCB fabrication technologies and processes will be discussed, including laminate selection, trace width and spacing, solder mask and finishes. Design for manufacturability (DFM) best practices ensure that manufacturing capability is taken into consideration during the design and layout of a product. Gain a greater understanding of potential manufacturability hazards to avoid during the design process.



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What You Will Learn•Printedboardsandprocessmaterialselection•Plated-throughholedesign•Keep-outzones•Copperbalancing•Microvias,viafilltechnologies•Multiplelamination•Equipmentprocesscontrolsandreliabilitytesting•MatchingPCBcomplexitytosuppliercapabilities•Importanceofsupplierreportcards•Covercircuitcardassembly•Padgeometries,componentspacingandlocation•Heatsinkselection•Standoffsandwiring•InfluencesofPCBthickness,cut-outs,anddepanelization

techniques on reliability•Comparisonofsurfacemount,waveandhandsoldering•Moisturesensitivitylevelhandling,processoptimization

and control strategies, repair and reworkAbout the Instructor

A published author and trainer, Cheryl Tulkoff has more than 20 years of experience in electronics manufacturing with an emphasis on failure analysis and reliability. She has worked throughout the manufacturing life cycle culminating in the analysis and evaluation of field returns. She has a bachelor’s degree in mechanical engineering.

PD11 Designing with Flex in Mind: Next Generation

Monday,February27•2:00pm–5:00pmMark Finstad, CID, Flexible Circuit Technologies, Inc., and Mark Verbrugge, CID, Pica Manufacturing SolutionsINTERMEDIATE

More than just an electrical interconnect, a flexible circuit bends and flexes during and after installation, making it as much a mechanical device as an electrical one. A robust flexible circuit design goes much deeper than just connecting the nets. Small variations in materials selection, stack-up, and routing features can dictate whether a flex circuit will function for years … or fail within minutes. This course will examine the electrical and mechanical features that must be incorporated into a design, and how those features interact. Learn about flex design for differing markets, from two manufacturing perspectives.What You Will Learn•Thedesignprocess—fromconcepttoproduct•Costcontrolandmaximizingvalue:lowesttotalcostof

ownership (TCO) with the highest reliability•Wheretouseflexcircuitsandwhentochooserigid-flex

over a standard multi-layer•Propermaterialsandstack-upselection,routing

techniques, termination variety and ruggedizing options•Shieldingoptionsfornoiseandimpedancecontrol•Routingtechniquesforincreasedreliability

•Commondesignerrorsandcostdrivers•Drawingcreationforquicker,moreaccuratequotes•Formingmethodsandtoolingoptions,assemblyand

handling techniques About the Instructors

Mark Finstad is an applications engineer at Flexible Circuits, with more than 28 years of experience in design and manufacture of flex and rigid-flex circuits. He is vice-chair of the IPC Flexible Circuits Design Subcommittee and is active on the IPC Flexible Circuits Performance Subcommittee.

Mark Verbrugge is an IPC certified interconnect designer and serves as the lead applications engineer at Minco Products. He has 30 years of PCB industry experience, the last 24 in designing and building flex and rigid-flex circuits. He authors a monthly column on flex design and manufacture with Mark Finstad.

PD12 Design and Packaging for Space Hardware and Other High-Reliability Applications

Thursday,March1•9:00am–12:00pmDaniel DiTuro, Honeywell InternationalINTERMEDIATE

Learn about design and packaging guidelines based on military and NASA requirements, as well as approved materials and processes for printed boards and printed board assemblies. There are many challenges with increasing circuit density and power dissipations in smaller, lighter packages. High vibration levels, operational thermal cycling and extended mission life require robust design beyond the requirements of most consumer electronics. Find out why typical SMT designs for consumer products may not be appropriate for these applications due to reliability, mechanical and electrical characteristics. Engineering, design, development and quality assurance staff will benefit from this course.What You Will Learn•Highreliabilityprintedboardandprintedboardassembly

design•Selectingpartsandmaterialsforhigh-reliabilityprinted

board assemblies•Materialproperties:outgassing,CTE,Tg,radiation

hardening•Designingforconductionandradiationcooling•Survivinghighvibrationlevels•Importanceofsolderjointthermalfatigueandpartlead

fatigue analysisAbout the Instructor

Daniel DiTuro is the principal mechanical engineer and senior electronics packaging engineer for Honeywell Aerospace. He has more than 30 years of experience designing electronics assemblies for military and space applications.


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PD14 Signal Integrity Problem Prevention: High-Speed Routing & Termination

Sunday,February26•9:00am–12:00pmRichard Hartley, CID, L-3 Avionics Systems Inc.INTERMEDIATE

Get a comprehensive introduction to high speed PCB design to help ensure your success using today’s fast and ultra-fast ICs. See how the output edge rate (rise/fall time) of ICs — more than the rate at which the circuit is clocked — is the cause of signal integrity and EMI problems and learn what to do about it. Each participant will receive a comprehensive workbook that will be an excellent reference for future high-speed design projects.What You Will Learn•Reflectionmodeoperationoflines…anditsadvantage•Maximumnonimpedancecontrolledlinelength•PCBtraceandbusroutingofsingle-endedlines•Bestterminationschemesforsingle-endedlines•Propagationtime/velocity—Whythisisveryimportant•Loadedlinepropagationtime/velocityAbout the Instructor

Richard Hartley is a senior principal engineer at L-3 Avionics Systems Inc. He also teaches and consults with major corporations worldwide to prevent and resolve noise, signal integrity, and EMI problems. His focus is on circuits and PC boards for aircraft avionics, computers and telecommunications.

PD21 Basics of PCB DesignSunday,February26•9:00am–12:00pmSusy Webb, CID, FairfieldNodalBASICProviding a comprehensive overview of the entire design

process, this course will begin with a brief discussion on components and specification sheets, and then move into the basics of building padstacks and part libraries. Placement issues and scenarios, planes and stackups, and routing do’s and don’ts will also be covered. The course concludes with output and saving.What You Will Learn•Readingandinterpretingdatasheets•Parts:libraries,padstacks,attributesandcomparison•Placement:wheretostart,colorcoding,priorities•Planesandstackupinformation•Gateswapping,fanout,androutingideasand

informationAbout the Instructor

Susy Webb has 30 years of design experience in a variety of fields, including point-to-point microwave network systems, oceanographic oil exploration equipment, and CPCI and ATX computer motherboards. Webb serves on the IPC Designers Council Executive Board.

PD29 DFM for Manufacturing: When a Six Sigma Process Is Not Sufficient to Achieve a High-Yield Manufacturing Process

Monday,February27•9:00am–12:00pmDale Lee, Plexus Corp.INTERMEDIATE

Today’s design tolerances have impacted traditional assembly processes with very tight solder application, component placement and soldering constraints. Traditional Six Sigma process controls are insufficient to achieve a high-yielding manufacturing process. This course will introduce the element of design for matched process (DFMP), and provide examples of several opportunities within the DFMP for yield improvement through manufacturing tooling design, SMT and PTH assembly process matching and environmental controls.What You Will Learn•Globalproductdesignelements•PCBdesignimpacts•Wavesolderdesignimpacts•SMTsolderdesignimpacts•Thermalbalance,tracerouting,equipmentlimitation/

tolerance, PCB array tolerance, process tooling design•Processcontrolimpacts•Pastevolume,thermalshockSMTandPTH,reflow

process warpage•Cleaningimpacts•Compatibilityissues,lowstand-offcomponents

About the InstructorDale Lee is a staff DFX process engineer with Plexus

Corp., involved in DFX analysis and definition/correlation of design, process, legislative, and tooling impacts on assembly processes and yields. He is an author, instructor and speaker on advanced packaging, PCB and SMT design, assembly, DFX and rework.

PD36 Control of EMI Coupling MechanismsMonday,February27•2:00pm–5:00pmRichard Hartley, CID, L-3 Avionics Systems Inc.INTERMEDIATE

This course is an introduction to the concepts needed in high-speed circuit and printed circuit design to ground a circuit for proper operation and to minimize noise and EMI. Gain an understanding of grounding and all its aspects. Each participant will receive a workbook to reference for future designs.What You Will Learn•TipsforcontrollingEMI•EffectofcomponentpositionsonnoiseandEMI•PositionsofplanesandsignalsonaPCB•Splitpowerplanesandplaneislands•Secondarycouplingandcascadedcrosstalk•Effectofcornersandotherimpedancediscontinuities•20Hrulevs.viastitchingAbout the Instructor

See PD14 on this page.



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PD38 DFX: Project Setup to Measurement Definition and Advanced Analysis

Monday,February27•2:00pm–5:00pmDale Lee, Plexus Corp.INTERMEDIATE

As products continue to decrease in size, some elements increase: interconnection density per unit area, functional performance (thermal, mechanical, electrical), and complexity of “ability” design. As a result, traditional DFM programs have transformed into DFX (design for excellence) to address the increase in scope and specialization. This course will provide an introduction to important requirements for establishing a DFX program, major elements of mechanical and printed board design, assembly process design, inspection/test design and software verification tools, and will include examples of opportunities and demonstrations.What You Will Learn•EstablishingaDFXprogram•DFXtypes/listing—concurrentvs.serial•DFMimpacts—electronics,plastics,metals,coatings•Assemblyprocessdefinition—PCA,HLA•Componentselection:packagetypes,assemblyprocess•Designimpacts—through-holesolder,lead-freesolder,

thermal connections, pad shape, solder mask•Processcontrolimpacts—pastevolume,thermalshock

SMT and PTH, reflow process warpage•Cleaningimpacts—compatibilityissues,lowstand-off

components•Productacceptance—test/inspectionstrategy•SoftwaretoolsAbout the Instructor


PD41 Designing PCB Stackups to Balance Signal Integrity Against Manufacturability

Monday,February27•2:00pm–5:00pmLee Ritchey, Speeding EdgeINTERMEDIATE

With increasing speeds of logic and RF systems, demands placed on PCBs make it necessary to consider more than impedance when designing the stackup used for PCB manufacturing. Find out what you need to know to make performance decisions about crosstalk rules, impedance targets, interplane capacitance needs, and types of weaves, so you can minimize the differential skew between high-speed differential pairs used in protocols, such as PCI Express, XAUI, Double XAUI and other data links that operate at multiple gigabit per second rates. This session will cover all aspects of PCB stackup design to help you maximize the advantages of the fabrication process and work with both fabricators and laminate suppliers to achieve the highest performance from the overall process at the least cost.

What You Will Learn•PCBstackupdesign•Materialschoices•ArrangementofsignallayersandpowerplanesAbout the Instructor

Lee Ritchey has participated in the design of more than 3,000 high speed PCBs, ranging from PC mother boards to the backplanes used in terabit routers. He is the author of two books on high-speed design disciplines. As president of Speeding Edge, Ritchey consults for top manufacturers of Internet and server products.

PD43 Designing Complex BoardsSunday,February26•2:00pm–5:00pmSusy Webb, CID, FairfieldNodalINTERMEDIATE

When beginning a complex board design, designers are faced with a unique set of needs and questions. Where to start the process? How to organize the information on all the schematic pages? What is the best way for these parts and sections to fit together electronically? How to place everything and route it so that it all fits within the board outline and has good signal integrity? This course will reveal the answers to these questions and provide important insight into designing complex boards.What You Will Learn•Lawsofphysics•Whysomepracticesmightworkbetterthanothers•ActualexamplesAbout the Instructor


EMERGING TECHNOLOGIES

PD03 Chip Packaging — Materials, Quality and Reliability

Sunday,February26•9:00am–12:00pmSyed Sajid Ahmad, North Dakota State UniversityINTERMEDIATE

This course will teach engineers and nontechnical personnel how package configurations affect their work — and how their work affects chip packages. Discover how chip packages that look simple are actually intricate. A case study will take participants through the manufacturing steps for plastic packages, and illustrate the complexity of processes, materials and equipment. The course will also cover materials and design selection to meet use and application environments, and provide an introduction to advanced packaging. Discussion on quality and reliability issues related to chip packaging and SMT — and their solutions — will also be included.


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What You Will Learn•Packagingcharacteristicsanddrivers•Typesofpackagesandcriticaldifferences•Advancedpackaging•MaterialsselectionAbout the Instructor

Syed Sajid Ahmad’s focus is on enhancing research, development and prototyping capabilities in the areas of thin film, thick film, CSP and SMT at the Center for Nanoscale Science and Engineering. He holds 54 patents, is an author and has presented internationally. He has more than 30 years of experience.

PD40 Advanced Component Packages and Processes

Sunday,February26•2:00pm–5:00pmS. Manian Ramkumar, Ph.D., Rochester Institute of TechnologyINTERMEDIATE

This course will introduce SMT users to the terminology, classifications, construction and assembly process for advanced component packages. Discover the advantages and disadvantages of each component type as well as their implementation requirements. High density interconnection, thermal management requirements and microvia technology will be discussed, and the details of the assembly process when using these devices, in both lead-based and lead-free assembly will be covered.What You Will Learn•Electronicspackagingandlevels•Thermalmanagementinadvancedpackaging•Substratepropertiesforadvancedpackaging•ICpackagingtrends,packagingevolution•Areaarraypackaging—BGA,CSP,WL-CSPandflipchip•Self-centeringofareaarraypackages•Assemblyprocessforareaarraypackages•Reworkandrepairofareaarraypackages•Needforunderfillandencapsulation•Ceramiccolumngridarray(CCGA)•Chip-on-board(COB)technology•Tapeautomatedbonding(TAB)•Multi-chip-module(MCM)About the Instructor


PD44 Package on Package (PoP), Design Assembly, Rework and Inspection

Monday,February27•2:00pm–5:00pmBob Willis, ASKbobwillis.comINTERMEDIATE

PoP applications are growing in popularity for mobile and handheld electronics and increasing demands on assembly engineers. When the real estate on printed boards is at a premium, the only way to go is up. Paste dipping, reflow warpage, increased placement accuracy and process

introduction can be demanding — and staying up to date with the technology is vital. Learn the benefits and challenges of PoP stack packages. Each participant will receive a set of PoP inspection and quality control wall charts covering optical and X-ray inspection, dip flux and past application, placement criteria and assembly defects.What You Will Learn•Componentstandards•PCBdesignrules—padlayout,viaholeconnection•PoPplacement—tackflux,dipsolderpaste•Reflowsoldering—convection,vaporphase,

temperature profiling•OpticalandX-rayinspection•Underfill•Rework•DefectsAbout the Instructor


PCB FABRICATION AND MATERIALS

PD07 PCB Fabrication Basics: Process and Specification — Part I

Sunday,February26•9:00am–12:00pmDon Schmieder III, Plexus Electronic Assembly Corporation, and Jim Vanden Hogen, Plexus CorporationBASIC

This two-part course for engineering, design, and procurement will review an entire multi-layer PCB fabrication process and how design affects fabrication and assembly. Physical samples taken from the fabrication process will be available for inspection. Part I will cover PCB types and industry specifications, laminates and their properties, front-end engineering, and basic layer stack-ups. Discussion will continue with inner-layer processing and lamination, and conclude with drilling.What You Will Learn•Step-by-stepPCBfabricationprocess•PCBtypesandindustryspecs•Laminatetypesandproperties•Stack-ups,viametricsandaspectratiosAbout the Instructors

Don Schmieder has been working in the electronics field for 22 years. His experience spans purchasing, procurement, manufacturing, assembly, and testing of PCBs, and he has performed technical and quality audits of more than 50 PCB fabricators. He has a Bachelor of Science degree and a masters in business.

Jim Vanden Hogen has more than 35 years of experience in the design, purchase, manufacture, assembly, test and sale of PCBs. A senior PCB commodity specialist at Plexus, Vanden Hogen has performed technical and quality audits of more than 30 PCB fabricators. He served on the IPC-6012 task group.



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PD02 PCB Fabrication Basics: Process and Specification — Part II

Sunday,February26•2:00pm–5:00pmDon Schmieder III, Plexus Electronic Assembly Corporation, and Jim Vanden Hogen, Plexus CorporationBASIC

Part II of this full-day course will review the fabrication process after drilling and discuss desmear, electroless copper, outer-layer processing, soldermask, legend and electrical test. The instructors will share the pros and cons of various surface-finish applications and discuss cost-effective arrays that maximize material, facilitate manufacturing and allow for post-assembly singulation. Using the IPC-6012 PCB fabrication specification for reference, participants will learn how to develop their own procurement documentation, including addressing RoHS-compliant materials. For maximum benefit, register for both this session and Part I (PD-07) in the morning.What You Will Learn•Step-by-stepPCBfabricationprocess(continued)•Surfacefinishchoices•Arraydesignandoptimalmaterialutilization•FabricationspecificationAbout the Instructors


PD10 Final Finishes — Compatibility with Lead-Free Assembly

Sunday,February26•2:00pm–5:00pmMichael Carano, OMG Electronic Chemicals, LLCINTERMEDIATE

With the industry’s move to lead-free soldering, solderable finishes that protect the bare copper prior to assembly are increasingly important. They provide the optimum lead-free solder paste spreadability and lead-free solder through-hole fill for optimum joint strength. Find out why higher-temperature melting points for lead-free solders add additional heat stress and aging, and how this will impact solderability and long-term reliability. Learn the key criteria for ensuring optimum performance of lead-free finishes. Issues related to dross formation and copper dissolution will also be addressed, with an important discussion on final finish defects: black pad, tin whiskers, brittle fracture, immersion silver-void formation and trench etch.What You Will Learn•Solderabilityoverview•Metalliccoatings:electroplatednickel-gold,electroless

nickel-immersion gold, palladium, immersion tin, etc.•Thinversusthickorganiccoatings•Compatibilityofsurfacefinisheswithsolders•Pastespreadabilitystudies•Through-holefillstudies•Jointstrengthtesting

•Effectsofagingandmultiplethermalcycles•Processcontrol:solderabilitychecks,depositintegrity•Costimplicationsoflead-freefinishesAbout the Instructor

Michael Carano is vice president of technical operations for OM Group’s Electronic Chemicals facility. He holds nine U.S. and 20 foreign patents covering a variety of technologies. A published author, Carano holds B.S. and MBA degrees and has completed graduate work in polymer chemistry.

PD50 Design for Flexible and Rigid-Flex Circuits — Part I

Sunday,February26•9:00am–12:00pmVern Solberg, Solberg Technical ConsultingBASIC

Flexible circuits can save up to 75 percent on space and weight, often improving reliability while replacing several cables and connectors — an advanced approach to total electronics packaging. This two-part course will look at design guidelines for flexible and rigid-flex circuit applications detailed in IPC-2223; review flexible substrate construction variations and material specifications; and study the industry standards developed to guide flex manufacturers and users. Examples of several flex-based electronic products will be reviewed. It is highly recommended that participants register for both this session and Part II (PD-35) in the afternoon.What You Will Learn•Applications:commercial,industrial,automotive,

aerospace •Designingsingle-anddouble-sidedandrigid-flexcircuits•Substratematerialselectionandmetallization

technologies•Specifyingbasematerialandapplicablestandards•Fabricationmethodologies•Subtractive(etchedcircuit)process•Semi-additivecircuitplating•Flexandrigid-flexfabricationAbout the Instructor

Vern Solberg is an independent consultant specializing in SMT and microelectronics design and manufacturing technology. He has more than 25 years of experience related to commercial and aerospace electronic products. Solberg holds several patents for IC packaging innovations, and is a published author.


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PD35 Design for Flexible and Rigid-flex Circuits — Part II

Sunday,February26•2:00pm–5:00pmVern Solberg, Solberg Technical ConsultingINTERMEDIATE

Part II of this course will build on earlier discussion about design guidelines for flexible and rigid-flex circuit applications. It will cover alternative alloy compositions, provide a comparison of reflow solder profile criteria for lead-free solder and address how to resolve the technical challenges of higher-temperature assembly processing. Flex-circuit metallization technologies and fabrication methodologies will be examined. Learn about design guidelines for SMT, variations for land pattern development, two metal layer via hole planning, methods for maximizing circuit routing densities and techniques for circuit reinforcement. It is recommended that registrants sign up for this session as well as Part I (PD-50) in the morning.What You Will Learn•Guidelinesforcomplexflexibleandrigid-flexcircuits•Requirementsforflipchiponflex•PreparingforvolumeSMTassembly•Flexandrigid-flexassemblyprocessing•QualityassessmentforSMTassembliesAbout the Instructor


PD45 Front-End Engineering Perspective on Design Issues

Thursday,March1•9:00am–12:00pmMike Tucker, Colonial Circuits Inc.BASIC

Learn what happens inside a typical CAM department at your bare-board fabricator. Find out why some fabricators flag issues that others don’t. Today’s CAM systems and departments are critical for engineering CAD data, ensuring manufacturability and creating manufacturing tools. This course will give you an inside look at a typical CAM department, its day-to-day challenges and practices to avoid common problems. The instructor will review actual case studies of problems and resolutions.What You Will Learn•Datarequiredfromdesignersforfabrication•WhatCAMdepartmentsdowithyourdata•Designrecommendations•Rules-of-thumbDFMguidelines•TopreasonswhyjobsgoonholdatfabricationAbout the Instructor

As director of engineering for Colonial Circuits, Mike Tucker works to create robust, manufacturable products. He has more than 15 years of industry experience, with special expertise in front-end engineering for bare-board fabrication.

QUALITY, RELIABILITY AND TEST

PD01 Building Long-Term Reliability in PCBs: Materials, Plating Processes and Innerlayer Treatments for Lead-Free Assembly Requirements

Sunday,February26•9:00am–12:00pmMichael Carano, OMG Electronic Chemicals, LLCINTERMEDIATE

Circuit board materials, via formation quality, plating uniformity and innerlayer bonding treatments all combine to affect the reliability of the finished printed board. Learn about the important material properties required for lead-free assembly and the effect of reflow profiles on different resin materials. Critical issues such as drilling feeds and speeds, optimization of the desmear and metallization process, and electroless copper plating parameters will also be reviewed.What You Will Learn•AlternativestoconventionalFR-4A•Factorsthatinfluencelaminationofmultilayers•Howplatingoperationsinfluencelong-termreliability•KeymaterialspropertiessuchasTg,CTE,Td,Dk,Dfand

moisture sensitivities•Filledversusunfilledmaterials•Glassstyles•PTHdrillingparameters•Circuitdensity•Useofreversetreatfoilversusstandardfoil•PTHandblindviaaspectratios—limitingfactors•Assemblyreflowprofileoptimization•Conductiveanodefilamentformation(CAF)About the Instructor


PD19 Controlling Moisture Content in Boards: Best Practices

Sunday,February26•2:00pm–5:00pmBhanu Sood, Ph.D., University of MarylandINTERMEDIATE

The reliability of PCB materials is strongly influenced by the presence of moisture. Moisture can be initially present in the epoxy glass prepreg, absorbed during the wet processes in PCB manufacturing or diffuse into the PCB during storage; it can reside in the resin, resin/glass interfaces and micro-cracks or voids due to defects. Higher reflow temperatures increase vapor pressure, leading to higher moisture uptake than tin-lead processes. In addition to cohesive or adhesive failures within the PCB that lead to cracking and delamination, moisture can lead to the creation of low impedance paths due to metal migration, interfacial degradation resulting in conductive filament formation, and changes in dimensional stability. Learn the best practices in controlling moisture content.



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What You Will Learn•Moisturetransportmechanisms•Governingmodelsanddependantvariablesofthe

moisture diffusion process •Effectsofmoistureonsusceptiblecomponentsand

associated failure modes and mechanisms •PCBmaterialhandlingandstorageguidelinesAbout the Instructor

Bhanu Sood is the director of the test services and failure analysis laboratory at CALCE. His research areas include electronic materials characterization, failure mechanisms in PCB materials, electronic supply chains and counterfeit electronic parts detection. Sood holds M.S. degrees in advanced materials processing and materials science.

PD23 Failure Analysis: Lessons LearnedMonday,February27•9:00am–12:00pmMartin Anselm, Universal Instruments CorporationINTERMEDIATE

When reviewed in conjunction with research, failures provide a unique perspective on design for manufacturability and reliability. This course will provide valuable lessons learned from practical experience through discussion of material selection, current electronics research and failure analysis case studies. Design considerations for advanced assembly processes and types of analytical techniques that can be used for materials characterization will also be covered. In addition, a review of lead-free laminate selection and testing procedures will shed some light on the question: Can your board withstand 9x reflow? Participants are encouraged to bring specific questions or examples of surface mount process difficulties.What You Will Learn•Majordifficultiesinlead-freereliabilitytesting•Mixedalloyassemblybestpractices•ENEPIGintermetallicformationmorphologies•PCBplatingconsiderations•Analyticaltestingtechniques•Rootcausesofproductionfailures•Failureanalysisstudies—fine-pitchprinting,PoP,01005

defects, and high Tg laminate failuresAbout the Instructor

Martin Anselm is the manager of Failure Analysis Services for the Advanced Process Lab at Universal Instruments. He holds a bachelor’s degree in physics from SUNY, an M.S. degree in mechanical engineering from Clarkson University, and is working on his doctorate in materials engineering at Binghamton University.

PD24 Fighting Thermal Cycling EffectsSunday,February26•9:00am–12:00pmVijay Prasad, Ops A La Carte LLCBASIC

Gain an understanding of the undesirable effects of thermal cycling on the components of electronics assemblies, including ones that may ultimately cause a failure of the whole system. This course will cover what you need to know about thermal cycling tests, their resulting stresses on solder joints, and various approaches for counteracting these stresses.What You Will Learn•Physicalcharacteristicsofelectronicsmaterials,

especially thermal coefficient of expansion•Deformationofcomponentsandjointstressesunder

thermal cycling•Theoriesofstressandstrainaswellasfailuretheories

applied to the case of thermal cycling•Methodstoovercomeundesirableeffects•EvaluationofalternativesolutionstoproblemsAbout the Instructor

Vijay Prasad is a program manager and lead consultant at OPS a La Carte. A senior RAM engineer with a strong product development background in the aerospace, military defense, and automotive sectors, he has more than 20 years of reliability engineering. Prasad has several patents pending. He holds an M.S. degree.

PD27 Optimizing X-Ray Inspection: Equipment, Processes and Procedures

Monday,February27•9:00am–12:00pmBob Klenke, ITM Consulting Inc.INTERMEDIATE

Get a thorough, practical overview of the X-ray inspection process. Participants will gain perspective on implementation and how to optimize the X-ray inspection process for high manufacturing yields. X-ray inspection methodologies will be covered step-by-step, including equipment characteristics, processes and procedures. Techniques vital to inspection of lead-free assemblies will be addressed, with methods to minimize X-ray dosage experienced by radiation-sensitive components, such as DRam and SDRam devices.What You Will Learn•Inspectionstrategiesandbridgingtechniques•InspectionofQFP,QFNanddiscreteSMTcomponents•Specificapplicationrequirements•ImagingofmicroviaswithinBGAsubstrates•CorrelationofBGAsolderballdiameterandbridging

effects of popcorning


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•Computerizedtomography•Inspectionofadvanced3-Dpackagingandstackeddie

devices•Nonsemiconductorapplications,includinghigh-

temperature automotive electronics•OptimizingtheX-rayinspectionprocess•CompensatingX-raytubeparametersforlead-free

material propertiesAbout the Instructor


PD42 Tin Whiskers: Origin, Propensity, Mitigation

Sunday,February26•2:00pm–5:00pmDavid Pinsky, Raytheon CompanyINTERMEDIATE

Metal coatings of tin, cadmium, indium, lead, zinc and gold have confirmed histories of whisker propagation. Formation of metallic whiskers in electronic equipment has on occasion been identified as the root cause for device malfunction or failure. Following the initial consideration of lead-free alternatives — tin, tin-copper, tin-bismuth, and tin-silver electrodeposits — those based on pure tin have been established as the industry standard for connectors and discrete components along with SAC alloy assembly solders for a majority of commercial consumer applications. Although some of the current RoHS exemptions for high-reliability applications may be extended, the available supply of tin-lead alloy components in the supply chain continues to diminish. Gain an in-depth understanding of tin whiskers and learn what you can do to mitigate them.What You Will Learn•Propertiesofcoatingmaterials•Mechanismsforwhiskerformation•Effectofenvironmentalexposureaccelerationonwhisker

propagation•Whiskerriskassessment•RecommendationsforwhiskermitigationAbout the Instructor

David Pinsky is an engineering fellow with Raytheon Integrated Defense Systems, and has more than 25 years of experience in failure analysis and materials selection. For Raytheon, Pinsky develops policy and practices for tin whisker risk mitigation, chairs the tin whisker team and RoHS technical committee, and is engineering lead for REACH implementation.

PD49 Testability Strategies: Optimizing the MixMonday,February27•9:00am–12:00pmLouis Ungar, A.T.E. (Advanced Test Engineering)INTERMEDIATE

Test is intended to detect faults at every stage of the circuit manufacturing process. Diagnosing the root cause of the problem is essential for timely and cost-effective repair. This course will help you develop test strategies based on circuit types, workloads, various fault distributions and volume of production. Strategies include a number of different automated methods, including AOI; AXI; and connectivity, in-circuit, functional board and system tests. With the advent of the IEEE-1149.1 (JTAG) boundary scanned devices and other IEEE-1149.x techniques, even more test methods are available. Gain an understanding of these techniques and how you can optimize the mix.What You Will Learn•Teststrategies•Automatedinspection(AOI,AXI)•AutomatictestingandATE•Designfortestability,includingJTAG/IEEE-1149.x•Built-InSelfTest(BIST)•TesteconomicsAbout the Instructor

Louis Ungar is the president of A.T.E. Solutions. He has served as testability chair for the SMTA and on committees for various IEEE standards. Ungar holds a BSEE and a computer science degree from UCLA, and has completed course work toward an MA in management.

SUPPLY CHAIN/BUSINESS ISSUES

PD09 Counterfeit Components — Causes, Cures and Solutions

Sunday,February26•9:00am–12:00pmBob Willis, ASKbobwillis.comINTERMEDIATE

Counterfeit electronic components are becoming increasingly difficult to identify. They can look right, but fail to function. AOI should find incorrectly-marked parts or variations, but the level of sophistication in marking is increasing. This course will illustrate the problems caused by counterfeit components and provide test methods that can be used to confirm the integrity of components. In addition, failure analysis techniques that can be used in lieu of finding failure modes will be discussed. What You Will Learn•Counterfeitavoidancestrategies•Componentidentificationchecklist•Guidelinestoreduceriskfromcounterfeits•Componenttrendsandobsolescence•Impactofleadfreeoncomponentavailability•Mechanical,electricalandsolventtesting•Visualandmicroscopicinspection•X-rayinspectionofpassiveandactivepartsAbout the Instructor




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PD32 Lean: 10 Things Every Manager Should Know for a Competitive Advantage

Thursday,March1•9:00am-12:00pmSteven Williams, Plexus CorporationINTERMEDIATE

Lean is the most powerful tool your company can use to improve organizational performance and competitiveness. This course will provide an overview of Lean to help managers understand how Lean can help any organization survive. Lessons learned from experience in manufacturing management will be shared. Hear about common mistakes and myths as well as what it takes to successfully implement a Lean program.What You Will Learn•TheneedforLean•Drive-byLean•TheLeanphilosophy•Thesevendeadlywastes•Processanalysis•Why99percentyieldisnotgoodenough•TheLeantoolkit•AglossaryofLeanterms

About the InstructorSteven Williams is a 33-year veteran of the electronics

industry. He is responsible for strategic materials management and tactical support of a custom-engineered components supply base for a major manufacturer. He is a published author and a contributing columnist for PCB007.

PD47 Contracting With the Customer: What the EMS Manager Needs to Know — Part I

Thursday,March1•9:00am–12:00pmAllen Anderson, J.D., CPCM, and Jeffrey Roth, Fees & Burgess, P.C.ADVANCED

Without a doubt, negotiating with OEMs is one of the biggest challenges facing EMS managers. What needs to be covered in the contract? Is your company protected? What should you do if there is a dispute? This comprehensive, two-part course addresses the specific contractual issues faced by EMS companies. Gain a step-by-step understanding of the contracting lifecycle between an EMS provider and its customer, starting with initial engagement and signing of a nondisclosure agreement, through the bid process and formal contract negotiation, to resolution of disputes under the applicable contract(s). Using real-life situations, the contracting process as well as the questions that must be answered before entering into an agreement will be covered. Participants must be representatives of EMS organizations to attend. It is highly

recommended that participants attend both this session and Part II (PD-48) in the afternoon.What You Will Learn•Howtoreduceriskincontractingbyhavingan

appropriate agreement in place at each step of the relationship

•Howtodealwithlettersofintentandotherpreliminaryand precontractual agreements

•Keycontractriskareasandpracticalsuggestionsfornegotiating favorable terms in those areas

•Howtorespondtocustomerboilerplatecontractdocumentation and purchase orders

•Specificmethodologiesforlimitingfinancial,warranty,product liability and other risks

About the InstructorsAllen Anderson is a shareholder in the law firm of Fees

& Burgess. He practices in the areas of commercial, construction, and employment law, and corporate and governmental contracting, and his experience includes drafting and negotiation of product purchase, supply, and service agreements.

Jeffrey Roth practices in the areas of commercial and contract law, business transactional and regulatory law, employment, general corporate law, and governmental contracting. Prior to joining Fees & Burgess, he held in-house corporate counsel positions with AVEX Electronics, Benchmark Electronics, and Sanmina-SCI.

PD48 Contracting With the Customer: What the EMS Manager Needs to Know — Part II

Thursday,March1•2:00pm–5:00pmAllen Anderson, J.D., CPCM, and Jeffrey Roth, Fees & Burgess, P.C.

Part II of this course continues the discussion on contracting. See full description in Part I (PD47) above.

At IPC APEX EXPO I get a feel for industry trends in technology and I learn about what’s

available to build the next generation of assemblies. The show enables me to build the best possible quality product and puts me one

step ahead of the competition.Stuart Krever

Sr. Process EngineerQual-Pro


36

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ASSEMBLY AND JOINING

5-20 Assembly & Joining CommitteeSunday, February 26 Leo Lambert, MIT, EPTAC Corporation

This is a planning meeting for the task group and subcommittee leaders of the Assembly and Joining Processes Committee.

5-21e Solder Stencil Task GroupMonday, February 27 William Coleman, Ph.D., Photo Stencil Inc., and George Oxx Jr., Jabil Circuit, Inc. (HQ)

This group is celebrating the publication of revision B of IPC-7525. This guide assists users in selecting stencil apertures for solder paste printing, including support for use with lead-free alloys.

5-21f Ball Grid Array Task GroupTuesday, February 28 Ray Prasad, Ray Prasad Consultancy Group

The group is working on revision C of IPC-7095 to deal with cratering anomalies and new termination types. This revision considers mechanical stress testing for area array assemblies. A modification plan has been drafted and members have submitted new data for inclusion.

5-22a J-STD-001 Task GroupSaturday, February 25 Teresa Rowe, CIT, AAI Corporation

This task group is developing revision F of J-STD-001.

5-22a/ Synergy Meeting — J-STD-001 & 7-31b IPC-A-610 Task GroupsSunday, February 26 Jennifer Day, CIT, U.S. Army Aviation & Missile Command; Constantino Gonzalez, MIT, ACME Training & Consulting; and Teresa Rowe, CIT, AAI Corporation

The J-STD-001 and IPC-A-610 task groups will work together to resolve comments common to both standards.

5-22f J-STD-001 Handbook Task GroupMonday, February 27 Daniel Foster, CIT, U.S. Army Aviation & Missile Command

This task group is developing an update to IPC-HDBK-001 to incorporate revision E changes.

5-23a Printed Circuit Board Solderability Specifications Task Group

Monday, February 27 Gerard O’Brien, Solderability Testing & Solutions, Inc.

This group is updating IPC J-STD-003 to its C revision. This document will address more wetting balance data generation and provide improved solder float test and solder spread test protocols.

5-23b Component and Wire Solderability Specification Task Group

Monday, February 27 David Hillman, Rockwell Collins

The group will discuss ballot results for J-STD-002D. This document is a consolidation of IPC/ECA J-STD-002C, with JESD 22-B102 (JEDEC document on same topic).

5-24a Flux Specifications Task GroupTuesday, February 28 Renee Michalkiewicz, MIT, Trace Laboratories - Baltimore

This group is celebrating the publication J-STD-004B Amendment 1, Requirements for Soldering Fluxes.

5-24b Solder Paste Task GroupWednesday, February 29 Brian Toleno, Ph.D., Henkel Corporation

This group is celebrating the publication of revision A of J-STD-005, Requirements for Soldering Pastes, and will be opening IPC-HDBK-005 for revision.

5-24c Solder Alloy Task GroupTuesday, February 28 David Scheiner, Kester

This group is working on revision C of J-STD-006, on electronic grade solder alloys and fluxed and non-fluxed solid solders for electronic soldering applications.

5-24f Underfill Adhesives for Flip Chip Applications

Wednesday, February 29 Brian Toleno, Ph.D., Henkel Corporation

This group is updating J-STD-030, through a revision A and a re-title of the document to Design, Selection and Process Implementation for Underfill Materials, that allows the document to be less constrained on topic and serve as both a specification and a guideline.

7-35 Assembly and Joining Handbook Subcommittee

Tuesday, February 28 Mary Muller, Crane Aerospace & Electronics

This subcommittee is celebrating the publication of IPC-AJ-820, Assembly and Joining Handbook, that now incorporates the best parts of IPC-HDBK-001 and IPC-PE-740 documents, plus IPC-HDBK-830, IPC-CM-770 and DRM-18.

Contribute to the industry standards and guidelines that your company, customers, suppliers and competitors rely on. These sessions are open to all attendees, unless noted otherwise.

Registration to attend committee meetings is FREE before the show ($40 on-site). Take advantage of all the show has to offer with the All-Access Package. Register by January 28 and save 20%.

It was a great opportunity to get two suppliers together to help solve an issue my company had

struggled with all year. It’s a win-win-win situation.

Victor SalazarManufacturing Process EngineerUniversal Avionics Systems Corp.


37STANDARDS DEVELOPMENT MEETINGS 37

February 28–March 1, 2012®For current schedule, times, and full descriptions, visit

www.IPCAPEXEXPO.org/standards. Days are subject to change.

ASSEMBLY EQUIPMENT

5-41 SMT Component Placement Equipment Subcommittee

Monday, February 27 Peter Borg, Research In Motion Limited, andMichael Cieslinski, Panasonic Factory Solutions Company of America

This committee is celebrating the release of revision A to IPC-9850.

BASE MATERIALS

3-11 Laminate/Prepreg Materials Subcommittee

Monday, February 27 Antonio Senese, Panasonic Electric Works

This subcommittee is updating IPC-4101C. Amendment 1 work includes: determining a statistically relevant fracture toughness test method; reducing the number of specification sheets; and using DMA as well as DSC and TMA thermal analysis test methods to set a value of Tg. Also, the group will investigate the possibility of improving the insulation resistance of laminate and prepreg materials by reducing “treater trash.”

3-11f UL/CSA Task GroupTuesday, February 28 Douglas Sober, Kaneka Texas Corporation

This group addresses only technical issues relative to UL’s standards on rigid laminates (UL-746E) and on rigid printed boards (UL-796). These technical issues will feed into the UL STP meeting on the two UL standards.

3-11g Corrosion of Metal Finishes Task GroupThursday, March 1 Beverley Christian, Ph.D., Research In Motion Limited

This group is gathering data on the effects of corrosion on surface finishes through the use of mixed flowing gas (MFG) testing. Round robin MFG testing is starting.

3-12a Metallic Foil Task GroupTuesday, February 28 Rolland Savage, High Performance Copper Foil Inc.

This group is generating a noncontact test method and is gathering data on copper foil surface roughness measurements for possible inclusion in rev. B of IPC-4562.

3-12d Woven Glass Reinforcement Task GroupMonday, February 27 Patricia Goldman, P.J. Goldman Consulting

This group is working on the B revision of IPC-4412. The B revision is anticipated to be concluded in 2012.

3-12e Base Materials Roundtable Task GroupMonday, February 27 Edward Kelley, Isola Group SARL

This group will explore needed specifications and characterization methods for strategic materials used to manufacture laminates and prepregs. Discussions on reinforcements, resins, fillers and metal foils are anticipated.

CLEANING AND COATING

5-31 Cleaning and Alternatives SubcommitteeWednesday, February 29 Mike Bixenman, DBA, Kyzen Corporation

The subcommittee will review chapter 13 of IPC-CH-65B for possible amendment and consider committee responses to hot topics in regulatory developments or other issues.

5-32a Ion Chromatography/Ionic Conductivity Task Group

Wednesday, February 29 John Radman, Trace Laboratories - Denver

This group is evaluating a proposed round robin test for examining extract solutions for printed board assemblies.

5-32b SIR and Electrochemical Migration Task Group

Monday, February 27 Chris Mahanna, Robisan Laboratory Inc.

This task group is addressing IPC-9203, User Guideline for the IPC B-52 SIR Test Board.

5-32c Bare Board Cleanliness Assessment Task Group

Wednesday, February 29 Douglas Pauls, Rockwell Collins

This task group is developing IPC-5703, a cleanliness guideline for printed board fabricators.

5-32e Conductive Anodic Filament (CAF) Task Group

Tuesday, February 28 Karl Sauter, Oracle America, Inc.

This group has completed the Final Draft of the A revision of Test Method 2.6.25 and provided it to the 7-11 Test Methods Subcommittee for their comments and suggested changes. The group also is continuing work on the B revision of IPC-9691.

5-33a Conformal Coating Task GroupWednesday, February 29 John Waryold, HumiSeal Division of Chase Corporation

This task group is initiating revision C of IPC-CC-830 to address new conformal coating materials.


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5-33c Conformal Coating Handbook Task Group

Tuesday, February 28 and Wednesday, February 29 Amy Hagnauer, Raytheon Company; and Jason Keeping, Celestica

This task group is revising the IPC-HDBK-830 conformal coating handbook.

5-33f Potting and Encapsulation Task GroupMonday, February 27 Barry Ritchie, Dow Corning Corporation

This group is developing IPC-HDBK-850, on potting and encapsulation materials, applications and processes.

ELECTRONIC DOCUMENTATION TECHNOLOGY

2-40 Electronic Documentation Technology Committee

Monday, February 27 Karen McConnell, CID, Northrop Grumman Corporation

The committee continues development of IPC-2616 on assembly and IPC-2617 on testing.

ELECTRONIC PRODUCT DATA DESCRIPTION

2-16 Product Data Description (Laminar View) Subcommittee

Monday, February 27 Karen McConnell, CID, Northrop Grumman Corporation

This committee will meet to continue work on revision A of IPC-2581 Generic Requirements for Printed Board Assembly Products Manufacturing Description Data and Transfer Methodology.

2-18 Supplier Declaration SubcommitteeMonday, February 27 Friday, March 2 Krista Crotty, Alberi EcoTech; and Jorgen Vos, PTC

The subcommittee will review the XML schema for all supplier declaration standards and will continue discussions on the certification of tools developed by third-party solution providers.

2-18b Materials Declaration Task GroupMonday, February 27 Mark Frimann, Texas Instruments Inc.; and Aidan Turnbull, Ph.D., Environ UK Ltd

This task group will discuss enhancements to the IPC-1752A materials declaration management standard. The group will discuss how to improve widespread adoption of the standard, and may discuss revising the standard.

2-18c Laminate Declaration Task GroupWednesday, February 29 Douglas Sober, Kaneka Texas Corporation

This task group is developing a data exchange standard for laminate materials that will include information that companies need to know about the laminates they purchase and use. The standard is expected to be based on the XML schema in the 175x family of supplier declarations.

2-18f Declaration of Shipping, Packing and Packaging Materials Task Group

Wednesday, February 29 John Ciba Jr., Brady Corporation; and Lee Wilmot, TTM Technologies, Inc.

The group will continue editing the draft of IPC-1758 on declaration requirements for shipping, pack and packing materials. IPC-1758 will establish a data exchange standard for pack and packing materials.

2-18g Declaration of Batteries and Battery Materials Task Group

Wednesday, February 29 Aimee Siegler, Benchmark Electronics Inc.; and Kelly St. Andre, PTC

This group is beginning development of a new IPC standard for the declaration of batteries and battery materials. This standard will facilitate the gathering and exchange of information related to compliance and conformance with customer and legal requirements pertaining to battery chemistry, weight and category. This standard will be part of the IPC-175x series of standards, which are XML schema-based. It will not address recycling nor reclamation of batteries.

2-18h Conflict Minerals Data Exchange Task Group

Thursday, March 1 This group is developing a data exchange standard for the

exchange of supply chain data necessary for compliance with Dodd-Frank conflict minerals regulations. The data standard is being developed as a part of the IPC-175x declaration family and will incorporate the EICC/GeSI template.

2-18j Laboratory Report Declaration Task Group

Tuesday, March 28William Haas, Seagate Technology

This new group will work on a project that will facilitate the exchange of laboratory chemical analysis reports between supply chain members by having a standardized lab report format and method to exchange the information. Companies are being asked to provide laboratory analytic data to show compliance with the RoHS Directive and other customer requirements, such as halogen-free.





EMBEDDED DEVICES

CRANE-EP CRANE-EPTuesday, February 28 Jason Ferguson, NSWC Crane

Status on current test vehicles will be presented, including the tv2 process demonstration, high frequency and resistor learning test vehicles. The emulator project will also be presented to encourage candidate designs for embedded passive integration.

D-54 Embedded Devices Test Methods Subcommittee

Wednesday, February 29 Jason Ferguson, NSWC Crane; and Jan Obrzut, Ph.D., NIST

This subcommittee is developing test methods to address design, material and performance issues related to embedded passive devices used in printed boards. Specifically, a power rating test method for embedded resistors is nearing completion.

D-55 Embedded Devices Process Implementation Subcommittee

Tuesday, February 28 Richard Snogren, CID, Bristlecone LLC; and Vern Solberg, Solberg Technical Consulting

This subcommittee will discuss IPC-7092 which describes the design and assembly challenges for implementing passive and active components in either formed or inserted methodology on a printed board. This new standard focuses on the fabrication and assembly processes.

ENVIRONMENT, HEALTH & SAFETY (EHS)

4-30 Environment, Health & Safety Steering Committee

Tuesday, February 28 Lee Wilmot, TTM Technologies, Inc.

This group is responsible for promoting cleaner and safer electronics manufacturing worldwide. It will discuss legislative and regulatory issues affecting the industry.

4-33a Low-Halogen Guideline Task GroupSunday, February 26 Mark Frimann, Texas Instruments Inc.; and John Sharp, TriQuint Semiconductor Inc.

This task group will continue discussing the draft of IPC-4903, Guideline for Defining ‘Low-Halogen’ Electronic Products, and hear comments from interested stakeholders.

4-34b Marking, Symbols and Labels for Identification of Assemblies, Components and Devices Task Group

Monday, February 27 Jasbir Bath, Christopher Associates Inc.; Jack McCullen, Intel Corporation; and Lee Wilmot, TTM Technologies, Inc.

This combined working group of IPC and JEDEC will discuss further enhancements to IPC/JEDEC J-STD-609A, Marking and Labeling of Components, PCBs and PCBAs to Identify Lead (Pb), Pb-Free and Other Attributes.

FABRICATION PROCESSES

4-14 Plating Processes SubcommitteeWednesday, February 29 George Milad, Uyemura International Corp.; and Gerard O’Brien, Solderability Testing & Solutions, Inc.

This subcommittee develops guidelines, test methods and techniques for evaluating process control parameters on electrolytic and electroless/immersion plating. The subcommittee continues work on IPC-4556 and revision A of IPC-4552.

FLEXIBLE AND RIGID-FLEX PRINTED BOARDS

D-11 Flexible Circuits Design SubcommitteeWednesday, February 29 William Ortloff Sr., Raytheon Company

This subcommittee is initiating revision D of the IPC-2223 flexible printed board design standard.

D-12 Flexible Circuits Specifications Subcommittee

Wednesday, February 29 Nick Koop, CID, Minco Products, Inc.

This subcommittee is developing revision C of the IPC-6013 performance specification, focusing on updates to HDI/microvia acceptance criteria.

D-12a UL 796F and UL 746F Task GroupThursday, March 1 Duane Mahnke, DBMahnke Consulting

This group focuses on work that is occurring on the UL flexible materials standard (UL-746F) and the UL flexible printed board standard (UL-796F). Only technical items will be addressed and the results will be provided to the UL STP group for resolutions.

D-13 Flexible Circuits Base Materials Subcommittee

Wednesday, February 29 Clark Webster, ALL Flex LLC

The subcommittee has completed revision A of IPC-4204 and is now resuming work that had been delayed on revision A of IPC-4203.

D-15 Flexible Circuits Test Methods Subcommittee

Wednesday, February 29 Rocky Hilburn, Insulectro; and Duane Mahnke, DBMahnke Consulting

This group provides test methods required by other subcommittees within the D-10 Flexible Circuits Committee. IPC-TM-650 will be examined in detail for applicability and need for replacement or revision. Also, any test methods specified in new flexible circuitry documents will be generated.


40

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HIGH SPEED/HIGH FREQUENCY INTERCONNECTIONS

D-20 High Speed/High Frequency CommitteeMonday, February 27 Edward Sandor, Taconic Advanced Dielectric Division

This general committee will address goals of the high speed/high frequency subcommittees and task groups.

D-22 High Speed/High Frequency Board Performance Subcommittee

Wednesday, February 29 Michael Luke, CID+

This subcommittee is evaluating HDI/microvia performance criteria for a future revision C of IPC-6018.

D-23 High Speed/High Frequency Base Materials Subcommittee

Wednesday, February 29 Edward Sandor, Taconic Advanced Dielectric Division

This subcommittee is discussing goals for a future B revision of IPC-4103.

D-24a TDR Test Methods Task GroupTuesday, February 28 Don DeGroot, CCNi

This task group is discussing a revision to IPC-TM-650, Method 2.5.5.7 for impedance of lines on printed boards.

D-24b Propagation Loss Test Method Task Group

Tuesday, February 28 Don DeGroot, CCNi

This task group is revising IPC-TM-650, Method 2.5.5.12 for propagation loss, addressing the new SET2DIL methodology.

D-24c High Frequency Test Methods Task Group: Frequency-Domain Methods

Tuesday, February 28 Michael Janezic, Ph.D., NIST

This task group monitors the needs of the microelectronics industry for high frequency dielectric test methods.

MANAGEMENT

8-41 Technology Roadmap SubcommitteeSaturday, February 25 John Fisher, Interconnect Technology Analysis, Inc.

This group will work on the strategy for the 2013 IPC International Technology Roadmap. New emulator technology drivers will clarify the path that technology changes will take going forward. New participants will be paired with experienced members to ensure “real world” applicability within sections.

CCC Committee Chairman Council (By Invitation)

Sunday, February 26 Peter Bigelow, IMI Inc.

This meeting of all task group, subcommittee and committee chairs is for general committee updates and discussion of IPC technical programs.

E-20 Intellectual Property Standard CommitteeWednesday, February 29 Rajesh Kumar, DDi Corp.; and Michael Moisan, TTM Technologies

This committee is responsible for IPC-1071, Best Industry Practices for Intellectual Property Protection in Printed Board Manufacturing.

E-21 EMS IP SubcommitteeWednesday, February 29

This subcommittee is developing a guideline on best practices for intellectual property protection in electronics assembly.

E-30 Conflict Minerals Due Diligence Committee

Thursday, March 1 This new committee will develop a guidance document

to assist the electronics industry in complying with due diligence requirements for conflict minerals under Section 1502 of the Dodd-Frank Act.

TAEC Technical Activities Executive Committee (By Invitation)

Monday, February 27 Mel Parrish, STI Electronics, Inc.

This committee comprises leaders of all IPC general committees and oversees IPC’s standardization efforts.

PACKAGED ELECTRONIC COMPONENTS

B-10a/ Joint Meeting — Plastic Chip CarrierJEDEC Cracking Task Group and JEDEC JC-14.1Tuesday, February 28 Steven Martell, Sonoscan Inc.

During this joint meeting, IPC B-10a and JEDEC JC-14.1 groups will continue revision efforts on J-STD-020D and J-STD-033B.

PRINTED BOARD DESIGN TECHNOLOGY

1-10c Test Coupon and Artwork Generation Task Group

Monday, February 27 and Tuesday, February 28 Timothy Estes, Conductor Analysis Technologies, Inc.

This task group maintains test coupon designs referenced in IPC-2221 and IPC-6010 specifications. The task group is evaluating the need for new coupon designs, including CAF and modifications to the A/B-R design.

D-31b IPC-2221/2222 Task GroupTuesday, February 28 Gary Ferrari, CID+, CIT, FTG Circuits

This task group is meeting to prepare the balloting of IPC-2221B, Generic Standard on Printed Board Design.





PRINTED ELECTRONICS

D-61 Printed Electronics Design SubcommitteeThursday, March 1 Daniel Gamota, Printovate Technologies, Inc.; and Jie Zhang, Institute of Materials Research & Engineering

The subcommittee will focus on developing a draft of IPC-2291, Design Guidelines for Printed Electronics.

D-62 Printed Electronics Base Material/Substrates Subcommittee

Thursday, March 1 Daniel Gamota, Printovate Technologies, Inc.; and James Williams, Polyonics, Inc.

The subcommittee will focus on developing a draft of IPC-4921, Requirements for Printed Electronics Base Materials.

D-63 Printed Electronics Functional Materials Subcommittee

Thursday, March 1 Daniel Gamota, Printovate Technologies, Inc.; and Markus Riester, maris TechCon

The subcommittee will focus on developing a draft of IPC-4591, Requirements for Printed Electronics Functional Materials.

D-64 Printed Electronics Final Assembly Subcommittee

Thursday, March 1 Daniel Gamota, Printovate Technologies, Inc.

The subcommittee will focus on developing a draft of IPC-6901, Performance Requirements for Printed Electronics Assemblies.

PROCESS CONTROL

7-23 Assembly Process Effects Handbook Subcommittee

Wednesday, February 29 Greg Hurst, BAE Systems

This group is developing a companion document to IPC-7711/7721. The new process effects or troubleshooting guide will have a similar focus for process effects related to the assembly (IPC-9111). The handbook will provide assembly anomaly illustrations with possible cause and solution explanations.

7-24 Printed Board Process Effects Handbook Subcommittee

Tuesday, February 28 Dennis Fritz, MacDermid, Inc.

This group is developing a companion document to the IPC-7711/7721. The new process effects or troubleshooting guide will have a similar focus for process effects related to the printed board (IPC-9121). The handbook will provide printed board anomaly illustrations with possible cause and solution explanations and be more closely tied to the IPC-A-600 criteria.

PRODUCT ASSURANCE

7-30 Product Assurance CommitteeMonday, February 27 Mel Parrish, STI Electronics, Inc.

This is a planning meeting for all subcommittee and task group leaders of the Product Assurance Committee.

7-31b IPC-A-610 Task GroupSaturday, February 25 Jennifer Day, CIT, U.S. Army Aviation & Missile Command; Constantino Gonzalez, MIT, ACME Training & Consulting

This task group is developing revision F of IPC-A-610.

7-31f Wire Harness Acceptability Task GroupMonday, February 27 and Tuesday, February 28 T. John Laser, MIT, L-3 Communications; and Brett Miller, USA Harness, Inc.

This group is a joint effort with the Wire Harness Manufacturers Association and is working on revision B of IPC/WHMA-A-620.

7-31fs Space Electronic Assemblies IPC/WHMA-A-620 Addendum Task Group

Wednesday, February 29 Garry McGuire, NASA Marshall Space Flight Center

This group is starting a space hardware addendum for revision B of IPC/WHMA-A-620.

7-31ft A-620 Technical Training Task GroupWednesday, February 29 Debbie Wade, MIT, Advanced Rework Technology-A.R.T

This task group will begin updating the IPC/WHMA-A-620 training program for revision B.

7-31h IPC-HDBK-620 Handbook Task GroupThursday, March 1 Randy McNutt, Northrop Grumman Corp.; and Brett Miller, USA Harness, Inc.

This task group is developing a handbook to support users of IPC/WHMA-A-620.

7-31j IPC-A-630 Requirements for Structural Enclosure Task Group

Wednesday, February 29 Eddie Hofer, Rockwell Collins; and Richard Rumas, CIT, Honeywell Canada

This task group is developing a handbook for box level assembly of electronic enclosures for use in military and aerospace applications. Emphasis will be placed on materials selection, mechanical assembly, fasteners, gasketing and sealing, as well as related testing associated with high level assemblies and electronic enclosures.

7-31k Wire Harness Design Task GroupThursday, March 1 Robert Cooke, CIT, NASA Johnson Space Center

This task group is developing a cable and wire harness design standard.


www.IPCAPEXEXPO.org

7-34t Repair Training Technical Task GroupWednesday, February 29 Teresa Rowe, CIT, AAI Corporation

This training technical group will review comments and suggestions for updating the IPC rework and repair course.

PRODUCT RELIABILITY

6-10c Plated-Through Via Reliability-Accelerated Test Methods Task Group

Tuesday, February 28 Randy Reed, Viasystems Group, Inc.

This group is revising IPC-TM-650, Method 2.6.26, for DC current induced thermal cycling, addressing IST and CITC procedures.

6-10d SMT Attachment Reliability Test Methods Task Group

Tuesday, February 28 Reza Ghaffarian, Ph.D., Jet Propulsion Laboratory

This group is reviewing an iNEMI proposal for addenda to IPC/JEDEC-9704 for SMT strain gage testing.

RIGID PRINTED BOARDS

7-31a/ Joint Meeting — IPC-A-600 and D-33a Rigid Printed Board Performance

Specifications Task GroupsSunday, February 26 Mark Buechner, BAE Systems

These task groups are addressing initial working drafts of IPC-A-600J and IPC-6012D. The focus of the meeting is the addition of criteria for HDI/microvia technology.

D-35 Printed Board Storage and Handling Subcommittee

Monday, February 27 Thomas Kemp, CIT, Rockwell Collins

This subcommittee is reviewing content for a future A revision to IPC-1601.

D-36 Printed Board Process Capability, Quality and Relative Reliability Benchmark Test Subcommittee

Monday, February 27 Gary Long, Intel Corporation

This subcommittee has developed a database for benchmarking printed board fabrication capability, quality and relative reliability. It maintains a family of process capability panel designs and standards for use by both subscribers and suppliers.

TERMS AND DEFINITIONS

2-30 Terms and Definitions CommitteeSunday, February 26 Michael Green, Lockheed Martin Space Systems Company

This committee is working on revision K of IPC-T-50.

TESTING

7-11 Test Methods SubcommitteeTuesday, February 28 Joseph Russeau, Precision Analytical Laboratory, Inc.

This group is developing a test method development outline for the creation of new IPC-TM-650 test methods.

7-12 Microsection SubcommitteeWednesday, February 29 Russell Shepherd, MIT, Microtek Laboratories

This task group is revising IPC-TM-650 Methods 2.1.1 and 2.1.1.2 for microsection preparation and evaluation, addressing blind and buried via structures.

UL-IAG Industry Advisory Group (IAG) for ULThursday, March 1 Ovidiu Munteanu, Underwriters Laboratories

This is an open meeting run by UL for the purpose of resolving questions about nontechnical issues and modifications to UL-746E, UL-796, UL-746F and UL-796F as well as their enforcement.

OTHERS

8-51 Jisso North America Council (JNAC)Sunday, February 26 Dennis Fritz, MacDermid, Inc.

JNAC provides input to the global Jisso International Council (JIC). This meeting will focus on the completion of projects identified during JIC 12 held in May 2011, and finalizing plans for JIC 13 in 2012.

GR IPC Government Relations Committee Open Forum

Tuesday, February 28 What are your international, national, and regional

concerns regarding government regulations and laws impacting your company? IPC Government Relations Committee members will provide updates on key issues impacting IPC members as well as an overview of their efforts to support the prosperity of the global electronic interconnect industry, including advocacy efforts on export controls reform and the conflict minerals regulation.

By interacting with the experts and fellow contributors in IPC standards committee

meetings, I was able to get answers to all three of the critical questions I came to the show

needing to answer.

Todd MacFaddenComponent & Reliability Engineer

Consumer Electronics OEM

42


Do you think you have what it takes to win at soldering? Does your company brag about how many IPC Certified Specialists

it has on staff? Inquiring minds want to know who the best-of-the-best is at hand soldering. If you think you have what it takes to be the Top Gun of soldering, BRING IT at the first IPC APEX EXPO hand soldering competition.

Cash prizes of $500, $250 and $100 will be awarded to the top three finalists at the close of IPC APEX EXPO

competition at 5 pm on Wednesday, February 29.

The entry deadline is December 31, 2011. Visit www.IPCAPEXEXPO.org/soldering for more

information and to submit your entry.

IPC HAND SOLDERING GRAND CHAMPIONSHIPThe winner of the IPC APEX EXPO Hand Soldering Competition will move on to the IPC HAND SOLDERING

GRAND CHAMPIONSHIP on Thursday, March 1 to face off with the winner

from the IPC Midwest Hand Soldering Competition.

The winner of the IPC HAND SOLDERING GRAND CHAMPIONSHIP will be awarded a $1,000 cash prize!

First Annual IPC APEX EXPO Hand Soldering Competition

Who’s the Best-of-the-Best?

February 28–29 and March 1

and IPC HAND SOLDERING GRAND CHAMPIONSHIP —

Premier Sponsor: OK International/MetcalSponsor: Cobar Solder Products Inc.


www.IPCAPEXEXPO.org

44

Book Your Hotel Room Today! Make your reservation through the official housing service, Experient, to take advantage of the special IPC rates. These rates will be available until February 3, 2012, or until all rooms are booked. With their convenient location and the special IPC rates, these hotels will book quickly — so make your reservation today!

Online: www.IPCAPEXEXPO.org/hotel

By Phone: 800-974-9833 or +1 847-996-5875 (8:00 am–5:00 pm Central time)

HOTEL/TRAVEL

TravelAmerican AirlinesSave five percent off the lowest applicable fares on any American Airlines/oneworld carrier when you use 7822AS. Rates are available February 20–March 6, 2012.

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Online: www.Avis.com

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Additional information on car pooling, parking and taxis & shuttles is available at www.IPC APEXEXPO.org/travel.

❶ San Diego Marriott Marquis & Marina 333 West Harbor Drive, San Diego, Calif. $239 City View / $259 Bay View

❷ Hilton San Diego Gaslamp Quarter 401 K Street, San Diego, Calif. $189

❸ The Hard Rock Hotel San Diego 207 5th Avenue, San Diego, Calif. $199

❹ Omni San Diego 675 L Street, San Diego, Calif. $175

❺ San Diego Marriott Gaslamp Quarter 660 K Street, San Diego, Calif. $199

❻ Residence Inn San Diego Downtown/ Gaslamp Quarter

356 6th Avenue, San Diego, Calif. $169

❼ Embassy Suites San Diego Bay - Downtown

601 Pacific Highway, San Diego, Calif. $169

Visit www.IPCAPEXEXPO.org for reservations details and information on changes/cancellations.

The meetings and exhibits will take place at the San Diego Convention Center. San Diego’s friendly, laid-back, upbeat vibe brings out a positive, make-it-happen attitude! It may be the ocean breezes, beautiful surroundings or near-perfect weather, but San Diego will energize, refresh and stimulate you! From shopping to culture to natural beauty, San Diego is fun for families and adult travelers as well.

Official Hotels of IPC APEX EXPOAll official hotels are within walking distance of the San Diego Convention Center.



REGISTER TODAY AND SAVE! Register by January 28 and save 20%! Group Discount: Register four colleagues from the same company, same company location, at the same time, for items marked with a � and deduct another $100 from each registration.

Exhibit Hall Only — includes admission to the exhibit hall and Event Essentials FREE ($25 on-site)

�All-Access Package — Best Value STD MEM

includesalltechnicalconferencesessions•conferenceproceedings $1,295 $995•standardsdevelopmentcommitteemeetings•yourchoiceofup to six professional development courses•IPCluncheons(Mon.,Tue.andWed.)•showfloorconcessioncashonThursday •DesignersForum•PCBorEMSExecutiveManagementMeeting(mustqualify)•EventEssentials

Technical Conference STD MEM

� Full Conference includes all technical conference sessions $660 $540 •conferenceproceedings(providedonline) •standardsdevelopmentcommitteemeetings • Event Essentials (luncheons not included)

One-Day Conference includes all technical conference sessions on the day of your choice $330 $270 (Tue.,Wed.orThur.)•standardsdevelopmentcommitteemeetings•EventEssentials (luncheons and conference proceedings not included)

Standards Development Committee Meetings STD MEM

� Committee Meetings Plus Conference includes all technical conference paper sessions $750 $625 •conferenceproceedings(providedonline)•standardsdevelopmentcommitteemeetings •IPCluncheons(Mon.,Tue.andWed.)•showfloorconcessioncashonThursday•EventEssentials

Committee Meetings Plus includesstandardsdevelopmentcommitteemeetings•IPCluncheons $160 $140 (Mon.,Tue.andWed.)•showfloorconcessioncashonThursday•EventEssentials ($175 on-site)

Committee Meetings includes standardsdevelopmentcommitteemeetings•EventEssentials FREE (luncheons not included) ($40 on-site)

Executive Management Programs STD MEM

PCB Executive Management Meeting (must be an executive of a PCB manufacturer) $540 $425 includesMondaymeeting•Mondayluncheon•VIPNetworkingDinner•EventEssentials

EMS Management Council Meeting (must be an executive of an EMS company) $540 $425 includes Monday meeting •Mondayluncheon•VIPNetworkingDinner•EventEssentials

VIP Networking Dinner $100 each

Professional Development (PD) Courses STD MEM

PD Course includesonehalf-dayPDcourse•supportingmaterials(selectuptosixcourses) $350 ea. $250 ea.

Designers Forum includes•continentalbreakfast•lunch•EventEssentials STD MEM

$375 $300

Additional Items STD MEM

Conference Proceedings Purchase a copy of the Technical Conference proceedings $150 $125 (provided online) Luncheons Select Monday, Tuesday or Wednesday $40 each

Need assistance? Call 877-472-4724 (toll free in U.S. and Canada) or +1 847-597-2860 or e-mail [email protected]

Registration for the IPC certification programs for designers and EMS program managers is separate. To register, visit www.ipc.org/designer-certification or www.ipc.org/EMS-certification.

REGISTRATION OPTIONS visit www.IPCAPEXEXPO.org/register to sign up today!

Event EssentialsExhibit Hall • BUZZ Sessions • Keynote Sessions • Poster Sessions • Show Floor Reception

Register today at www.IPCAPEXEXPO.org/register


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