IL 2222 - MOSFET Professor Ahmed Hemani Dept. Of ES, School of ICT, KTH Kista Email:...

IL 2222 - MOSFETProfessor Ahmed Hemani

Dept. Of ES, School of ICT, KTH KistaEmail: [email protected]

Website: www.it.kth.se/~hemani

mailto:[email protected]

MOS Capacitor, MOSFET

Modern Semiconductor Devices for Integrated Circuits (C. Hu)

MOS: Metal-Oxide-Semiconductor

SiO2

metal

gate

Si body

Vg

gate

P-body

N+

MOS capacitor MOS transistor

Vg

SiO2

N+

~1.5nm thickFew oxide molecules

Usually made of Poly Silicon

Energy Diagram at Vg= 0

Flat-band Condition and Flat-band Voltage

Surface Accumulation

oxsfbg VVV Make Vg < Vfb fs : surface potential, band bendingVox: voltage across the oxide

Fs is neglible in accumulation

ox

ssa

ox

depa

ox

dep

ox

sox C

qN

C

WqN

C

Q

C

QV

2

Surface Depletion ( vg > vfb )

Surface Depletion

Slide 5-7

ox

ssasfboxsfbg C

qNVVVV

2


Threshold Condition and Threshold Voltage

Threshold (of inversion):ns = Na , or

(Ec–Ef)surface= (Ef – Ev)bulk , or

A = B, and C = D

i

aBst n

N

q

kTln22

i

a

a

v

i

vbulkvf

gB n

N

q

kT

N

N

q

kT

n

N

q

kTEE

Eq lnlnln|)(

2


Threshold Voltage

ox

BsaBfbgt C

qNVthresholdatVV

222

At threshold,

i

aBst n

N

q

kTln22

ox

Bsaox C

qNV

22


oxsfbg VVV

Threshold Voltage

ox

BssubBfbt C

qNVV

222

+ for P-body,– for N-body

Strong Inversion–Beyond Threshold

a

Bsdmaxdep qN

WW 22

Vg > Vt

Inversion Layer Charge, Qinv (C/cm2)

ox

invt

ox

inv

ox

BsaBfb

ox

inv

ox

depBfbg

C

QV

C

Q

C

qNV

C

Q

C

QVV

2222

)( tgoxinv VVCQ


Choice of Vt and Gate Doping Type

Vt is generally set at a small positive value

So that, at Vg = 0,

the transistor does not have an inversion layer and current does not flow between the two N+ regions. Enhancement type device

• P-body is normally paired with N+-gate to achieve a small positive threshold voltage.• N-body is normally paired with P+-gate to achieve a small negative threshold voltage.


Review : Basic MOS Capacitor Theory


Revi

ew :

Basi

c M

OS

Capa

cito

r The

ory

total substrate charge, Qs

invdepaccs QQQQ


MOS CV Characteristics

g

s

g

g

dV

dQ

dV

dQC


MOS CV Characteristics

g

s

g

g

dV

dQ

dV

dQC


The quasi-static CV is obtained by the application of a slow linear-ramp voltage (< 0.1V/s) to the gate, while measuring Ig with a very sensitive DC ammeter. C is calculated from Ig = C·dVg/dt. This allows sufficient time for Qinv to respond to the slow-changing Vg .

Cpoly

Cox

Cdep Cin v

Cox

Cdep

Cpoly

Cox

Cdep, min CinvCinv

Cox

(a) (b) (c) (d)

General case for both depletion and inversion regions.

In the depletion regions Vg Vt Strong inversion


Equivalent circuit in the depletion and the inversion regimes

MOSFET


The MOSFET (MOS Field-Effect Transistor) is the building block of Gb memory chips, GHz microprocessors, analog, and RF circuits.

MOSFET the following characteristics:• small size• high speed• low power• high gain

Introduction to the MOSFET

Basic MOSFET structure and IV characteristics


Introduction to the MOSFET

Two ways of representing a MOSFET:


Complementary MOSFETs Technology


CMOS (Complementary MOS) Inverter


MOSFET Vt and the Body Effect

maxd

sdep W

C

sbdeptgsoxeinv VCVVCQ )(

))(( sboxe

deptgsoxe V

C

CVVC

sbtsboxe

deptsbt VVV

C

CVVV 00)(

• Redefine Vt as


Two capacitors => two charge components

MOSFET Vt and the Body Effect

Body effect slows down circuits? How can it be reduced?

data model

-2 -1 0 1 2 Vsb (V)

NFET

PFET

Vt 0

Vt0

0.6

-0.2

-0.6

0.4

-0.4

Vt (V)

0.2

• Body effect: Vt is a function of Vsb. When the source-body junction is reverse-biased, Vt increases.

• Body effect coefficient:

a = Cdep/Coxe = 3Toxe / Wdep

sbtt VVV 0


Retrograde Body Doping Profiles

• Wdep does not vary with Vsb .• Retrograde doping is popular because it reduces off-state leakage and allows higher surface mobility.

data model

-2 -1 0 1 2 Vsb (V)

NFET

PFET

Vt 0

Vt0

0.6

-0.2

-0.6

0.4

-0.4

Vt (V)

0.2

Wdmax for uniform doping

Wdmax for retrograde doping


Uniform Body Doping

When the source/body junction is reverse-biased, there are two quasi-Fermi levels (Efn and Efp) which are separated by qVsb. An NMOSFET reaches threshold of inversion when Ec is close to Efn , not Efp . This requires the band-bending to be 2fB + Vsb , not 2fB.

)22(

)22(2

0

0

BsbBt

BsbBoxe

satt

VV

VC

qNVV

g is the body-effect parameter.


Qin

v in

MO

SFET Channel voltage Vcs

(x)x = 0: Vcs = Vs x = L: Vcs = Vd

• Qinv = – Coxe(Vgs – Vcs – Vt0 – a (Vsb+Vcs) = – Coxe(Vgs – Vcs – (Vt0 + a Vsb) – a Vcs)

= – Coxe(Vgs – mVcs – Vt) • m º 1 + a = 1 + 3Toxe/Wdmax

m is called the bulk-charge factor Typically m is 1.2 but can be simplified to 1


sbtsboxe

deptsbt VVV

C

CVVV 00)(

How to Measure the Vt of a MOSFET ?

•Method A. Vt is measured by extrapolating the Ids versus Vgs curve to Ids = 0.•Method B. The Vg at which Ids =0.1mA W/L

A

B


tgsdsnstgsoxedsat VVVVVCL

WI )(

Basic MOSFET IV ModelIds= WQinvv= WQinvmnE = WCox(Vgs– mVcs –

Vt)mndVcs/dxcs

L V

tcsgsnoxds dVVmVVWCdxIds

)(0 0

IdsL = WCoxmn(Vgs – Vt – mVds/2)Vds

dsdstgsn

dsdstgsn

dsdstgsnoxds

VVm

VVk

VVm

VVkL

W

VVm

VVCL

WI

)2

(

)2

(

)2

(

'


ox

oxnnoxn

tCk

' Process Transconductance

nn kL

Wk ' Gain factor

m is typically 1.2 but can be simplified to 1

Vdsat : Drain Saturation Voltage

)(0 dstgsnds

ds mVVVkdV

dI

m

VVV tgs

dsat


Saturation Current and Transconductance

Transconductance: gm= dIds/dVgs

2

2

1)V(Vk

mI tgsndsat

Drain current in saturation region

)( tgsnsoxemsat VVCmL

Wg



Satu

ratio

n –

Pinc

h O

ff

n+n+

S

G

VGS

D

VDS > VGS - VT

VGS - VT+-

Channel Length Modulation

)λV()V(Vkm

I dstgsndsat 12

1 2

• Increasing the Vds has the effect of the reducing the channel length as the depletion region on the drain side increases.

• Channel length reduction lower resistance Increase in Drain Current

• More pronounced for short channels• One of the five short channel effects

Velocity Saturation

sat

nv

EEE

+=

1

m

• Velocity saturation has large and deleterious effect on the Ion of MOSFETS

E << Esat : v = m En

E >> Esat : v = m Esatn


x (V/µm)xc = 1.5

u n (m

/s)

usat = 105

Constant mobility (slope = µ)

Constant velocity

MOSFET IV Model with Velocity Saturation

invds vWQI =

satdsdsdsdstgsnsoxeds EVIVVm

VVWCLI /)2

( ---= m

cssat

L V

dstcsgsnsoxeds dVEIVmVVWCdxIds

]/)([0 0

---=ò ò m

satcs

csnstcsgsoxeds

Edx

dVdxdV

VmVVWCI/1

/)(

+--=

m


Vcs /L– the average electric field is replaced by


LE

V

VVm

VVCL

W

I

sat

ds

dsdstgsnsoxe

ds

+

--=

1

)2

(m

LEV

Ichannel-longI

satds

dsds /1



LmEVV

mVVV

sattgs

tgsdsat

/)(211

/)(2-++

-=

dVdI

ds

ds ,0Solving =

LEVVm

V sattgsdsat

11 +-

=

ns

dsatsat

vE m

2º

A simpler and more accurate Vdsat is:


EXAMPLE: Drain Saturation Voltage

Question: At Vgs = 1.8 V, what is the Vdsat of an NFET with Toxe = 3 nm, Vt = 0.25 V, and Wdmax = 45 nm for (a) L =10 mm, (b) L = 1 um, (c) L = 0.1 mm, and (d) L = 0.05 mm?

Solution: From Vgs , Vt , and Toxe , mns is 200 cm2V-1s-1. Esat= 2vsat/ m ns = 8 104 V/cm m = 1 + 3Toxe/Wdmax = 1.2

11

-

| |ø

öççè

æ+

-=

LEVVm

Vsattgs

dsat


(a) L = 10 mm, Vdsat= (1/1.3V + 1/80V)-1 = 1.3 V

(b) L = 1 mm, Vdsat= (1/1.3V + 1/8V)-1 = 1.1 V

(c) L = 0.1 mm, Vdsat= (1/1.3V + 1/.8V)-1 = 0.5 V

(d) L = 0.05 mm, Vdsat= (1/1.3V + 1/.4V)-1 = 0.3 V

EXAMPLE: Drain Saturation Voltage

1ççè

æ+

-=

LEVVm

Vsattgs

dsat

1-

| |ø

ö


Idsat with Velocity Saturation

Substituting Vdsat for Vds in Ids equation gives:

LmEVV

Ichannel-long

LmEVV

VVC

mLW

I

sat

tgs

dsat

sat

tgs

tgssoxdsat -

+=-

+

-=

11

)(2

2

m

Very short channel case: tgssat VVLE -<<

)( VVCWvI tgsoxsatdsat -=

Idsat is proportional to Vgs–Vt rather than (Vgs – Vt)2 , not as sensitive to L

)( LmEVVCWvI sattgsoxsatdsat --=


Current-Voltage RelationsA good ol’ transistor

QuadraticRelationship

0 0.5 1 1.5 2 2.50

1

2

3

4

5

6x 10

-4

VDS (V)

I D (

A)

VGS= 2.5 V

VGS= 2.0 V

VGS= 1.5 V

VGS= 1.0 V

Resistive Saturation

VDS = VGS - VT

Velocity Saturation

Long-channel device

Short-channel device

ID

VDSV

DSAT VGS

- VT

VGS

= VDD

The Short Channel Device enters saturation before VDS > VGS - VT

The IDSAT in short Channel Device has linear dependence on VGS as opposed to square dependence thus significantly reducing the drain current delivered for a given voltage and thus slows down the device

Velocity Saturation

What is the main difference between the Vg dependence of the long- and short-channel length IV curves?

0 1 2 2.5Vds (V)

0.0

0.1

0.2

0.3

0.4

I ds

(mA

/m

)

L = 0.15 mV

gs = 2.5V

Vgs

= 2.0V

Vgs

= 1.5V

Vgs

= 1.0V

Vds (V)

I ds

(A

/m

)

L = 2.0 m Vgs = 2.5V

Vgs = 2.0V

Vgs = 1.5V

Vgs

= 1.0V

0.0

0.01

0.02

0.03

(a)

(b)

Vt = 0.7 V

Vt = 0.4 V

0 1 2 2.5Vds (V)

0.0

0.1

0.2

0.3

0.4

I ds

(mA

/m

)

L = 0.15 mV

gs = 2.5V

Vgs

= 2.0V

Vgs

= 1.5V

Vgs

= 1.0V

Vds (V)

I ds

(A

/m

)

L = 2.0 m Vgs = 2.5V

Vgs = 2.0V

Vgs = 1.5V

Vgs

= 1.0V

0.0

0.01

0.02

0.03

(a)

(b)

Vt = 0.7 V

Vt = 0.4 V


Sub-Threshold Conduction

0 0.5 1 1.5 2 2.510

-12

10-10

10-8

10-6

10-4

10-2

VGS (V)

I D (

A)

VT

Linear

Exponential

Quadratic

Typical values for S:60 .. 100 mV/decade

The Slope Factor

ox

DnkT

qV

D C

CneII

GS

1 ,~ 0

S is DVGS for ID2/ID1 =10

kT

qV

nkT

qV

D

DSGS

eeII 10

A U

nifie

d M

odel

0 0.5 1 1.5 2 2.50

0.5

1

1.5

2

2.5x 10

-4

VDS (V)

I D (

A)

VelocitySaturated

Linear

Saturated

VDSAT=VGT

VDS=VDSAT

VDS=VGT

S D

G

B

Transistor Model for Manual Analysis

The Transistor as a SwitchVGS VT

RonS D

ID

VDS

VGS = VD D

VDD/2 VDD

R0

Rmid

ID

VDS

VGS = VD D

VDD/2 VDD

R0

Rmid

0.5 1 1.5 2 2.50

1

2

3

4

5

6

7x 10

5

VDD

(V)

Req

(O

hm)

The Transistor as a Switch

Dynamic Behavior of MOS Transistor

DS

G

B

CGDCGS

CSB CDBCGB

The Gate Capacitance

tox

n+ n+

Cross section

L

Gate oxide

xd xd

L d

Polysilicon gate

Top view

Gate-bulkoverlap

Source

n+

Drain

n+W

Gate Capacitance

S D

G

CGC

S D

G

CGC

S D

G

CGC

Cut-off Resistive Saturation

Most important regions in digital design: saturation and cut-off

Gate Capacitance

WLCox

WLCox

2

2WLCox

3

CGC

CGCS

VDS /(VGS-VT)

CGCD

0 1

CGC

CGCS = CGCDCGC B

WLCox

WLCox

2

VGS

Capacitance as a function of VGS(with VDS = 0)

Capacitance as a function of the degree of saturation

Diffusion Capacitance

Bottom

Side wall

Side wallChannel

SourceND

Channel-stop implant N A1

Substrate NA

W

xj

LS

Capacitances in 0.25 mm CMOS process

MOSFET – Some Secondary Effects

VT

L

Long-channel threshold Low V DS threshold

Threshold as a function of the length (for low V DS )

Drain-induced barrier lowering (for low L)

VDS

VT

Parasitic Resistances

W

LD

Drain

Draincontact

Polysilicon gate

R GD

S D

VGS,eff

RS RD

RS,D = R LS,D/W + RC

• Three Levels– Level 1

• Long Channel, Channel Length Modulation

– Level 2• Geometry based that includes detailed device physics• Velocity saturation, mobility degradation, DIBL• Analytical physics based model makes it complex and

inaccurate

– Level 3• Semi-empirical model• Measured data to calibrate and decide the main parameters• Accurate and efficient. Widely used.

SPICE Models for the MOS Transistor

BSIM3-V3

Parameter Category Description

Control Selection of level and models for mobility, capacitance and noise

DC Parameters for threshold and current and calculations

AC & Capacitance Parameters for capacitance computations

dW and dL Derivation of effective channel length and width

Process Process parameters such as oxide thickness and doping concentrations TOX, XJ, GAMMA1, NCH, NSUB

Temperature Nominal temperature and temperature coefficients for various device parameters TNOM

Bin Bounds device dimensions for which the model is validLMIN, LMAX, WMIN, WMAX

Flicker Noise Noise model parameters

SPICE Transistor ParametersParameter Name Symbol SPICE

NameUnits Default

Value

Drawn Length L L m -

Effective Width W W m -

Source Area AREA AS m2 0

Drain Area AREA AD m2 0

Source Perimeter PERIM PS m 0

Drain Perimeter PERIM PD m 0

Squares of Source Diffusion NRS - 1

Squares of Drain Diffusion NRD - 1

IL 2222 - MOSFET Professor Ahmed Hemani Dept. Of ES, School of ICT, KTH Kista Email:...

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Transcript of IL 2222 - MOSFET Professor Ahmed Hemani Dept. Of ES, School of ICT, KTH Kista Email:...