Off-line LED Driver with Bidirectional Second Stage for Reducing Energy Storage

Qingcong Hu and Regan Zane Colorado Power Electronics Center

ECEE Department University of Colorado

Boulder, USA qingcong.hu, zane@colorado.edu

Abstract—This paper presents a technique for reducing energy storage capacitance and achieving high efficiency in off-line LED drivers. A bidirectional second stage is utilized to reduce the required energy storage, allowing use of high quality, long lifetime capacitors without significantly increasing cost. The bidirectional structure reduces losses when compared to traditional cascaded stages since less than one third of the total input energy is processed by the bidirectional stage. A two-stage LED driver is designed and tested, with a boost converter operating at critical conduction mode (CRM) as power factor correction (PFC) first stage and a synchronous boost converter with soft switching operating at 400 kHz switching frequency as the bidirectional second stage. Experimental results are presented for a 100-W off-line LED system. The total losses from the bidirectional second stage are less than 3% of the input power, and the overall efficiency including the PFC stage is greater than 94%.

I. INTRODUCTION Solid-state light-emitting diodes (LEDs) receive

significant interest as future lighting sources [1-9]. Compared with other lighting sources, LEDs provide many advantages such as high efficacy and long lifetime and the potential for further development. For most LED applications, power electronics drivers are necessary as the interface between power source and LED load to manipulate the input and output powers. For applications connected to the ac line, often termed as “off-line”, standards place requirement of high power factor (PF) on the input power. High PF leads to large input power ripple at twice line frequency. These power ripples, if applied to LEDs directly, lead to large variations on LED current and potential problems such as visible light flicker and life degradation of LED devices due to thermal cycling. Low quality bulk electrolytic capacitors, due to their large capacitance at low cost, are often adopted to filter the power ripple. However, the combination of low quality, large ripple and high temperature results in short lifetime of these capacitors and thus LED applications.

In order to achieve long lifetime for LED luminaires, it is of significant interest to remove the low-life electrolytic capacitors from the drivers [5-9]. Magnetic energy storage is used in [5] instead of capacitance, with the trade-off of large size, weight and high cost. Much effort was also put into reduction of the required energy storage capacitance, such that high-quality long-lifetime capacitors can be used while maintaining reasonable cost. Methods are reported in [6-8] to reduce the input power ripple with specific input current shaping. Energy storage capacitors are decoupled from the LED string to make full use of the capacitance in [8, 9]. A bidirectional buck second stage operating in discontinuous conduction mode (DCM) is utilized in [9] to reduce the energy storage capacitance and to control the LED current ripple for low-voltage converter modules connected in series strings.

The reduction of energy storage capacitance by the second stage can be much more significant for high voltage applications. However, power loss mechanisms, such as switching loss and magnetic loss, become much more severe at higher voltage. As a result, special design is required to achieve high efficiency for an off-line LED driver with a bidirectional second stage.

This paper presents a high-efficiency two-stage off-line LED driver without an electrolytic capacitor targeting a 200-V 0.5-A LED string. A boost converter as first stage, operating at critical conduction mode (CRM) with constant on time, is designed to achieve high PF. A bidirectional second stage is utilized to reduce energy storage so that an 8-μF film capacitor with long lifetime can be used to filter the power ripple at double line frequency. A synchronous boost converter with soft switching is adopted as the second stage, whose power loss is measured to be less than 3% of the total input power.

The paper is organized in the following way. The reductions of energy storage and power loss due to bidirectional second stage are analyzed in Section II. The system design and considerations are presented in Section

This work was co-sponsored by the National Science Foundation (under Grant No. 0348772) and industry sponsors of the Colorado Power Electronics Center.

978-1-4577-0541-0/11/$26.00 ©2011 IEEE 2302

III. Section IV provides the experimental setup and results, while a comparison of the proposed LED driver to a traditional cascaded one is given in Section V. Section VI concludes the paper.

II. BIDIRECTIONAL SECOND STAGE

A. Reducing Energy Storage Capacitance with Second Stage For off-line LED applications, high power factor (PF) is

required, which leads to large input power ripple. As shown in Fig. 1, the waveform pin represents the input power within one half-line period with PF = 1 and it swings between zero and its peak value at twice line frequency. This power leads to very large current ripple if directly applied onto the LED string. In order to avoid flicker or life degradation due to large LED current variation, energy storage is necessary to filter the input power ripple. The simplest filter is to parallel a capacitor with the LED string, as shown in Fig. 2(a). However, very large capacitance may be necessary to reduce LED current ripple. The required capacitance can be calculated from

ESCESC

stored

valleyESCpeakESC

storedES VV

EVV

EC

Δ22

2,

2,

=−

= , (1)

where Estored is the required energy storage, VESC,peak, VESC,valley, VESC and ΔVESC are the peak, valley, dc value and ripple of the voltage on the energy storage capacitor, VESC,peak = VESC + ΔVESC, VESC,valley = VESC − ΔVESC. When the energy storage capacitor is directly parallel with the LED string, very small ΔVESC is allowed as a small variation on LED voltage leads to large change on its current. As a result, the required capacitance can be very large for this configuration.

According to (1), required energy storage capacitance can be reduced by decreasing energy storage Estored, increasing dc value or ripple of capacitor voltage. To reduce Estored, either smaller input power ripple or larger output power ripple should be adopted. As the LED applications

are allowed to have input PF less than unity, it is possible to reduce input power ripple by shaping the input current, with the trade-off of lower PF [6-8]. On the other hand, allowing certain LED current ripple at double line frequency also helps reduce energy storage.

The energy storage capacitance can also be reduced by manipulating the capacitor voltage. A common approach is to include a second stage in the driver to decouple the capacitor from LED string. As shown in Fig. 2(b), a dc-dc second stage is placed following the energy-storage capacitor CES and followed by the LED string. As CES is decoupled from the LED string, larger voltage ripple is allowed on CES. Furthermore, the capacitor voltage can be boosted higher than the LED string voltage. As a result, the capacitance can be significantly reduced compared to the single-stage LED driver.

The required capacitances for single-stage and two-

00.5

11.5

22.5

33.5

44.5

5

0 0.2 0.4 0.6 0.8 1

Percentage LED current ripple

C/C

0

Single stage

Two stage

Capacitance reduction

C0

00.5

11.5

22.5

33.5

44.5

5

0 0.2 0.4 0.6 0.8 1

Percentage LED current ripple

C/C

0

Single stage

Two stage

Capacitance reduction

C0

Figure 3. Normalized capacitance reduction with additional second stage for different percentage LED current ripples. C0 is the required energy-storage capacitance for single-stage LED driver with 50% LED current

ripple.

pac

P0

Tline/8 Tline/23Tline/80

Estored

PLEDs

one half-line cycle

Figure 1. Input and output power waveforms for an LED driver with PF = 1 and constant (output) LED current.

CES

+

_Rectifier& PFC vLEDsvac

(a)

CES

+

_Rectifier& PFC dc-dc

+

_vLEDsvESCvac

(b)

Figure 2. LED driver with (a) single PFC stage and (b) PFC first stage and dc-dc second stage.

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stage LED drivers for different LED current ripple are compared in Fig. 3. The required capacitances are normalized based on C0, the capacitance for a single-stage LED driver with 50% LED current ripple. The assumed parameters for this comparison include: single LED voltage of 3 V, LED current of 500 mA, small-signal resistance of 0.8 Ω for single LED. The energy storage capacitor voltage for the two-stage LED driver is assumed to swing between 120% and 180% of VLEDs, where VLEDs is the LED string voltage. As seen in Fig. 3, the required energy storage capacitance is largely reduced with the additional second stage. For example, when 50% LED ripple is allowed, the required energy-storage capacitor for two-stage driver is only about 15% of that for single-stage driver, and it can be seen that the capacitance reduction is even more significant for small-ripple cases. This comparison is based on an assumption of capacitor vESC higher than VLEDs, which is the case for boost second stage. When a buck converter is used in the second stage, vESC always has to be lower than VLEDs. When a converter with large conversion ratio range, such as buck-boost converter, is used, larger swing on vESC is allowed, the energy storage capacitance can be further reduced.

The required energy storage capacitance can also be

reduced when ripple is allowed on LED current, as shown in Fig. 3. For certain LED current ripple, the minimum energy storage is achieved when LED current is regulated to be trapezoidal, similar to the waveform of pLEDs shown in Fig. 4(a), in which the input power pin is chopped only when it is too large or too small. With this approach of ripple control, LED current stays at high reference value when input power is too larger, and stays at low reference when input power is too small. Two reference values for LED current are necessary to implement this waveform, while controller is required to realize reference transition as well.

With the two-stage structure in Fig. 2(b), the efficiency of second stage is critical as all the LED power goes through this stage, even when current ripple is allowed on the LED string. The waveforms of input and output power for a unity-PF LED driver with certain LED current ripple are shown in Fig. 4(a), with the shadowed areas indicating the energy stored and released by the capacitor. Fig. 4(b) demonstrates the percentage energy storage, Estored/Ecycle, for different LED current ripple values, where Ecycle is the total input energy within a half-line cycle, Although the maximum energy storage, which happens with zero LED current ripple, is about 32% of the total input energy, 100% of the input energy must be processed by the second stage, resulting in considerable power loss. Another consideration is about the performance degradation on the PFC stage, as the large voltage variation on energy storage capacitor may reduce the efficiency or even disturb the operation of this stage.

B. Minimizing Power Loss with Bidirectional Structure An alternative two-stage structure is to switch the

positions of the energy storage capacitor and the LED string, as shown in Fig. 5. With this structure, only the excess power goes through the second stage to the energy storage capacitor CES when the input power is higher than desired LED power. When the input power is less than the required amount, part of the LED string power comes from CES. Thus, only the required energy storage, the shadowed areas in Fig. 4(a), is processed by the second stage. The energy processed by the second stage may be largely reduced especially when current ripple is allowed on LED string, as shown in Fig. 4(b). For example, when 30% ripple is allowed on LED current, only about 10% of the input energy is processed by the second stage, thus the power loss of the LED driver can be reduced.

The efficiency of a two-stage LED driver with

Rectifier& PFC

Bidirectionaldc-dc CES

+

_VLEDs

+

_vESCvac

Figure 5. Two stage LED driver with bidirectional second stage

pin

pLEDsP0

td Tline/4 Tline/2Tline/4+td0

Estored=Ereleased

(a)

0

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0 0.2 0.4 0.6 0.8 1

Percentage LED current ripple

E sto

red/

E cyc

le

(b)

Figure 4. (a) Input power waveform for a two-stage LED driver with constant input current and output power waveform with certain LED

current ripple; (b) required percentage energy storage (Estored/Ecycle, Ecycle is the total input energy within one half line cycle) for different

LED current ripple values.

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bidirectional second stage in Fig. 5 can be derived as

( )22

22

221

1 bb

bbb

ηληηηη

−+= , (2)

where η1b and η2b are the respective efficiencies of the first and second stage, and λ is the percentage of LED energy processed by the second stage, or Estored/Ecycle which is shown in Fig. 4(b). For comparison, the efficiency of traditional cascaded two-stage LED driver, which is shown in Fig. 2(b), equals

ttt 21 ηηη = , (3)

where η1t and η2t are respective efficiencies of the first and second stage. In order to simplify the comparison, it is assumed that η1b = η1t and η2b = η2t, thus the overall efficiency ηb is larger than ηt when

λ

λη−

>12b . (4)

As shown in Fig. 4(b), for 0 to 100% LED current ripple, it is always valid that λ < 0.32, thus λ/(1-λ) < 0.47. As a result, when the second stage efficiency η2b is larger than 0.47, equation (4) is always valid, and the efficiency of the two-stage LED driver with bidirectional second stage is larger than that of traditional two-stage driver.

III. SYSTEM DESIGN An off-line LED driver with film capacitor for energy

storage is designed with the proposed bidirectional second stage. The target load is a 200-V 0.5-A LED string while the input is an ac source with rms value of 120 V. The major goal of the design is to reduce the energy storage capacitance with the proposed topology, while high efficiency is under consideration as well.

A boost converter operating in CRM is selected as PFC stage. A commercial control IC is utilized to achieve natural PFC with constant on time CRM operation. Although CRM increases the inductor current ripple, the advantages of simple control loop and smaller switching loss compared to continuous conduction mode (CCM) make it a suitable solution for low-power application.

A synchronous boost converter is selected as the bidirectional second stage. Compared to buck converter, the higher output voltage of boost converter allows even smaller energy storage capacitor. Meanwhile, the inductor current is smaller for boost second stage due to the continuity of its input current, which helps to reduce power loss. One disadvantage of high voltage is the increased switching loss. In order to improve efficiency, soft switching technique is adopted for the second stage. Although soft switching increases the inductor current ripple, which might lead to

large conduction loss, this problem is not severe due to the relatively small inductor current for this circuit.

The purpose of the bidirectional second stage is to filter the power ripple at double line frequency. This function can be realized by regulating the LED current. When the LED current, thus LED power, is constant, the excess input power ripple automatically goes through the second stage to the energy storage capacitor. Besides the LED current control loop, one additional loop is required to regulate the voltage on the energy storage capacitor, so as to make the LED power equal to the average input power. The balance between input and LED power can be realized by adjusting the average LED current, which can be the reference signal for the LED current loop. Additionally, the average LED current should be compared to the LED current command ILED,comd, which is the external input signal for this system. This comparison result is fed back to the first stage to control the input power. The resulting control loops for the entire system are shown in Fig. 6. Totally four loops are necessary, including the PFC, LED current regulation, energy storage capacitor voltage control and the power control loops.

The function of LED current ripple control is also included in this circuit. The high and low current references are calculated with the average LED current signal iLED,avg in Fig. 6 and a ripple current command, as shown in Fig. 7. The reference transition is realized by detecting energy storage capacitor voltage vESC and LED current iLED. As shown in Fig. 7(a), the LED current is regulated with high reference during period a and with low reference during period c. The LED current controller is disabled during transition period b and d, during which intervals all the input power is consumed by LED load. During period a, vESC keeps increasing, indicating excess input power. At instant 1, the peak of vESC is detected, indicating input power equal to LED power. After this instant iLED controller is disabled and iLED decreases as input power decreases. At instant 2 iLED reaches the low reference, at which point the

iLED

+_

Power Ctrlr

ILED,comd

Second stageRectifier& PFC

pin,ref

CES

+

_vESC

iLED,avgvESC Ctrlr

iLED Ctrlr

vac

Figure 6. Control loops for the off-line LED driver, including PFC, LED current regulation, energy storage capacitor voltage regulation and input

power control loops.

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iLED controller is enabled with low reference value. The current regulation is stopped again when minimum vESC is

detected at instant 3, and starts when iLED hits the high reference value.

IV. EXPERIMENTAL RESULTS A prototype was developed to experimentally verify the

performance of the proposed techniques and control approach, with the schematic shown in Fig. 8. A two-stage system was implemented for the experiments, with a boost converter operating in CRM as PFC first stage and a synchronous boost converter as bidirectional second stage. A commercial PFC control chip is used in the first stage

TABLE I. MAJOR DEVICES USED IN EXPERIMENT

Device Part Number Description

FPGA XC3S500E Xilinx Spartan 3E

S1, S2h, S2l FDD5N50F N-channel MOSFET, 500 V, 3.5 A

D1 ES3G Diode, 400 V, 3 A

PFC controller FAN6961 Constant on time CRM

ADC AD7825 8-bit 4-channel multiplexed

HB driver FAN7382 Half bridge driver, 600 V

LED Luxeon K2 700 mA

TABLE II. MAJOR COMPONENTS USED IN EXPERIMENT

Component Description Parameter

Lf Input filter inductor 560 μH

Cf Input capacitor 0.47 μF, 250 V, film

Ll First stage inductor 330 μH

CLEDs First stage output capacitor 3.3 μF, 250V, film

L2 Second stage inductor 100 μH

CES Energy storage capacitor 8 μF, 700 V, film

vESC

iLED

iLED,ref

a b c d1 2 3 4

(a)

CES

_+

iLED

iLED,ref

vESC

+

_

+_

ILED,ripple +

+

iref controller

iLED controller

L2

S2h

S2l

ierr

iLED,avg

enable

compensator

Rectifier& PFC

vac

(b) Figure 7. (a) Reference transition by detecting vESC and iLED, (b) iLED controller with ripple control to implement trapezoidal LED current.

L2

S2h

S2l

+

_

+

_

iLED

vac S1

D1L1

CLEDs VLEDs CES vESC

d1

d2PFC boost Bidirectional boost

PFCcontroller

FPGA

Lf

Cf

+

_vrect

iac

ADC

vfb

Figure 8. Circuit for experiment: including boost first stage with constant on time CRM and synchronous boost second stage.

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while the second stage is controlled via FPGA and corresponding sensing circuitry and ADCs. A simple RC filter is used to convert digital output from FPGA to analog signal vfb, which is fed back to PFC controller. The major devices used in the experiment are shown in Table I, and the major component values are shown in Table II. It can be seen that no electrolytic capacitor is used. The energy storage capacitor CES is only 8 μF thanks to the bidirectional second stage. Although the double-line-frequency ripple is filtered by CES with the second stage, another capacitor CLEDs is parallel with LED string to filter the switching frequency ripple. The average switching frequency for the first stage is around 100 kHz, while the frequency for the second stage is approximately 400 kHz. The line voltage is 120 Vac at 60 Hz, and the load is a 200-V LED string with current of 0.5 A.

The PFC stage is first tested, with additional bulk capacitor parallel with the LED string to limit the LED current variation. The waveforms of rectified line voltage vrect, ac input current iac, LED string voltage VLEDs and LED current iLED are shown in Fig. 9. It can be seen that ac line current is sinusoidal and in phase with the ac voltage, indicating good PF which is measured to be 0.998. The power loss of PFC stage with 200-V 0.5-A load is measured to be approximately 3.5 W.

A bidirectional boost second stage is then tested together with the PFC stage. An 8-μF capacitor is large enough for energy storage to remove the entire double-line-frequency power ripple, while limiting the capacitor voltage to less than 400 V. The waveforms for rectified line voltage vrect, ac input current iac, energy storage capacitor voltage vESC and LED current iLED are shown in Fig. 10(a) for zero LED current ripple case, and the corresponding waveforms for inductor currents are in Fig. 10(b). The inductor current for

first stage iL1 shows a sinusoidal envelop which is in phase of the rectified ac voltage, indicating good PF and large input power ripple. With the operation of bidirectional second stage, there is no double-line-frequency ripple on LED current, as the low frequency power ripple is filtered. The voltage on the energy storage capacitor vESC increases around peak input power, as the excess power is being stored in the capacitor, and vESC decreases around zero input power, indicating energy in the capacitor is released to the LED string. Fig. 10(b) also demonstrates the inductor current for the second stage iL2, whose average value is in phase with the input power. It can also be seen that iL2 crosses zero during every switching period, which is due to

vrect

iac

vESC

iLED

vrect

iac

vESC

iLED

(a)

vrect

iL1

vESC

iL2

vrect

iL1

vESC

iL2

(b) Figure 10. Waveforms of (a) rectified line voltage, ac line current, energy

storage capacitor voltage, LED current and (b) inductor currents for the two-stage LED driver without double-line-frequency ripple on LED

current.

vrect

iac

VLEDs

iLED

vrect

iac

VLEDs

iLED

Figure 9. Waveforms of rectified line voltage, ac line current, LED string voltage and LED current for PFC stage experiment. Addition bulk capacitor

is used to reduce LED current ripple.

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soft switching. The measured power loss is 6 W for the entire system when the output power is 100 W.

The function of ripple control is also experimentally tested, with a command of 30% ripple on LED current. The corresponding waveforms are shown in Fig. 11, including the second stage inductor current iL2 and the LED current iLED. The second stage operates only when the input power is around its upper and lower values, during which intervals the LED current is regulated to either high or low reference value and vESC, the voltage on energy storage capacitor, increases or decreases accordingly. When the second stage stops operation, the input power is directly applied on LED string and vESC stays unchanged. Compared to the waveforms in Fig. 10, the voltage swing of vESC is smaller, indicating energy storage reduction. As a result, a smaller energy storage capacitor can be adopted by allowing larger ripple on LED current. Calculation predicts a 5-μF film capacitor would be sufficient for energy storage when 30% ripple is on LED current, while keeping vESC less than 400 V.

The start-up waveforms are shown in Fig. 12, including rectified line voltage, ac line current, LED current and energy storage capacitor voltage. It can be seen that the ac current increase gradually until LED current reaches the target value during the start-up period. This soft start behavior is realized by giving the PFC stage a slow-increasing power command.

V. COMPARISON TO TRADITIONAL CASCADE DRIVER In order to achieve similar performance shown in

Section IV, a traditional cascade two-stage LED driver shown in Fig. 13 would be a common choice. An energy storage capacitor is placed right after the PFC stage, and is followed by a dc-dc second stage loaded by the LED string.

In order to utilize the similar small film capacitor for energy storage, the capacitor voltage has to be high enough with large variation, similar to the vESC waveform in Fig. 10. As vESC is always larger than LED voltage, a buck converter is the natural choice.

As the output voltage of PFC stage is boosted higher than that in the proposed circuit in Fig. 8, the power loss with this stage will be higher due to larger inductor current ripple or higher switching frequency. Additional losses are associated with the buck stage, which processes 100% of the LED power. To limit the power loss of a 100-W buck converter to less than 3 W requires significant effort and cost.

On the other hand, the traditional cascaded circuit in Fig. 13 does provide more flexibility on LED string voltage, on which the only requirement is less than the voltage of energy storage capacitor. For the proposed LED driver with bidirectional second stage in Fig. 8, the voltage of LED string has be higher than the peak line voltage to guarantee the proper operation of boost PFC stage, which place a limit on minimum LED number. When the LED string voltage is

CES

+

_

Rectifier &Boost PFC

Buck

+

_vLEDsvESCvac

vESC: 200~400 V

Figure 13. Tradtional cascade two-stage LED driver for comparison.

vrect

iac

vESC

iLED

vrect

iac

vESC

iLED

Figure 12. Start-up waveforms of rectified line voltage, ac line current, energy storage capacitor voltage and LED current for PFC stage

experiment.

vrect

iL2

vESC

iLED

vrect

iL2

vESC

iLED

Figure 11. Waveforms of rectified line voltage, inductor current of second stage, energy storage capacitor voltage and LED current for the two-stage

LED driver with 30% LED current ripple .

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too low, other converters with larger conversion ratio range, like flyback converter has to be adopted for the PFC stage.

VI. CONCLUSION This paper presents a technique to reduce energy storage

capacitance and to achieve high efficiency for off-line LED driver. With a bidirectional second stage, the required energy storage capacitance is significantly reduced so that film capacitor with long lifetime can replace the electrolytic capacitor without significantly increasing cost. The bidirectional structure limits the additional power loss associated with the additional stage as less than one third of the input energy is processed by the second stage. A two-stage LED driver is built and tested, with a boost converter operating in CRM as the PFC stage and a synchronous boost converter with soft switching at 400 kHz as the bidirectional second stage. With LED power at 100W, the loss associated with the second stage is approximately 2.5% of the input power.

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