High-Power Vertical-Junction Field-Effect

Transistors Fabricated on Low-Dislocation-

Density GaN by Epitaxial Lift-Off

Robert McCarthy

MicroLink Devices, Inc.

March 28th, 2017

Core Technology: Epitaxial Lift-Off

1

‣ Epitaxial lift-off (ELO) uses a highly-selective chemical wet etch to dissolve a release layer and peel off epitaxial layers.

‣ ELO material can be transferred to new substrate with better properties (flexible, lightweight, lower cost, thermally conductive…)

‣ Original substrate can be reused for growth.

‣ Over the past 10 years MicroLink Devices has taken ELO of GaAs and InP materials from beakers to pilot production (thousands of large-area cells per month from 6” GaAs).

6” GaAs

Wafer

248-cell (125W) Puma UAV

GaN Epitaxial Lift-Off (Photoelectrochemical

Etching)‣ Objectives:

‣ Develop low-cost, high-throughput method for GaN ELO

from bulk GaN

‣ Cost Reduction! Enable many reuses of low-

dislocation-density bulk GaN.

‣ Methods for GaN substrate removal:

‣ Laser lift-off

‣ “Smart cut,” spalling

‣ Chemical lift-off

‣ ZnO, NbN, Porous GaN

‣ Develop layer transfer process for ELO GaN to low-cost

substrates (i.e., silicon) with improved thermal conductivity

suitable for power electronics

‣ Scale process to 4” bulk GaN substrates

‣ Demonstrate bulk GaN substrate reuse after ELO

‣ Lift off high-power devices to validate material quality.

Show high yields for lifted off devices.

2-inch bulk GaN substrate from SCIOCS

2

Team

3

‣ MicroLink Devices (Prime)

– Epitaxial lift-off development

– Layer transfer

‣ Qorvo (Ed Beam, Andy Xie)

– GaN epitaxial growth and

characterization

‣ Virginia Tech (Prof. Lou Guido)

– Epitaxial growth and characterization

of GaN high-power devices

‣ University of Notre Dame (Prof. Patrick

Fay)

– Device fabrication and measurement

Year One and Two Milestones

4

1st and 2nd Year

Accomplishments

Milestone Chart (Year 1 and 2 Abridged)

1.1 Design and Construct GaN PEC etch apparatus

1.2-1.3 Develop and Optimize GaN ELO Process

1.4-1.5 Scale Process to Larger (2”) Diameters

2.2 Develop Bonding Method for Attaching ELO GaN to Carrier

LED Photoenhanced Etching

5

‣ Release layer design (InGaN) based on bandgap-selective photoenhanced wet etching.

‣ Illuminate with filtered UV illumination (below bandgap of GaN) to photogenerate carriers in lower bandgap, pseudomorphic InGaN.

‣ High-power, short-wavelength LEDs for etching.

– Substantial cost reduction over an arc-lamp

– Readily scaled to large substrates and batches

‣ Use “cross” perforation pattern to enhance lateral etch rate

– Enables released squares to “curl”

– Etch rate typically ~250 microns/hr

1st and 2nd Year

Accomplishments

GaN filter

UV illumination

GaN filter

Metal support layer

Bulk GaN substrateRelease layer

Device layers

Metal

Support

Layer

GaN

Cross Pattern Perforation for

Etch (dark spots are unetched)

First Large Area ELO of GaN

(>2” wafer)

SEM Images of

ELO GaN (lifted-off

pads on top, cross-

section on bottom

showing GaN at

the edge)

Improved Film Design and Devices

6

1st and 2nd Year

Accomplishments

‣ We continued to optimize the epi layer, metal support layer, and etching equipment.

‣ Increased the size of pads in perforation design.

‣ Maintained epitaxial nature for the films once they’ve been lifted off.

‣ Lifted-off Schottky devices and bonded to Si.

‣ Reduced leakage current after ELO for 85% of Schottky diodes (20 measured, removing a shunt current path through dislocations?).

N-face after ELO

Ga (device) face

after bonding to Si

and etch back

Bonded to Si, MSL Etched Away

-9

-8

-7

-6

-5

-4

-3

-2

-1

0

-50 -40 -30 -20 -10 0 10

Cu

rre

nt

(10

^X A

)

Voltage (V)

C03_R19

C03_R19_ELO

I-V Comparison Before (Blue) and After ELO (Orange)

3.5 mm x 3.5 mm pads

Year Three Objectives

7

Milestone Chart (Year 3 Abridged)

1.1 Perforation Optimization and Increased Unit Cell Size (current goal is 4x4

mm2)

1.2 Transfer ELO Structure and Process to Bulk GaN

2.2 Develop a 350ºC Bonding Process (conductive substrates, ohmic contacts)

3 Bulk GaN Substrate Reclaim Development (need to demonstrate that we

can grow high quality films and high power devices after ELO and repolish)

5 Vertical PN Diode and VJFET Device Development

ELO from a full 4”

GaN on sapphire

sample.

Bulk GaN ELO Growth Studies: Improved Uniformity

‣ Bulk GaN growth is more challenging than on sapphire. Miscut variation on GaN substrates affects In

composition in our InGaN layer, amongst other issues.

‣ Have gained better control using wafers with lower miscut and improved growth conditions.

‣ Now typically only see a small change in the In composition and the epi surface.

Data Obtained by Qorvo

XRD showing GaN and InGaN Peaks for

growth across a 2” GaN SubstrateAFM Images after epi growth across a 2” GaN Substrate

Bulk GaN Lateral Etch Attempts

‣ Vertical and lateral etch rates were similar to GaN on sapphire.

‣ A key problem: have to protect the backside of the substrate from KOH attack. Have used multiple techniques.

‣ Looks excellent. Lifted off high great selectivity.

‣ Distinct GaN ELO film with ~5 micron thickness observed at the edge.

(a) 0 hrs (b) 2 hrs

(a) (b)

ELO GaN

Microscope Images Showing the Lateral Etch Progression

Camera Images Showing ELO GaN from a Bulk GaN Substrate

SEM Images Showing ELO GaN

from a Bulk GaN Substrate

Deeper PEC wet etch of perforations‣ Need thicker than 5 micron epi layers for high-power devices.

‣ Have made epis as thick as 15 microns. Able to do a PEC wet etch deeper than that. Seeing smooth surfaces.

‣ In fact, able to etch well past 15 microns …

‣ Looking at a cracked edge of an ELO film, we see a thick cross-section of ~15 microns thickness.

50μm

>120 µm

SEM Images Showing a Deep Vertical Etch into a Bulk GaN Substrate SEM Cross-Section of Thick ELO GaN

SEM Image

Showing a Very

Deep Vertical Etch

into a Bulk GaN

Substrate

ELO of Higher Doped Epi Layers for n-type

Contact Formation‣ Using an optimized ELO etch process for high selectivity, lifted off an epi structure with a highly doped layer (3

microns 1e17 cm-3 above 2 microns of 1e19 cm-3).

‣ TLM data from N-face GaN after ELO shows linear IV curves.

‣ With highly doped layer, measured a specific contact resistance of 1.4e-5 ohm-cm2 with unannealed Ti/Au.

TLM Patterns on ELO GaN

SEM Image of ELO GaN

with High Doping

Initial Lateral PN Junction Devices

‣ Goal: enable device demonstrationwith and without ELO layer; facilitatedetailed device and material comparison

‣ Devices fabricated and tested using same process flow both with and without release layer

– Typical results: 40x40 µm2 active area– No dependence on release layer for lateral

devices (growth on release layer unaffected)‣ Similar device measurements before and after

ELO

Epitaxial Structures

Current vs. Voltage Measurements

for Lateral PN Diodes on Substrates

with and without a Release Layer

Current vs. Voltage Measurements

for Lateral PN Diodes Before (blue)

and After (red) Epitaxial Lift-OffImage of Fabricated

Devices

Higher Power Vertical PN Junction Devices

‣ Device design:

– Thicker drift layer – 8 µm, target 1x1016 cm-3

– Bigger devices (up to 900x900 μm2)

‣ Forward characteristics to 1 A

– Turn-on voltage ~ 3V

– Ideality factor well behaved

– Leakage currents at measurement floor

– Ron~5 mΩ-cm2 (500 A/cm2)

‣ Breakdown:

– Measured breakdown voltage ~400 V

– Lower than expected from epitaxial structure

– C-V of fabricated devices suggests ND ~ 2.2x1016

: (depletion width ~3.2 µm)

‣ Also preparing a vertical Schottky FET Device (almost

ready)

Epitaxial Structure

Current vs. Voltage Measurements for Vertical PN Junction Devices

Vertical Schottky FET Design

Substrate Reclaim

‣ Have lifted off films from 2” wafers

‣ After ELO, Sumitomo Electric (SEI) dot core wafers were

sent back for repolishing.

‣ Comparing a fresh substrate to reclaimed substrates, no

discernible difference in XRD or AFM (some small spots,

possibly dislocations sites).

‣ After epitaxial growth, high-quality films were observed. The

first successful reclaim of a GaN wafer that we know of!

‣ High-power devices on reclaimed wafers almost finished.

AFM of a Fresh GaN Substrate (left) and a

Reclaimed Substrate (right)

Lower Data from Qorvo

XRD of a Fresh GaN Substrate (red) and a

Reclaimed Substrate (blue)AFM of a Reclaimed

Substrate after Epitaxial

Growth

Camera Images of ELO from a full 2” Bulk GaN Wafer

Project End Goals

15

Milestone Chart (Final Year Abridged)

1.1 Increase pad size to 4x4 mm2 pads (done 2x2 mm2 pads on bulk GaN so

far). Lift-off from 4” GaN substrates.

2.2 Develop a 350ºC Bonding Process that will give conductive substrates,

ohmic contacts (in progress, have managed some initial bonds but requires

greater study).

3 Bulk GaN Substrate Reclaim: show multiple iterations of ELO/repolish, show

higher power devices on reclaimed wafers (almost ready).

5 GaN Device Development: higher power devices have been designed, and

will soon be fabricated. Will soon lift-off high power vertical PN Diodes and

VJFET devices to show comparable device behavior after lift-off.

Technology-to-Market

‣ Target customers: Manufacturers of GaN devices sensitive to material quality (VJFETS, UHB LEDs, lasers, …). Engaged with multiple GaN power and optoelectronic device manufacturers.

‣ An initial cost model analysis suggests a large cost reduction using ELO due to thinner epi layers (improved thermal conduction, reduced die size) and substrate reuse.

‣ Licensing of ELO process for vertical integration

‣ ELO services for companies that can benefit from our technique.

‣ Another possible market: epi vendor of proprietary films for client companies.

Die size

reduction

Substrate

reuse

Cost Model Analysis for High Power Devices with ELO

Assumptions:

• 4-inch GaN

($2800/wafer)

• 35% gross margin

• 50C delta T (highly

conservative)

Potential Technologies to Explore with GaN ELO

Market Entry

GaN ELO Layer Transfer Process (1-2 yrs)

• GaN power and optical devices

• Core IP:

– ELO layer structure design

– ELO process and apparatus

– Device encapsulation and layer transfer process

– Bulk GaN substrate reclaim

GaN ELO Epiwafers (2-3 yrs)

• Enabled by ramp-up of internal GaN MOCVD epi capability

over the next 1-2 years.

• Leverages our base and strong track record as a III-V epi

wafer vendor

• GaN ELO technology portfolio provides unique

differentiation (layer transfer has potential

cost/performance benefits for majority of existing GaN

device applications)

MicroLink has purchased GaN reactors to

begin growing our own epi layers and devices

Conclusions

18

‣ We have demonstrated ELO of large areas of GaN epi (up to full 4”sapphire wafers, 2” on bulk GaN) with high lateral etch rates (>250 μm/hr).

‣ We’ve taken ELO films bonded to Si, and shown both Schottky devices and lateral PN diodes with comparable behavior before and after ELO.

‣ We’ve shown the ability to lift off thick (15 micron), and highly-doped (1e19 cm-3) epi layers for making vertical high-power devices.

‣ We’re developing high-power vertical PN diodes and Schottky FETs that will be lifted off and tested.

‣ For the first time that we know of, we have shown successful reclaim for a 2” GaN wafer after ELO!

‣ We’re talking with potential customers and stakeholders about their needs, and how ELO could benefit their GaN programs.

‣ Very interested to discuss potential applications and collaborations.

– rmccarthy@mldevices.com

‣ Thank you!