GSM Based Ticket Reservation SystemAbstract:Aim:Global System for Mobile (GSM) is a second generation cellular standard developed to cater voice services and data delivery using digital modulation. The Short Message Service is realized by the use of the Mobile Application Part (MAP) of the SS#7 protocol, with Short Message protocol elements being transported across the network as fields within the MAP messages.[1] These MAP messages may be transported using 'traditional' TDM based signaling, or over IP using SIGTRAN and an appropriate adaptation layer. The Short Message protocol itself is defined by 3GPP TS 23.040 for the Short Message Service - Point to Point (SMS-PP),[2] and 3GPP TS 23.041 for the Cell Broadcast Service (CBS).In this project we are implementing the ticket reservation system based on GSM technology. That means if we send a message to the ticket reservation center then, we get all the details about the bus timings and seats availability. So that we can reserve our seat in a bus wherever we want to travel. Here the benefit from this project is we can save our precious time by booking our tickets at an instant of time. The microcontroller will interact with the GSM Module. According to those requirements the controller will send the information through a message. That information will be displayed on the LCD.This project uses regulated 5V, 500mA power supply. 7805 three terminal voltage regulator is used for voltage regulation. Bridge type full wave rectifier is used to rectify the ac output of secondary of 230/12V step down transformer.

CRYSTALOSCILLATORRESETGSMMAX 232 LCDPower supply Micro controllerBlock Diagram:

Embedded SystemDefinitionComputing systems are everywhere. Its probably no surprise that millions of computing systems are built every year destined for desktop computers (Personal Computers or PCs), workstations, mainframes and servers. What may be surprising is that billions of computing systems are built every year for a very different purpose: they are embedded within larger electronic devices, repeatedly carrying out a particular function, often going completely unrecognized by the devices user. Creating a precise definition of such embedded computing systems, or simply embedded systems, is not an easy task. An embedded system is nearly any computing system other than a desktop, laptop, or mainframe computer. That definition isnt perfect, but it may be as close as well get. An embedded system is a specialized computer system that is part of a larger system or machine. Embedded systems can also be thought of as information processing subsystems integrated in a larger system. As part of a larger system it largely determines its functionality.Overview of Embedded SystemEmbedded systems are found in a variety of common electronic devices, such as:a. Consumer electronicscell phones, pagers, digital cameras, camcorders, videocassette recorders, portable video games, calculators and personal digital assistantsb. Home appliancesmicrowave ovens, answering machines, thermostat, home security, washing machines and lighting systemsc. Office automationfax machines, copiers, printers and scannersd. Business equipmentcash registers, curb side check-in, alarm systems, card readers, product scanners and automated teller machinese. Automobilestransmission control, cruise control, fuel injection, anti-lock brakes and active suspensionsEmbedded systems have several common characteristics:1. Single-functioned: An embedded system usually executes only one program, repeatedly. For example, a pager is always a pager. In contrast, a desktop system executes a variety of programs, like spreadsheets, word processors and video games, with new programs added frequently.2. Tightly constrained: All computing systems have constraints on design metrics, but those on embedded systems can be especially tight. A design metric is a measure of an implementations features, such as cost, size, performance and power. Embedded systems often must cost just a few dollars, must be sized to fit on a single chip, must perform fast enough to process data in real-time and must consume minimum power to extend battery life or prevent the necessity of a cooling fan.Block diagram of embedded system:

CPUSensorA/D ConversioncD/A ConversionActuatorsMemorySoftwareHuman InterfaceDiagnostic PortAuxiliary System (power cooling) Electromechanical Back up and SafetyExternal Environment

Figure 1: Overview of Embedded System

Description of embedded system building block:Input devices: Unlike the desktops, the input devices to an embedded system have very limited capability. There will be no keyboard or a mouse, and hence interacting with the embedded system is no easy task. Many embedded systems will have a small keypad-you press one key to give a specific command. A keypad may be used to input only the digits. Many embedded systems used in process control do not have any input device for user interaction; they take inputs from sensors or transducers and produce electrical signals that are in turn fed to other systems. Central Processing Unit (CPU):The Central Processing Unit (processor, in short) can be any of the following: microcontroller, microprocessor or Digital Signal Processor (DSP). A micro-controller is a low-cost processor. Its main attraction is that on the chip itself, there will be many other components such as memory, serial communication interface, analog-to-digital converter etc. So, for small applications, a micro-controller is the best choice as the number of external components required will be very less. On the other hand, microprocessors are more powerful, but you need to use many external components with them. DSP is used mainly for applications in which signal processing is involved such as audio and video processing. Memory: The memory is categorized as Random Access Memory (RAM) and Read Only Memory (ROM). The contents of the RAM will be erased if power is switched off to the chip, whereas ROM retains the contents even if the power is switched off. So, the firmware is stored in the ROM. When power is switched on, the processor reads the ROM; the program is program is executed.Output devices: The output devices of the embedded systems also have very limited capability. Some embedded systems will have a few Light Emitting Diodes (LEDs) to indicate the health status of the system modules, or for visual indication of alarms. A small Liquid Crystal Display (LCD) may also be used to display some important parameters.Interfaces: The embedded systems may need to, interact with other embedded systems at they may have to transmit data to a desktop. To facilitate this, the embedded systems are provided with one or a few communication interfaces such as RS232, RS422, RS485, Universal Serial Bus (USB), Ethernet etc. Application-specific circuitry: Sensors, transducers, special processing and control circuitry may be required fat an embedded system, depending on its application. This circuitry interacts with the processor to carry out the necessary work. The entire hardware has to be given power supply either through the 230 volts main supply or through a battery. The hardware has to design in such a way that the power consumption is minimized.

Wireless Communication:Wireless communication, as the term implies, allows information to be exchanged between two devices without the use of wire or cable. A wireless keyboard sends information to the computer without the use of a keyboard cable; a cellular telephone sends information to another telephone without the use of a telephone cable. Changing television channels, opening and closing a garage door, and transferring a file from one computer to another can all be accomplished using wireless technology. In all such cases, information is being transmitted and received using electromagnetic energy, also referred to as electromagnetic radiation. One of the most familiar sources of electromagnetic radiation is the sun; other common sources include TV and radio signals, light bulbs and microwaves. To provide background information in understanding wireless technology, the electromagnetic spectrum is first presented and some basic terminology defined.Embedded systems often share the following attributes:1. They are tightly connected to the outside world via sensors and actuators (i.e., motors, relays, switches, etc.). The outside world is not as clean as the digital world inside your software (noise, disturbance, debouncing of switches, etc.). 2. They often monitor and control processes.3. Data logging and transformations is less important.4. They have a minimal user interface.5. They start on power up and have to remain operational until the power is removed (Reliability is important: A VCR, which crashes while you are watching a movie, is not acceptable).6. The environment in which the system is going to operate and the production method/run pose requirements on embedded systems, regarding: Price of parts In-circuit programmability Environmental requirements Temperature ranges Vibrations HumidityCategories of Embedded SystemApplication Specific SystemsEmbedded systems are not general-purpose computers. Embedded system designs are optimized for a specific application. Many of the job characteristics are known before the hardware is designed. This allows the designer to focus on the specific design constraints of a well-defined application. As such, there is limited user reprogram ability. Some embedded systems, however, require the flexibility of re-programmability. Programmable DSPs are common for such applications.Distributed SystemsA common characteristic of an embedded system is that it consists of communicating processes executing on several CPUs or ASICs, which are connected by communication links. The reason for this is economy. Economical four 8-bit microcontrollers may be cheaper than a 32-bit processor. Even after adding the cost of the communication links, this approach may be preferable. In this approach, multiple processors are usually required to handle multiple time-critical tasks. Devices under control of embedded systems may also be physically distributed.Reactive Embedded SystemsA typical embedded systems model responds to the environment via sensors and control the environment using actuators. This requires embedded systems to run at the speed of the environment. This characteristic of embedded system is called reactive. Reactive computation means that the system (primarily the software component) executes in response to external events.External events can be either periodic or aperiodic. Periodic events make it easier to schedule processing to guarantee performance. Aperiodic events are harder to schedule. The maximum event arrival rate must be estimated in order to accommodate worst case situations. Most embedded systems have a significant reactive component.HeterogeneousEmbedded systems often are composed of heterogeneous architectures (Figure 4). They may contain different processors in the same system solution. They may also be mixed signal systems. The combination of I/O interfaces, local and remote memories, and sensors and actuators makes embedded system design truly unique. Embedded systems also have tight design constraints and heterogeneity provides better design flexibility.Requirement of Embedded SystemsEmbedded systems are unique in several ways, as described above. When designing embedded systems, there are several categories of requirements that should be considered: Functional Requirements Temporal Requirements (Timeliness) Dependability Requirements.Functional RequirementsFunctional requirements describe the type of processing the system will perform. This processing varies, based on the application. Functional requirements include the following; Data collection requirements Sensor requirements Signal conditioning requirements Alarm monitoring requirements Direct digital control requirements Actuator control requirements Man-machine interaction requirementsTemporal RequirementEmbedded systems have many tasks to perform, each having its own deadline. Temporal requirements define the stringency in which these time-based tasks must complete.Examples include: Minimal latency jitter Minimal error-detection latency temporal requirements can be very tight (for example, control-loops) or less stringent (for example, response time in a user interfaces).Dependability RequirementsMost embedded systems also have a set of dependability requirements. Examples of dependability requirements include: Reliability: a complex concept that should always be considered at the system level rather than at the individual component level. There are three dimensions to consider when specifying system reliability Hardware reliability: probability of a hardware component failing Software reliability: probability that a software component will produce an incorrect result Operator reliability: how likely that the operator of a system will make an errorMicrocontroller SelectionGeneral factors that govern the selection are: Complexity of overall design Design reuse Performance Power size Cost tools Operating system support and availabilityThe design's complexity helps to determine which CPU to use. If the design calls for the deployment of a single state machine with interrupts from a small set of peripherals, then a small CPU and/or micro controller such as the MCS51 or the Z80 could be the best choice. Many systems such as industrial timer may fit this category, as the memory footprint is small, the signal is slow and battery consumption must be extremely low. The application and its interaction will dictate the design's complexity and may also determine whether it requires a real-time operating system (RTOS). Typically, as the complexity of the application increases, the need for a greater bit-width processor increases. The selection of the CPU will greatly impact performance of the overall system. Specifically, features like 8/16/24/32 bit architecture, RISC / CISC / DSP architecture, cache, MMU, pipelining, branch prediction and super-scalar architecture, all affect the speed of a system. Depending on system needs, these features may be necessary to achieve peak performance of the system.There are various benchmarking threshold data available for various 8/16/32 bit processors like MIPS (Million Instructions per Second), EEMBC, Dhrystone, MIPS/MHz, etc., which can be taken as reference or comparison baseCISC Vs RISC:-CISC is an acronym for Complex Instruction Set Computer and are chips that are easy to program and which make efficient use of memory. Since the earliest machines were programmed in assembly language and memory was slow and expensive, the CISC philosophy made sense, and was commonly implemented in such large computers as the PDP-11 and the DEC system 10 and 20 machines. Most common microprocessor designs such as the Intel 80x86 and Motorola 68K series followed the CISC philosophy. But recent changes in software and hardware technology have forced a re-examination of CISC. Many modern CISC processors are hybrids, implementing many RISC principles.The design constraints that led to the development of CISC (small amounts of slow memory and fact that most early machines were programmed in assembly language) give CISC instructions sets some common characteristics: A 2-operand format, where instructions have a source and a destination that include register to register, register to memory and memory to register commands. Multiple addressing modes for memory, including specialized modes for indexing through arrays. Variable length instructions, where the length often varies according to the addressing mode. Instructions, which require multiple clock cycles to execute. Complex instruction-decoding logic, driven by the need for a single instruction to support multiple addressing modes. A small number of general purpose registers. This is the direct result of having instructions which can operate directly on memory and the limited amount of chip space not dedicated to instruction decoding, execution and microcode storage. Several special purposes register. Many CTSC designs set aside special registers for the stack pointer, interrupt handling, and so on. This can simplify the hardware design somewhat, at the expense of making the instruction set more complex. A 'Condition code" register, which is set as a side-effect of most instructions. This register reflects whether the result of the last operation is less than, equal to, or greater than zero and records if certain error conditions occur.At the time of their initial development, CISC machines used available technologies to optimize computer performance. Microprogramming is as easy as assembly language to implement and much less expensive than hardwiring a control unit. The ease of microcoding new instructions allowed designers to make CISC machines upwardly compatible: a new computer could run the same programs as earlier computers because the new computer would contain a superset of the instructions of the earlier computers. As each instruction became more capable, fewer instructions could be used to implement a given task. This made more efficient use of the relatively slow main memory. Because microprogram instruction sets can be written to match the constructs of high-level languages, the compiler does not have to be as complicated. Designers soon realized that the CISC philosophy had its own problems, including:Earlier generations of a processor family generally were contained as a subset in every new version.So instruction set & chip hardware become more complex with each generation of computers. As many instructions as possible could be stored in memory with the least possible wasted space, individual instructions could be of almost any length - this means that different instructions will take different amounts of clock time to execute, slowing down the overall performance of the machine. Many specialized instructions aren't used frequently enough to justify their existenceapproximately 20% of the available instructions are used in a typical program. CISC instructions typically set the condition codes as a side effect of the instruction. Not only does setting the condition codes take time, but programmers have to remember to examine the condition code bits before a subsequent instruction changes them.As memory speed increased, and high-level languages displaced assembly language, the major reasons for CISC began to disappear, and computer designers began to look at ways computer performance could be optimized beyond just making faster hardware.One of their key realizations was that a sequence of simple instructions produces the same results as a sequence of complex instructions, but can be implemented with a simpler (and faster) hardware design (assuming that memory can keep up.) RISC (Reduced Instruction Set Computers) processors were the result. CISC and RISC implementations are becoming more and more alike. Many of todays RISC chips support as many instructions as yesterday's CISC chips. And today's CISC chips use many techniques formerly associated with RISC chips.RISC TechnologyPronounced 'risk', RISC is an acronym for Reduced Instruction Set Computer and is a type of microprocessor that recognizes a relatively limited number of instructions. Until the mid-1980s, the tendency among computer manufacturers was to build increasingly complex CPUs that had ever-larger sets of instructions. At that time, however, a number of computer manufacturers decided to reverse this trend by building CPUs capable of executing only a very limited set of instructions. One advantage of reduced instruction set computers is that they can execute their instructions very fast because the instructions are so simple. Another, perhaps more important advantage, is that RISC chips require fewer transistors, which makes them cheaper to design and produce. Since the emergence of RISC computers, conventional computers have been referred to as CISC's (Complex Instruction Set Computers).The main characteristics of CISC microprocessors are: Extensive instructions Complex and efficient machine instructions Micro-encoding of the machine instructions Extensive addressing capabilities for memory operations Relatively few registersIn comparison, RISC processors are more or less the opposite of the above: Reduced instruction set Less complex, simple instructions Hardwired control unit and machine instructions Few addressing schemes for memory operands with only two basic instructions (LOAD and STORE) Many symmetric registers, which are organized into a register fileThere is still considerable controversy among experts about the ultimate value of RISC architectures. Its proponents argue that RISC machines are both cheaper and faster, and are therefore the machines of the future.However, by making the hardware simpler, RISC architectures put a greater burden on the software. Is this worth the trouble because conventional microprocessors are becoming increasingly fast and cheap anyway?To some extent, the argument is becoming doubtful because CISC and RISC implementations are becoming more and more alike. Many of today's RISC chips support as many instructions as yesterday's CISC chips. And today's CISC chips use many techniques formerly associated with RISC chips.The RISC concepts of the individual manufacturers are naturally, slightly different. However many of the essential points are similar, such as: Reduction of the instruction set Instruction pipelining (the interleaved execution of many instructions) Load/store architecture (only the load and store instructions have access to memory, all others work with the internal processor registers) Unity of RISC processors and compilers (the compiler is no longer developed for a specific chip, but instead, at the outset, the compiler is developed in conjunction with the chip to produce one unit) A modified register conceptin some RISC processors, for a fast subroutine call, the registers are no longer managed as ax, bx, etc., but exist in the form of a variable window, which allows a 'look' at certain register filesClosely related to the abbreviation RISC is the reduction of almost unlimited instruction set of highly complex CISCs. One of the first prototypes that implemented the RISC concept RISC-I, had 31 instructions, whereas its successor, the RISC II, had 39.The simplicity of processor structure is shown by the reduced number of integrated transistors: in the RISC II there are only 41000 (in comparison to more than one million in the 486 and three million in the Pentium).One additional very important characteristic is the hardwired Control Unit CU (the instructions are hard wired) This means that in a RISC processor, the Execution Unit EU is no longer controlled by the CU with the assistance of extensive micro codes. Instead, the whole operation is achieved in the form of hardwired logic. This greatly accelerates the execution of an instruction.For example, in a CISC the complexity of a multiplication instruction is located in a very extensive microcode which controls the ALU. For a RISC CPU, the chip designers put the complexity in a complicated hardware multiplier. Typically, in a CISC CPU multiplications are carried out by many additions and shifts, whereas a RISC multiplier performs that operation in one or two (dependent on the precision) passes.Due to the reduced number of machine instructions, there is now enough space on the chip for implementing such highly complex circuitries.The execution structure of an instruction is, as a result of the basic microprocessor working principles, the same for the majority of machine code instructions. The following steps must be carried out: Read the instruction from memory (instruction fetching) Decode the instruction (decoding phase) Where necessary, fetch operand(s) (operand fetching phase) Execute the instruction (execution phase) Write back the result (write-back phase)Every instruction is broken down into partial steps for execution in the stage pipeline. The partial steps are executed within one single clock cycle i.e., instruction 'k' needs five clock cycles to complete but then at the pipeline output, an instruction result is available with each clock cycle.Latest Developments in RISC DesignWith some processors the phases are combined into one single phase; for example, the decoding phase and the operand fetching phase (which is closely linked to the decoding phase) may be executed in a single pipeline stage. The result would be a four-stage pipeline. On the other hand, the instruction phases can be sub-divided even further, until each element has its own sub-phase, thus, through simplicity, very quick pipeline stages can be implemented. Such a strategy leads to a super pipelined architecture with many pipeline stages (ten or more).This technique is used commercially (in the MIPS R4000 RISC processor), but is hard to implement and is not being used by any other commercial chip. In practical terms, super pipelining will never give you more than a 2x improvement in performance.Another possibility for increasing the performance of a RISC microprocessor is the integration of many pipelines operating in parallel. With this method, the result is a superscalar. Nearly all modern microprocessors, including the Pentium, Power PC, Alpha and SPARC microprocessors are superscalar.One of the fastest processors currently available is the MIPS RIOOOO microprocessor. It has a 4-way super-scalar architecture containing a 64k split 1-way cache on-chip, which fetches and decodes four instructions per cycle.Each queue can perform dynamic scheduling of instructions. Instructions can be executed and completed out-of-order, allowing the processor to have up to 32 instructions in various stages of execution At a frequency of 200 MHz, the R10000 Microprocessor delivers peak performance of 800 MIPS with a peak data transfer rate of 3~2 Gigabytes/second to secondary cache.Harvard & Von Neumann Architecture CPUcentral processing unit (also MPU, micro processing unit) ADDRESS DECODERused to select a particular address location (It sends achip select (CS) signal to the block being addressed.) ROMread only memory (In a small system the ROM would contain the monitor program.) RAMrandom access memory, which is used to store the user program. PIOparallel input/output,which is used to connect the system to external equipment, allowing data (and programs), to be moved in and out of the system. SIOserial input/output, which is used to connect the system to external equipment via single pair connections BUSa set of electrical connections, through which signals and power pass (The signals can be synchronous or asynchronous, usually the former, when they are controlled by a CLOCK signal.) DATA BUS8, 16, 32, 64 or more connections for bidirectional transmission of DATA (The larger the data bus, the more data can be transmitted.) ADDRESS BUS16, 32 or 64 connections, which determine how much memory the computer CPU can 'address' (A 16 bit address bus can address 64 Kilobytes, a 32 bit bus 4 Gigabytes.) CONTROL BUSall the other control signals and power for the CPU (Includes power, earth, clock signals, interrupts, controls for the other two buses and connections to other processors.)Comparison of Harvard and Von Neumann ArchitecturesIn Harvard architecture, the data bus and address bus are separate. Thus a greater flow of data is possible through the central processing unit, and thus, a greater speed of work. Separating a programme from data memory makes it further possible for instructions not to have to be 8-bit words. For example, the Microchip PIC16F84 microcontroller uses 14 bits for instructions, which allows for all instructions to be one word instructions. It is also typical for Harvard architecture to have fewer instructions than Von-Neumann's, and to have instructions usually executed in one cycle. Microcontrollers with Harvard architecture are also called Reduced Instruction Set Computer (RISC) microcontrollers. Microprocessors with Von-Neumann's architecture are called Complex Instruction Set Computers (CISC).2 MICROCONTROLLERS:Microprocessors and microcontrollers are widely used in embedded systems products. Microcontroller is a programmable device. A microcontroller has a CPU in addition to a fixed amount of RAM, ROM, I/O ports and a timer embedded all on a single chip. The fixed amount of on-chip ROM, RAM and number of I/O ports in microcontrollers makes them ideal for many applications in which cost and space are critical.

The Intel 8051 is a single chip microcontroller (C) which was developed by Intel in 1980 for use in embedded systems. It was popular in the 1980s and early 1990s, but today it has largely been superseded by a vast range of enhanced devices with 8051-compatible processor cores that are manufactured by more than 20 independent manufacturers including Atmel, Infineon Technologies and Maxim Integrated Products. Intel's original MCS-51 family was developed using NMOS technology, but later versions, identified by a letter C in their name (e.g., 80C51) used CMOS technology and consumed less power than their NMOS predecessors. The Intel 8051 is an 8-bit microcontroller which means that most available operations are limited to 8 bits. There are 3 basic "sizes" of the 8051: Short, Standard, and Extended. The Short and Standard chips are often available in DIP (dual in-line package) form, but the Extended 8051 models often have a different form factor, and are not "drop-in compatible". All these things are called 8051.

4.3 8051 ARCHITECTURE

Features1. Microcontroller having inbuilt RAM or ROM and inbuilt timer.2. Input and output ports are available.3. Inbuilt serial port.4. Separate memory to store program and data.5. Many functions pins on the IC.6. Boolean operation directly possible.7. It takes few instructions to read and write data from external memory.Why Micro Controllers Used?Reasons are, Cost. Reliability. Speed. Size and Weight.4.4 Types of Micro ControllersOn the basis of internal bus width, architecture, memory and instruction set the microcontrollers are classified as,THE 8-BIT MICROCONTROLLERWhen the ALU performs arithmetic and logical operations on a byte (8-bits) at anInstruction, the microcontroller is an 8-bit microcontroller. Intel 8051 familyAnd Motorola MC68HC11 family.4.4.1THE 16-BIT MICROCONTROLLER When the ALU performs arithmetic and logical operations on a word (16-bits) at an Instruction, the microcontroller is a 16-bit microcontroller. Intel 8096 family andMotorola MC68HC12 and MC68332 families4.4.2THE 32-BIT MICROCONTROLLERWhen the ALU performs arithmetic and logical operations on a double word (32-Bits) at an instruction, the microcontroller is a 32-bit microcontroller. Intel80960 family and Philips LPC21xx, Motorola M683xx and Intel/Atmel 251 family.4.4.3THE 64-BIT MICROCONTROLLER When the ALU performs arithmetic and logical operations on a 64-bit instruction, the microcontroller is a 32-bit microcontroller. 4.5MICROCONTROLLER ARCHITECTURAL FEATURES:4.5.1 VON-NEUMAN ARCHITECTURE Microcontrollers based on the Von-Neuman architecture have a single _data_ busthat is used to fetch both instructions and data. Program instructions and data areStored in a common main memory. When such a controller addresses main memory,It first fetches an instruction, and then it fetches the data to support theinstruction.The two separate fetches slows up the controllers operation.The Von-Neuman architectures main advantage is that it simplifies the microcontroller design because only one memory is accessed. (Motorola 68HC11)4.5.2 HARVARD ARCHITECTUREMicrocontrollers based on the Harvard Architecture have separate data bus and aninstruction bus. This allows execution to occur in parallel. As an instruction is beingpre-fetched, the current instruction is executing on the data bus. Once the current instruction is complete; the next instruction is ready to go. This pre-fetch theoretically allows for much faster execution.( intel MCS-51 family, PIC microcontrollers)4.5.3 CISC ARCHITECTURE MICROCONTROLLERS: (Complex Instruction Set Computer) When a microcontroller has an instruction set that supports manyaddressing modes for the arithmetic and logical instructions, data transfer and memoryaccesses instructions, the microcontroller is said to be of CISC architecture. The advantages of the CISC architecture are that many of the instructions are macro like,Allowing the programmer to use one instruction in place of many simpler instructions. An example of CISC architecture microcontroller is Intel 8096 family.4.5.4 RISC ARCHITECTURE MICROCONTROLLERS RISC- Reduced Instruction Set Computer When a microcontroller has an instruction set that supports fewer addressing modes for the arithmetic and logical instructions and for data transfer instructions, the microcontroller is said to be of RISC architecture.The benefits of RISC design simplicity are a smaller chip, smaller pin count, andvery low power consumption. 8051 is an 8-bit processor, meaning that the CPU can work on only 8 bits of data at a time. Data larger than 8 bits has to be broken into 8-bit pieces to be processed by the CPU. 8051 is available in different memory types such as UV-EPROM, Flash and NV-RAM.4.6 AT89S52 The microcontroller used in this project is AT89S8252. Atmel Corporation introduced this 89C51 microcontroller. The present project is implemented on Keil U vision. In order to program the device, Preload tool has been used to burn the program onto the microcontroller. The features, pin description of the microcontroller and the software tools used are discussed in the following sections.FEATURES OF AT89C52:

8K Bytes of In-System Reprogrammable Downloadable Flash Memory 2K Bytes EEPROM Endurance: 100,000 Write/Erase Cycles 4V to 6V Operating Range Fully Static Operation: 0 Hz to 24 MHz Three-level Program Memory Lock 256 x 8-bit Internal RAM 32 Programmable I/O Lines Three 16-bit Timer/Counters Nine Interrupt Sources SPI Serial Interface Programmable UART Serial Channel Interrupt Recovery from Power-down Dual Data Pointer Power-off Flag

DESCRIPTION:

The AT89C52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K bytes of downloadable Flash programmable and erasable read-only memory and 2K bytes of EEPROM. The device is manufactured using Atmels high-density nonvolatile memory technology and is compatible with the industry-standard 80C51 instruction set and pinout. The on-chip downloadable Flash allows the program memory to be reprogrammed through an SPI serial interface or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with downloadable Flash on a monolithic chip, the Atmel AT89C52 is a powerful microcontroller, which provides a highly-flexible and cost-effective solution to many embedded control applications.

The AT89C52 provides the following standard features: 8K bytes of downloadable Flash, 2K bytes of EEPROM, 256 bytes of RAM, 32 I/O lines, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89C52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next external interrupt or hardware reset. The downloadable Flash can be changed a single byte at a time and is accessible through the SPI serial interface. Holding RESET active forces the SPI bus into a serial programming interface and allows the program memory to be written to or read from unless lock bits have been activated.

4.7 Pin Description

Fig4.7: -Pin diagram

VCCPin 40 provides the supply voltage to the chip. The voltage is +5V.GND Ground. XTAL1 and XTAL2The 8051 has an on-chip oscillator but requires an external clock to run it. Usually, a quartz crystal oscillator is connected to inputs XTAL1 (pin19) and XTAL2 (pin18). There are various speeds of 8051 family. Speed refers to the maximum oscillator frequency connected to XTAL. When the 8051 is connected to a crystal oscillator and is powered up, the frequency can be observed on the XTAL2 pin using the oscilloscope.XTAL1 is the input to the inverting oscillator amplifier and input to the internal clock operating circuit and XTAL2 is the output from the inverting oscillator amplifier.

ALE/PROG Address Latch Enable is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.

PSEN (Program Store Enable) It is the read strobe to external program memory. When the AT89S8252 is executing code from external program memory, PSEN is acti-vated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. EA/VPP (External Access Enable)

EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming when 12-volt programming is selected.

4

Ports 0, 1, 2 and 3The four ports P0, P1, P2 and P3 each use 8 pins, making them 8-bit ports. All the ports upon RESET are configured as input, since P0-P3 have value FFH on them. Port 0(P0)Port 0 is also designated as AD0-AD7, allowing it to be used for both address and data. ALE indicates if P0 has address or data. When ALE=0, it provides data D0-D7, but when ALE=1, it has address A0-A7. Therefore, ALE is used for demultiplexing address and data with the help of an internal latch. When there is no external memory connection, the pins of P0 must be connected to a 10K-ohm pull-up resistor. This is due to the fact that P0 is an open drain. With external pull-up resistors connected to P0, it can be used as a simple I/O, just like P1 and P2. But the ports P1, P2 and P3 do not need any pull-up resistors since they already have pull-up resistors internally. Upon reset, ports P1, P2 and P3 are configured as input ports.Port 1 Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current because of the internal pull-ups.

Some Port 1 pins provide additional functions. P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively. Furthermore, P1.4, P1.5, P1.6, and P1.7 can be configured as the SPI slave port select, data input/output and shift clock input/output pins. Port 1 also receives the low-order address bytes during Flash programming and verification.

Table 4.7.1:- Port1 Alternate functions

Programmable ClockOut:A 50% duty cycle clock can be programmed to come out on P1.0. This pin, besides being a regular I/0 pin, has two alternate functions. It can be programmed to input the external clock for Timer/Counter 2 or to output a 50% duty cycle clock ranging from 61 Hz to 4 MHz (for a 16-MHz operating frequency). Port 2 With no external memory connection, P2 are used as simple I/O. With external memory connections, port 2 must be used along with P0 to provide the 16-bit address for the external memory. Port 2 is designated as A8-A15 indicating its dual function. While P0 provides the lower 8 bits via A0-A7, it is the job of P2 to provide bits A8-A15 of the address.Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current because of the pull-ups. Port 3 receives some control signals for Flash programming and verification. Port 3 also serves the functions of various special features of the AT89S8252, as shown in the following table.

Table4.7.2:- Port 3 Alternate functionsSerial and Parallel Communication Depends on Data Transfer: 1. Serial Communication. 2. Parallel Communication. Electronic data communications between elements will generally fall into two broad categories: single-ended and differential. RS232 (single-ended) was introduced in 1962. Serial communication transfers one data bit at a time, while parallel communication transfers many data bits at a time. Serial communication transmits data bits sequentially, while parallel communication transmits data bits simultaneously allowing larger amounts of data to be transferred. Serial communication requires less wires and cables and is ideal for transferring data over long distances. Parallel data transmission uses more wires causing transmitted signals to become distorted and the data unreliable when communicating over long distances.Types of Serial Communication Methods of Serial Communication:1.Synchronous.2.Asynchronous. Asynchronous communications means a start bit and a stop bit are added to each data segment for asynchronous communications. For synchronous communication, both the start bit and stop bit are eliminated, so a faster transmission speed is achieved .Large amount of data can be transmitted with clock. The transmission is efficient than asynchronous. The standard transmission speed of asynchronous communication is 38.4 kbps, while that of Synchronous communication is 64 kbps or 128 kbps.Machine cycle for the 8051 The CPU takes a certain number of clock cycles to execute an instruction. In the 8051 family, these clock cycles are referred to as machine cycles. The length of the machine cycle depends on the frequency of the crystal oscillator. The crystal oscillator, along with on-chip circuitry, provides the clock source for the 8051 CPU. The frequency can vary from 4 MHz to 30 MHz, depending upon the chip rating and manufacturer. But the exact frequency of 11.0592 MHz crystal oscillator is used to make the 8051 based system compatible with the serial port of the IBM PC.3.1 POWER SUPPLY A Rectifier is an electrical device that converts alternating current (AC), which periodically reverses direction, to direct current (DC), current that flows in only one direction, a process known as rectification. Rectifiers have many uses including as components of power supplies and as detectors of radio signals. Rectifiers may be made of solid state diodes, vacuum tube diodes, mercury arc valves, and other components.A device which performs the opposite function (converting DC to AC) is known as an inverter.

Fig 3.1: Block diagram for power supply3.2 AC SUPPLYAlternating Current (AC) flows one way, then the other way, continually reversing direction. An AC supply is suitable for powering some devices such as lamps and heaters but almost all electronic circuits require a steady DC supply.AC is short for alternating current. This means that the direction of current flowing in a circuit is constantly being reversed back and forth. This is done with any type of AC current/voltage source.

Fig 3.2 Graphical representation of AC, voltage v/s time

The electrical current in your house is alternating current. This comes from power plants that are operated by the electric company. so those big wires you see stretching across the countryside are carrying AC current from the power plants to the loads, which are in our homes and businesses. The direction of current is switching back and forth 60 times each second.3.3 TRANSFORMER The dc supply cannot be used for transformers. The transformer works on the principle of mutual inductance, for which Current in one coil must chance uniformly. If dc supply is given, the current will not change due to constant supply and transformer will not work the various types employ the same basic principle as discovered in 1831 by Michael Faraday. Fig 3.3: Transformer (12v)

3.4 RECTIFIERWhen only one diode is used to rectify AC (by blocking the negative or positive portion of the waveform), the difference between the term diode and the term rectifier is merely one of usage, i.e., the term rectifier describes a diode that is being used to convert AC to DC. Almost all rectifiers comprise a number of diodes in a specific arrangement for more efficiently converting AC to DC than is possible with only one diode. Before the development of silicon semiconductor rectifiers, vacuum tube diodes and copper(I) oxide or selenium rectifier stacks were used.Early radio receivers, called crystal radios, used a "cat's whisker" of fine wire pressing on a crystal of galena (lead sulfide) to serve as a point-contact rectifier or "crystal detector". Rectification may occasionally serve in roles other than to generate D.C. current per se. For example, in gas heating systems flame rectification is used to detect presence of flame. Two metal electrodes in the outer layer of the flame provide a current path, and rectification of an applied alternating voltage will happen in the plasma, but only while the flame is present to generate it.3.4.1 Half-wave rectification

Fig 3.4(a) Half wave rectifier

In half wave rectification, either the positive or negative half of the AC wave is passed, while the other half is blocked. Because only one half of the input waveform reaches the output, it is very inefficient if used for power transfer. Half-wave rectification can be achieved with a single diode in a one-phase supply, or with three diodes in a three-phase supply3.4.2 Full-wave rectificationA full-wave rectifier converts the whole of the input waveform to one of constant polarity (positive or negative) at its output. Full-wave rectification converts both polarities of the input waveform to DC (direct current), and is more efficient. However, in a circuit with a non-center tapped transformer, four diodes are required instead of the one needed for half-wave rectification. (See semiconductors, diode). Four diodes arranged this way are called a diode bridge or bridge rectifier

Fig 3.4(b) Full wave rectifier

Circuit diagram

Fig 3.4(c) Bridge Rectifier

3.5 VOLTAGE REGULATORThis circuit is a small +5V power supply. The circuit will provide a regulated voltage to the external circuit which may also I am required in any part of the external circuit or the whole external circuit. The best part is that you can also use it to convert AC voltage to DC and then regulate it ,simply You need a transformer to make the AC main drop down to a safe value i.e. 12-15 volts and then us a rectifier to convert AC into DC.This circuit can give +5V output at about 150 mA current, but it can be increased to 1 A when good cooling is added to 7805 regulator chip. The circuit has over overload and terminal protection. The capacitors must have enough high voltage rating to safely handle the input voltage feed to circuit. The circuit is very easy to build for example into a piece of overboard. If you need other voltages than +5V, you can modify the circuit by replacing the 7805 chips with another regulator with different output voltage from regulator 78xx chip family. The last numbers in the the chip code tells the output voltage. Remember that the input voltage must be at least 3V greater than regulator output voltage to otherwise the regulator does not work well. Pin diagram for 7805 1. Unregulated voltage in 2. Ground 3. Regulated voltage out Fig 3.5( a) voltage regulatorSPECIFICATIONS

Low current consumption Over temperature protection Load protection High input voltage rating: Up to 45V Temp. range: 40C up to +125C

APPLICATIONS

Automation Data Processing Medical Motor Control & Drives7805 is a voltage regulator integrated circuit. It is a member of 78xx series of fixed linear voltage regulator ICs. The voltage source in a circuit may have fluctuations and would not give the fixed voltage output. The voltage regulator IC maintains the output voltage at a constant value. The xx in 78xx indicates the fixed output voltage it is designed to provide. 7805 provides +5V regulated power supply. Capacitors of suitable values can be connected at input and output pins depending upon the respective voltage levels.The 78xx (sometimes LM78xx) is a family of self-contained fixed linear voltage regulator integrated circuits. The 78xx family is commonly used in electronic circuits requiring a regulated power supply due to their ease-of-use and low cost. For ICs within the family, the xx is replaced with two digits, indicating the output voltage (for example, the 7805 has a 5 volt output, while the 7812 produces 12 volts). The 78xx line are positive voltage regulators: they produce a voltage that is positive relative to a common ground. There is a related line of 79xx devices which are complementary negative voltage regulators. 78xx and 79xx ICs can be used in combination to provide positive and negative supply voltages in the same circuit. 78xx series ICs have built-in protection against a circuit drawing too much power. They have protection against overheating and short-circuits, making them quite robust in most applications. In some cases, the current-limiting features of the 78xx devices can provide protection not only for the 78xx itself, but also for other parts of the circuit.

Fig 3.5(b) circuit diagram of voltage regulator

SERIAL COMMUNICATION

Computers transfer data in two ways: parallel and serial. In parallel data transfers, often 8 or more lines (wire conductors) are used to transfer data to a device that is only a few feet away. Examples of parallel transfers are printers and hard disk; each uses cables with many wire strips. Although in such cases a lot of data can be transferred in a short amount of time by using many wires in parallel, the distance cannot be great. To transfer to a device located at many meters away, the serial method is used. In serial communication, the data is sent one bit at a time, in contrast to parallel communication, in which the data is sent a byte or more at a time.

When a microprocessor communicates with the outside world, it provides the data in byte-sized chunks. In some cases, such as printers, the information is simply grabbed from the 8-bit data bus and presented to the 8-biut data bus of the printer. This can work only if the cable is not too long, since long cables diminish and even distort signals. Furthermore, an 8-bit data path is expensive. For these reasons, serial communication is used for transferring data between two systems located at distances of hundreds of feet to millions of miles apart. The fact that serial communication uses a single data line instead of the 8-bit data line of parallel communication not only makes it much cheaper but also enables two computers located in two different cities to communicate over the telephone.

For serial data communication to work the byte of data must be converted to serial bits using a parallel-in-serial-out shift register; then it can be transmitted over a single data line. This also means that at the receiving end there must be a serial-in-parallel-out shift register to receive the serial data and pack them into a byte. Of course, if data is to be transferred on the telephone line, it must be converted from 0s and 1s to audio tones, which are sinusoidal-shaped signals. This conversion is performed by a peripheral device called a modem, which stands for modulator/demodulator.

Serial data communication uses two methods, asynchronous and synchronous. The synchronous method transfers a block of data at a time, while the asynchronous method transfers a single byte at a time. It is possible to write software to use either of these methods, but the programs can be tedious and long. For this reason, there are special IC chips made by many manufacturers for serial data communication. These chips are commonly referred to as UART (Universal Asynchronous Receiver and Transmitter) and USART (Universal Synchronous-Asynchronous Receiver and Transmitter). The 8051 microcontroller has a built-in UART.

MAX232:The MAX232 is an integrated circuit that converts signals from an RS-232 serial port to signals suitable for use in TTL compatible digital logic circuits. The MAX232 is a dual driver/receiver and typically converts the RX, TX, CTS and RTS signals.The drivers provide RS-232 voltage level outputs (approx. 7.5V) from a single +5V supply via on-chip charge pumps and external capacitors. This makes it useful for implementing RS-232 in devices that otherwise do not need any voltages outside the 0V to +5V range, as power supply design does not need to be made more complicated just for driving the RS-232 in this case.The receivers reduce RS-232 inputs (which may be as high as 25V), to standard 5V TTL levels. These receivers have a typical threshold of 1.3V, and a typical hysteresis of 0.5V.The later MAX232A is backwards compatible with the original MAX232 but may operate at higher baud rates and can use smaller external capacitors 0.1F in place of the 1.0F capacitors used with the original device. The newer MAX3232 is also backwards compatible, but operates at a broader voltage range, from 3 to 5.5V. Voltage levels:It is helpful to understand what occurs to the voltage levels. When a MAX232 IC receives a TTL level to convert, it changes a TTL Logic 0 to between +3 and +15V, and changes TTL Logic 1 to between -3 to -15V, and vice versa for converting from RS232 to TTL. This can be confusing when you realize that the RS232 Data Transmission voltages at a certain logic state are opposite from the RS232 Control Line voltages at the same logic state. To clarify the matter, see the table below. For more information see RS-232 Voltage Levels.RS232 Line Type & Logic LevelRS232 VoltageTTL Voltage to/from MAX232

Data Transmission (Rx/Tx) Logic 0+3V to +15V0V

Data Transmission (Rx/Tx) Logic 1-3V to -15V5V

Control Signals (RTS/CTS/DTR/DSR) Logic 0-3V to -15V5V

Control Signals (RTS/CTS/DTR/DSR) Logic 1+3V to +15V0V

DB9 CONNECTOR:The D-subminiature or D-sub is a common type of electrical connector used particularly in computers. Calling them "subminiature" was appropriate when they were first introduced, but today they are among the largest common connectors used with computers.The widest application of D-subs is for RS-232 serial communications, though the standard did not make this connector mandatory. RS-232 devices originally used the DB25 25-pin D-sub, but for many applications the less common signals were omitted, allowing a DE9 9-pin D-sub to be used. The standard indicates a male connector for terminal equipment and a female connector for modems, but many variations exist. IBM PC compatible computers tend to have male connectors at the device, while modems have female connectors.On PCs, 9-pin and 25-pin plugs are used for the RS-232 (serial) ports and 25-pin sockets are used for the (parallel) printer ports (instead of the Centronics socket found on the printer itself). 25-pin sockets on Macintosh computers are typically SCSI connectors (again in contrast to the Centronics C50 connector typically found on the peripheral).A male DE9 connector on the back of an IBM-PC-compatible computer is typically a serial port connector. IBM introduced the DE9 connector for RS-232 on PCs with the Personal Computer AT in 1984. A female 9-pin connector on the same computer may be a video display output: monochrome, CGA, or EGA. Even though these all use the same connector, the displays cannot all be interchanged and monitors or video interfaces may even be damaged if connected to an incompatible device using the same connector. Later analog video (VGA and later) adapters replaced these connectors by DE15 15-pin high-density sockets, which have three rows of five contacts each in the space that was previously occupied by two rows of contacts, five in the top row and four in the bottom row. Other common names for DE15 connectors are HD15, where HD stands for High Density, and (less accurately) DB15 and DB15HD.From the late 1970s and all through the '80s, DE9s without the pair of fastening screws were used as game controller connectors in a variety of video game consoles and home computers, quite possibly due to the success of the revolutionary Atari 2600 game console that used them. Computer systems using them included the Atari 8-bit and ST lines; the Commodore VIC-20, 64, 128, and Amiga; the Amstrad; the SEGA Master System and Genesis. The Sinclair ZX Spectrum, which did not have a built in joystick connector of any kind, was commonly used with adapters for DE9 joysticks. They were not used in the Apple and PC systems, nor in most newer game consoles. Wired in the standard way, they supported one digital (3 positions x 2 axes, 1 button) joystick or one pair of analog paddles; on many systems a computer mouse or a light pen was also supported through these sockets, however these mice were not usually interchangeable between different systems.DA15S connectors are used for PC joystick connectors, where each DA15 connector supports two joysticks each with two analog axes and two buttons. In other words, one DA15S "game adapter" connector has 4 analog potentiometer inputs and 4 digital switch inputs. This interface is strictly input-only, though it does provide +5V DC power. Some joysticks with more than two axes and/or more than two buttons use the signals designated for both joysticks. Conversely, Y-adapter cables are available that allow two separate joysticks to be connected to a single DA15 game adapter port; if a joystick connected to one of these Y-adapters has more than two axes or buttons, only the first two of each will work. The IBM DA15 PC game connector has been modified to add a (usually MPU-401 compatible) MIDI interface, and this is often implemented in the game connectors on third-party sound cards, particularly the Sound Blaster line from Creative Labs. The "standard" straight game adapter connector (introduced by IBM) has three ground pins and four +5V power pins, and the MIDI adaptation replaces one of the grounds and one of the +5V pins, both on the bottom row of pins, with MIDI In and MIDI Out signal pins. (There is no MIDI Thru provided.)

GSM(Global System for Mobile Communications, originallyGroupe Spcial Mobile), is a standard set developed by theEuropean Telecommunications Standards Institute(ETSI) to describe technologies for second generation (2G) digitalcellular networks. Developed as a replacement for first generation(1G) analog cellular networks, the GSM standard originally described a digital, circuit switched network optimized forfull duplexvoicetelephony. The standard was expanded over time to include first circuit switched data transport, then packet data transport viaGPRS(General Packet Radio services). Packet data transmission speeds were later increased viaEDGE(Enhanced Data rates for GSM Evolution). The GSM standard is more improved after the development of third generation (3G)UMTSstandard developed by the3GPP. GSM networks will evolve further as they begin to incorporate fourth generation (4G)LTE Advancedstandards. "GSM" is atrademarkowned by theGSM Association.

HistoryEarly European analogue cellular networks employed an uncoordinated mix of technologies and protocols that varied from country to country, preventing interoperability of subscriber equipment and increasing complexity for equipment manufacturers who had to contend with varying standards from a fragmented market. The work to develop a European standard for digital cellular voice telephony began in 1982 when theEuropean Conference of Postal and Telecommunications Administrations(CEPT) created the Groupe Spcial Mobile committee and provided a permanent group of technical support personnel, based in Paris. In 1987, 15 representatives from 13 European countries signed amemorandum of understandingto develop and deploy a common cellular telephone system across Europe. The foresight of deciding to develop a continental standard paid off, eventually resulting in a unified, open, standard-based network larger than that in the United States.[1][2][3][4]France and Germany signed a joint development agreement in 1984 and were joined by Italy and the UK in 1986. In 1986 the European Commission proposed to reserve the 900MHz spectrum band for GSM. By 1987, basic parameters of the GSM standard had been agreed upon and 15 representatives from 13 European nations signed a memorandum of understanding in Copenhagen, committing to deploy GSM. In 1989, the Groupe Spcial Mobile committee was transferred from CEPT to theEuropean Telecommunications Standards Institute(ETSI).[3]Phase I of the GSM specifications were published in 1990. The historic world's first GSM call was made by the Finnish prime ministerHarri Holkerito Kaarina Suonio (mayor in city ofTampere) on July 1, 1991. The first network was built byTelenokia and SiemensandoperatedbyRadiolinja.[5]In 1992, the firstshort messaging service(SMS or "text message") message was sent and Vodafone UK and Telecom Finland signed the first international roaming agreement. Work had begun in 1991 to expand the GSM standard to the 1800MHz frequency band and the first 1800MHz network became operational in the UK in 1993. Also in 1993, Telecom Australia became the first network operator to deploy a GSM network outside of Europe and the first practical hand-held GSM mobile phone became available. In 1995, fax, data and SMS messaging services became commercially operational, the first 1900MHz GSM network in the world became operational in the United States and GSM subscribers worldwide exceeded 10 million. In this same year, theGSM Associationwas formed. Pre-paid GSM SIM cards were launched in 1996 and worldwide GSM subscribers passed 100 million in 1998.[3]In 2000, the first commercialGPRSservices were launched and the first GPRS compatible handsets became available for sale. In 2001 the first UMTS (W-CDMA) network was launched and worldwide GSM subscribers exceeded 500 million. In 2002 the first multimedia messaging services (MMS) were introduced and the first GSM network in the 800MHz frequency band became operational.EDGEservices first became operational in a network in 2003 and the number of worldwide GSM subscribers exceeded 1 billion in 2004.[3]By 2005, GSM networks accounted for more than 75% of the worldwide cellular network market, serving 1.5 billion subscribers. In 2005, the firstHSDPAcapable network also became operational. The firstHSUPAnetwork was launched in 2007 and worldwide GSM subscribers exceeded two billion in 2008.[3]TheGSM Associationestimates that technologies defined in the GSM standard serve 80% of the global mobile market, encompassing more than 5 billion people across more than 212 countries and territories, making GSM the most ubiquitous of the many standards for cellular networks.[6]

GSMcell siteantennas in theDeutsches Museum, Munich, GermanyGSM is acellular network, which means thatcell phonesconnect to it by searching for cells in the immediate vicinity. There are five different cell sizes in a GSM networkmacro,micro,pico,femtoandumbrella cells. The coverage area of each cell varies according to the implementation environment. Macro cells can be regarded as cells where thebase stationantennais installed on a mast or a building above average roof top level. Micro cells are cells whose antenna height is under average roof top level; they are typically used in urban areas. Picocells are small cells whose coverage diameter is a few dozen metres; they are mainly used indoors. Femtocells are cells designed for use in residential or small business environments and connect to the service providers network via a broadband internet connection. Umbrella cells are used to cover shadowed regions of smaller cells and fill in gaps in coverage between those cells.Cell horizontal radius varies depending on antenna height, antenna gain and propagation conditions from a couple of hundred metres to several tens of kilometres. The longest distance the GSM specification supports in practical use is 35 kilometres (22mi). There are also several implementations of the concept of an extended cell,[7]where the cell radius could be double or even more, depending on the antenna system, the type of terrain and thetiming advance.Indoor coverage is also supported by GSM and may be achieved by using an indoor picocell base station, or anindoor repeaterwith distributed indoor antennas fed through power splitters, to deliver the radio signals from an antenna outdoors to the separate indoor distributed antenna system. These are typically deployed when a lot of call capacity is needed indoors; for example, in shopping centers or airports. However, this is not a prerequisite, since indoor coverage is also provided by in-building penetration of the radio signals from any nearby cell.Themodulationused in GSM isGaussian minimum-shift keying(GMSK), a kind of continuous-phasefrequency shift keying. In GMSK, the signal to be modulated onto the carrier is first smoothed with aGaussianlow-pass filterprior to being fed to afrequency modulator, which greatly reduces the interference to neighboring channels (adjacent-channel interference).GSM carrier frequenciesMain article:GSM frequency bandsGSM networks operate in a number of different carrier frequency ranges (separated intoGSM frequency rangesfor 2G andUMTS frequency bandsfor 3G), with most2GGSM networks operating in the 900MHz or 1800MHz bands. Where these bands were already allocated, the 850MHz and 1900MHz bands were used instead (for example in Canada and the United States). In rare cases the 400 and 450MHz frequency bands are assigned in some countries because they were previously used for first-generation systems.Most3Gnetworks in Europe operate in the 2100MHz frequency band.Regardless of the frequency selected by an operator, it is divided intotimeslotsfor individual phones to use. This allows eight full-rate or sixteen half-rate speech channels perradio frequency. These eight radio timeslots (or eightburstperiods) are grouped into aTDMAframe. Half rate channels use alternate frames in the same timeslot. The channel data rate for all 8 channels is 270.833kbit/s, and the frame duration is 4.615ms.The transmission power in the handset is limited to a maximum of 2 watts in GSM850/900 and 1 watt in GSM1800/1900.Voice codecsGSM has used a variety of voicecodecsto squeeze 3.1kHz audio into between 6.5 and 13kbit/s. Originally, two codecs, named after the types of data channel they were allocated, were used, calledHalf Rate(6.5kbit/s) andFull Rate(13kbit/s). These used a system based uponlinear predictive coding(LPC). In addition to being efficient with bitrates, these codecs also made it easier to identify more important parts of the audio, allowing the air interface layer to prioritize and better protect these parts of the signal.GSM was further enhanced in 1997[8]with theEnhanced Full Rate(EFR) codec, a 12.2kbit/s codec that uses a full rate channel. Finally, with the development ofUMTS, EFR was refactored into a variable-rate codec calledAMR-Narrowband, which is high quality and robust against interference when used on full rate channels, and less robust but still relatively high quality when used in good radio conditions on half-rate channels.Network structure

The structure of a GSM networkThe network is structured into a number of discrete sections: TheBase Station Subsystem(the base stations and their controllers). theNetwork and Switching Subsystem(the part of the network most similar to a fixed network). This is sometimes also just called the core network. TheGPRS Core Network(the optional part which allows packet based Internet connections). TheOperations support system(OSS) for maintenance of the network.Subscriber Identity Module (SIM)Main article:Subscriber Identity ModuleOne of the key features of GSM is theSubscriber Identity Module, commonly known as aSIM card. The SIM is a detachablesmart cardcontaining the user's subscription information and phone book. This allows the user to retain his or her information after switching handsets. Alternatively, the user can also change operators while retaining the handset simply by changing the SIM. Some operators will block this by allowing the phone to use only a single SIM, or only a SIM issued by them; this practice is known asSIM locking.Phone lockingMain article:SIM lockSometimesmobile network operatorsrestrict handsets that they sell for use with their own network. This is calledlockingand is implemented by a software feature of the phone. Because the purchase price of the mobile phone to the consumer may be subsidized with revenue from subscriptions, operators must recoup this investment before a subscriber terminates service. A subscriber may usually contact the provider to remove the lock for a fee, utilize private services to remove the lock, or make use of free or fee-based software and websites to unlock the handset themselves.In some countries (e.g.,Bangladesh,Brazil,Chile,Hong Kong,India,Lebanon,Malaysia,Pakistan,Singapore) all phones are sold unlocked. In others (e.g., Finland, Singapore) it is unlawful for operators to offer any form of subsidy on a phone's price.[9]GSM service securityGSM was designed with a moderate level of service security. The system was designed to authenticate the subscriber using apre-shared keyandchallenge-response. Communications between the subscriber and the base station can be encrypted. The development ofUMTSintroduces an optionalUniversal Subscriber Identity Module(USIM), that uses a longer authentication key to give greater security, as well as mutually authenticating the network and the user whereas GSM only authenticates the user to the network (and not vice versa). The security model therefore offers confidentiality and authentication, but limited authorization capabilities, and nonon-repudiation.GSM uses several cryptographic algorithms for security. TheA5/1andA5/2stream ciphersare used for ensuring over-the-air voice privacy. A5/1 was developed first and is a stronger algorithm used within Europe and the United States; A5/2 is weaker and used in other countries. Serious weaknesses have been found in both algorithms: it is possible to break A5/2 in real-time with aciphertext-only attack, and in January 2007,The Hacker's Choicestarted the A5/1 cracking project with plans to useFPGAsthat allow A5/1 to be broken with arainbow tableattack.[10]The system supports multiple algorithms so operators may replace that cipher with a stronger one.On 28 December 2009 German computer engineerKarsten Nohlannounced that he had cracked the A5/1 cipher.[11]According to Nohl, he developed a number ofrainbow tables(static values which reduce the time needed to carry out an attack) and have found new sources forknown plaintext attacks. He also said that it is possible to build "a full GSM interceptor ... from open source components" but that they had not done so because of legal concerns.[12]An update by Nancy Owano on Dec. 27, 2011 on PhysOrg.com quotesNohlas a "security expert", and details these concerns:Nohl said that he was able to intercept voice and text conversations by impersonating another user to listen to their voice mails or make calls or send text messages. Even more troubling was that he was able to pull this off using a seven-year-old Motorola cellphone and decryption software available free off the Internet.[13]GSM was also mentioned in a Reuters story "Hackers say to publish emails stolen from Stratfor" onYahoo! News.[14]New attacks have been observed that take advantage of poor security implementations, architecture and development for smart phone applications. Some wiretapping and eavesdropping techniqueshijack[15]the audio input and output providing an opportunity for a 3rd party to listen in to the conversation. At present such attacks often come in the form of a Trojan, malware or a virus and might be detected by security software. GSM usesGeneral Packet Radio Service(GPRS) for data transmissions like browsing the web. The most commonly deployed GPRS andEDGEciphers were publicly broken in 2011, and the evidence indicates that they were once again intentionally left weak by the mobile industry designers.[16]The researchers revealed flaws in the commonly used GEA/1 and GEA/2 ciphers and published the open source "gprsdecode" software for sniffing GPRS/EDGE networks. They also noted that some carriers don't encrypt the data at all (i.e. using GEA/0) in order to detect the use of traffic or protocols they don't like, e.g.Skype, leaving their customers unprotected. GEA/3 seems to remain relatively hard to break and is said to be in use on some more modern networks. If used withUSIMto prevent connections to fake base stations and downgrade attacks, users will be protected in the medium term, though migration to 128-bit GEA/4 is still recommended.But since GEA/0, GEA/1 and GEA/2 are widely deployed, applications should use SSL/TLS for sensitive data, as they would onwi-finetworks. GSM open-source softwareSeveralopen-sourcesoftware projects exist that provide certain GSM features: gsmd daemon byOpenmoko OpenBTSdevelops aBase transceiver station The GSM Software Projectaims to build a GSM analyzer for less than $1000 OsmocomBBdevelopers intend to replace the proprietary baseband GSM stack with a free software implementation.Issues with patents and open sourcePatents remain a problem for any open-source GSM implementation, because it is not possible for GNU or any other free software distributor to guarantee immunity from all lawsuits by the patent holders against the users. Furthermore new features are being added to the standard all the time which means they have patent protection for a number of years.[citation needed]The original GSM implementations from 1991 are now entirely free of patent encumbrances and it is expected thatOpenBTSwill be able to implement features of that initial specification without limit and that as patents subsequently expire, those features can be added into the open source version. As of 2011, there have been no law suits against users of OpenBTS over GSM use.See also International Mobile Subscriber Identity(IMSI) MSISDNMobile Subscriber ISDN Number Handoff Visitors Location Register(VLR) Um interface GSM-R(GSM-Railway) GSM services Cell Broadcast GSM localization Multimedia Messaging Service(MMS) NITZNetwork Identity and Time Zone Wireless Application Protocol(WAP) Network simulationSimulation of GSM networks Standards Comparison of mobile phone standards GEO-Mobile Radio Interface Intelligent Network Parlay X RRLP Radio Resource Location Protocol GSM 03.48 Security mechanisms for the SIM application toolkit RTP audio video profile Enhanced Network Selection(ENS) Huawei SingleRAN:RANtechnology that allows migration from GSM toUMTSor simultaneous use of both.

LIQUID CRYSTAL DISPLAY:LCD stands for Liquid Crystal Display. LCD is finding wide spread use replacing LEDs (seven segment LEDs or other multi segment LEDs) because of the following reasons:1. The declining prices of LCDs.2. The ability to display numbers, characters and graphics. This is in contrast to LEDs, which are limited to numbers and a few characters.3. Incorporation of a refreshing controller into the LCD, thereby relieving the CPU of the task of refreshing the LCD. In contrast, the LED must be refreshed by the CPU to keep displaying the data.4. Ease of programming for characters and graphics.These components are specialized for being used with the microcontrollers, which means that they cannot be activated by standard IC circuits. They are used for writing different messages on a miniature LCD.

A model described here is for its low price and great possibilities most frequently used in practice. It is based on the HD44780 microcontroller (Hitachi) and can display messages in two lines with 16 characters each. It displays all the alphabets, Greek letters, punctuation marks, mathematical symbols etc. In addition, it is possible to display symbols that user makes up on its own. Automatic shifting message on display (shift left and right), appearance of the pointer, backlight etc. are considered as useful characteristics.Pins Functions

There are pins along one side of the small printed board used for connection to the microcontroller. There are total of 14 pins marked with numbers (16 in case the background light is built in). Their function is described in the table below:

FunctionPin NumberNameLogic StateDescription

Ground1Vss-0V

Power supply2Vdd-+5V

Contrast3Vee-0 - Vdd

Control of operating4RS01 D0 D7 are interpreted as commandsD0 D7 are interpreted as data

5R/W01 Write data (from controller to LCD)Read data (from LCD to controller)

6E01From 1 to 0 Access to LCD disabledNormal operatingData/commands are transferred to LCD

Data / commands7D00/1Bit 0 LSB

8D10/1Bit 1

9D20/1Bit 2

10D30/1Bit 3

11D40/1Bit 4

12D50/1Bit 5

13D60/1Bit 6

14D70/1Bit 7 MSB

LCD screen:LCD screen consists of two lines with 16 characters each. Each character consists of 5x7 dot matrix. Contrast on display depends on the power supply voltage and whether messages are displayed in one or two lines. For that reason, variable voltage 0-Vdd is applied on pin marked as Vee. Trimmer potentiometer is usually used for that purpose. Some versions of displays have built in backlight (blue or green diodes). When used during operating, a resistor for current limitation should be used (like with any LE diode).

LCD Basic Commands All data transferred to LCD through outputs D0-D7 will be interpreted as commands or as data, which depends on logic state on pin RS:RS = 1 - Bits D0 - D7 are addresses of characters that should be displayed. Built in processor addresses built in map of characters and displays corresponding symbols. Displaying position is determined by DDRAM address. This address is either previously defined or the address of previously transferred character is automatically incremented.RS = 0 - Bits D0 - D7 are commands which determine display mode. List of commands which LCD recognizes are given in the table below:

CommandRSRWD7D6D5D4D3D2D1D0Execution Time

Clear display00000000011.64mS

Cursor home000000001x1.64mS

Entry mode set00000001I/DS40uS

Display on/off control0000001DUB40uS

Cursor/Display Shift000001D/CR/Lxx40uS

Function set00001DLNFxx40uS

Set CGRAM address0001CGRAM address40uS

Set DDRAM address001DDRAM address40uS

Read BUSY flag (BF)01BFDDRAM address-

Write to CGRAM or DDRAM10D7D6D5D4D3D2D1D040uS

Read from CGRAM or DDRAM11D7D6D5D4D3D2D1D040uS

I/D 1 = Increment (by 1) R/L 1 = Shift right 0 = Decrement (by 1) 0 = Shift leftS 1 = Display shift on DL 1 = 8-bit interface 0 = Display shift off 0 = 4-bit interface D 1 = Display on N 1 = Display in two lines 0 = Display off 0 = Display in one line U 1 = Cursor on F 1 = Character format 5x10 dots 0 = Cursor off 0 = Character format 5x7 dotsB 1 = Cursor blink on D/C 1 = Display shift 0 = Cursor blink off 0 = Cursor shift

LCD Initialization:Once the power supply is turned on, LCD is automatically cleared. This process lasts for approximately 15mS. After that, display is ready to operate. The mode of operating is set by default. This means that:1. Display is cleared 2. Mode DL = 1 Communication through 8-bit interface N = 0 Messages are displayed in one line F = 0 Character font 5 x 8 dots 3. Display/Cursor on/off D = 0 Display off U = 0 Cursor off B = 0 Cursor blink off 4. Character entry ID = 1 Addresses on display are automatically incremented by 1 S = 0 Display shift off Automatic reset is mainly performed without any problems. Mainly but not always! If for any reason power supply voltage does not reach full value in the course of 10mS, display will start perform completely unpredictably. If voltage supply unit can not meet this condition or if it is needed to provide completely safe operating, the process of initialization by which a new reset enabling display to operate normally must be applied.Algorithm according to the initialization is being performed depends on whether connection to the microcontroller is through 4- or 8-bit interface. All left over to be done after that is to give basic commands and of course- to display messages.

Fig: Procedure on 8-bit initialization.

about SOFTWARE

Our projects completed on schedule. Keil development tools for the 8051 Microcontroller Architecture support every level of software developer from the professional applications engineer to the student just learning about embedded software development. The industry-standard Keil C Compilers, Macro Assemblers, Debuggers, Real-time Kernels, Single-board Computers, and Emulators support all 8051 derivatives and help you get.Simulation The Vision Simulator allows you to debug programs using only your PC using simulation drivers provided by Keil and various third-party developers. A good simulation environment, like Vision, does much more than simply simulate the instruction set of a microcontroller it simulates your entire target system including interrupts, start up code, on-chip peripherals, external signals, and I/O. This software is used for execution of microcontroller programs. Keil development tools for the MC architecture support every level of software developer from the professional applications engineer to the student just learning about embedded software development. The industry-standard keil C compilers, macro assemblers, debuggers, real, time Kernels, Single-board computers and emulators support all microcontroller derivatives and help you to get more projects completed on schedule. The keil software development tools are designed to solve the complex Problems facing embedded software developers. When starting a new project, simply select the microcontroller you the device database and the vision IDE sets all compiler, assembler, linker, and memory options for you. Numerous example programs are included to help you get started with the most popular embedded avr devices. The keil Vision debugger accurately simulates on-chip peripherals (PC,CAN,UART,SPI,Interrupts,I/Oports,A/D converter, D/A converter and PWM modules)of your avr device. Simulation helps you understand h/w configurations and avoids time wasted on setup problems. Additionally, with simulation, you can write and test applications before target h/w is available. When you are ready to begin testing your s/w application with target h/w,use the MON51, MON390, MONADI, or flash MON51 target monitors, the ISD51 In-System Debugger, or the ULINK USB-JTAG adapter to download and test program code on your target system

Click on the Keil uVision Icon on DeskTopThe following fig will appear

1. Click on the Project menu from the title barThen Click on New Project

2. Save the Project by typing suitable project name with no extension in u r own folder sited in either C:\ or D:\

Then Click on Save button above.3. Select the component for u r project. i.e. Atmel4. Click on the + Symbol beside of Atmel

5. Select AT89C52 as shown below

6. Then Click on OK7. The Following fig will appear

8. Then Click either YES or NOmostly NO9. Now your project is ready to USE10. Now double click on the Target1, you would get another option Source group 1 as shown in next page.

11. Click on the file option from menu bar and select new

12. The next screen will be as shown in next page, and just maximize it by double clicking on its blue boarder.

13. Now start writing program in either in C or ASM14. For a program written in Assembly, then save it with extension . asm and for C based program save it with extension .C

15. Now right click on Source group 1 and click on Add files to Group Source

16. Now you will get another window, on which by default C files will appear.

17. Now select as per your file extension given while saving the file18. Click only one time on option ADD19. Now Press function key F7 to compile. Any error will appear if so happen.

20. If the file contains no error, then press Control+F5 simultaneously.21. The new window is as follows

22. Then Click OK23. Now Click on the Peripherals from menu bar, and check your required port as shown in fig below

24. Drag the port a side and click in the program file.

25. Now keep Pressing function key F11 slowly and observe.You are running your program successfully

Advantages: Low cost, Automated system reduce the burden and saves time. Highly secured system