Generator-Transformer Unit Protection Instruction Manual(EN_YJBH2011.0091.1101)

RCS-985A Generator-Transformer Unit Protection

Instruction Manual

Nanjing Nari-Relays Electric Co., Ltd.

RCS-985A Generator transformer unit protection

NANJING NARI-RELAYS ELECTRIC CO., LTD i

Preface Before using this product, please read this chapter carefully.

This chapter describes the safety precautions recommended when using the equipment. Before installing and using the equipment, this chapter must be thoroughly read and understood.

Instructions and Warnings

The following indicators and standard definitions are used:

DANGER means that death, severe personal injury, or considerable equipment

damage will occur if safety precautions are disregarded.

WARNING means that death, severe personal injury, or considerable equipment

damage could occur if safety precautions are disregarded.

CAUTION means the light personal injury or equipment damage may occur if

safety precautions are disregarded. This particularly applies to damage to the device and to resulting damage of the protected equipment.

WARNING! The firmware may be upgraded to add new features or enhance/modify existing features, please make sure that the version of this manual is compatible with the product in your hand.

During operation of electrical equipment, certain parts of these devices are under high voltage. Severe personal injury or significant equipment damage could result from improper behavior.

Only qualified personnel should work on this equipment or in the vicinity of this equipment. These personnel must be familiar with all warnings and service procedures described in this manual, as well as safety regulations.

In particular, the general facility and safety regulations for work with high-voltage equipment must be observed. Noncompliance may result in death, injury, or significant equipment damage.

DANGER!

Never allow the current transformer (CT) secondary circuit connected to this equipment to be opened while the primary system is live. Opening the CT circuit will produce a dangerously high voltage.

WARNING!


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l Exposed terminals

Do not touch the exposed terminals of this equipment while the power is on, as the high voltage generated is dangerous.

l Residual voltage

Hazardous voltage can be present in the DC circuit just after switching off the DC power supply. It takes a few seconds for the voltage to discharge.

CAUTION! l Earth

The earthing terminal of the equipment must be securely earthed

l Operating environment

The equipment must only be used within the range of ambient environment detailed in the specification and in an environment free of abnormal vibration.

l Ratings

Before applying AC voltage and current or the DC power supply to the equipment, check that they conform to the equipment ratings.

l Printed circuit board

Do not attach and remove printed circuit boards when DC power to the equipment is on, as this may cause the equipment to malfunction.

l External circuit

When connecting the output contacts of the equipment to an external circuit, carefully check the supply voltage used in order to prevent the connected circuit from overheating.

l Connection cable

Carefully handle the connection cable without applying excessive force.

Copyright Version: RCS-985A3YD V3.12 T060707 Manual: V1.0 P/N: EN_YJBH2011.0091.1101 Copyright © NR 2006. All rights reserved We reserve all rights to this document and to the information contained herein. Improper use in particular reproduction and dissemination to third parties is strictly forbidden except where expressly authorized. The information in this manual is carefully checked periodically, and necessary corrections will be included in future editions. If the user nevertheless detects any errors, he is appreciated any suggested correction or improvement. We reserve the rights to make technical improvements without notice.

NANJING NARI-RELAYS ELECTRIC CO., LTD. 99 Shengtai Rd. Jiangning, Nanjing 211106，China Tel: 86-25-52127776, Fax: 86-25-52127841 Website: www.nari-relays.com Email: [email protected]

http://www.nari-relays.com

mailto:[email protected]


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Table of contents Preface .............................................................................................................................................. i

Table of contents........................................................................................................................... iii

Chapter 1 Introduction ................................................................................................................... 1

1.1 Application............................................................................................................................... 1 1.1.1 Typical applications.......................................................................................................... 1 1.1.2 Constitution of the scheme............................................................................................... 3

1.2 Functions................................................................................................................................. 5 1.3 Features .................................................................................................................................. 8

1.3.1 High performance hardware............................................................................................. 8 1.3.2 New philosophy used in RCS-985A................................................................................. 9 1.3.3 Intellectuality................................................................................................................... 12

Chapter 2 Technical Data............................................................................................................. 13

2.1 Atmospheric Environment tests ............................................................................................ 13 2.2 Electrical Specifications ........................................................................................................ 13

2.2.1 Analog input ratings........................................................................................................ 13 2.2.2 Power Supply ................................................................................................................. 14 2.2.3 Binary input..................................................................................................................... 14 2.2.4 Binary Output ................................................................................................................. 14 2.2.5 Power supply output for Optical isolators....................................................................... 15

2.3 Mechanical Specifications..................................................................................................... 15 2.4 Rear Communication Port..................................................................................................... 15 2.5 Terminals .............................................................................................................................. 16 2.6 Type tests.............................................................................................................................. 17

2.6.1 Environmental tests........................................................................................................ 17 2.6.2 Mechanical tests............................................................................................................. 17 2.6.3 Electrical tests ................................................................................................................ 17 2.6.4 Electromagnetic compatibility......................................................................................... 17

2.7 Certifications ......................................................................................................................... 19 2.8 Protective functions............................................................................................................... 19

2.8.1 Accurate operating scope .............................................................................................. 19 2.8.2 General error of analog input metering.......................................................................... 19 2.8.3 Generator-transformer unit differential protection, main transformer differential protection................................................................................................................................. 19 2.8.4 Generator differential protection, split phase transverse differential protection and differential protection of exciter ............................................................................................... 20 2.8.5 Stepdown transformer and excitation transformer differential protection...................... 21 2.8.6 High sensitive transverse differential protection ............................................................ 21 2.8.7 Longitudinal zero sequence voltage protection for turn-to-turn fault ............................. 22 2.8.8 Earth fault protection of stator ........................................................................................ 22 2.8.9 Earth fault protection of rotor.......................................................................................... 22


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2.8.10 Overload protection of stator........................................................................................ 23 2.8.11 Negative sequence overload protection....................................................................... 23 2.8.12 Overload protection of excitation winding (AC quantity) .............................................. 23 2.8.13 Overload protection of excitation winding (DC quantity).............................................. 23 2.8.14 Loss of excitation protection of generator .................................................................... 24 2.8.15 Out-of-step protection of generator.............................................................................. 24 2.8.16 Voltage protection of generator.................................................................................... 24 2.8.17 Over excitation protection ............................................................................................ 25 2.8.18 Power protection of generator...................................................................................... 25 2.8.19 Frequency protection of generator............................................................................... 25 2.8.20 Accident energization protection of generator ............................................................. 25 2.8.21 Startup/shutdown protection of generator.................................................................... 26 2.8.22 Low impedance protection ........................................................................................... 26 2.8.23 Voltage controlled directional overcurrent protection .................................................. 26 2.8.24 Directional zero sequence overcurrent protection ....................................................... 26 2.8.25 Gap protection.............................................................................................................. 26 2.8.26 Pole disagreement protection ...................................................................................... 27 2.8.27 Mechanical protection .................................................................................................. 27 2.8.28 Measurements and Recording Facilities...................................................................... 27

Chapter 3 Description of Operation Theory .............................................................................. 29

3.1 Software Structure ................................................................................................................ 29 3.2 Fault detectors ...................................................................................................................... 29

3.2.1 Using fault detector improves the security of tripping.................................................... 29 3.2.2 Differential protection of generator-transformer unit and main transformer .................. 30 3.2.3 Backup protection of main transformer.......................................................................... 31 3.2.4 Differential protection of stepdown transformer............................................................. 32 3.2.5 Backup protection of stepdown transformer .................................................................. 32 3.2.6 Fault detector of differential protection, phase-splitting transverse differential protection of generator ............................................................................................................................. 33 3.2.7 Interturn fault protection of generator............................................................................. 34 3.2.8 Earth fault protection of stator of generator ................................................................... 34 3.2.9 Generator rotor earth fault protection............................................................................. 35 3.2.10 Generator stator overload protection ........................................................................... 35 3.2.11 Negative sequence overcurrent protection of generator ............................................. 35 3.2.12 Generator loss-of-excitation protection........................................................................ 35 3.2.13 Generator out-of-step protection.................................................................................. 35 3.2.14 Generator overvoltage protection ................................................................................ 35 3.2.15 Generator over excitation protection............................................................................ 36 3.2.16 Generator reverse power protection ............................................................................ 36 3.2.17 Generator frequency protection ................................................................................... 36 3.2.18 Generator accident energization protection................................................................. 36 3.2.19 Startup and shutdown protection of generator............................................................. 36 3.2.20 Differential and overcurrent protection of excitation transformer or exciter................. 36


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3.2.21 Overload protection of exciter winding......................................................................... 37 3.2.22 Mechanical protection .................................................................................................. 37

3.3 Theory of protective elements .............................................................................................. 37 3.3.1 Preparation knowledge of transformer........................................................................... 37 3.3.2 Preparation knowledge of generator.............................................................................. 39 3.3.3 Differential protection of generator-transformer unit, main transformer, stepdown transformer and excitation transformer ................................................................................... 40 3.3.4 Differential protection, phase-splitting transverse differential protection of generator and differential protection of exciter ............................................................................................... 48 3.3.5 DPFC Current Differential Element................................................................................ 51 3.3.6 Restrict earth fault protection of main transformer or stepdown transformer (REF) ..... 53 3.3.7 Backup protection of main transformer.......................................................................... 57 3.3.8 Interturn fault protection of generator............................................................................. 63 3.3.9 Backup protection of generator ...................................................................................... 67 3.3.10 Earth fault protection of stator ...................................................................................... 70 3.3.11 Earth fault protection of rotor........................................................................................ 74 3.3.12 Generator stator overload protection ........................................................................... 75 3.3.13 Negative sequence overload protection....................................................................... 77 3.3.14 Loss-of-Excitation protection........................................................................................ 79 3.3.15 Out-of-step protection .................................................................................................. 83 3.3.16 Voltage protection ........................................................................................................ 84 3.3.17 Overexcitation protection ............................................................................................. 85 3.3.18 Power protection .......................................................................................................... 86 3.3.19 Frequency protection ................................................................................................... 88 3.3.20 Accidental energization protection ............................................................................... 88 3.3.21 Generator startup and shutdown protection ................................................................ 90 3.3.22 Excitation winding overload protection......................................................................... 91 3.3.23 Excitation transformer and exciter protection .............................................................. 93 3.3.24 Stepdown transformer backup protection .................................................................... 95 3.3.25 Pole Disagreement Protection ..................................................................................... 96 3.3.26 CT circuit failure alarm ................................................................................................. 98 3.3.27 VT circuit failure alarm ............................................................................................... 100 3.3.28 Mechanical protection ................................................................................................ 100

Chapter 4 Self-supervision, measurements and records ...................................................... 103

4.1 Self-supervision................................................................................................................... 103 4.1.1 Start-up self-testing ...................................................................................................... 103 4.1.2 Continuous self-testing................................................................................................. 104 4.1.3 List of alarm messages ................................................................................................ 105

4.2 Metering .............................................................................................................................. 112 4.2.1 Measured voltages and currents.................................................................................. 112 4.2.2 Sequence voltages and currents ................................................................................. 112 4.2.3 Rms. voltages and currents ......................................................................................... 113 4.2.4 Differential current and relevant quantities .................................................................. 113


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4.2.5 Phase angles................................................................................................................ 113 4.2.6 Measurement display quantities .................................................................................. 113 4.2.7 All metering data displayed on LCD............................................................................. 113

4.3 Signaling ............................................................................................................................. 128 4.3.1 Enabling binary inputs of transformer .......................................................................... 129 4.3.2 Enabling binary inputs of generator ............................................................................. 129 4.3.3 Enabling binary inputs of excitation and stepdown transformer protection ................. 130 4.3.4 Binary inputs of mechanical protection ........................................................................ 131 4.3.5 Auxiliary binary input .................................................................................................... 132 4.3.6 Fault detector flag generated internal by MON............................................................ 133 4.3.7 Other Binary Inputs ...................................................................................................... 134

4.4 Event & fault records........................................................................................................... 134 4.4.1 Introduction................................................................................................................... 134 4.4.2 Event & Fault records................................................................................................... 135 4.4.3 Type of event................................................................................................................ 135 4.4.4 Change of state of binary inputs .................................................................................. 135 4.4.5 Relay alarm conditions................................................................................................. 137 4.4.6 Protection element pickup and trips............................................................................. 139 4.4.7 Viewing event records via DBG-2000 support software.............................................. 141

4.5 Disturbance Record ............................................................................................................ 141 4.6 Time Synchronization ......................................................................................................... 142

Chapter 5 Hardware Description............................................................................................... 143

5.1 Hardware overview ............................................................................................................. 143 5.1.1 Front view..................................................................................................................... 143 5.1.2 Rear view...................................................................................................................... 145 5.1.3 Functional block diagram of RCS-985A....................................................................... 146

5.2 Standard connectors and terminals.................................................................................... 147 5.2.1 General description ...................................................................................................... 147 5.2.2 Pins definition of ‘1A’ connectors. ................................................................................ 147 5.2.3 Pins definition of ‘1B’ connectors ................................................................................. 148 5.2.4 Pins definition of ‘2A’ connectors ................................................................................. 149 5.2.5 Pins definition of ‘2B’ connectors ................................................................................. 150 5.2.6 Pins definition of ‘3A’ connectors ................................................................................. 151 5.2.7 Pins definition of ‘3B’ connectors ................................................................................. 152 5.2.8 Pins definition of ‘4A’ connectors ................................................................................. 153 5.2.9 Pins definition of ‘4B’ connectors ................................................................................. 154 5.2.10 Pins definition of ‘5A’ connectors ............................................................................... 156 5.2.11 Pins definition of ‘5B’ connectors ............................................................................... 157 5.2.12 Pins definition of ‘6B’ connectors ............................................................................... 158 5.2.13 Pins definition of ‘7B’, ‘8B’ connectors ....................................................................... 159 5.2.14 Pins definition of ‘9B’ connectors ............................................................................... 160 5.2.15 Pins definition of ‘9C’ connectors............................................................................... 161 5.2.16 Pins definition of ‘10B’ connectors ............................................................................. 162


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5.2.17 Pins definition of ‘10C’ connectors............................................................................. 163 5.2.18 Pins definition of ‘11B’ connectors ............................................................................. 163 5.2.19 Pins definition of ‘11C’ connectors............................................................................. 164 5.2.20 Pins definition of ‘12B’ connectors ............................................................................. 165 5.2.21 Pins definition of ‘12C’ connectors............................................................................. 166

5.3 Output.................................................................................................................................. 167 5.3.1 Tripping outputs............................................................................................................ 167 5.3.2 Signaling outputs.......................................................................................................... 168 5.3.3 Alarming outputs .......................................................................................................... 170 5.3.4 Other outputs................................................................................................................ 171

Chapter 6 Software Overview.................................................................................................... 173

6.1 Software Overview.............................................................................................................. 173 6.2 System services software ................................................................................................... 173 6.3 Platform software ................................................................................................................ 174

6.3.1 Record logging ............................................................................................................. 174 6.3.2 Settings database......................................................................................................... 174 6.3.3 Database interface ....................................................................................................... 174 6.3.4 Protection and control software.................................................................................... 174

6.4 Software downloading......................................................................................................... 177

Chapter 7 Settings...................................................................................................................... 183

7.1 Equipment parameters........................................................................................................ 183 7.1.1 Setting list ..................................................................................................................... 183 7.1.2 Setting instruction of the parameters ........................................................................... 183 7.1.3 Setting path .................................................................................................................. 185

7.2 System Settings .................................................................................................................. 185 7.2.1 Logic settings of configuring functions......................................................................... 185 7.2.2 Transformer system parameters.................................................................................. 189 7.2.3 Generator system parameters ..................................................................................... 191 7.2.4 Stepdown transformer system parameters.................................................................. 194 7.2.5 System parameters of excitation transformer or exciter .............................................. 196 7.2.6 Implicit configuration settings....................................................................................... 198

7.3 Protection Settings.............................................................................................................. 205 7.3.1 Settings of differential protection of generator-transformer unit .................................. 205 7.3.2 Settings of differential protection of main transformer ................................................. 207 7.3.3 Settings of phase to phase fault protection of main transformer ................................. 211 7.3.4 Settings of earth fault protection of main transformer.................................................. 217 7.3.5 Settings of over excitation protection of main transformer .......................................... 224 7.3.6 Settings of differential protection of generator ............................................................. 227 7.3.7 Settings of splitting-phase transverse differential protection of generator .................. 230 7.3.8 Settings of turn-to-turn fault protection of generator .................................................... 231 7.3.9 Settings of phase to phase fault backup protection of generator ................................ 234 7.3.10 Settings of earth fault protection of stator windings................................................... 238 7.3.11 Settings of earth fault protection of rotor.................................................................... 241


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7.3.12 Settings of thermal overload protection of stator ....................................................... 243 7.3.13 Settings of negative sequence overload protection of stator..................................... 245 7.3.14 Settings of Loss-of-Excitation protection of generator............................................... 248 7.3.15 Settings of out-of-step protection of generator .......................................................... 254 7.3.16 Settings of voltage protection..................................................................................... 257 7.3.17 Settings of overexcitation protection of generator ..................................................... 258 7.3.18 Settings of power protection of generator.................................................................. 261 7.3.19 Settings of underfrequency and overfrequency protection of generator ................... 263 7.3.20 Settings of startup and shutdown protection of generator......................................... 266 7.3.21 Settings of accidental energization protection of generator....................................... 268 7.3.22 Settings of differential protection of excitation transformer or exciter........................ 270 7.3.23 Settings of backup protection of excitation transformer or exciter............................. 271 7.3.24 Settings of overload protection of excitation .............................................................. 273 7.3.25 Settings of differential protection of stepdown transformer ....................................... 275 7.3.26 Settings of backup protection at HVS of stepdown transformer................................ 276 7.3.27 Settings of backup protection at LVS of stepdown transformer ................................ 279 7.3.28 Settings of restrict earth fault protection of stepdown transformer............................ 281 7.3.29 Settings of mechanical protection .............................................................................. 282 7.3.30 Settings of pole disagreement protection of circuit breaker....................................... 284

7.4 Calculated parameters........................................................................................................ 285 7.4.1 Calculated parameters of primary rated current .......................................................... 285 7.4.2 Calculated parameters of secondary rated current...................................................... 286 7.4.3 Calculated parameters of secondary rated voltage ..................................................... 288 7.4.4 Calculated parameters of differential coefficient.......................................................... 290

Chapter 8 Human Machine Interface ........................................................................................ 293

8.1 User interfaces and menu structure.................................................................................... 293 8.2 Introduction to the relay ...................................................................................................... 293

8.2.1 Front panel ................................................................................................................... 293 8.2.2 LCD .............................................................................................................................. 295 8.2.3 LED indications ............................................................................................................ 312 8.2.4 Keypad ......................................................................................................................... 313 8.2.5 Menu............................................................................................................................. 314 8.2.6 Operation instruction of Menu...................................................................................... 316

Chapter 9 Communications....................................................................................................... 339

9.1 Introduction ......................................................................................................................... 339 9.2 Rear communication port of EIA(RS)485 ........................................................................... 339

9.2.1 Rear communication port EIA(RS)485 interface.......................................................... 339 9.2.2 EIA(RS)485 bus ........................................................................................................... 340 9.2.3 Bus termination ............................................................................................................ 340 9.2.4 Bus connections & topologies...................................................................................... 340

9.3 IEC60870-5-103 communication ........................................................................................ 341 9.3.1 Overview of IEC60870-5-103....................................................................................... 341 9.3.2 Messages description in IEC60870-5-103 protocol type ............................................. 341


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9.4 MODBUS protocol .............................................................................................................. 348 9.4.1 Overview....................................................................................................................... 348 9.4.2 Fetch real time status (Binary) ..................................................................................... 349 9.4.3 Fetch metering values of equipment............................................................................ 358 9.4.4 Fetch settings value of equipment ............................................................................... 365 9.4.5 Diagnostics (Function Code: 08H) ............................................................................... 383 9.4.6 Exception Responses .................................................................................................. 384

9.5 EIA(RS)232 Interface.......................................................................................................... 384 9.6 Communication with printer ................................................................................................ 385 9.7 Communication with External GPS pulse Source .............................................................. 385

Chapter 10 Installation ............................................................................................................... 387

10.1 Receipt of Relays.............................................................................................................. 387 10.2 Handling of Electronic Equipment..................................................................................... 387 10.3 Storage.............................................................................................................................. 388 10.4 Unpacking ......................................................................................................................... 388 10.5 Relay Mounting ................................................................................................................. 388

10.5.1 Rack Mounting ........................................................................................................... 388 10.5.2 Panel mounting .......................................................................................................... 390

10.6 RELAY WIRING................................................................................................................ 391 10.6.1 Medium and heavy duty terminal block connections ................................................. 391 10.6.2 EIA (RS) 485 port ....................................................................................................... 392 10.6.3 IRIG-B connections (if applicable) ............................................................................. 392 10.6.4 EIA(RS)232 front port of downloading/monitoring ..................................................... 392 10.6.5 Ethernet port (if applicable)........................................................................................ 392 10.6.6 Test port ..................................................................................................................... 393 10.6.7 Earth connection ........................................................................................................ 393

Chapter 11 Commission ............................................................................................................ 395

11.1 Introduction ....................................................................................................................... 395 11.2 Precautions ....................................................................................................................... 395 11.3 Relay commission tools .................................................................................................... 396 11.4 Setting Familiarization....................................................................................................... 396 11.5 Product checks.................................................................................................................. 397

11.5.1 With the relay de-energized ....................................................................................... 397 11.5.2 With the relay energized ............................................................................................ 400 11.5.3 Setting Testing ........................................................................................................... 409 11.5.4 Rear communications port EIA(RS) 485.................................................................... 410 11.5.5 On-load checks .......................................................................................................... 410 11.5.6 Final check ................................................................................................................. 411

11.6 Use of assistant test software DBG-2000......................................................................... 411 11.6.1 Function summary of DBG-2000 communication software ....................................... 411 11.6.2 Connection way of protection equipment and personal computer ............................ 412 11.6.3 Configuration of PC and the software before use...................................................... 412 11.6.4 Operation instruction of the software ......................................................................... 413


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Chapter 12 Maintenance ............................................................................................................ 415

12.1 Maintenance period .......................................................................................................... 415 12.2 Maintenance checks ......................................................................................................... 415

12.2.1 Alarms ........................................................................................................................ 415 12.2.2 Binary Inputs .............................................................................................................. 415 12.2.3 Binary output .............................................................................................................. 415 12.2.4 Analog inputs.............................................................................................................. 415

12.3 Method of Repair .............................................................................................................. 415 12.3.1 Replacing the complete relay..................................................................................... 416 12.3.2 Replacing a PCB........................................................................................................ 416

12.4 Changing the relay battery................................................................................................ 417 12.4.1 Instructions for replacing the battery.......................................................................... 417 12.4.2 Battery disposal.......................................................................................................... 418

12.5 Cleaning ............................................................................................................................ 418

Chapter 13 Ordering Form......................................................................................................... 419

13.1 Loose equipment .............................................................................................................. 419 13.2 Panel installed................................................................................................................... 420

Chapter 14 Firmware and service manual version history .................................................... 421

Chapter 15 ANNEX...................................................................................................................... 423

15.1 Appendix A: Settings Sheet .............................................................................................. 423 15.1.1 Equipment parameters............................................................................................... 423 15.1.2 Logic settings of configuring functions....................................................................... 423 15.1.3 Transformer system parameters................................................................................ 424 15.1.4 Generator system parameters ................................................................................... 425 15.1.5 Stepdown transformer system parameters................................................................ 425 15.1.6 System parameters of excitation transformer or exciter ............................................ 426 15.1.7 Implicit configuration settings..................................................................................... 427 15.1.8 Settings of differential protection of generato-transformer unit ................................. 427 15.1.9 Settings of differential protection of main transformer ............................................... 427 15.1.10 Settings of phase to phase fault protection of main transformer............................. 428 15.1.11 Settings of earth fault protection of main transformer.............................................. 429 15.1.12 Settings of over excitation protection of main transformer ...................................... 430 15.1.13 Settings of differential protection of generator ......................................................... 431 15.1.14 Settings of splitting-phase transverse differential protection of generator .............. 431 15.1.15 Settings of turn-to-turn fault protection of generator................................................ 431 15.1.16 Settings of phase to phase fault backup protection of generator ............................ 432 15.1.17 Settings of earth fault protection of stator windings................................................. 432 15.1.18 Settings of earth fault protection of rotor.................................................................. 433 15.1.19 Settings of thermal overload protection of stator ..................................................... 433 15.1.20 Settings of negative sequence overload protection of stator................................... 434 15.1.21 Settings of Loss-of-Excitation protection of generator............................................. 434 15.1.22 Settings of out-of-step protection of generator ........................................................ 435


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15.1.23 Settings of voltage protection................................................................................... 435 15.1.24 Settings of overexcitation protection of generator ................................................... 435 15.1.25 Settings of power protection of generator................................................................ 436 15.1.26 Settings of underfrequency and overfrequency protection of generator ................. 436 15.1.27 Settings of startup and shutdown protection of generator....................................... 437 15.1.28 Settings of accidental energization protection of generator..................................... 438 15.1.29 Settings of differential protection of excitation transformer or exciter...................... 438 15.1.30 Settings of backup protection of excitation transformer or exciter........................... 438 15.1.31 Settings of overload protection of excitation ............................................................ 439 15.1.32 Settings of differential protection of stepdown transformer ..................................... 439 15.1.33 Settings of backup protection at HVS of stepdown transformer.............................. 440 15.1.34 Settings of backup protection at LVS of stepdown transformer .............................. 440 15.1.35 Settings of restrict earth fault protection of stepdown transformer.......................... 441 15.1.36 Settings of mechnical protection .............................................................................. 441 15.1.37 Settings of pole disagreement protection of circuit breaker .................................... 442 15.1.38 Calculated parameters of primary rated current ...................................................... 442 15.1.39 Calculated parameters of secondary rated current ................................................. 442 15.1.40 Calculated parameters of secondary rated voltage ................................................. 443 15.1.41 Calculated parameters of differential coefficient...................................................... 443

15.2 Appendix B: DBG2000 for RCS-985 (User Version) ........................................................ 444 15.2.1 General....................................................................................................................... 444 15.2.2 Menu bar .................................................................................................................... 445 15.2.3 Tool bar ...................................................................................................................... 447 15.2.4 Report......................................................................................................................... 453 15.2.5 Trip Tests.................................................................................................................... 454

Chapter 1 Instroduction

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Chapter 1 Introduction 1.1 Application RCS-985A is a kind of microprocessor based generator-transformer unit protection relay integrated main and backup protection. It provides complete electrical protection for large-sized generators-transformer unit of various types, which usually comprise generator, main transformer, stepdown transformer and exciter or excitation transformer. It also can meet the requirements of power plant automation.

RCS-985A suits connection of generator-transformer unit with stepdown transformer: two-winding main transformer (220 kV or 500 kV), generator with capacity 100 MW or above, one stepdown transformers with at most three windings or one winding-split stepdown transformer and excitation transformer or exciter.

For a large generator-transformer unit, two sets of RCS-985As can be used and then main protection, abnormal operation condition protection and backup protection can be duplicated. Operating circuits and mechanical protection equipment (RCS-974 series) are installed on a separated panel. Independent CT groups are used by these two RCS-985As while main and backup protection elements in a RCS-985A share one CT group. Outputs of the protection correspond to independent trip coils. Therefore, the following features can be achieved:

Ø Clear design and arrangement of the secondary circuits;

Ø Convenient, reliable and secure for operation of equipment and requirements of accident prevention;

Ø Convenient for configuration, testing and maintenance.

RCS-985A relay is suited to be flush mounted into a control panel. Figure 1-1 and Figure 1-2 show typical applications of RCS-985A.

1.1.1 Typical applications

Figure 1-1 or Figure 1-2 typical protection configuration schemes consist of three protection panels, in which panels A and B comprises separately one set of electrical protection of generator-transformer unit (RCS-985A). Different groups of CT are used for them respectively. Panel C (RCS-974 series) comprises mechanical protection as well as pole disagreement protection, circuit breaker failure initiation and circuit breaker interposing relay set if needed. In the figure, polarity mark is marked out for panel A, which is available for panel B.

RCS-985A can be suited for the scheme in which exciter is replaced by excitation transformer without any modification on protection software or hardware.



Figure 1-1 Typical application scheme 1 of RCS-985A



220kV

RCS-985A

Panel A

CZX-12

Panel C

RCS-974ARCS-985A

Panel B

Busbar VT

Main transformer

Stepdowntransformer

Excitation transformer

Gennerator

VT1

VT2

VT3

Figure 1-2 Typical application scheme 2 of RCS-985A

1.1.2 Constitution of the scheme

1.1.2.1 Differential protection

Scheme1: For a large-sized generator-transformer unit with capacity over 300MW, panel A and B are both equipped with differential protection of generator-transformer unit, main transformer, generator and stepdown transformer. Usually, the whole stepdown transformer is included in the overall generator-transformer differential protection zone. However, user can decide whether or not the stepdown transformer is included in overall differential protection by configuring the CT used in overall differential protection.

Scheme2: For a large-sized generator-transformer unit with capacity between 100MW and 300MW, panel A and B are both equipped with differential protection of main transformer, generator and stepdown transformer.

For differential protection of generator-transformer unit, main transformer and stepdown



transformer, there are two kinds of discrimination principle for inrush current: secondary harmonic discrimination and waveform discrimination. It is recommended that one set of RCS-985A adopts secondary harmonic discrimination and the other one adopts waveform discrimination.

In RCS-985A, two kinds of percentage differential protection (variable slope percentage differential protection and DPFC percentage differential protection) are equipped to get high performance not only in speed but also in security.

1.1.2.2 Backup protection

Panel A and B are equipped with complete set of backup protection of generator respectively and use two groups of independent CTs.

(1) For zero sequence overcurrent protection, if there is only one group of zero sequence CT, it can be connected to panel A. While panel B can adopt calculated zero sequence current from bushing CTs. Protection zone of these two kinds of zero sequence current protection are different with each other. Their settings shall be calculated separately.

(2) As to earth fault protection of rotor, two sets of such protection cannot work simultaneously otherwise influence between them will appear. Only one set of earth fault protection of rotor can be enabled during operation. If the other set will be switched over sometimes, this one shall be disabled firstly.

1.1.2.3 20HZ voltage-injecting earth fault protection for stator

If 20Hz voltage-injecting earth fault protection for stator is considered, special facilities should be equipped, such as 20Hz power supply source, filter, inter current transformer, shunt resistance, load resistance, and so on. All these auxiliary facilities can be integrated into one additional panel.

1.1.2.4 Current transformer

(1) Panels A and B adopt different groups of CTs.

(2) Main protection and backup protection adopt one group of CT.

(3) Currents at the terminal of generator are included in generator and main transformer differential protection. Therefore, these two kinds of differential protection can use one common group of CT at terminal of generator without any influence. In fact, two groups of CT input channels are provided in RCS-985A. One of them is reserved for special case.

(4) Current sampled at HV side of stepdown transformer is included both in differential protection of main transformer and in differential protection of stepdown transformer. Since capacities of these two transformers are different to each other significantly, in order to ensure performance of differential protection, it is better to adopt two groups of CT for them. One CT with big ratio is prepared for differential protection of main transformer, and the other with small ratio is for differential protection of stepdown transformer. However, if there is only one group of CT can be used for them, it is also possible if make related configuration by software.

(5) On 220 kV side, there shall be one group of CT to be adopted dedicatedly for circuit breaker failure protection and pole disagreement protection.



1.1.2.5 Voltage transformer

(1) Panel A and B shall adopt different VTs or their different windings if possible.

(2) For turn-to-turn fault protection of generator, in order to prevent unwanted operation due to VT circuit failure on HV side used dedicatedly for this protection, one set of protection shall adopt two groups of VT. However, if we consider adopting only independent VT windings, too much VTs will be installed at generator terminal. It is not reasonable. So it is recommended to equip three VTs at generator terminal, named VT1, VT2 and VT3. Panel A adopts voltage from VT1 and VT3 while panel B from VT2 and VT3. During normal operation, panel A adopts VT1 and panel B adopts VT2 while VT3 is as a backup VT to both of them. If circuit of VT1 or VT2 fails, VT3 will be switched over automatically by software.

(3) For zero sequence voltage, there are no two independent windings adopted by two sets of protection equipments simultaneously in general. So the only one zero sequence voltage can be used by two panels.

1.1.2.6 Circuit Breaker Failure Initiation

Circuit breaker failure initiation is very important to power plant. In general, generator protection tripping contact is an essential condition to circuit breaker failure initiation. Considering importance of such protection, it is recommended to realize it as follows:

(1) Only one set of circuit breaker failure initiation shall be equipped.

(2) In order to make it more reliable, circuit breaker failure initiation function can’t be integrated into one equipment with electrical protection relays.

1.2 Functions

Table 1-1 Protective functions for generator

No. Protection function overview for generator IEEE

1. Current differential protection 87G

2. Unrestrained instantaneous differential protection 87UG

3. DPFC current differential protection 87G

4. Spilt-phase transverse differential protection 87G

5. High sensitive transverse differential protection 87G

6. Longitudinal zero sequence overvoltage protection for turn-to-turn fault 59N/60

7. DPFC directional protection for turn-to-turn fault 7/67

8. Two stages phase-to-phase impedance protection 21G

9. Voltage controlled overcurrent protection 51V

10. Fundamental zero sequence overvoltage protection for stator earth fault 64G1



No. Protection function overview for generator IEEE

11. Third harmonic protection for stator earth fault 27/59TN, 64G2

12. Two stages of one-point-earth fault protection of rotor 64R

13. Two-point earth fault protection of rotor 64R

14. Definite and inverse time stator thermal overload protection 49S

15. Definite and inverse time negative sequence overload protection of rotor

46/50, 46/51, 49R

16. Loss-of-excitation protection 40

17. Out-of-step protection 68/78

18. Two stages phase-to-phase overvoltage protection 59G

19. Phase-to-phase undervoltage protection 27G

20. Two stages definite time over-excitation protection 24

21. Inverse time over-excitation protection 24

22. Reverse power protection 32G

23. Sequent-tripping reverse power protection 32G

24. Four stages underfrequency protection 81G

25. Two stages overfrequency protection 81O

26. Startup/shutdown protection of generator

27. Accidental energization protection 50/27

28. Voltage balance function 60

29. Voltage transformer supervision 47,60G

30. Current transformer supervision 50/74

Table 1-2 Protective functions for excitation

No. Protection function overview for excitation IEEE

1. Current differential protection for excitation transformer 87T

2. Current differential protection of AC exciter 87G

3. Overcurrent protection 50P/51P

4. Definite and inverse time thermal overload protection for exciting windings

87G



No. Protection function overview for excitation IEEE

5. Current transformer supervision of excitation set 50/74

Table 1-3 Protective functions for main transformer

No. Protection function overview for main transformer IEEE

1. Generator-transformer unit current differential protection 87GT

2. Transformer current differential protection 87T

3. Unrestrained differential protection 50/87UT

4. DPFC current differential protection 87T

5. Impedance protection at HV side 21T

6. Voltage controlled overcurrent protection at HV side 50P/ 51P

7. Voltage controlled zero-sequence overcurrent protection at HV side 50N/ 51N

8. Voltage controlled directional zero-sequence overcurrent protection at HV side 67N

9. Zero-sequence overvoltage protection at HV side (Gap overvoltage) 59N

10. Zero-sequence overcurrent protection at HV side (Gap overcurrent) 50N/51N

11. Overexcitation protection 24

12. Thermal overload protection 49

13. Cooling initiation function 49

14. Zero-sequence voltage alarm of branches at LV side 59G

15. Pole disagreement function 92PD

16. VT circuit failure supervision

17. CT circuit failure supervision

18. CT saturation detection

Table 1-4 Other functions of RCS-985A

Other functions overview

Automatic self-supervision Relay hardware supervision and secondary circuit supervision

Metering 24 samples per cycle

Fault recording CPU module 32 latest fault reports, 8 latest fault waveforms



Other functions overview

MON module 4 or 8 seconds continuous oscillogram function for latest fault

self-supervision report 32 latest abnormality reports Event recording

binary input chang report 32 latest binary status input change reports

Present recording One normal operating waveform triggered manually

Loacal HMI LCD and keypad

Remote HMI DBG-2000 software or substation automation system software

Front communication port (RS232) for software DBG-2000 with local protocol

Ports type four RS-485 ports (two can be configured as fiber port)

Rear communication ports to host Protocol type IEC 60870-5-103/MODBUS Rear communication port to printer one RS-485 or RS-232 Time synchronisation port IRIG-B (optional) Voltage and current drift auto-adjustment

1.3 Features 1.3.1 High performance hardware

1.3.1.1 Parallel calculation of double CPU system

The hardware of any one CPU system comprises a 32-bit microprocessor and two digital signal processors (DSP). Two CPU systems can operate in parallel companied by fast 14bits A/D converter. The 32-bit microprocessor performs logic calculation and the DSPs perform the protection calculation. High performance hardware ensures real time calculation of all protection relays within a sampling interval.

On the premise of 24 samples per cycle, all data measurement, calculation and logic discrimination could be done within one sampling period. The event recording and protection logic calculation are completed simultaneously.

1.3.1.2 Independent fault detectors

There is a set of independent fault detectors in the CPU processor in the RCS-985A relay. Its operation supervises the tripping outputs. They will connect power supply to output relays when operate. There are different fault detectors in the CPU module used for various protective functions. The relay could drive a tripping output only when the fault detectors in the CPU module and the fault detectors in the MON module operate simultaneously. This kind of independent supervision of tripping outputs using fault detectors can avoid any maloperation possibly caused by any hardware component fails. This highly increases the security.

1.3.1.3 Integration of main and backup protection

Main and backup protection are integrated in one set of protection equipment. Protection



information such as sampled data and binary inputs are shared by all protective elements and no more than one group of CTs or VTs at same side of the transformer need to be input into the equipment for different protective element. Shunt connection of VT and serial connection of CT that usual seen in secondary circuit before can be avoided, which greatly reduce the possibility of circuit failure. Whilst the equipment can gather all information of any fault and record, all relevant waveforms of it for offline analysis.

1.3.1.4 Flexible configuration of output

Elaborately designed tripping logic makes it possible of operation circuit to suit for various circuit breakers.

1.3.2 New philosophy used in RCS-985A

1.3.2.1 Variable slope percentage differential protection

The percentage differential protection adopts variable slope restraint characteristics and actual unbalanced differential current effect can be simulated. In order to prevent unwanted operation of differential protection due to CT saturation, countermeasures to discriminate CT saturation are provided by means of waveform identification of phase current at each side.

1.3.2.2 DPFC percentage differential protection

DPEC percentage differential protection reflects only deviation components of differential current and restraint current and is not affected by load current. It can detect small fault within generator. Besides, it is insensitive to CT saturation since its restraint coefficient is set comparatively higher than that of conventional differential protection.

1.3.2.3 Ratio corrected by software for differential protection

Current from CTs of each side with different ratios are corrected to a single standard before calculation.

1.3.2.4 Provide two inrush current distinguishing methods

Two discrimination principles for inrush current are provided: harmonics restraint and waveform distortion restraint.

1.3.2.5 CT saturation detection

Based on the operation sequence of DPFC restraint current element and DPFC differential current element of differential protection, external fault with CT saturation or internal fault can be distinguished correctly. In case of internal fault, the relay will operate immediately. While in case of external fault with CT saturation, the criterion of current waveform is adopted then. The relay will not operate in case of persisting external fault if only CT saturation occur no less than 5ms after the fault detectors pickup, but operate quickly when evolving external to internal fault occurs.

1.3.2.6 High sensitive transverse differential protection

Transverse differential protection adopts percentage phase current restraint and floating threshold to get high sensitivity in internal fault and high security in external fault. In addition, by adopting techniques of the frequency tracking technique, digital filter technique and Fourier transformation



technique, the filtration ratio of third harmonic component can reach more than 100. These entire countermeasure guarantees the reliability of the protection in all occasions as mentioned as below:

Advantages of percentage restraint by phase current:

(1) The transverse differential protection can get reliable restraint effect because the faulty phase current increases greatly while transverse differential current increases less in external fault situation.

(2) The protection has very high operation sensitivity because transverse differential current increases comparatively large whereas phase current change not too observably in slightly interturn fault situation.

(3) The high-setting stage of transverse differential current protection will operate quickly and reliably when severe interturn fault occurs in stator winding.

(4) In case of phase-to-phase fault of stator winding, not only transverse differential current but also phase current increase greatly, therefore just low percentage restraint by phase current guarantees the reliable operation of transverse differential protection against the fault.

(5) As for other increment of transverse differential unbalanced current in normal operation condition, transverse differential current protection uses float threshold technique to avoid unwanted operation.

1.3.2.7 Performance of percentage restraint interturn protection

By adopting techniques of the frequency tracking technique, digital filter technique and Fourier transformation technique, the filtration ratio of third harmonic component can reach more than 100.

New criteria of generator current percentage restraint:

(1) Fault current increase greatly while longitudinal residual voltage increase less in external three-phase fault three-phase fault, therefore the protection tends to be reliably restrained thanks to current increment as restraint quantity.

(2) If external asymmetric fault occurs, phase current increases greatly with negative sequence current, but the longitudinal residual voltage has a little bit increment, therefore the protection tends to be reliably restrained by the mixing quantity of current increment and negative-sequence component.

(3) The protection has very high operation sensitivity because longitudinal residual voltage increases comparatively large whereas phase current hardly changes in slightly interturn faulty situation.

(4) The high-setting stage of transverse differential current protection will operate quickly and reliably when severe interturn fault occurs in stator winding.

(5) As for other increment of unbalanced longitudinal residual voltage in normal operation condition, the protection uses floating-threshold technique to avoid unwanted operation.



1.3.2.8 Stator earth fault protection performance

(1) By adopting techniques of the frequency tracking technique, digital filter technique and Fourier transformation technique, the filtration ratio of third harmonic component can reach more than 100.

(2) The sensitive stage of fundamental residual voltage protection operates and issues trip command only if the dual criteria’s of residual voltages of generator terminal and neutral point are satisfied at the same time.

(3) The ratio settings of third harmonic of generator terminal to that of neutral point used in third harmonic ratio criteria will automatically suit to the change of ratio fore-and-aft incorporating in power network third harmonic voltage of the plant unit. This automation adjustment function ensures the correctness of signals generated and issued by the third harmonic voltage criteria even during incorporation or isolation course of generator.

(4) The ratio and phase-angle difference of third harmonic voltage of generator terminal to that of neutral point keeps almost stable when the generator is in normal operation condition; also it is a slow developing course. Through real time adjustment of coefficient of amplitude value and phase, RCS-985 makes differential voltage between generator terminal and neutral point as 0 in normal operation condition. When stator earth fault occurs, the criteria tend to operate reliably and sensitively.

1.3.2.9 Performance of rotor earth fault protection

Rotor earth fault protection adopts sampling-switch (ping-pong type) principle. Direct current is inputted by high-performance isolated amplifier. Via switching two different electronic switch，RCS-985 solves four different ground-loop equations to compute rotor winding voltage, rotor ground resistance and earthing position on real time and display these information on LCD of the protection.

If one point earth fault protection only issues alarm signals instead of tripping after operation, then two-points earth fault protection will be put into service with a certain fixed delay automatically and will operated to trip when two-point earth fault of rotor occurs.

1.3.2.10 Performance of loss-of-excitation protection

Loss-of-excitation protection adopts optimizing protection scheme in which stator impedance criteria, reactive power criteria, rotor voltage criteria, busbar voltage criteria and criteria of stator active power decrement, could be optionally combined to meet various demands of operation of the unit for different generator.

1.3.2.11 Performance of out-of-step protection

Out-of-step protection adopts three-impedance element (got from positive-sequence current and positive sequence voltage of generator) to distinguish out-of-step from steady oscillation. More than that, the protection can accurately locates the position of oscillation center and record oscillation slid numbers of external and internal oscillation respectively in real time.



1.3.2.12 VT circuit failure supervision

Two groups of VT inputs are equipped at generator terminal. If one group fails, the equipment will issue alarm and switch over to the healthy one automatically. It doesn’t need to block protective element relevant to voltage.

1.3.2.13 CT circuit failure alarm and blocking

This function adopts percentage differential principle. Detection ability of CT circuit failure can be enhanced significantly and unwanted operation can be avoided then.

1.3.3 Intellectuality

1.3.3.1 Friendly HMI interface

The HMI interface with a LCD and a 9-button keypad on the front panel is very friendly to the user. Real time, connection diagram, phase current, differential current and voltage can be displayed on LCD during normal condition.

1.3.3.2 Transparency

More than 500 sampled data including differential current and phase angle etc. can be displayed on LCD. Meanwhile more than 1500 internal data of the equipment can be supervised through dedicated auxiliary software DBG2000, which provides user with great convenience to know about the operation situation of RCS-985.

1.3.3.3 Perfect fault recording function

CPU module: latest 32 groups of fault data and event sequence, 8 groups of fault oscillograms, 32 changes of binary input status and 32 self-supervision reports can be recorded.

MON module: when the equipment picks up, oscillograms of all analog sampling quantity, differential current and operation of the protection equipment can be recorded with duration up to 4 seconds or 8 seconds.

The file format of event or fault report is compatible with international COMTRADE format.

1.3.3.4 Communication ports

One front RS232 port (For DBG2000 software)

Two rear RS-485 ports with IEC 60870-5-103 protocol or MODBUS protocol, which can be re-configured as optical fiber ports.

One rear RS-485 with clock synchronization,

One rear RS-232 or RS-485 with printer.

1.3.3.5 Various clock synchronizations

Various GPS clock synchronizations: second/minute pulse via binary input or RS-485, message via communication ports and IRIG-B synchronization.

Chapter 2 Technical Data


Chapter 2 Technical Data 2.1 Atmospheric Environment tests

Items Information

Standard IEC60255-6:1988

Recommended temperature during service -100C +550C

Specified service temperature range -250C +550C

Transport and storage temperature range -400C+700C

Permissible humidity 5%--95%, condensation not permissible

Permissible atmospheric pressure 70kPa~106kPa

2.2 Electrical Specifications 2.2.1 Analog input ratings

Items Information

Rated Voltage Vn 100 V / 3 , 110 V / 3 100 V , 110 V

Linear to 106V 140V

Thermal withstand capability

-continuously

-10s

120V

200 V

120V

200 V

Burden at rated < 0.2 VA at Vn < 1.0 VA at Vn

Rated frequency 50Hz±5Hz、60Hz±5Hz

Phase rotation ABC Rated Current In 1A 5A Minimum measurable current 0.1A 0.5A Linear to 40A

(non-offset AC current). 200A (non-offset AC current).

Thermal withstand capability

-continuously

-for 10s

-for 1s

-for half a cycle

4In

20In

100In

250In

4In

20In

100In

250In

Burden < 0.2 VA/phase @ 1A < 1.0 VA/phase @ 5A



2.2.2 Power Supply

Rated Voltage 110/125Vdc 220/250Vdc

Variation 88 - 144 Vdc 176 - 288 Vdc

Ripple in the DC auxiliary voltage Max 12% of the DC value. Per IEC 60255-11

Power supply interruption Bridging time ≥ 20ms during failure/short circuit of auxiliary voltage at Vdc ≥ 110V, without de-energizing.

Per IEC 60255-11:1979

Burden

-Quiescent condition

-Operating condition

-Additions for energized binary input, per opt input

<15W

<25W

0.25W(110/125Vdc)

0.50W(220/250Vdc)

Power-up Time <10s

Starting time <2S

Backup battery type 1/2AA 3.6V, 1000mAh

2.2.3 Binary input

Rated Voltage 24VDC 48VDC 110/125VDC 220/250VDC

Pickup voltage 14.4VDC 28.8VDC 66VDC 132VDC

Dropout voltage 13VDC 26VDC 55VDC 110VDC

Maximum permitted voltage 28.8V 57.6V 150V 300V

Current drain 2mA

Recognition time 0.5ms

Withstand 2kVac

2.2.4 Binary Output

Item Used for tripping contact Used for other contacts

Continuous carry 13A 5A

Short duration current

-1s

35A

30

Pickup time <5ms <10ms

Bounce time 1ms 1ms



Item Used for tripping contact Used for other contacts

Breaker capacity

-L/R=40ms at 220VDC

0.4A 0.2A

Durability

-Loaded contact

-Unloaded contact

10,000 operations minimum




2.2.5 Power supply output for Optical isolators

Item Information

Rated Voltage 24V

Max current 100mA

2.3 Mechanical Specifications

Item Information

Enclosure dimensions 487mm(W)×530.4mm(H)×285 mm(D)

Mounting Way Flush mounted

Trepanning dimensions 450mm(W)×531.5mm(H)，M6 screw

Case color Silver grey

Weight of the relay Approx. 30kg

Enclosure class Per IEC60529：1989

Front side: IP51 (flush mounted)

Sides of the case: IP30

Rear side, connection terminals: IP20

2.4 Rear Communication Port

Item Information

EIA(RS)485 EIA-485: 2 Rear ports

Baud rate: 4800-19200 bps

Protocol: IEC60870-5-103

Twisted Pair: two wire connections, M4 screw, for screened twisted pair cable, multi-drop, 1000m max.

Capacity： support 32 nodes within 500m



Item Information

Ethernet Two ports.

Protocol : IEC61850, IEC60870-5-103 over TCP/IP

Twisted Pair: RJ45, 10/100M,100BaseT

Optional optical Fiber connection: SC,100Base-FX, Multi-mode Fiber 62.5/125 mµ , 1310nm

Front Download/Monitor Port EIA(RS)232, 9 pin D-type female connector.

For firmware downloads through DBG2000 software.

Isolation to ELV level.

Printing Port EIA(RS)232, 9 pin D-type male connector.

Baud Rate: 4800bps or 9600bps for EPSON 300K printer.

Optional Rear IRIG-B Interface

AC model and DC model

RS485 differential interface

BNC plug

RG59LSF flame retardant, halogen isolated, armored 50 ohm coaxial cable.

Clock synchronization Interface

Standard EIA-485 port, support second pulse and IRIG-B differential pulse

2.5 Terminals

Item Information

AC Current

&

AC Voltage

Heavy duty terminal block. Threaded M4 terminals, for jointing terminals.

M4 screw;

2.5mm2—4.0mm2 lead;

CT inputs have integral safety shorting, upon removal of the terminal block

General input/output Power supply, Opt input, Output contacts and RS485 communications: Threaded M4 terminals, for jointing terminals

1.5mm2—2.5mm2 lead;

Case Protective Earth Connections

Two rear BVR type yellow and green stub connections threaded M4.

Must be grounded for safety, wire size 2.5mm2—4.0mm2

Jointing terminal;



2.6 Type tests 2.6.1 Environmental tests

Dry cold test Per IEC60068-2-1: 1990

Test Ad for 16 h at -25°C

Dry heat test Per IEC60068-2-2:1974

Test Bd for 16 h at 70°C

Damp heat test, cyclic Per IEC60068-2-30:1980 Test Db

Two (12+12) hour cycles

95%RH,+25°C…+55°C

2.6.2 Mechanical tests

Test Type test values Class Reference standards

Vibration Class I IEC 60255-21-1

Shock and bump Class I IEC 60255-21-2

Seismic Class I IEC 60255-21-3

2.6.3 Electrical tests

Dielectric tests

-Test voltage

Per IEC 60255-5:2000

2kV, 50Hz, 1min

Impulse voltage tests

-Test voltage

According to the IEC60255-5:2000

5kV, unipolar impulses, waveform 1.2/50μs, source energy 0.5J

Insulation resistance measurements

-Isolation resistance

According to the IEC 60255-5:2000

>100MΩ，500Vdc

2.6.4 Electromagnetic compatibility

EMC immunity test level requirements consider the IEC 60255-26

1MHz burst disturbance test -Common mode

-Differential mode

Per IEC 60255-22-1 (idt IEC61000-4-12) class Ⅲ

2.5kV

1.0kV

Electrostatic discharge test

-For contact discharge

-For air discharge

Per IEC60255-22-2 class IV

8kV

15kV




Radio frequency interference tests

-Conducted, common mode

-Radiated amplitude-modulated

-Radiated pulse-modulated

-Radiated, test with a portable transmitter

Per IEC 60255-22-6 class Ⅲ

10V(rms), f=150kHz…80MHz

Per IEC 60255-22-3

10V/m(rms), f=80…1000MHz

Per IEC 60255-22-3

10Vm(rms), f=900MHz

Per IEC 60255-22-3

f=77.2MHz, P=6W;

f=172.25MHz, P=5W

Fast transient disturbance tests

-Power supply, I/O, Earth

-Communication terminals

Per IEC 60255-22-4,

Class IV, 4kV, 2.5kHz,5/50ns

Class IV, 2kV, 5kHz, 5/50ns

Surge immunity test

-Power supply，AC input，I/O port

-Communication port

Per IEC 60255-22-5,1.2/50us class IV

4kV, line to earth; 2kV line to line

2kV, line to earth; 1kV line to line

Conducted RF Electromagnetic Disturbance

-Power supply, AC, I/O, Comm. terminal

Per IEC 60255-22-6

Class III, 10Vrms, 150kHz~100MHz

Power frequency Disturbance Per IEC 60255-22-7 (idt IEC 61000-4-16 )

CM 500 V / DM 250 V via 0.1μF 10s

Power Frequency Magnetic Field Immunity

Per IEC 61000-4-8: 1993 Class 5:

100A/m for 1min

1000A/m for 3s

Pulse Magnetic Field Immunity

IEC 61000-4-9: 1993 Class 5:

6.4 / 16 μs

1000A/m for 3s

Damped oscillatory magnetic field immunity IEC 61000-4-10: 1993 Class 5

100 kHz & 1 MHz – 100A/m

Voltage dips and voltage short interruptions

Per IEC 61000-4-11

100%/20ms, 60%/100ms

Supply variations immunity IEC 60255-6

Vn ± 20%




Supply frequency fluctuations

IEC 60255-6

50 Hz: from 47 to 54 Hz

60 Hz: from 57 to 63 Hz

Electromagnetic emission tests

-Conducted, RF emission

-Radiated RF-emission

Per IEC 60255-25：2000

Class A

Class A

2.7 Certifications ISO9001: 2000

ISO14001:2004

OHSAS18001: 1999

CMMI L2

EMC: 89/336/EEC, EN50263: 2000

Products safety(PS): 73/23/EEC, EN61010-1: 2001,EN60950-2002

2.8 Protective functions 2.8.1 Accurate operating scope

Current： 0.05In～20In Voltage: 0.4V～100V frequency： 45Hz～55Hz df/dt： 0.3Hz/s～10Hz/s time delay: 0～100s

2.8.2 General error of analog input metering

Current, voltage: ≤0.2% Real power, reactive power: ≤0.5% Power frequency metering: ≤±0.01Hz Accuracy of GPS synchronization： ≤1ms Resolution of SOE: ≤1ms

2.8.3 Generator-transformer unit differential protection, main transformer differential protection

Pickup setting of percentage differential current fault detector Scope: 0.1 Ie – 1.5 Ie Setting accuracy: ±5% or ±0.01In

Setting of unrestrained instantaneous differential protection Scope: 2 Ie – 14 Ie Setting accuracy: ±2.5%



Setting of the first slope of percentage differential protection Scope: 0.00 – 0.10 Setting accuracy: ±2.5%

Setting of the maximum slope of percentage differential protection Scope: 0.40 – 0.60 Setting accuracy: ±2.5%

Operation time of percentage differential protection ≤25 ms (Id≥2×[I_Pkp_PcntDiff_ GTU(Tr)])

Operation time of unrestrained instantaneous differential protection ≤20 ms (Id≥1.5×[I_InstDiff_ GTU(Tr)])

Note:

In—rated secondary current of CT Ie – rated secondary current of generator or transformer, Id—differential current

2.8.4 Generator differential protection, split phase transverse differential protection and differential protection of exciter




Setting of the maximum slope of percentage differential protection Scope: 0.50 – 0.80 Setting accuracy: ±2.5%

Operation time of percentage differential protection ≤25ms (Id≥2×[I_Pkp_Pcnt(SPT)Diff_Gen])

Operation time of unrestrained instantaneous differential protection ≤20 ms (Id≥1.5×[I_Inst(SPT)Diff_Gen])

Note:

In—rated secondary current of CT, Ie – rated secondary current of generator or exciter, Id—differential current.



2.8.5 Stepdown transformer and excitation transformer differential protection




Setting of the maximum slope of percentage differential protection Scope: 0.50 – 0.80 Setting accuracy: ±2.5% Secondary harmonic restraint coefficient Scope: 0.10 – 0.35 Setting accuracy: ±2.5%

Operation time of percentage differential protection ≤35 ms (Id≥2×[I_Pkp_Diff_Exc(ST)] )

Operation time of unrestrained instantaneous differential protection ≤25 ms (Id≥1.5×[I_InstDiff_Exc(ST)])

Note:

In—rated secondary current of CT. Ie – rated secondary current of stepdown or excitation transformer. Id—differential current.

2.8.6 High sensitive transverse differential protection

Current setting of transverse differential protection [I_SensTrvDiff_Gen] Scope: 0.5A – 50A Setting accuracy: ±2.5% or 0.01In

High setting of transverse differential protection [I_UnsensTrvDiff_Gen] Scope: 0.5A – 50A Setting accuracy: ±2.5% or 0.01In

Additional delay of transverse differential protection [t_TrvDiff_Gen] Scope: 0.5 – 2.0 Setting accuracy: ±1% setting ± 40ms

Operation time of transverse differential protection Scope: ≤35 ms (at 1.5×current setting)



2.8.7 Longitudinal zero sequence voltage protection for turn-to-turn fault

Longitudinal zero sequence voltage setting [V_SensROV_Long1_Gen] Scope: 1 V – 20 V Setting accuracy: ±2.5% or ±0.05V

Longitudinal Zero sequence voltage high setting [V_UnsensROV_Long1_Gen] Scope: 2 V – 20 V Setting accuracy: ±2.5% or ±0.05V

Phase current restraint coefficient [Slope1_ROV_Long1_Gen] Scope: 0.1 – 2.0

Time delay setting [t_ROV_Long1_Gen] Scope: 0.1 s – 10 s Setting accuracy: ±1% setting±40 ms

Operation time of longitudinal zero sequence voltage protection Scope: ≤40 ms (at 1.5×setting) Setting accuracy: ±1% setting±40 ms

Operation time of DPFC directional protection Scope: ≤40 ms Setting accuracy: ±1% setting±40 ms

2.8.8 Earth fault protection of stator

Zero sequence voltage setting [V_SensROV_Sta] Scope: 1 V – 20 V Setting accuracy: ±2.5% or ±0.05V

Zero sequence voltage high setting [V_UnsensROV_Sta] Scope: 1 V – 30 V Setting accuracy: ±2.5% or ±0.05V

Ratio setting of third harmonic voltage protection [k_3rdHRatio_PreSync(PostSync)_Sta] Scope: 0.5 – 10 Setting accuracy: ±5%

Slope setting of third harmonic voltage differential protection [k_V3rdHDiff_Sta] Scope: 0.1 – 2.0 Setting accuracy: ±5%

Time delay setting [t_V3rdH_Sta] Scope: 0.1 s – 10 s Setting accuracy: ±1% setting±40 ms

2.8.9 Earth fault protection of rotor

One point ground resistance setting [R_1PEF_RotWdg] Scope: 0.1Ω – 100 kΩ



Setting accuracy: ±10% setting or ±0.5kΩ

Two points ground location setting Scope: 1% – 10%

Second harmonic voltage setting 0.1 V – 10 V

Time delay setting Scope: 0.1s – 10s Setting accuracy: ±1% setting +1S

2.8.10 Overload protection of stator

Definite time current setting 0.1 A – 100 A Definite time delay setting 0.1 s – 10 s Inverse time initiating current setting 0.1 A – 10 A Heat capacity of rotor’s winding 1 – 100 Heat emission factor 0.1 – 2.0 Tolerance of definite and inverse time current setting ±2.5% or ±0.01 In Tolerance of time delay setting ±1% setting±40 ms

2.8.11 Negative sequence overload protection

Definite time negative sequence current setting 0.1 A – 100 A

Definite time delay setting 0.1 s – 10 s Inverse time initiating negative sequence current setting

0.05 A – 10 A Heat constant of rotor 1 – 100 Continuous tolerable negative sequence current of generator 0.05 A – 10 A Tolerance of definite and inverse time negative sequence current setting

±2.5% or ±0.01 In Tolerance of time delay setting ±1% setting±40 ms

2.8.12 Overload protection of excitation winding (AC quantity)

Definite time current setting 0.1 A – 100 A Definite time delay setting 0.1 s – 10 s Inverse time initiating current setting 0.1 A – 10 A Heat capacity factor 1 – 100 Reference current 0.1 A – 10 A Tolerance of definite and inverse time current setting ±2.5% or ±0.01 In Tolerance of time delay setting ±1% setting±40 ms

2.8.13 Overload protection of excitation winding (DC quantity)

Definite time current setting 0.1 kA – 30.0 kA



Definite time delay setting 0.1 s – 10 s Inverse time initiating current setting 0.1 kA – 10 kA Heat capacity factor 1 – 100 Reference current 0.1 kA – 10 kA Tolerance of definite and inverse time current setting ±2.5% or ±0.01 In Tolerance of time delay setting ±1% setting±40 ms

2.8.14 Loss of excitation protection of generator

Impedance setting Z1 0.1Ω– 100Ω Impedance setting Z2 0.1Ω– 100Ω Reverse reactive power setting 0 – 50% Pn Under voltage setting of rotor 1 V – 500 V No-load voltage setting of rotor 1 V – 500 V Under voltage factor setting of rotor 0.1 – 10 Under voltage setting of busbar 10 V – 100 V Reduced active power setting 10%–50%Pn Time delay setting of stages 1/2/3 0.1 s – 10 s Time delay setting of stage 4 0.1 min – 60 min Tolerance of impedance setting ±2.5% or ±0.1Ω Tolerance of rotor’s voltage setting ±5% or ±0.1Un Tolerance of power setting ±1% Sn or ±0.2% Sn Tolerance of busbar voltage setting ±2.5% or ±0.1 V Tolerance of time delay setting ±1% setting±40 ms

Note:

Pn: rated active power of generator. Un: rated voltage of generator.

2.8.15 Out-of-step protection of generator

Impedance setting ZA/ZB/ZC 0.1Ω– 100Ω Phase angle setting 60°– 90° Interior angle setting of lens 60°– 150° Interior angle setting of alarm lens 10°– 90° Number of pole slipping setting 1 – 1000 Tolerate tripping current setting 0.1 A – 10 A Tolerance of impedance setting ±2.5% or ±0.1Ω Tolerance of current setting ±2.5% or ±0.01 In Tolerance of angle setting ±3°

2.8.16 Voltage protection of generator

Overvoltage setting 110 V – 170 V Under voltage setting 10 V – 100 V Time delay setting 0.1 s – 10 s



Tolerance of voltage setting ±2.5% or ±0.05 V Tolerance of time delay setting ±1% setting±40 ms

2.8.17 Over excitation protection

Definite time V/F setting 0.5 – 2. 0 Time delay setting 0.1 s – 20 s Inverse time V/F setting 0.5 – 2. 0 Time delay of inverse time protection 0.1 s – 3000 s Tolerance of V/F measurement ±2.5% or ±0.01 Tolerance of definite time delay setting ±1% setting±40 ms

2.8.18 Power protection of generator

Reverse power setting 0.5% - 10% Pn Underpower setting 1% - 100% Pn Power setting of reverse power sequent trip protection 0.5% - 10% Pn Time delay of reverse power protection 0.1 s – 600 s Time delay of underpower protection 0.1 min – 600 min Time delay of reverse power sequent trip protection 0.1s – 10s Tolerance of reverse power setting ±10% or ±0.002 Pn Tolerance of time delay setting ±1% setting±40 ms

2.8.19 Frequency protection of generator

Setting of under frequency stage 1-4 45 Hz – 50 Hz Setting of over frequency stage 1-2 50 Hz – 55 Hz Time delay of frequency protection (accumulated) * 0.1 min – 300 min Time delay of frequency protection (not accumulated) * 0.1 s – 600 s Tolerance of frequency setting ±0.02 Hz Tolerance of time delay setting ±1% setting±40 ms

2.8.20 Accident energization protection of generator

Current setting 0.1 A – 100 A Blocking frequency setting 40 Hz – 50 Hz Time delay of unwanted closing protection 0.01 s – 10 s Negative sequence current setting 0.1 A – 50 A Time delay of circuit breaker flashover protection 0.01 s – 10 s Tolerance of current setting ±2.5% or ±0.02 In Tolerance of time delay setting ±1% setting±40 ms



2.8.21 Startup/shutdown protection of generator

Blocking frequency setting 40 Hz – 50 Hz Differential current setting 0.2 Ie – 10 Ie Overcurrent setting in low frequency 0.1A — 100A Zero sequence voltage setting 5 V – 25 V Time delay setting 0.1 s – 10 s Tolerance of differential current setting ±5% or ±0.02 In Tolerance of zero sequence voltage setting ±5% or ±0.2 V Tolerance of differential current setting ±5% or ±0.02 In Tolerance of time delay setting ±1% setting±40 ms Frequency range 15 Hz – 65 Hz

2.8.22 Low impedance protection

Forward impedance setting 0.1Ω– 100Ω Reverse impedance setting 0.1Ω– 100Ω Time delay setting 0.1 s – 10 s Tolerance of impedance setting ±2.5% or ±0.1Ω Tolerance of time delay setting ±1% setting±40 ms

2.8.23 Voltage controlled directional overcurrent protection

Negative sequence voltage setting 1 V – 20 V Under voltage setting 10 V – 110 V Current setting 0.1 A – 100 A Time delay setting 0.1 s – 10 s Directional definition “0” — point to transformer, “I” — point to system Tolerance of voltage setting ±2.5% or ±0.05 V Tolerance of current setting ±2.5% or ±0.01 In Tolerance of time delay ±1%setting ± 40 ms

2.8.24 Directional zero sequence overcurrent protection

Zero sequence overcurrent setting 0.1 A – 100 V Zero sequence overvoltage setting 1 V – 100 V Directional definition “0” — point to system, “I” — point to transformer Time delay setting 0.1 s – 10 s Tolerance of zero sequence voltage setting ±2.5% or ±0.05 V Tolerance of zero sequence current setting ±2.5% or ±0.01 In Tolerance of time delay ±1%setting ± 40 ms

2.8.25 Gap protection

Gap zero sequence overcurrent setting 0.1 A – 100 V Gap zero sequence overvoltage setting 10 V – 220 V Time delay setting 0.1 s – 10 s Tolerance of zero sequence voltage setting ±2.5% or ±0.05 V Tolerance of zero sequence current setting ±2.5% or ±0.01 In



Tolerance of time delay ±1%setting ± 40 ms

2.8.26 Pole disagreement protection

Current setting 0.1 A – 20 A Time delay setting 0.1 s – 10 s current setting accuracy ±2.5% or ±0.01 In delay setting accuracy ±1%±40 ms

2.8.27 Mechanical protection

Time delay setting 0 s – 600.00 s Tolerance of time delay ±1%setting ± 40 ms

2.8.28 Measurements and Recording Facilities

Measurements Current: 0.05… 20In Accuracy: ±1.0% of reading Voltage: 0.05…2Vn Accuracy: ±1.0% of reading Performance Real time clock accuracy: <±2% seconds/day External clock synchronization: Conforms to IRIG standard 200-98, format B

Chapter 3 Description of Operation Theory


Chapter 3 Description of Operation Theory 3.1 Software Structure The RCS-985A protection is composed of current differential protection as main protection, kinds of protection mentioned in Table 1-1and Table 1-2 as backup protection and abnormal operation protection. VT supervision (VTS) and CT supervision (CTS) function is also included.

Every protective element has its own fault detector element in CPU and DSP respectively. When the fault detector in CPU picks up, power supply of output relays will be connected. When both two detector elements and operational element pick up, the protection element will operate to trip.

3.2 Fault detectors 3.2.1 Using fault detector improves the security of tripping

The additional output blocking circuit controlled by general fault detectors calculated in MON module makes the output circuit more secure, because not only the relationship between tripping command sending and additional output blocking circuit is logic “and” in software, but also they keeps the logic “and” relationship in hardware. It is displayed in below figure.

trip relay

+ 24 Vcontrolled by fault detectors in MON

module

+ 24 V

tripping commands from CPU

module

R

"or" gate

trip contact

>=11

11

QDJ

G1tripping

transistor

Figure 3-1 Logic relationship of CPU and MON module QDJ contact is controlled by general fault detectors calculated independently in MON module. When the contact closes, the DC source of tripping relay is provided. The function of gate G1 is to receive tripping commands sent from CPU module. When a tripping command arrives at the gate G1, the driving transistor will be activated, and the trip relay’s contact will close to trip the breaker.

The general fault detectors calculated in MON module and operation elements calculated in CPU module use their independent data sampled by themselves, so the equipment will not operate by mistake due to any of module’s data channel’s failure.



3.2.2 Differential protection of generator-transformer unit and main transformer

3.2.2.1 Fault detector of differential current of generator-transformer unit

tDiff_GTU][I_Pkp_PcnIdφ >max (Equation 3-1)

Where:

maxφdI is the maximum value of three phase differential currents of generator-transformer unit.

tDiff_GTU][I_Pkp_Pcn is the setting of phase differential currents of generator-transformer

unit.

It is used to release differential protection of generator-transformer unit.

3.2.2.2 Fault detector of differential current of main transformer

]___[max TrPcntDiffPkpIId >φ (Equation 3-2)

Where:

maxφdI is the maximum value of three phase differential currents of main transformer.

tDiff_Tr][I_Pkp_Pcn is the setting of phase differential currents of main transformer.

It is used to release differential protection of main transformer.

3.2.2.3 Fault detector of DPFC differential current of main transformer

mIIII

III

d

dthdtd

•••

∆++∆+∆=∆

+∆>∆

...

25.1

21

(Equation 3-3)

Where:

dtI∆ is the floating threshold value which will arise automatically and gradually according to

increasing of the output of deviation component. In order to ensure that the threshold value of voltage is slightly higher than the unbalance output, multiple 1.25 of the deviation component is reasonable.

1

•

∆ I …. mI•

∆ are the DPFC current of each side of transformer respectively.

dI∆ is the half-cycle integral value of differential current.



dthI is the fixed threshold.

This fault detector is not influenced by the direction of power flow and so it is very sensitive. The setting is fixed and need not to be set.

It is used to release DPFC percentage differential protection.

3.2.3 Backup protection of main transformer

3.2.3.1 Fault detector of phase current of main transformer

]_)2(1_[max TrOCII >φ (Equation 3-4)

Where:

[I_OC1(2)_Tr] is the setting of overcurrent stage 1 or 2 of main transformer.

This fault detector will operate if maximum value of three phases current is higher than its setting value.

It is used to release stage 1 or 2 of overcurrent protection.

3.2.3.2 Fault detector of DPFC of phase current of main transformer.

tht III +∆>∆ 25.1 (Equation 3-5)

Where:

tI∆ is the floating threshold which will arise automatically and gradually according to increasing of

the output of deviation component. In order to ensure that the threshold current is slightly higher than the imbalance value, multiple 1.25 of the deviation component is reasonable.

I∆ is the half-wave integral of phase-to-phase current. thI is the fixed threshold of 0.2In and

need not to be set on site.

This fault detector is used to release the distance protection at relevant side.

3.2.3.3 Fault detector of zero sequence current of main transformer

]_)3,2(1_[3 0 TrROCII > (Equation 3-6)

Where:

03I is calculated zero sequence current, CBA IIII &&& ++=03 .

[I_ROC1(2,3)_Tr] is the setting of overcurrent stage 1, 2 or 3 of main transformer.

This fault detector will operate if the zero sequence current is higher than its setting value.



It is used to release calculated zero sequence overcurrent protection with stage 1, 2 or 3 at relevant side.

3.2.3.4 Fault detector of Gap zero sequence voltage of main transformer

_Tr][V_ROV_Gap3U0 > (Equation 3-7)

This fault detector will operate if the zero sequence voltage of open-delta VT is higher than its setting value.

It is used to release zero sequence overvoltage protection of Gap.

3.2.4 Differential protection of stepdown transformer

Fault detector of differential current of stepdown transformer.

]___[max STPcntDiffPkpIId >φ (Equation 3-8)

Where:

maxφdI is the maximum value of three phase differential currents of stepdown transformer.

]___[ STPcntDiffPkpI is the setting of phase differential currents of stepdown transformer.

It is used to release differential protection of stepdown transformer.

3.2.5 Backup protection of stepdown transformer

3.2.5.1 Fault detector of HV side phase current of stepdown transformer.

]_)2(1_[max STOCII >φ (Equation 3-9)

Where:

maxφI is the maximum value of three phase currents at HV side of stepdown transformer.

[I_OC1(2)_ST] is the setting of overcurrent stage 1 or 2 at HV side of stepdown transformer.

This fault detector will operate if maximum value of three phases current is higher than its setting value.

It is used to release overcurrent protection at HV side.

3.2.5.2 Fault detector of HV side or LV side overcurrent protection of stepdown transformer

]_)(_1_[max STHVSLVSOCII >φ (Equation 3-10)

Where:



maxφI is the maximum value of three phase currents at HV side or LV side of stepdown

transformer.

[I_OC1_LVS(HVS)_ST] is the setting of overcurrent stage 1 at HV side or LV side of stepdown transformer.

This fault detector will operate if maximum value of three phase currents of branch of auxiliary stepdown transformer is higher than its setting value.

It is used to release overcurrent protection of branch of stepdown transformer.

3.2.5.3 Fault detector of HV side or LV side residual overcurrent of stepdown transformer

]_)(_1_[3 0 STHVSLVSROCII > (Equation 3-11)

Where:

03I is directly-input zero sequence current of branch of stepdown transformer.

This fault detector will operate if the zero sequence current is higher than its setting value.

It is used to release branch zero sequence overcurrent protection of stepdown transformer.

3.2.6 Fault detector of differential protection, phase-splitting transverse differential protection of generator

This fault detector of differential protection will pick up when any one of the following two elements is satisfied.

3.2.6.1 Fault detector of differential current of generator

]___[max GenPcntDiffPkpIId >φ (Equation 3-12)

Where:

maxφdI is the maximum value of three phase differential currents of generator.

tDiff_Gen][I_Pkp_Pcn is the setting of phase differential currents of generator.

It is used to release differential protection of generator.

3.2.6.2 Fault detector of DPFC differential current of generator

mIIII

III

d

dthdtd

•••

∆++∆+∆=∆

+∆>∆

...

25.1

21

(Equation 3-13)



Where:

dtI∆ is the floating threshold value

1

•

∆ I …. mI•

∆ are the DPFC current of each side of generator respectively.

dI∆ is the half-cycle integral value of differential current.

dthI is the fixed threshold.

This fault detector is not influenced by the direction of power flow and so it is very sensitive. The setting is fixed and need not to be set on site.

It is used to release DPFC percentage differential protection of generator.

3.2.6.3 Fault detector of phase-splitting transverse differential current of generator

When the phase-splitting transverse differential current reaches pickup value of generator phase-splitting transverse differential protection [I_Pkp_PcntSPTDiff_Gen], the fault detector of it picks up.

It is used to release phase-splitting transverse differential protection of generator.

3.2.7 Interturn fault protection of generator

3.2.7.1 Fault detector of transverse differential current of generator

The fault detector will operate when the transverse differential current is greater than the setting [I_SensTrvDiff_Gen].

3.2.7.2 Fault detector of longitudinal zero sequence voltage of generator

The fault detector will operate when the longitudinal zero sequence voltage is greater than the setting [V_SensROV_Longl_Gen].

3.2.7.3 Fault detector of DPFC direction of generator

The fault detector will operate when the calculated directional element is met operating condition.

3.2.8 Earth fault protection of stator of generator

3.2.8.1 Fault detector of zero sequence overvoltage element

The fault detector will operate when the calculated zero sequence voltage is in excess of the setting [V_SensROV_Sta].

3.2.8.2 Fault detector of third harmonic ratio of stator

The fault detector will operate when the ratio of 3rd harmonics voltage of neutral point to 3rd harmonics voltage at the terminal is greater than its ratio setting [k_V3rdHRatio_PreSync_Sta] or [k_V3rdHRatio_PostSync_Sta].



3.2.8.3 Fault detector of deviation of third harmonic of generator

The fault detector will operate when the differential 3rd harmonic voltage of neutral point and 3rd harmonics voltage at the terminal of generator is greater than its setting [k_V3rdHDiff_Sta].

3.2.9 Generator rotor earth fault protection

3.2.9.1 Fault detector of one-point earth fault of generator

The fault detector operates when grounded resistance of rotor is less than its setting [R_1PEF_RotWdg].

3.2.9.2 Fault detector of two-point earth fault of generator

The fault detector operates when change of location of ground point of rotor is greater than its internal setting.

3.2.10 Generator stator overload protection

3.2.10.1 Definite time overload fault detector

The fault detector operates when maximum value of three phase currents is higher than its setting [I_OvLd_Sta].

3.2.10.2 Inverse time overload fault detector

The fault detector operates when inverse time accumulated value is higher than its setting [I_InvOvLd_Sta].

3.2.11 Negative sequence overcurrent protection of generator

3.2.11.1 Definite time negative sequence overload fault detector

The fault detector operates when maximum value of negative sequence current is higher than its setting [I_NegOC_Sta].

3.2.11.2 Inverse time overload fault detector

The fault detector operates when inverse time accumulated value is higher than its setting [I_InvNegOC_Sta].

3.2.12 Generator loss-of-excitation protection

The fault detector operates when locus of calculated impedance enters into impedance circle.

3.2.13 Generator out-of-step protection

The fault detector operates when locus of calculated impedance leaves boundary of impedance operation zone.

3.2.14 Generator overvoltage protection

The fault detector operates when maximum value of three phase-to-phase voltage is higher than its setting.



3.2.15 Generator over excitation protection

3.2.15.1 Definite time over excitation Fault detector

The fault detector operates when measured U/F is higher than definite time setting.

3.2.15.2 Inverse time over excitation Fault detector

The fault detector operates when over excitation inverse time accumulated value is higher than inverse time setting.

3.2.16 Generator reverse power protection

When measured reverse power is greater than setting, the fault detector of reverse power of generator picks up.

3.2.17 Generator frequency protection

3.2.17.1 Under frequency fault detector

The fault detector operates when frequency is lower than its setting for a specified time interval.

3.2.17.2 Over frequency fault detector

The fault detector operates when frequency is higher than its setting for a specified time interval.

3.2.18 Generator accident energization protection

3.2.18.1 Fault detector of unwanted closing

The fault detector operates when maximum phase current of generator is higher than setting of unwanted closing protection.

3.2.18.2 Fault detector of circuit breaker flashover

The fault detector operates when negative sequence current of generator is higher than setting of circuit breaker flashover protection.

3.2.19 Startup and shutdown protection of generator

The fault detector operates when differential current of generator or excitation transformer is higher than its setting, or zero sequence voltage of generator is higher than its setting.

3.2.20 Differential and overcurrent protection of excitation transformer or exciter

3.2.20.1 Fault detector of differential current of excitation transformer or exciter

The fault detector operates when maximum value of three phase differential currents is higher than its setting.

3.2.20.2 Fault detector of overcurrent of excitation transformer or exciter

The fault detector operates when maximum value of three phase currents is higher than its setting.



3.2.21 Overload protection of exciter winding

3.2.21.1 Fault detector of definite time overload of exciter winding

The fault detector operates when maximum value of three phase currents of exciter winding is higher than its definite time setting.

3.2.21.2 Fault detector of inverse time overload of exciter winding

The fault detector operates when inverse time accumulated value is higher than inverse time setting.


The fault detector operates when duration of operation of mechanical protection is higher than its delay setting.

3.3 Theory of protective elements 3.3.1 Preparation knowledge of transformer

By applying the Ampere-turn balance on different transformer connections, the RCS-985A relay forms the current differential equations.

During the normal operation, the magnitude and angle of secondary currents at each side of transformer are different due to different CT ratios, different voltage levels and different transformer connection groups. This kind of current differentiations shall be eliminated under normal operation and compensated in fact by a built-in compensation method.

3.3.1.1 Calculate rated primary current at each side of transformer

nb

nnb U

SI1

1 3= (Equation 3-14)

Where:

nS is the maximum rated capacity of all windings(i.e. [Sn_Tr]).

nbU 1 is the rated phase-to-phase voltage at the calculated side of the transformer (i.e.

[U1n_HVS_Tr] or [U1n_LVS_Tr] .)

3.3.1.2 Calculate rated secondary current at each side of transformer

bLH

nbnb n

II 12 = (Equation 3-15)

Where:

nbI 1 is the rated primary current at the calculated side of transformer.



bLHn is the ratio of CT at the calculated side of transformer.

3.3.1.3 Calculate the correction coefficient of each side of transformer

nb

bnbph I

IK2

2 −= (Equation 3-16)

Where:

nbI 2 is the rated secondary current at the calculated side.

bnbI −2 is the rated secondary current of base side.

The currents used in the following analysis have been corrected, that means the currents are the products of the original secondary current of each side multiplying its own correction coefficient

( phK ).

3.3.1.4 Phase shift compensation

By defining which particular connection group the protected transformer belongs to, the proper calculation routine will be applied.

The following transforming method is based on the assumptions listed here:

• CTs at each side of transformer are connected in star type.

• Secondary currents of each CT are connected to the equipment directly.

• The positive polarity of CT at HV and MV side is at busbar side and that at LV side is at branch side or generator side.

• Polarity of each secondary winding of CT is as same as shown in Figure 1-1 to Figure 1-2.

The secondary current phase shift compensation for all CTs are achieved by software, Y→Δ transform method is used for this purpose. For connection Y/Δ-11, the correction equations are as follows:

At side Y0:

−=

−=

−=

•••

•••

•••

3/)(

3/)(

3/)(

'

'

'

ACC

CBB

BAA

III

III

III

(Equation 3-17)

At side Δ:



=

=

=

••

••

••

cc

bb

aa

II

II

II

'

'

'

(Equation 3-18)

Where:

AI•

, BI•

, CI•

are the secondary currents of CT at side Y.

AI•

' , BI•

' , CI•

' are the corrected current of each phase at side Y.

aI•

, bI•

, cI•

are the secondary currents of CT at side Δ.

aI•

' , bI•

' , cI•

' are the corrected currents of each phase at side Δ;

For other connection type，the current can be calculated according to the equations listed above. The connection type can be selected by following logic settings (refer to chapter 7 power system parameters).

[Yd11_Conn]

[Yyd11_Conn]

Note:

If your actual transformer connection group is not included in above two groups, please let us know before you make the order.

3.3.2 Preparation knowledge of generator

3.3.2.1 Calculate rated primary current of generator

nf

nnf U

PI1

1 3cos/ θ

= (Equation 3-19)

Where:

nP is the rated capacity of generator ([Pn_Gen]).

θcos is the power factor of generator ([PF_Gen]).

nfU 1 is the rated voltage at the calculated side of generator (i.e. [U1n_Gen] or

[U1n_VT_NP_Gen].)



3.3.2.2 Calculate rated secondary current of generator

fLH

nfnf n

II 1

2 = (Equation 3-20)

Where:

nfI 1 is the rated primary current at the calculated side of generator.

bLHn is the ratio of CT at the calculated side of generator.

3.3.3 Differential protection of generator-transformer unit, main transformer, stepdown transformer and excitation transformer

3.3.3.1 Percentage differential protection(SPDP)

Figure 3-2 shows operation characteristic of this percentage differential protection.

Ie nIe

Icdqd

Id

Ir0Kbl1

Kbl2

Restraint area

Operation area

Figure 3-2 Operation characteristic of percentage differential protection

Operation criterion of this percentage differential protection is



++++=

++++=

××+=×−=

≥++−×>×+=

<+×>

•••••

54321

54321

1

12

2

1

2

)()2/()(

)()()/(

)(

IIIIII

IIIIII

nInKKbnKKK

nIIIbnIIKIIIKKK

nIIIIKI

d

r

eblrbl

blblblr

ercdqderbld

erblrblbl

ercdqdrbld

(Equation 3-21)

Where:

dI is differential current,

rI is restraint current,

cdqdI is pickup value of differential current fault detector

eI is rated current.

blK is percentage differential restraint factor and blrK is its increment.

1blK is the first slope of percentage differential with setting range 0.05 – 0.15. 0.10 is applicable

usually.

2blK is the second slope of percentage differential with setting range 0.50 – 0.80. 0.70 is

applicable usually.

n is the multiple of restraint current at the second slope and is fixed at 6.

Note:

For differential current of generator-transformer unit and main transformer, definition is different for different program versions and can be found on individual project document.

For differential current of stepdown transformer, 1I , 2I and 3I are currents of HV side,

branches A/B on LV side of stepdown transformer respectively. 4I as no definition yet.



For differential current of excitation transformer, 1I and 2I are currents of HV side and LV side

respectively. 3I and 4I have no definition yet.

3.3.3.2 High setting percentage differential protection element(HSDP)

A percentage differential protection with high percentage and high setting is equipped with the equipment to prevent delayed operation of percentage differential protection caused by CT saturation and other factors during serious internal fault. This protection is blocked only by inrush current criterion i.e. second harmonic of differential current or waveform discrimination. It can prevent influence of steady state and transient CT saturation during external fault and can operate correctly and quickly during internal fault even if CT is in saturation condition. Operation criterion of this high setting percentage differential protection is:

×>

×>

rd

ed

IIII

0.12.1

(Equation 3-22)

Where

dI is differential current as mentioned above.

rI is restraint current as mentioned above.

Figure 3-3 Operation characteristic of steady state high setting percentage differential protection

When fault occurs, the operation criterion will be discriminated phase by phase and percentage differential protection will operate if the criterion is met. For more detailed operation characteristic please see Figure 3-4.

Note:

Parameters of this protection have been fixed in program and do not need to be configured by



user.

3.3.3.3 Unrestrained instantaneous differential protection element(UIDP)

The aim of unrestrained instantaneous differential protection for transformer is to accelerate the trip speed for transformer’s inner fault. So the element does not need any block element, but the setting should be greater than maximum inrush current.

Its operation criterion is:

]_max Trf[I_InstDifIdφ > (Equation 3-23)

Where:

maxφdI is the maximum value of three-phase differential currents.

[I_InstDiff_Tr] is the setting of the unrestrained instantaneous differential protection of transformer.

Note:

All the settings mentioned below are from main transformer for example.

Figure 3-4 shows operation characteristic of unrestrained instantaneous differential protection.

3.3.3.4 Operation characteristic of current differential protection

Figure 3-4 Operation characteristic of current differential protection

The meanings of cdqdI , dI , rI , eI , 1blK and 2blK are described above.



cdsdI is the setting of unrestrained instantaneous differential protection [ I_InstDiff_Tr].

(1) Steady state percentage differential protection element (described in section 3.3.3.1) will not send tripping signal after CT saturation, CT circuit failure (optional), inrush current and overexcitation. It can ensure sensitivity of protection and avoid unwanted operation when CT is saturated during external fault. Its operation area is tint shadow area.

(2) High setting percentage differential protection element (described in section 3.3.3.2) will not send tripping signal only after CT circuit failure (optional) and inrush current. It eliminates influence of transient and steady saturation of CT during external fault and ensures reliable operation even if CT is in saturation condition during internal fault by means of its percentage restraint characteristic. Its operation area is deep shadow area.

(3) Unrestrained instantaneous differential protection element (described in section 3.3.3.3) will send tripping signal without any blocking if differential current of any phase reaches its setting. Its operation area is over the above two areas with no shadow.

3.3.3.5 Inrush current detection element

Ø Second harmonic restraint principle

In the equipment, the second harmonic of differential current can be used to distinguish inrush current. Its operation criterion is:

stxbnd IKI 122 ∗> (Equation 3-24)

Where:

ndI2 is the second harmonic of each phase differential current.

stI1 is the differential fundamental current of corresponding phase.

xbk2 is the setting of restraint coefficient of second harmonic [k_Harm_PcntDiff_Tr]. xbk2 = 0.15 is

recommended.

Ø Waveform distortion discrimination principle

During internal fault, differential currents of various sides transferred by CT are basically fundamental sinusoidal wave. But when the transformer is energized, lots of harmonics occur. The waveform is intermittent and unsymmetrical. A special algorithm can be used for discrimination of the inrush current.

During internal fault, following relation exists:

>> +

t

b

SS*SkS

(Equation 3-25)



Where:

S is the full cycle integral of differential current;

+S is full cycle integral of the sum of instantaneous value of differential current and that of half

cycle before.

bk is a fixed constant.

tS is a threshold value which can be represented as follows:

edt IIS *1.0* += α (Equation 3-26)

Where:

dI is the full cycle integral of differential current.

α is a proportional constant.

eI is the secondary rated current of transformer.

If any one of three phases can not meet above equation, the differential current can be considered as inrush current and percentage differential relay will be blocked.

In this protection equipment, logic setting [Opt_Inrush_Ident_Tr] is provided for user to select the restraint blocking principle. If the logic setting is set as “0”, discrimination by harmonics is enabled. Otherwise, discrimination by waveform distortion is enabled.

3.3.3.6 CT saturation detection element

In order to prevent unwanted operation of steady state percentage differential protection caused by transient or steady state saturation of CT during external fault, composite harmonics of secondary differential current is used for the protection equipment to discriminate saturation of CT. The expression is as following:

1IKI nxbcop ∗> (Equation 3-27)

Where:

copI is the composite harmonics of phase differential current.

1I is the fundamental component of corresponding phase differential current.

nxbk is proportional coefficient.



When fault occurs, if DPFC of restraint current and DPFC of differential current appear simultaneously, this is an internal fault. If DPFC of restraint current appears before DPFC of differential current, this maybe an external fault and criterion of CT saturation shall be adopted in this case. So unwanted operation of percentage differential protection due to CT saturation can be prevented.

3.3.3.7 Differential current abnormality alarm and CT circuit failure blocking function

Differential current abnormality alarm with percentage restraint (see section 3.3.26.2) and instant CT circuit failure blocking function (see section 3.3.26.3) are equipped with the equipment.

CT circuit failure blocking function can be configured by logic setting [Opt_CTS_Blk_PcntDiff_Tr]. When such failure occurs and is discriminated, issuing alarm signal only or blocking percentage differential protection is optional. If the logic setting is set as 1, percentage differential protection will be blocked immediately.

3.3.3.8 Overexcitation detection element

When a transformer is overexcited, the exciting current will increase sharply which may result in unwanted operation of differential protection. Therefore the overexcitation shall be discriminated to block the current differential protection. The fifth harmonic of differential current is used as criterion of overexcitation discrimination.

stxbth IkI 155 *> (Equation 3-28)

Where:

stI1 is fundamental component of differential current.

thI5 is fifth harmonic of differential current.

xbk5 is the fifth harmonic restraint coefficient, it is fixed at 0.25.

Note:

High setting percentage differential protection is not blocked by fifth harmonic of differential current.



3.3.3.9 Logic scheme of steady state differential protection

Figure 3-5 Logic diagram of differential protection

Where:

UIDP element indicates that the criterion of UIDP element is met.

HSDP element indicates that the criterion of HSDP element is met.

SPDP element indicates that the criterion of SPDP element is met.

EBI_Diff_Tr: binary input for enabling differential protection of transformer

[En_PcntDiff_Tr]: logic setting for enabling percentage differential protection of transformer

[En_InstDiff_Tr]: logic setting for enabling unrestrained instantaneous differential protection of transformer

Op_InstDiff_Tr: operation of unrestrained instantaneous differential protection of transformer.



Op_PcntDiff_Tr: operation of percentage differential protection of transformer.

3.3.4 Differential protection, phase-splitting transverse differential protection of generator and differential protection of exciter

3.3.4.1 Percentage differential protection(SPDP)

Operation characteristic of this percentage differential protection is as shown as Figure 3-6.

Ie nIe

Icdsd

Icdqd

Id

Ir0

Kbl1

Kbl2

unrestraint operationarea

operationarea

restraintarea

Figure 3-6 Operation characteristic of percentage differential protection Operation equation of this percentage differential protection is

−=

+=

××+=×−=

≥++−×>×+=

<+×>

••

••

21

21

1

12

2

1

2

)()2/()(

)()()/(

)(

III

III

nInKKbnKKK

nIIIbnIIKIIIKKK

nIIIIKI

d

r

eblrbl

blblblr

ercdqderbld

erblrblbl

ercdqdrbld

(Equation 3-29)

Where:

dI is differential current,

rI is restraint current,

cdqdI is pickup value of differential current

eI is rated current of generator.



blK is percentage differential restraint coefficient and blrK is its increment.

1blK is the first slope of percentage differential with setting range 0.05 – 0.15. 0.05 is

recommended usually.

2blK is the second slope of percentage differential with setting range 0.30 – 0.70. 0.50 is

recommended usually.

n is the multiple of restraint current at second percentage restraint coefficient and is fixed at 4.

For differential protection of generator and exciter, 1I and 2I are currents of terminal and neutral

point respectively.

3.3.4.2 High performance blocking technique during CT saturation

In order to prevent unwanted operation of steady state percentage differential protection due to CT transient or steady state saturation during external fault, discrimination of waveform of differential current principle is adopted as criterion of CT saturation.

When fault occurs, the equipment decides firstly whether it is internal or external fault. If it is external fault, criterion of CT saturation is enabled. If any phase differential current of differential protection meets the criterion, it is decided that this differential current comes from CT saturation and the percentage differential protection will be blocked.

3.3.4.3 High setting percentage differential protection(HSDP)

A percentage differential protection with high percentage and high setting is equipped with the equipment to prevent operation of percentage differential protection delayed by CT saturation and other factors during serious internal fault. It can prevent influence of steady state and transient CT saturation during external fault due to its percentage restraint characteristic and can operate correctly and quickly during internal fault and CT being saturated. Operation criterion of this high setting percentage differential protection is

×>×>

rd

ed

IIII

0.12.1

(Equation 3-30)

Where:

Differential current dI and restraint current rI are the same as mentioned above.

When fault occurs, the operation criterion will be discriminated phase by phase and percentage differential protection will operate if the criterion is met.

Parameters of this protection are configured during manufacturing and not need to be configured in site.



3.3.4.4 Unrestrained differential protection(UIDP)

This protection will operate and trip immediately if differential current of any phase is higher than its setting.

3.3.4.5 Differential current abnormality alarm and CT circuit failure blocking function

Differential current abnormality alarm with percentage restraint (see section 3.3.26.2) and instant CT circuit failure blocking function (see section 3.3.26.3) are equipped with the equipment.

CT circuit failure blocking function can be configured by logic setting [Opt_CTS_Blk_PcntDiff_Gen]. When such failure occurs and is discriminated, issuing alarm signal only or blocking percentage differential protection is optional. If the logic setting is set as 1, percentage differential protection will be blocked immediately.

3.3.4.6 Logic diagram of percentage differential protection

SPDP element

&EBI_Diff_Gen =1

[En_Diff_Gen] =1

CTS element

&

FD_Diff_Gen =1

&

CT saturation detection element

HSDP element

&EBI_Diff_Gen =1

[En_Diff_Gen] =1

CTS element

&&

>=1

UIDP element

&EBI_Diff_Gen =1

[En_Diff_Gen] =1

&

FD_Diff_Gen =1

Op_InstDiff_Gen

FD_Diff_Gen =1

[En_InstDiff_Gen] =1

[En_PcntDiff_Gen] =1

[En_PcntDiff_Gen] =1

Op_PcntDiff_Gen

Figure 3-7 Logic diagram of percentage differential protection of generator or exciter

Where:

EBI_Diff_Gen is the position flag of binary input for enabling all kinds of differential protection of generator.

FD_Diff_Gen is the internally generated flag indicating that fault detector of differential protection



picks up.

CTS element indicates that CT supervision program detects failure of CT circuit with no delay considered into account.

CT saturation detection element indicates that CT is in saturation condition.

3.3.5 DPFC Current Differential Element

If slight fault occurs in generator or transformer, steady state differential protection may not response sensitively due to influence of load current. DPFC percentage differential protection of generator and transformer is equipped with the equipment for that and it can significantly improve sensitivity of the protection during small current internal fault of generator and transformer.

3.3.5.1 Operation characteristic of DPFC

The operation criteria of DPFC percentage differential are as follows:

∆+∆+∆+∆=∆

∆+∆+∆+∆=∆

>∆−>∆

<∆∆>∆+∆>∆

••••

4321

4321

23.075.026.0

25.1

IIIII

IIIII

IIIIIIIII

III

d

r

ererd

errd

dthdtd

(Equation 3-31)

Where:

dtI∆ is floating threshold which increases progressively along with DPFC increasing. Take its

multiple as 1.25 can ensure threshold voltage always a bit higher than imbalance current. So that unwanted operation of the equipment can be avoided during power swing and frequency deviation conditions.

For differential protection of main transformer, 1I∆ , 2I∆ , 3I∆ and 4I∆ are DPFCs of currents of

sides 1 and 2 at HVS of main transformer, terminal of generator and HV side of stepdown transformer respectively.

For differential protection of generator, 1I∆ and 2I∆ are currents at the terminal of generator

and neutral point respectively. 3I∆ and 4I∆ have not specified.

For split phase transverse differential protection, 1I∆ and 2I∆ are currents of two branches of

neutral point.

dI∆ is DPFC of differential current. dthI is fixed threshold. rI∆ is DPFC of restraint current



whose maximum value is taken for actual restraint.

Note:

Calculation of restraint current of DPFC percentage differential protection is different from the steady state percentage differential protection, it is difficult to test this function on site, so we recommend only qualitative function test on site.

DPFC differential protection is equipped to each phase of generator, but user should know that the restraint DPFC quantity for every phase is the same maximum value among the three phases.

The following figure shows operating characteristic of DPFC percentage differential protection.

2 Ie

diffe

ren

tial c

urre

nt

0.75

0.6

restraint current

? Id

? Ir

Icdqd

Figure 3-8 Operating characteristic of DPFC percentage differential protection

When fault occurs, the operation criterion will be discriminated phase by phase and percentage differential protection will operate if the criterion is met. For DPFC percentage differential protection of main transformer, second harmonic or waveform inrush current blocking and fifth harmonic over excitation blocking are adopted. It can prevent influence of steady state and transient CT saturation during external fault due to its percentage restraint characteristic.

This protective element has high ability to eliminate the effect of transient and steady saturation of CT during the external fault because the restraint coefficient is set at a higher value.



3.3.5.2 Logic scheme of DPFC differential protection

Figure 3-9 Logic diagram of DPFC percentage differential protection

In the figure:

Op_DPFC_Diff_Gen is the internally generated flag indicating equation 3-31 is meet.

EBI_Diff_Gen is the position flag of binary input for enabling all kinds of differential protection of generator.

Flg_IntanCTS is the internally generated flag indicating that CT supervision program detects failure of CT circuit with no delay considered into account.

Settings of DPFC percentage differential protection is are fixed and need not to be set on site.

3.3.6 Restrict earth fault protection of main transformer or stepdown transformer (REF)

Restricted earth fault (REF) protection is also called zero-sequence differential protection, which includes zero-sequence percentage differential protection element and unrestrained instantaneous zero-sequence differential protection element. REF protection is used to protect the auto-transformer or the transformer with neutral point earthed with/without resistance.

3.3.6.1 Amplitude ratio compensation

If CTs used for REF have different ratios, then the ratio compensation is needed. Here is the method.

bTA

TAph K

KKK ×=

max_

)4,min(min

max

−

−=TA

TAb K

KK (Equation 3-32)

Where:

TAK is the CT ratio at calculated side.

min_TAK is the minimum CT ratio among all side.

max_TAK is the maximum CT ratio among all side.



In principle, this method take the minimum rated secondary current of all sides as the base of calculation and all other sides will be considered as its multiples. If ratio of the maximum CT ratio to minimum CT ratio is larger than 4, the multiple of the maximum to minimum will be taken as 4 and other side will be calculated proportionally. If ratio of the maximum to minimum is less than 4, the multiple of the minimum rated current will be taken as 1, and other side will be calculated

proportionally. Thus the maximum setting range of current ration correction coefficient phK of

each side can be up to 4.

The currents used in the following analyze are based on the assumption that they have been adjusted, that means the currents are the products of original current of each side and its own

adjustment coefficient ( phK ).

3.3.6.2 Principle of zero-sequence percentage differential protection (PcntREF)

Zero-sequence percentage differential protection is used for earth fault at HV side of main transformer(Wye connection), LV side of stepdown transformer(Wye connection). Its operation criteria are as follows:

−++=

=×>

>

••••

nd

nr

rbld

cdqdd

IIIII

IIIIIIKI

II

00302010

00302010

000

00

,,,max (Equation 3-33)

Where:

01I , 02I , 03I are zero sequence currents of branches A1, A2, A3. For HV side of main

transformer, there are only one branch 01I and other branches have no definition. For LV side of

stepdown transformer, 01I , 02I , 03I are zero sequence currents of branches A1, A2, A3

according to the actual situation.

nI0 is zero sequence current on neutral point side.

cdqdI0 is the pick up setting of zero-sequence percentage differential protection.

dI0 is zero-sequence differential current.

rI0 is zero-sequence restraint current.



blk 0 is the setting of percentage restraint coefficient of zero-sequence percentage differential

protection. blk 0 = 0.5 is recommended;

When equation above is satisfied, the zero-sequence percentage differential protection will operate. Zero-sequence differential currents on various sides except neutral point are got from internal calculation, and the polarity check of zero-sequence current transformers (CT) on various sides is not needed.

Figure 3-10 shows operation characteristic of this zero-sequence percentage differential protection.

3.3.6.3 Unrestrained instantaneous zero-sequence differential protection (UIREF)

The aim of unrestrained instantaneous zero-sequence differential protection for transformer is to accelerate the trip speed for transformer’s inner earth fault with high fault resistance. So the element does not need any block element, but the setting should be greater than maximum inrush current.

The operation of this protection shall trip all breakers at all sides of a transformer when any unrestrained zero-sequence differential current is higher than its setting. Its operation criterion is:

]_[0 InstREFII d > (Equation 3-34)

Where:

dI0 is the zero-sequence differential currents.

[I_InstREF] is the setting of the unrestrained instantaneous zero-sequence differential protection.

Figure 3-10 shows operation characteristic of this unrestrained instantaneous differential protection.

It

Operation area of UIREF

Operation area of PcentREF

Figure 3-10 Operating characteristic of restricted earth fault protection



The meaning of dI0 , rI0 , blK0 , and cdqdI0 has been described.

tI will be automatically changed according to the pickup current cdqdI0 and restrict coefficient

blK0 .

3.3.6.4 Prevention of unwanted operation due to difference of CT transient characteristics

Difference of transient characteristic and saturation of CT will increase zero sequence current in differential scheme during external three-phase short circuit fault. In order to eliminate this effect, positive sequence current restraint blocking criterion and CT saturation criterion are used. Positive sequence current restraint principle can be expressed as following:

100 * II β> (Equation 3-35)

Where:

0I is the zero sequence current at one side.

1I is its corresponding positive sequence current.

0β is a proportional coefficient.

The relay also adopts 2nd harmonic component to identify the CT saturation.

3.3.6.5 Zero sequence differential current abnormality alarm

When the zero sequence differential current is above the alarm setting [I_Alm_REF] for 10s, the circuit alarm for REF protection [Alm_REF] will be issued. But the REF protection is also in service.

3.3.6.6 Logic scheme

HV side of main transformer and LV side of stepdown transformer have restricted earth fault protection and their logics are same. Here take HV side of main transformer as an example.

Figure 3-11 Logic diagram of restricted earth fault protection at HV side of main transformer



Op_REF_Tr: restricted earth fault protection of main transformer.

EBI_REF_Tr: binary input of REF of main transformer is “1”.

[En_EF_Tr]: enable earth fault protection of main transformer.

3.3.7 Backup protection of main transformer

3.3.7.1 Phase-to-phase impedance protection

3.3.7.1.1 Operation characteristic of impedance protection

Impedance protection is used as backup protection of generator-transformer unit. Three kinds of impedance characteristic can be selected, i.e., circular impedance, directional circular impedance and drifted circular impedance characteristics. Circular impedance characteristic suits case of forward setting of a zone being equal to its reverse setting. Directional circular impedance characteristic suits case of reverse setting of a zone being set as 0. Drifted circular impedance characteristic suits case of forward setting of a zone being higher than its reverse setting. Reach angle of impedance protection is 78° . Positive direction of the impedance protection is configurable and generally points to transformer.

Figure 3-12 shows operation characteristic of impedance element. In this figure, I is current of a phase, U is corresponding phase-to-phase voltage, Zn is reverse impedance setting, Zp is forward impedance setting.

jX

R

nZI•

−nZIU

••

+

pZI•

•

U

pZIU••

−mϕ

Figure 3-12 Operation characteristic of impedance element

Operation criterion:

oo 270)(

)(90 <+

−< ••

••

n

P

ZIU

ZIUArg (Equation 3-36)

The fault detector of impedance protection adopts DPFC of phase current and negative sequence current. Initiation of the fault detector will be lasted for 500 ms and will be kept if impedance relay operates during this time interval. Operation criterion of the fault detector is




Where:

tI∆ is floating threshold which increases progressively along with DPFC increasing. Take its

multiple as 1.25 can ensure threshold current always a bit higher than imbalance current. So that unwanted operation of the equipment can be avoided during system swing and frequency deviation conditions.

thI is the fixed threshold. When DPFC of phase-to-phase current is higher than 0.3 Ie, the fault

detector operates.

The impedance protection will be disabled automatically if the VT circuit failure is discriminated.

3.3.7.1.2 Logic diagram of distance protection of transformer

Z1 Element

Flg_VTS =0

t

FD_Dist_HVS

Impedance protection tripping

&

&

&[En_PPF_Tr] =1

EBI_PPF_Tr =1

Figure 3-13 Logic diagram of distance protection of transformer

Where:

Z1 Element is internally generated indicating that distance protective element of transformer operates.

EBI_PPF_Tr is position flag of binary input for enabling phase-to-phase backup protection of HV side which including phase-to-phase distance protection and voltage-controlling overcurrent protection. “1” means enabled.

3.3.7.2 Voltage controlled overcurrent protection of main transformer

Function of overcurrent protection with composite voltage blocking is equipped with RCS-985A. This protection, consisting of 2 stages and 2 time delays per stage, is used for phase-to-phase backup protection of main transformer. Of which, function of composite voltage element can be enabled or disabled by configuration of logic setting.

3.3.7.2.1 Voltage control element

The voltage control element is an element which will operate if phase-to-phase voltage is lower than its setting or negative sequence voltage is higher than its setting.

Criteria:

ΦΦU < [Vpp_VCE_Tr] Or >2U [V_NegOV_VCE_ Tr] (Equation 3-38)



Where:

ΦΦU is phase-to-phase voltage of local side.

2U is negative sequence voltage of local side.

[Upp_VCE_Tr] is setting of undervoltage control element of local side.

[U2_VCE_Tr] is setting of negative-sequence overvoltage control element of local side.

All two stages of definite time overcurrent protection can be controlled by voltage element by configuring related logic settings [En_VCE_Ctrl_OC1_Tr] and [En_VCE_Ctrl_OC2_Tr].

Meanwhile, User can decide by which side voltage overcurrent protection be controlled by configuring related settings. For example, if the setting [En_LVS.VCE_Ctrl_OC_Tr] is set as “1”, then the overcurrent protection is controlled not only by HV side voltage element but also by LV side voltage element.

3.3.7.2.2 Function of current memory

For self and parallel-excited generator, current will decrease so quick during fault that it may be lower than overcurrent setting before tripping. So function to remember fault current is equipped with this protection. Logic setting [En_Mem_Curr_Tr] is used for configuration of this function.

Note:

When logic setting [En_Mem_Curr_Tr] is enabled, the overcurrent must be controlled by voltage element.

3.3.7.2.3 Influence of VT circuit failure on voltage control element

When VT on one side is under maintenance or bus-tie breaker is used for the transformer but its VT has not been switched over to the protection equipment, VT circuit failure is detected. Logic setting [Opt_VTS_Ctrl_OC_Tr] is used to configure performance of voltage control element during VT circuit failure. When this logic setting is set as “1”, if VT circuit failure is detected, the voltage control element cannot pick up and the protection will not operate. When this logic setting is set as “0”, if this side VT circuit failure is detected, voltage control element is forced to be satisfied, then the voltage controlled directional overcurrent protection will becomes a pure overcurrent protection.



3.3.7.2.4 Logic diagram of voltage controlled overcurrent protection of transformer

Composite voltage operates

[En_VCE_Ctrl_OCn_Tr]=1

Overcurrent element

[Opt_VTS_Ctrl_OC_Tr]=1

Flag_VTS=1

U2>[V_NegOV_VCE_ Tr]

[En_Mem_Curr_Tr]=1

&

FD of OC prot

&

Upp< [Vpp_VCE_Tr]

&


t

&

&

&

[En_PPF_Tr]=1

EBI_PPF_Tr=1

>=1

>=1

>=1

>=1Op_OCn_Tr

1

1

1

Figure 3-14 Logic diagram of voltage controlled overcurrent protection of transformer

Where:

Flag_VTS is the internally generated flag indicating the failure of VT circuit.

[Opt_VTS_Ctrl_OC_Tr] is the setting to configure the VCE mode under VT failure.

[En_Mem_Curr_Tr] is the setting to enable/disable the function of current memory.

Overcurrent element indicates that the maximum phase current is above the settings.

[En_VCE_Ctrl_OCn_Tr] is the setting to enable/disable the VCE element in stage n of overcurrent protection of transformer.

[En_PPF_Tr] is the setting to enable/disable phase to phase fault protection.

EBI_PPF_Tr is the binary input to enable/disable phase to phase fault protection.

Op_OCn_Tr indicates that the stage n of overcurrent protection operates.

3.3.7.3 Zero sequence directional overcurrent protection of transformer

Zero sequence overcurrent relay is mainly used as backup protection of ground fault for transformer with neutral point earthed. Two stages and two time delays zero sequence overcurrent relay is equipped with RCS-985A. The zero sequence current is usually adopted from neutral point CT.

By setting logic settings, following functions of any stages of this protection can be selected:

Ø Whether it will be controlled by directional relay;



Ø Whether it will be controlled by zero sequence voltage;

Ø Whether it will be enabled or disabled.

3.3.7.3.1 Direction element

The direction of zero sequence overcurrent protection points to system definitely with the reach angle 75º. If the VT failure at HV side occurs, the directional element will not work.

The voltage used by directional relay is definitely the calculated voltage. The direction mentioned above is based on the CT positive polarity for calculated zero sequence current being at the side of busbar. The details are shown in Figure 1-1 to Figure 1-2.

Figure 3-15 shows operating characteristic of directional protection in which the hatched area is operation zone.

f lm = 75 °

Io

3U0

Point to system

Figure 3-15 Operating characteristic of zero sequence directional overcurrent protection

3.3.7.3.2 Zero sequence voltage element

Zero sequence voltage element uses definitely the open-delta voltage of VT.

3.3.7.3.3 Logic diagram of zero sequence overcurrent protection

3U0>[V_ROV_VCE_Tr]

[En_VCE.ROV_Ctrl_ROCn_Tr]=1 1

>=1

Zero sequence overcurrent element

&

[En_EF_Tr]=1

EBI_EF_Tr=1

&Zero directional element

[En_Dir_Ctrl_ROCn_Tr]=1 1

>=1

Op_ROCn_Tr&

FD of ROC

t

Figure 3-16 Logic diagram of zero sequence overcurrent protection of transformer



Where:

[En_VCE.ROV_Ctrl_ROCn_Tr] is used to select whether zero sequence overcurrent relay will be blocked by zero sequence overvoltage. If the logic setting is set as “1”, it will be blocked by zero sequence overvoltage.

[En_Dir_Ctrl_ROCn_Tr] is used to select whether stage n of zero sequence overcurrent relay is control by directional relay. If this logic setting is set as “1”, the stage n of zero sequence overcurrent protection will be controlled by directional relay.

Zero directional element indicates that the criterion of directional element is met.

Zero sequence overcurrent indicates that the zero sequence current is above the setting.

En_EF_Tr is the setting to enable/disable the earth fault protection of transformer.

EBI_EF_Tr is the binary input to enable/disable the earth fault protection of transformer.

Op_ROCn_Tr indicates that the stage n of zero sequence overcurrent protection operates.

3.3.7.4 “Gap” zero sequence overvoltage protection

“Gap” zero sequence overvoltage protection is used for backup protection of main transformer with neutral point ungrounded or grounded through gap. Zero sequence overvoltage protection with one stage and two time delays is equipped for RCS-985A.

Zero sequence overvoltage protection can be enabled by link of the protection panel as well as external contact input. If the setting [En_BI_Ctrl_ROC_Gap_Tr] is set as “0”, the Gap ROV protection is controlled by the link only. If the setting [En_BI_Ctrl_ROC_Gap_Tr] is set as “1”, the Gap ROV protection is enabled only when both the link is closed and binary external input (BI_Reserved) is “1”.

3.3.7.5 Zero sequence voltage alarm at LV side of main transformer

According to the case that circuit breaker is equipped at the terminal of generator, a zero sequence voltage alarm can be provided on main transformer LV side as the supervision of earthing fault. The voltage setting is usually set as 10V to 15V. The alarm can be enabled or disabled by logic setting [En_Alm_ROV_LVS_Tr]. The function outputs alarm signals. To RCS-985A, AC voltage input is from connectors (19, 20) of 10B.

3.3.7.6 VT circuit failure supervision

VT circuit failure supervision principle refers to section 3.3.27.

3.3.7.7 Protection of other failures

Overload alarm and initial cooling are equipped with backup protection of HV side of main transformer. Overload alarm and initial cooling can be enabled or disabled by logic settings [En_OvLd_Tr] and [En_InitCool_OvLd_Tr]. Outputs of initial cooling are three normal open contacts.



3.3.8 Interturn fault protection of generator

3.3.8.1 High sensitive transverse differential protection

Transverse differential protection installed on connection between two neutral points of generator is used as main protection of short circuit interturn fault of generator’s stator winding, open circuit fault of branches and short circuit fault between phases.

Since this protection adopts frequency tracing, digital filtering and full cycle Fourier algorithm, the third harmonic can be reduced to 1/100 within the frequency tracing range and the protection can response the fundamental component only.

This protection comprises two stages: unsensitive stage (high setting stage) and sensitive stage.

3.3.8.2 High setting stage of the protection

This stage is equivalent to traditional transverse differential protection. When the transverse differential current is in excess of the setting [I_UnsensTrvDiff_Gen], the protective element operates.

3.3.8.3 Sensitive stage of the protection

Phase current percentage restraint principle is used for this stage. The operation criterion is

>≤

×−

×+>

>

eMAX

eMAX

hcZDe

eMAXhcZDd

hcZDd

IIwhenIIwhen

II

IIKI

II

)1( (Equation 3-39)

Where:

dI is the transverse differential current ,

hcZDI is the transverse differential current setting [I_SensTrvDiff_Gen],

MAXI is the maximum value of three phase current of generator,

dI is the rated current of generator

hcZDK is the restraint coefficient.

Phase current percentage restraint transverse differential principle can ensure no unwanted operation during external fault and sensitive operation during internal fault. As this principle is adopted, current setting of the transverse differential protection shall be only higher than unbalance current during normal operation and much less than that of traditional transverse differential current protection. Sensitivity for interturn fault of generator can be enhanced then.

This protection has also a floating threshold for high transverse differential unbalance current



during other normal operation conditions.

Operation of the high sensitive transverse differential protection will lead a tripping immediately. When rotor of generator is grounded at one point, a configurable time delay [t_TrvDiff_Gen] will be inserted in the tripping course. Figure 3-17 shows logic diagram of this protection.

3.3.8.4 Logic diagram of sensitive transverse differential protection

Alm_1PEF_Rot =1

[En_IntTurn_Gen] =1

[En_Sens_TransDiff_Gen] =1

t

FD_TransDiff_Gen =1

>=1&

&

&

&

[En_Alm_1PEF_Rot] =1

Op_TransDiff_Gen =1 Sensitive transverse diffrential protection

tripping&

EBI_IntTurn_Gen =1

[En_1PEF_Rot] =1

Figure 3-17 Logic diagram of transverse differential protection of generator

Where:

Alm_1PEF_Rot is internally generated flag indicating the one-point earth fault protection of rotor operates.

EBI_1PEF_Rot is position flag of binary input for enabling one-point earth fault protection of rotor. “1” means enabled.

EBI_IntTurn_Gen is position flag of binary input for enabling interturn protection of generator, including transverse differential protection, longitudinal zero sequence voltage protection and directional DPFC protection. “1” means enabled.

3.3.8.5 Longitudinal zero sequence voltage protection

Longitudinal zero sequence voltage protection is configured for inter-turn fault of stator winding of generator. It uses open-delta voltage of dedicated VT at the terminal of generator as the criterion.

Since this protection adopts frequency tracing, digital filtering and full cycle Fourier algorithm, the third harmonic can be reduced to 1/100 within the frequency tracing range and the protection can response the basic wave component only.

This protection comprises two stages: unsensitive stage (high setting stage) and sensitive stage.

Ø High setting stage of the protection

Setting of this stage shall be higher than maximum unbalance voltage during external fault, whilst directional flag indicating internal fault must be satisfied. When measured longitudinal zero sequence voltage is in excess of the setting [V_UnsensROV_Longl_Gen] and lasts for longer than the delay setting [t_ROV_Longl_Gen], this protective element will trip breakers according to the configuration of [TrpLog_IntTurn_Gen].

Ø Sensitive stage of the protection



Phase current percentage restraint principle is used for this stage. The operation criterion is

≥×+=<×=

××+>

eMAX2eMAXm

eMAX2m

zozdemzozo

I Iwhen I 3) - I (I I I Iwhen I 3 I

U ] / II K[ 1U (Equation 3-40)

Where:

zozdU is the zero sequence voltage setting [V_SensROV_Longl_Gen],

MAXI is the maximum value among three phase current of generator,

2I is the negative sequence current of generator,

eI is the rated current of generator

0zK is the restraint coefficient.

Likely to transverse differential principle, this protective element can ensure no unwanted operation during external fault and sensitive operation during internal fault. As for the percentage restraint characteristic, zero sequence voltage setting of the zero sequence voltage protection shall be only higher unbalance voltage during normal operation. Sensitivity for interturn fault of generator can be enhanced then.

This protective element has also a floating threshold for high unbalance longitudinal zero sequence voltage during other operation conditions.

Operation of this element is usually configured to be delayed shortly by 0.1 s – 0.2 s.

3.3.8.6 VT circuit failure alarm and blocking

Longitudinal zero sequence voltage protection for inter-turn fault of stator shall be blocked when the dedicated VT2 circuit at the terminal of generator fails. There are two criteria to decide to whether or not block the protection.

Criterion 1 (including 3 sub-criteria):

— Negative sequence voltage of VT1: 3U2 < U2_set1;

— Negative sequence voltage of VT2: 3U2’ < U2_set2;

— Calculated zero sequence voltage of VT2: 3U0’>Uozd(zero sequence voltage setting).

In the above three criterion, if one of the former two and the third are met simultaneity, the longitudinal zero sequence voltage protection will be blocked.

Criterion 2 (including 3 sub-criteria):



5V |U-U|5V |U-U|5V |U-U|

caCA

bcBC

abAB

>>>

(Equation 3-41)

Where: ABU , BCU , CAU are phase-to-phase voltages of VT1 and abU , bcU , caU are

phase-to-phase voltages of VT2.

That one of these three sub-criteria is met means criterion 2 picks up.

When any of criterion 1 and criterion 2 operates, alarm of VT2 circuit failure will be issued by delay 40 ms and zero sequence voltage protection will be blocked.

After VT circuit failure reverting to normal condition, blocking can be released by pressing the Target-reset button on the faceplate of the protection.

3.3.8.7 Longitudinal zero sequence voltage protection logic diagram

Op_LongiROV_Sta =1

Flg_VTS =0

[En_IntTurn_Gen] =1

&& & t

[En_SensROV_Longl_Gen] =1

FD_IntTurn_Sta =1

longitudinal zero sequence voltage

protection trips

EBI_IntTurn_Gen =1

Figure 3-18 Logic diagram of longitudinal zero sequence voltage protection Where:

Op_LongiROV_Sta is internally generated flag indicating the longitudinal zero-sequence overvoltage protection of stator operates.

3.3.8.8 Directional DPFC protection for interturn fault

The operation criterion is:

dFeIUF j ×+>×∆×∆∆ Φ∧•

25.1]Re[ 22 ε＝ (a)

1.25du0.5V U2 +>∆ (b) (Equation 3-42)

1.25di0.02In I2 +>∆ (c)

If the three criterions are met simultaneity, the directional flag of protection is set. Under negative sequence voltage and negative sequence current controlling, the protection operates after 0.2-0.5s time delay.



AC current and voltage input of directional DPFC protection are from the generator terminal directly. When the VT1 at the generator terminal fails, directional DPFC protection is blocked. The setting is default setting. The sensitivity is about 3V of longitudinal zero sequence voltage.

Directional DPFC protection for inter-turn fault can’t response to inter-turn fault before the generator is connected into the power system.

3.3.9 Backup protection of generator

3.3.9.1 Phase-to-phase impedance protection

Two stages impedance protection is equipped at the terminal of generator as its phase-to-phase backup protection. Phase-to-phase current used in impedance relay is derived from CT at the neutral point of generator. Circular impedance, directional circular impedance or drifted circular impedance characteristic can be selected to act for these two stages. Circular characteristic suits case of forward setting of a zone being equal to its reverse setting. Directional circular characteristic suits case of reverse setting of a zone being set as 0. Drifted circular characteristic suits case of forward setting of a zone being higher than its reverse setting. Reach angle of impedance protection is 78°. Positive direction of the impedance protection is configurable and generally points to generator.

Figure 3-19 shows operation characteristic of impedance element. In this figure, I is current of a phase, U is corresponding phase-to-phase voltage, Zn is reverse impedance setting, Zp is forward impedance setting.

Operation criterion:

oo 270)(

)(90 <+

−< ••

••

n

P

ZIU

ZIUArg (Equation 3-43)

DPFC of phase current and negative current element are adopted as fault detector of impedance protection. Initiation of the fault detector will be extended to 500 ms and will be kept if impedance relay operates during this time interval. Operation criterion of the fault detector is


Where:

tI∆ is floating threshold which increases gradually along with DPFC increasing. Take its multiple

as 1.25 can ensure threshold voltage always a bit higher than imbalance voltage.



jX

R

nZI•

−nZIU

••

+

pZI•

•

U

pZIU••

−mϕ

Figure 3-19 Operation characteristic of impedance element

So unwanted operation of the equipment can be avoided during system swing and frequency

deviation conditions. thI is the fixed threshold. When DPFC of phase-to-phase current is higher

than 0.2 Ie, the fault detector operates.

Note:

If TV circuit failure occurs, the distance protection of generator will be blocked.

3.3.9.2 Logic diagram of distance protection of generator

Op_Zn_Gen =1

Flg_VTS =0

t

FD_Dist_GenOp_Zn_Gen

&

&

&[En_PPF_Gen] =1

EBI_PPF_Gen =1

Figure 3-20 Logic diagram of distance protection of generator

Where:

Op_Zn_Gen is internally generated indicating stage n of distance protective element of generator operates.

EBI_PPF_Gen is position flag of binary input for enabling phase-to-phase backup protection of generator which including phase-to-phase distance protection and voltage-controlling overcurrent protection. “1” means enabled.

3.3.9.3 Voltage controlled overcurrent protection

This protection is used as a backup protection of generator, main transformer, HV busbar and neighboring power lines. There are two stages with their own delay settings respectively. Stage 1 is used to trip bus coupler breaker or other circuit breaker and stage 2 to shut down the generator. Figure 3-21 shows its logic diagram.

(1) Composite voltage element

Composite voltage element consists of phase-to-phase undervoltage element and negative



sequence overvoltage element. These two elements are jointed together by OR gate. By relevant logic setting, stage 1 and stage 2 of overcurrent protection can be configured to be controlled by composite voltage element respectively.

(2) Function of current memory

For generators with self shunt excitation, current will decrease so quickly during fault that it may be lower than overcurrent setting before tripping. So function to remember fault current is equipped with this protection. Logic setting [Opt_ExcMode_Gen] is used for configuration of this function. See details about the setting in section 7.3.9.

Note:

When logic setting [En_Mem_Curr_Gen] is enabled, the overcurrent must be controlled by voltage element.

(3) Blocking by HV side composite voltage

Overcurrent protection can be blocked not only by composite voltage at terminal of generator but also by composite voltage on HV side of main transformer. This function can be configured by setting logic setting [En_HVS.VCE_Ctrl_OC_Gen] as “1”.

(4) Protection performance during VT circuit failure

A logic setting [Opt_VTS_Ctrl_OC_Gen] is used to configure action of composite voltage element during VT circuit failure. When this logic setting is set as 1, if this side VT circuit failure is detected, the composite voltage element will not meet conditions to operate. When this logic setting is set as 0, if this side VT circuit failure is detected, composite voltage element is disabled, the overcurrent protection will not be blocked and becomes a pure overcurrent protection.



3.3.9.4 Logic Diagram of voltage controlled Overcurrent Protection

Op_VCE_Gen =1

[En_VCE_Ctrl_OCn_Gen] =1

Op_OCn_Gen =1

[Opt_VTS_Ctrl_OC_Gen]=0

Flg_VTS = 0

U2>[V_NegOV_VCE_Gen]

[Opt_ExcMode_Gen] =1

&

FD_OC_Gen =1

&

Upp<[Vpp_VCE_Gen]

&

Op_VCE_Gen =1

t

&

&

&

[En_PPF_Gen] =1

BI_PPF_Gen =1

>=1

>=1

>=1

>=1

Stage n of overcurrent protection operates

Figure 3-21 Logic diagram of overcurrent relay with composite voltage blocking

Where：

Upp represents any one of the three phase-to-phase voltage of generator.

U2 is negative sequence voltage of generator calculated by protection.

Op_OCn_Gen is internally generated flag indicating stage n of overcurrent operates, which means the measured current is in excess of its setting [I_OCn_Gen]. Where n represents stage serial number 1 and 2.

As for principle of discrimination of VT circuit failure, see section 3.3.27.

3.3.10 Earth fault protection of stator

3.3.10.1 Fundamental zero sequence overvoltage earth fault protection

Single-phase earth fault within 85% - 95% range from terminal of stator winding can be protected by fundamental zero-sequence overvoltage protection.

Fundamental zero-sequence overvoltage protection reacts to magnitude of zero sequence voltage of generator. Since it adopts frequency tracing, digital filtering and full cycle Fourier algorithm, the third harmonic can be reduced to 1/100 within the frequency tracing range and the protection can response the basic wave component only.

This protection comprises two stages: sensitive stage and unsensitive stage (high setting stage).

(1) Sensitive stage of the protection

Operation criterion for alarm of this stage is



0zdn0 U U > (Equation 3-45)

Where:

unb.maxrel0zd UK U = , U0zd is operation threshold setting of fundamental zero sequence voltage

[V_SensROV_Sta].

unb.maxU is the maximum measured value of unbalance zero sequence voltage.

relK is reliability coefficient, 1.2~1.3 in general.

To assure its security, user should check the setting by comparing it with the transferred zero sequence voltage through coupling capacitance between HV side and LV side of transformer when external earth fault occurs on the HV side of the transformer. Meanwhile, settings, including time delay and operation setting, should be considered to cooperate with that of earth fault protection of the system.

(2) High setting stage of the protection

Operation criterion for alarm of this zone is

0hzdn0 U U > (Equation 3-46)

Where:

Un0 is zero sequence voltage of neutral point of generator

0hzdU is the zero sequence voltage high setting. 20V ~ 25V is recommended generally.

3.3.10.2 Third harmonic voltage ratio earth fault protection of stator

This protection is designed to cover only about 25% of earth fault of the stator. Third harmonic voltage of generator terminal is got from its open-delta zero sequence voltage. Third harmonic voltage of neutral point side is got from neutral point VT of the generator.

Operation criterion of this protection

3wzd3N3T K / UU > (Equation 3-47)

Where:

U3T and 3NU are third harmonic voltage of generator terminal and neutral point respectively.

3wzdK is the third harmonic voltage percentage setting.



During incorporation of generator to power system, the ratio / UU 3N3T changes considerably

owing to variation of equivalent capacitive reactance at generator terminal. So two different settings are designed for protection before and after connection of generator with system, and these two settings can be switched over with alternation of contacts’ position of the terminal breaker.

In addition, settings are provided for deciding whether the ratio protection of third harmonics voltage is used for alarm or tripping or both.

3.3.10.3 Third harmonic voltage differential ground protection

Operation criterion of this protection

NNtT UKreUKU 333 ×>×−•••

(Equation 3-48)

Where:

•

TU 3 and •

NU 3 are third harmonic vector voltage of generator terminal and neutral point,

tK is automatic tracing regulation coefficient.

reK is third harmonic differential percentage setting.

This protection is enabled automatically when the generator has been connected with the system and load current is higher than 0.2 Ie (generator rated current) and only issues alarms if operates.

3.3.10.4 VT circuit failure blocking

(1) Open-delta VT circuit failure alarm of terminal and neutral point of generator

Since open-delta voltages of VT at neutral point and generator terminal are taken for zero sequence voltage protection of stator, failure of these VT circuits will make this protection fail to operation. So alarm shall be issued during this case. Third harmonic voltage ratio criterion and third harmonic voltage differential criterion shall be disabled during VT circuit failure at generator neutral point.

Criterion of VT circuit failure:

Positive sequence voltage of secondary winding of generator terminal is higher than 0.9Un and third harmonic of zero sequence voltage is lower than 0.1V.

VT circuit failure alarm will be issued by delay 10s and reverted automatically by delay 10s when the failure vanishes.

(2) Primary circuit failure of VT1 at generator terminal

Secondary circuit failure of VT1 of generator terminal will not influence ground protection of stator.



Primary circuit failure of VT1 of generator terminal will cause basic wave component of zero sequence voltage of generator terminal increasing and third harmonic component decreasing, and will not cause unwanted operation of basic wave zero sequence voltage protection and third harmonic voltage ratio protection. However, it will cause unwanted operation of third harmonic voltage differential protection, so this protection shall be blocked during this failure. Operation criterion of this failure are:

Negative sequence voltage of VT2, 3U2’ < 3V;

Negative sequence voltage of VT1, 3U2 > 8V;

Calculated zero sequence voltage of VT1, 3U0> 8V.

When these criterions are met, VT1 primary circuit failure alarm will be sent by short delay and third harmonic voltage differential protection will be blocked.

3.3.10.5 Logic diagram of earth fault protection of stator

Figure 3-22 and Figure 3-23 show logic diagrams of fundamental zero sequence voltage earth fault protection and third harmonic voltage earth fault protection respectively.

Op_SensROV_Sta =1

Flg_VTS =0

[En_EF_Sta] =1

EBI_En_ROV_Sta =1

[En_Alm_ROV_Sta] =1

t

t

FD_EF_Sta =1

&

&

&

&

[En_Trp_ROV_Sta] =1

basic wave zero sequence voltage protection alarm

basic wave zero sequence voltage protection tripping

Figure 3-22 Logic diagram of fundamental zero sequence overvoltage earth fault protection of stator

Where:

Op_SensROV_Sta is internally generated flag indicating fundamental zero-sequence overvoltage element operates, that is fundamental zero-sequence voltage is in excess of its setting.

EBI_EN_ROC_Sta is state flag of binary input of enabling earth fault protection. “1” means enabled.



Op_V3rdHRatio_Sta =1

Flg_VTS =1

[En_EF_Sta] =1

EBI_En_V3rd_Sta =1

[En_Alm_V3rdHRatio_Sta] =1

t

t

FD_EF_Sta

&

&

&

&

[En_Trp_V3rdHRatio_Sta] =1

third harmonic voltage ratio protection alarm

third harmonic voltage ratio protection tripping

Figure 3-23 Logic diagram of third harmonic voltage earth fault protection of stator

Where:

Op_Alm_V3rdHRatio_Sta is internally generated flag indicating alarm issued by ratio element of 3rd harmonics voltage is available, that is, the ratio is in excess of its setting.

EBI_EN_V3rd_Sta is state flag of binary input of enabling ratio protection of 3rd harmonics voltage. “1” means enabled.

3.3.11 Earth fault protection of rotor

3.3.11.1 Ping-pang type (Switch-over sampling) rotor one point earth fault protection

If one-point earth fault of rotor occurs, insulation resistance between rotor winding and the axis will drop down.

Rotor earth fault protection measures earthing resistance Rg of the winding by an unbalance bridge as shown in Figure 3-24. Corresponding equations can be got by switching over S1 and S2 alternately, and earthing resistance Rg and location of the earthing point “α “ can be found by calculation.

There are two stages equipped for one-point earth protection: sensitive stage and regular stage. Sensitive stage is used for alarm and regular stage for tripping or alarm.

R

R S1 S2 R

R

UU

rotor

+ -

Rg

a

Figure 3-24 Measurement of earth resistance of rotor



3.3.11.2 Ping-pang type rotor two points earth fault protection

If one-point earth protection is used for alarm only, when earth resistance Rg is less than setting of its regular stage[R_1PEF_RotWdg], it will switch over two-points ground protection program by a delay automatically. If location of the earthing point varies and the variation reaches its setting value (fixed value 3%), two points earth fault protection will trip. In order to improve the reliability, the two points earth fault protection can be blocked by setting [En_VCE_2PEF_RotWdg] as “1”. Figure 3-25 and Figure 3-26 show logic diagram of one point and two points earth fault protection of rotor.

3.3.11.3 Logic diagram of earth fault protection of rotor

Rg < [R_Sens_1PEF_RotWdg]

[En_Alm_Sens_1PEF_RotWdg] =1

EBI_1PEF_RotWdg =1

[En_Alm_1PEF_RotWdg] =1

FD_EF_RotWdg =1

&

&

&

&

&

t

t

Rg <[R_1PEF_RotWdg]

[En_Trp_1PEF_RotWdg] =1

sensitive stage of one point earth fault prottion alarm

[En_EF_RotWdg] =1

One-point earth fault protection alarm

One-point earth fault protection tripping

Figure 3-25 Logic diagram of one-point earth fault protection of rotor

t

t two points earth faultprotection tripping

&

Op_1PEF_RotWdg

&

a>3%

[En_EF_RotWdg] =1

[En_2PEF_RotWdg] =1

EBI_EF_RotWdg =1

FD_EF_Rotor =1

[En_VCE_2PEF_RotWdg] =1

Op_V2ndH_VCE_2PEF_RotWdg =1

>=

Figure 3-26 Logic diagram of two-points earth fault protection of rotor

3.3.12 Generator stator overload protection

Stator overload represents average heating of winding of the stator. This protection takes currents at generator terminal and neutral point as its criterion.

3.3.12.1 Definite time stator overload protection

There are two stages equipped with definite time stator overload protection: one for alarm and another for tripping. Figure 3-28 shows its logic diagram.



3.3.12.2 Inverse time stator overload protection

Inverse time stator overload protection consists of three parts: low setting initiator, inverse time part and upper limit definite time part.

Inverse time part can simulates generator-heating process including heat accumulation and

dissipation. When stator current reaches its low setting SZDI , inverse time part initiates and the

heat is accumulated. When the stator current is lower than rated value, the heat accumulation will decrease accordingly.

Figure 3-27 shows the inverse time curve. In the figure, mint is delay of upper limit of inverse time

curve and SZDI is setting of the inverse time protection.

tmin tmax

Iszd

I

Ih

Figure 3-27 Operation curve of inverse time stator overload protection

Operation criterion of inverse time part:

( ) zdsrzdezd KStKII ≥×− ][( 22） (Equation 3-49)

Where:

SZDK is time constant of generator heating,

SRZDK is heat dissipation factor of generator

eZDI is rated secondary current of generator.

Figure 3-29 shows logic diagram of inverse time stator overload protection.



3.3.12.3 Logic diagram of stator overload protection

& t&

&

[En_OvLd_Sta] =1

& tI>[I_Alm_OvLd_Sta]

EBI_Ovld_Sta

FD_Ovld_Sta =1

Definite time stator overload alarm

Definite time statoroverload protection trips

I>[I_OvLd_Sta]

[En_OvLd_Sta] =1

[TrpLog_OvLd_Sta].bit0 =1

Figure 3-28 Logic diagram of stator definite time overload protection

I > [I_InvOvLd_Sta]

[TrpLog_InvOvLd_Sta].bit0 =1

[TrpLog_InvOvLd_Sta].bit0 =1

Inverse time stator overload protection tripping

[EBI_EF_Sta] =1

&

tmin

&

&

&

FD_InvOvLd_Sta =1

Figure 3-29 Logic diagram of inverse time stator overload protection

3.3.13 Negative sequence overload protection

Negative sequence overload reflects overheating on surface of the rotor and other abnormality due to negative sequence current. This protection takes negative sequence current at generator terminal and neutral point as its criterion.

3.3.13.1 Definite time negative sequence overload protection

There are two stages equipped with definite time negative sequence overload protection: one for alarm and the other for tripping. Figure 3-31 shows its logic diagram.

3.3.13.2 Inverse time negative sequence overload protection

Inverse time negative sequence protection consists of three parts: low setting initiator, inverse time part and upper limit definite time part.

Inverse time part can simulate generator-heating process including heat accumulation and dissipation. When negative sequence current reaches its low setting [I_InvNegOC_Sta], inverse time part initiates and the heat is accumulated. When the stator current is lower than permissive continuous negative sequence current [I2_Perm_Sta], the heat accumulation will decrease accordingly.

Operation criterion of inverse time part:

( ) AtIII ezd ≥×− ][( 221

22 ） (Equation 3-50)

Where:



2I is generator negative sequence current,

eZDI is generator rated current,

21I is permissive continuous negative sequence current (per unit value), and

A is negative sequence heating constant of rotor.

Figure 3-30 shows the inverse time curve. In the figure, mint ([tmin_InvNegOC_Sta]) is delay of

upper limit of inverse time curve and SZDI2 ([I_InvNegOC_Sta]) is setting of the inverse time

negative sequence overload protection.

tmin tmax

I2zd

I

Figure 3-30 Operation curve of inverse time negative sequence overload protection of stator

3.3.13.3 Logic diagram of negative sequence overload protection of stator

& t&

&

[En_NegOC_Sta] =1& t

I2>[I_Alm_NegOC_Sta]

EBI_NegOC_Sta =1

FD_NegOC_Sta =1

Definite time negative sequence overload alarm

[En_NegOC_Sta] =1

[TrpLog_NegOC_Sta].bit0 =1

I2>[I_NegOC1_Sta]Definite time negtive sequence overload protection trips

[t_Alm_NegOC_Sta]

[t_NegOCn_Sta]

Figure 3-31 Logic diagram of definite time negative sequence overload protection I >[I_InvNegOC_Sta]

[En_NegOC_Stator]=1

[TrpLog_InvNegOC_Sta].bit0 =1

Inverse time negativesequence overload protection trips

EBI_InvNegOC_Sta =1

&t min

&

&

&

FD_InvNegOC_Sta =1 Figure 3-32 Logic diagram of inverse time negative sequence overload protection



3.3.14 Loss-of-Excitation protection

3.3.14.1 Theory of loss-of-excitation protection

Loss of excitation represents abnormal operation of generator due to excitation failure. There are four criterion used for loss-of-excitation protection: under voltage, stator side impedance, rotor side undervoltage/excitation voltage and power output reduction.

3.3.14.2 Under voltage criterion

Three phase voltages on bus generally and those at generator terminal sometimes are taken as this criterion. Criterion of simultaneous three phases under voltage is

lezdpp U U < (Equation 3-51)

Where:

Upp is phase-to-phase voltage of busbar or of generator terminal.

Ulezd is undervoltage setting [V_BusUV_LossExc_Gen].

When bus voltage is taken as the criterion, if bus VT circuit fails, the protection will be blocked. When generator terminal voltage is taken as the criterion, if one group of VT circuit fails, the other group of VT will be switched over automatically.

3.3.14.3 Stator side impedance criterion

This criterion is impedance circle including asynchronous impedance circle and steady state stabilization limit circle. The operation criterion is

°≥−+

≥° 90270A

B

jXZjXZArg (Equation 3-52)

Where:

AX can be set as the system impedance Xs for steady state stabilization limit circle and

' dA 1/2X X = for asynchronous impedance circle;

BX is taken as ' d1/2XXd + for round rotor generator and /2X )/2X (X '

dqd ++ for salient pole

generator.

The impedance criterion can be combined with reverse reactive power criterion, i.e.,

Q < [Q_RevQ_LossExc_Gen].

Figure 3-33 a) and b) show operation characteristics of steady state stabilization impedance relay and asynchronous impedance relay, where the hatched area is operating area, and the dotted line is operation limit of reverse reactive power.



R

jxZ1

Z2

-QzdR

jx

Z1

Z2

-Qzd

a) b)

(a) (b)

Figure 3-33 Operation characteristic of stator side impedance relay

Besides operation criterion mentioned above, there are also auxiliary operation criterion, namely:

(1) Positive sequence voltage is higher than or equal to 6V;

(2) Negative sequence voltage U2 is lower than 0.1 Un (rated voltage of generator); and

(3) Current of generator is no less than 0.1 Ie (rated current of generator).

3.3.14.4 Rotor side criterion

Rotor side criterion comprises:

(1) Rotor undervoltage criterion: rlzdr U U < ;

(2) Variable exciter voltage criterion: f0dzrr UK U ×××< SX

Where:

Ur is exciting voltage.

rlZDU is the setting [V_RotUV_LossExc_Gen].

sddz X X X += , dX is synchronous reactance of generator (per unit value);

Xs is equivalent reactance on system side connected with the generator (per unit value);

S is rated apparent power of generator (per unit value);

f0U is rated voltage of exciter during generator without load;

K r is reliability coefficient.

If Ur drops to zero or minus value suddenly during loss of excitation, the rotor under voltage criterion will be met quickly before steady state stability limit of the generator reaches. If Ur drops to zero or reduces to a value gradually during loss of excitation, the variable excitation voltage



criterion will be reached. Excitation under voltage or loss of excitation will cause out-of-step, and then excitation voltage and output power of the generator will swing seriously. In this case, the rotor under voltage criterion and the variable excitation voltage criterion will be met and withdrawn periodically in general. So the excitation voltage element will revert with delay during out-of-step condition while the impedance entering the steady state stability limit circle.

3.3.14.5 Reduced power output

Active power criterion for power output reduction is P > Pzd.

When out-of-step occurs during loss of excitation, power output of generator will swing within a certain range. P represents average power output within an oscillation period. Pzd is the setting [P_LossExc_Gen].

3.3.14.6 Logic diagram of loss-of-excitation protection

Three stages are equipped with loss-of-excitation protection: stage 1 is used for reduction of power output and alarm, stage 2 (with bus undervoltage criterion) is used for tripping and stage 3 is used for tripping with long delay.

Figure 3-34

≥

Figure 3-34shows logic diagram of stage 1 of loss-of-excitation protection. If excitation is lost, this stage will be used to reduce power output to a pre-set level and issue alarm.



≥

Figure 3-34 Logic diagram of loss-of-excitation protection stage 1

Figure 3-35 shows logic diagram of stage 2 of loss of excitation protection. If excitation is lost and voltage on HV side bus of main transformer ( or voltage at terminal of generator) is lower than its setting, this stage will trip with delay. In configuring this stage, considering of security, it is strongly recommended that impedance criterion should be used as well as busbar criterion rather than the model that only busbar undervoltage criterion and rotor undervoltage criterion are used.

Upp<[V_BusUV_LossExc_Gen]

t Op_LossExc2_Gen

&

&

Ur<[V_RotUV_LossExc_Gen]

&

[En_BusUV_LossExc2_Gen] =1

[En_RotUV_LossExc2_Gen] =1

[En_Z_LossExc1_Gen] =1

[En_LossExc_Gen]=1

EBI_LossEXC_Gen =1

&

&

Q>[Q_RevQ_LossExc_Gen]

[En_RevQ_LossExc_Gen]=1

&

≥

>=1

>=1

>=1

f0dzrr UK U ×××< nSX

°≥−+

≥° 90270A

B

jXZjXZArg

FD_LossExc_Gen =1

[TrpLog_LossExc2_Gen].bit 0=1

Figure 3-35 Logic diagram of stage 2 of loss of excitation protection

Figure 3-36 shows logic diagram of stage 3 of loss of excitation protection. It is used for tripping



with long delay

t Op_LossExc3_Gen

&

&

Ur<[V_RotUV_LossExc_Gen]

[En_RotUV_LossExc3_Gen] =1

[En_Z_LossExc3_Gen] =1

[En_LossExc_Gen]=1

EBI_LossEXC_Gen =1

FD_LossExc_Gen =1

&

&

Q>[Q_RevQ_LossExc_Gen]

[En_RevQ_LossExc_Gen]=1

&

>=1

>=1

>=1

f0dzrr UK U ×××< nSX

°≥−+

≥° 90270A

B

jXZjXZArg

[TrpLog_LossExc3_Gen].bit 0=1

Figure 3-36 Logic diagram of stage 3 of loss of excitation protection

3.3.15 Out-of-step protection

Out-of step represents asynchronous operation of generator due to out-of-step. Figure 3-37 shows operation characteristic of the protection that comprises three parts: lens part, boundary part and reactance line part.

R

jx

0

Zc

Za

Zb

OL

U

ORIR

IL

D

L R

1 1

32

Figure 3-37 Operation characteristic of out-of-step protection

In Figure 3-37, lens ① divides impedance plane into inside part I and outside part O, boundary ② divides the impedance plane into left part L and right part R, and reactance line ③ divides the impedance plane into upper part U and lower part D.

Considering lens ① and boundary ② comprehensively, the impedance plane is divided into four



area: OL, IL, IR and OR. If trace of impedance is passing through these four areas in sequence from right to left or vice versa, and staying in each area for a moment longer than the setting, this case is considered as system swing. Times of the passing through are accumulated and the grand total is considered as the times of pole sliding. When the grand total reaches its setting value, out-of-step protection operates.

As to reactance line ③, if the impedance trace passes through the upper part U, the swing center is considered outside the generator; If the trace passes through the lower part D, the swing center is considered within the generator. Settings of times of pole sliding can be configured separately for these two cases.

Out-of-step protection can be used either for alarm only or for tripping. Minimum swing period which can be identified by this protection is 120 ms.

Figure 3-38 shows logic diagram of out-of-step protection.

Figure 3-38 Logic diagram of out-of-step protection

3.3.16 Voltage protection

Voltage protection of generator comprises overvoltage and undervoltage protection.

3.3.16.1 Overvoltage protection

Overvoltage protection is used as protection against stator overvoltage occurring in various operation conditions. It will issue tripping command when the maximum phase-to-phase voltage at the terminal of generator is in excess of the setting. Calculation of voltage is independent of variation of frequency. Two stages of overvoltage protection are equipped with RCS-985A for tripping. Figure 3-39 shows logic diagram of overvoltage protection.

3.3.16.2 Undervoltage protection

Undervoltage protection responses to reduction of phase-to-phase voltage at the terminal of generator and will trip terminal breaker of the generator with configurable delay. The protection is controlled by external binary such as control equipment of synchronous condenser [BI_SyncCondenser]. Only one stage is equipped with it. Figure 3-40 shows logic diagram of undervoltage protection.



3.3.16.3 Logic diagram of overvoltage protection and undervoltage protection

Upp>[V_OVn_Gen]

&

&&

t Overvoltage protection trips

[En_VoltProt_Gen] =1

[TrpLog_Ovn_Gen].bit0 =1

EBI_VoltProt_Gen =1

FD_OV_Gen =1

Figure 3-39 Logic diagram of overvoltage protection

Upp.max<[V_UV_Gen]

&

&

&

tundervoltage protection trips

[En_VoltProt_Gen] =1

[TrpLog_UV_Gen].bit0=1

EBI_VoltProt_Gen =1

FD_UV_Gen =1

BI_SyncCondenser =1

Figure 3-40 Logic diagram of under voltage protection

3.3.17 Overexcitation protection

Overexcitation protection is used to prevent generator or transformer form damage due to over excitation. It represents multiple of over excitation at terminal of generator (or LV side of main transformer) and comprises two kinds of protection: generator over excitation protection and main transformer over excitation protection. Besides, each kind of over excitation protection comprises definite time protection and inverse time protection.

3.3.17.1 Definite time over excitation protection

Two stages for tripping and one stage for alarm are equipped for definite over excitation protection. Their time delay can be configured.

Multiple of over excitation n can be expressed as follows:

pupu / F Un = (Equation 3-53)

Where puU and puF are per unit value of voltage and frequency respectively.

Figure 3-42 shows logic diagram of definite time over excitation protection.

3.3.17.2 Inverse time over excitation protection

Inverse time over excitation protection realizes inverse time characteristic by linear processing on given inverse time operation characteristic, obtaining multiple of over excitation by calculation, and getting corresponding operation delay by sectional linear insertion. It reflects heat accumulation and radiation.



Figure 3-43 shows inverse time operation characteristics of over excitation protection. It can be specified by 8 over excitation multiple settings n0 – n7.

U/F

t(s)

n0

t0 t7

n1n2n3n4n5n6n7

t1 t2 t3 t4 t5 t6

Figure 3-41 Inverse time operation characteristics of over excitation protection

The over excitation multiple settings n (= U/F) are within range of 1.0 – 1.5 in general. Maximum time delay t is considered as long as 3000 s. Relation between various settings of n and t are:

n0 ≥ n1 ≥ n2 ≥ n3 ≥ n4 ≥ n5 ≥ n6 ≥ n7

t0 ≤ t1 ≤ t2 ≤ t3 ≤ t4 ≤ t5 ≤ t6 ≤ t7

3.3.17.3 Logic diagram of excitation protection

U/F > [k_OvExc n_Gen]

[En_OvExc_Gen] =1

[TrpLog_OvExcn_Gen].bit0 =1

EBI_OvExc_Gen =1

[En_OvExc_Gen] =1

U/F > [k_Alm_OvExc_Gen]

definite time overexcitation protection trips

FD_OvExc_Gen =1

t

t&&

&

definite time overexcitation protection alarm

&

[En_OvExc_Gen] =1

Figure 3-42 Logic diagram of definite time over excitation protection

Inverse time overexcitation protection trips

U/F >[k n_InvOvExc_Gen]

[En_OvExc_Gen] =1

[TrpLog_InvOvExc_Gen].bit0 =1

EBI_OvExc_Gen=1

FD_OvExc_Gen=1

&

&&

[En_OvExc_Gen]=1

Figure 3-43 Logic diagram of inverse time over excitation protection

3.3.18 Power protection

Power protection comprises reverse power protection, underpower protection and sequence tripping reverse power protection.

Only one stage is equipped for reverse power protection and underpower protection. Operation of this protection will cause tripping.



3.3.18.1 Reverse power protection

Reverse power protection can prevent turbine blades or gears from damage in the case that the generator transforms into a motor mode and flows reverse power due to loss of its motive force.

Operation criterion of this reverse power protection is

_Gen] - [P_RevPP ≤ (Equation 3-54)

Where

P is the power calculated from three phase voltages and currents at terminal of generator.

[P_RevP_Gen] is the reverse power setting.

One stage for tripping and another stage for alarm with independent delay setting respectively are equipped with this protection.

Range of reverse power setting is 0.5% - 10% Pn , where Pn is rated active power of the generator. Range of delay is 0.1 s – 600 s.

Figure 3-44 shows logic diagram of reverse power protection.

3.3.18.2 Underpower protection

One stage of underpower protection are equipped for tripping. It is blocked by the binary input for emergency shutoff generator [BI_UrgBrake].

3.3.18.3 Sequence tripping reverse power protection

Sometimes, when overload, over excitation or loss-of-excitation protection of generator initiate and tripping is needed, the steam valve of turbine has to be closed firstly. Sequent-tripping reverse power protection is used for this condition. Such protection is a reverse power protection blocked by position contact of steam valve and circuit breaker of generator. It can trip relevant circuit breaker with a certain delay since the steam valve being closed. Its setting range is 0.5% - 10% Pn.

Figure 3-45 shows logic diagram of sequent-tripping reverse power protection.

3.3.18.4 Logic diagram of power protection

[TrpLog_RevP_Gen].bit0 =1

EBI_PwrProt_Gen =1

FD_PwrProt_Gen=1

&&P>-[P_RevP_Gen]

t&[En_PwrProt_Gen]=1 reverse power

protection trips

Figure 3-44 Logic diagram of reverse power



[TrpLog_SeqTrp_RevP_Gen].bit0=1

EBI_PwrProt_Gen=1

FD_PwrProt_Gen=1

&

&P>-[P_SeqTrp_RevP_Gen]

t&[En_PwrProt_Gen]=1 Sequent-tripping

reverse power protection trips

BI_Valve_Turbine=1

BI_52b_Gen=1

Figure 3-45 Logic diagram of program reverse power protection

3.3.19 Frequency protection

Frequency protection of generator comprises under frequency and over frequency protection. Permissive range of frequency of large generator is 48.5Hz – 50.5Hz. When frequency is lower than 48.5 Hz and if the accumulated time or duration of once under frequency operation reaches setting value, the protection will issue alarm or trip. This protection is blocked by position contact of circuit breaker and no current flag.

Four stages of underfrequency protection are equipped for RCS-985A. Stage 1 is usually configured as accumulating frequency protection, and can be reset to zero only after erasing reports. Stages 2, 3 and 4 can be configured as continuous frequency protection.

As to over frequency protection, two stages are equipped for RCS-985A and they will issue alarm or trip when operates.

[f_UFn_Gen].bit0=1

EBI_FreqProt_Gen=1

FD_FreqProt_Gen=1

[En_FreqProt_Gen]=1

f<[f_UFn_Gen]

[BI_52b_CB_HVS1(2)_Tr]=1

[En_Alm_UFn_Gen]=1

t underfrequencyprotection alarm

t

Stage n of underfrequency protection trips

&&

&&

Figure 3-46 Logic diagram of frequency protection of generator

3.3.20 Accidental energization protection

Accidental energization protection comprises unwanted closing protection and breaker flashover protection.

3.3.20.1 Unwanted closing protection

Unwanted closing protection is used for following cases:

(1) In the course of axis alignment of generator (low frequency condition), if it has been excited, breaker closure by accident may lead to asynchronous starting of the generator. The protection is put into use automatically with time delay t1 when two groups of voltage derived from two independent VTs are all less than undervoltage setting and exit with time delay t2



(designed to cooperate with low-frequency blocking criterion) when the two groups of voltage recovered to normal level.

(2) When generator breaker is closed by accident in excited condition but frequency is under normal level which may occurred in startup-and-shutdown process. The protection is put into use automatically with time delay t3 while Low Frequency criterion is met and returns with time delay t4 after the frequency criteria releases. Here, t4 should be set as long as to ensure the completion of tripping course.

(3) If the circuit breaker is closed by accident when phase angle difference of bus and generator voltage is very high, such as around 180°, the through closing current will be too high also. In this case, the excitation shall be shut off firstly and breaker of generator can be tripped until the generator current falls down to below setting.

Considering security of the protection, both currents from generator terminal and neutral point are used in the logic as criteria. Figure 3-47 shows logic diagram of unwanted closing protection of generator.

3.3.20.2 Breaker flashover protection

During process of synchronization of generator, flashover in circuit breaker is possible when difference of phase angle of bus voltage and generator voltage is around 180°. Breaker flashover protection is provided for this fault. One phase and two phases flashover is considered by this protection but three-phase flashover is ignored.

Criterion of circuit breaker flashover:

(1) Position contacts of three phases of circuit breaker are open;

(2) Negative sequence current is higher than setting;

(3) Excitation has been applied to generator, and generator voltage is higher than setting.

Operation of this protection will shut off excitation and activating circuit breaker failure protection. Figure 3-48 shows logic diagram of breaker flashover protection. Generally, the protection is equipped two time delay settings, the first is for shutting off excitation and the second is for tripping the local line breaker.



3.3.20.3 Logic diagram of accidental energization protection

overcurrent at generator end operates

F<[f_UF_AccEnerg_Gen]

&overcurrent at generator neutral point operates

EBI_AccEnerg_Gen=1

&

Undervoltage element operates

Trip of circuit breakert

&

FD_AccEnerg_Gen=1

&

&

t1 t2

t3 t4

BI_52b_GCB =0

Flg_NoCurr_CB_Gen =1&

t3 t4

[En_AccEnerg_Gen]=1

[En_UF_Ctrl_AccEnerg_Gen]=1

[En_CB_Ctrl_AccEnerg_Gen]=1

&

≥

[En_Ibrk_Ctrl_Trp_TCB]=1

&Trip of other

breakerst

I>[I_OC_AccEnerg_Gen] &

≥

&

Flg_NoCurr_CB_Tr=1

Figure 3-47 Logic diagram of unwanted closing protection of generator

[En_AccEnerg_Gen]=1

EBI_AccEnerg_Gen=1

FD_AccEnerg_Gen=1

&

&I2>[I2_Flash_GCB]

t& Breaker flashover protection trips

BI_52b_CB=0

U>Uset.fix

Figure 3-48 Logic diagram of breaker flashover protection

3.3.21 Generator startup and shutdown protection

Protections for phase-to-phase fault and stator earth fault are provided during startup and shutdown process of generator.

Differential overcurrent protections are provided for faults of generator and excitation transformer respectively. A zero sequence overvoltage protection is provided for stator earth fault.

Since frequency during startup and shutdown process is usually very low, algorithm independent of frequency is used for this protection.

Whether the protection should be blocked or not by frequency element or auxiliary contact of circuit breaker can be determined by logic setting.



Op_**_StShut_Gen =1

F<[f_UF_Ctrl_StShut_Gen]&

[TrpLog_**_StShut_Gen].bit0 =1

&&

t0

FD_StShut_Gen =1

tgenerator startup and shutoff protection trips

[En_StShut_Gen]=1

EBI_StShut_Gen =1

T>[t_**_StShut_Gen]

Figure 3-49 Logic diagram of generator startup and shutdown protection

Where:

“**” represent one of the three protective elements, “GenDiff”, “UF_OC” and “StaROV”. The three protective elements’ diagrams are so likely that they can be expressed in a figure instead of three for them respectively.

3.3.22 Excitation winding overload protection

Excitation winding overload protection is equipped to reflect average heating condition of excitation winding. Excitation transformer current, exciter current or rotor current of generator can be taken as criterion of this protection. To exciter, frequency can be configured as 50 Hz or 100 Hz.

Excitation winding protection comprises definite time and inverse time protection.

3.3.22.1 Definite time excitation winding overload protection

One stage of alarm and one stage of tripping are equipped for definite time excitation winding overload protection.

Figure 3-51 shows logic diagram of definite time excitation winding overload protection.

3.3.22.2 Inverse time excitation winding overload protection

Inverse time excitation winding overload protection consists of three parts: low setting initiator, inverse time part and high setting definite part. Minimum operation time delay ([tmin_InvOvLd_RotWdg]) is provided for extreme overload condition.

When current in excitation circuit reaches the low setting [I_InvOvLd_RotWdg], the inverse time protection initiates and the heating accumulation starts. When the heating accumulation reaches its setting, alarm will be issued. The inverse time protection can simulate heating accumulation and radiation process.



tmin tmax t

Ilszd

Ilh

Il

Figure 3-50 Operation characteristic of inverse time overload protection of excitation winding

In the figure, lI is the current in excitation circuit, lhI is the high setting of the protection; lsZDI

is the low setting of the protection [I_InvOvLd_RotWdg]; mint is minimum delay

[tmin_InvOvLd_RotWdg] .

Its operation criterion is:

zdjzzdl KLtII ≥×− ]1[( 2） (Equation 3-55)

Where:

jzzdI is inverse time reference current of excitation circuit;

zdKL is setting of heat capacity factor of excitation circuit.

Figure 3-52 shows logic diagram of inverse time excitation winding overload protection.

EBI_OvLd_RotWdg=1

FD_OvLd_RotWdg=1

[En_OvLd_RotWdg]=1

[En_OvLd_RotWdg]=1t

t&

&

&

I>[I_Alm_OvLd_RotWdg]

&

I>[I_OvLd_RotWdg]

[TrpLog_OvLd_RotWdg].bit0 =1

Excitation winding overload alarm

Excitation winding overload protection trips

Figure 3-51 Logic diagram of definite time excitation winding overload protection



&tmin

&

&

&

EBI_OvLd_RotWdg =1

FD_OvLd_RotWdg=1

[En_OvLd_RotWdg]=1

I>[I_InvOvLd_RotWdg]

[TrpLog_InvOvLd_RotWdg].bit0 =1

inverse time rotor winding overload protection trips

Figure 3-52 Logic diagram of inverse time excitation winding overload protection

3.3.23 Excitation transformer and exciter protection

3.3.23.1 Excitation transformer and exciter differential protection

(1) Operation criterion of excitation transformer differential protection is:

.

+=

+=

××+=×−=

≥++−×>×+=

<+×>

••

••

21

21

1

12

2

1

2

)()2/()(

)()()/(

)(

III

III

nInKKbnKKK

nIIIbnIIKIIIKKK

nIIIIKI

d

r

eblrbl

blblblr

ercdqderbld

erblrblbl

ercdqdrbld

(Equation 3-56)

The criterion is the same to Equation 3-1 except the differential current and restraint current. Here:

For excitation transformer: 1I and 2I are currents of HV side and LV side respectively.

(2) Please refer to section 3.3.1 to see operation criterion of exciter differential protection. The differential protection of exciter can adopt the two kinds of frequency: 50Hz and 100Hz according the setting [fn_Exciter].

3.3.23.2 Excitation transformer and exciter overcurrent protection

Two stages overcurrent protection are equipped for excitation transformer or exciter overcurrent protection as backup protection. These two stages will trip the circuit breaker with configurable delay. Figure 3-53 shows its logic diagram.



I>[I_OC n_Exc] & t

&EBI_Bak_Exc =1

[TrpLog_OC n_Exc].bit0 =1

[En_Bak_Exc] =1

Stage n of overcurrent protection tripsT>[t_OC n_Exc]

FD_Bak_Exc =1 Figure 3-53 Logic diagram of excitation transformer or exciter overcurrent protection

3.3.23.3 Excitation transformer voltage controlled overcurrent protection

Function of overcurrent protection with composite voltage blocking is equipped with RCS-985A. This protection, consisting of 2 stages and 1 time delay per stage, is used for phase-to-phase backup protection of excitation transformer or exciter. Of which, function of composite voltage element can be enabled or disabled by configuration of logic setting.


The voltage control element is an element which will operate if phase-to-phase voltage is lower than its setting or negative sequence voltage is higher than its setting.

Criteria:

ΦΦU < [Vpp_VCE_Exc] Or >2U [V_NegOV_VCE_ Exc] (Equation 3-57)

Where:

ΦΦU is phase-to-phase voltage of local side.

2U is negative sequence voltage of local side.

[Upp_VCE_Exc] is setting of undervoltage control element of local side.

[U2_VCE_Exc] is setting of negative-sequence overvoltage control element of local side.

All two stages of definite time overcurrent protection can be controlled by voltage element by configuring related logic settings [En_VCE_Ctrl_OC1_Exc] and [En_VCE_Ctrl_OC2_Exc].


Logic setting [Opt_VTS_Ctrl_OC_Exc] is used to configure performance of voltage control element during VT circuit failure. When this logic setting is set as “1”, if VT circuit failure is detected, the voltage control element cannot pick up and the protection will not operate. When this logic setting is set as “0”, if this side VT circuit failure is detected, voltage control element is forced to be satisfied, then the voltage controlled overcurrent protection will becomes a pure overcurrent protection.



3.3.23.3.3 Logic diagram of voltage controlled overcurrent protection of excitation transformer


[En_VCE_Ctrl_OCn_Exc]=1

Overcurrent element

[Opt_VTS_Ctrl_OC_Exc]=1

Flag_VTS=1

U2>[V_NegOV_VCE_Exc]

&

FD of OC prot

&

Upp< [Vpp_VCE_Exc]

&


t

&

&

[En_Bak_Exc]=1

EBI_Bak_Exc=1

>=1

>=1

>=1Op_OCn_Exc

1

1

1

Figure 3-54 Logic diagram of voltage controlled overcurrent protection of transformer

Where:

Flag_VTS is the internally generated flag indicating the failure of VT circuit.

[Opt_VTS_Ctrl_OC_Exc] is the setting to configure the VCE mode under VT failure.

Overcurrent element indicates that the maximum phase current is above the settings.

[En_VCE_Ctrl_OCn_Exc] is the setting to enable/disable the VCE element in stage n of overcurrent protection of excitation transformer.

[En_Bak_Exc] is the setting to enable/disable phase to phase fault protection.

EBI_Bak_Exc is the binary input to enable/disable phase to phase fault protection.

Op_Bak_Exc indicates that the stage n of overcurrent protection operates.

3.3.24 Stepdown transformer backup protection

3.3.24.1 Backup protection of HV side of stepdown transformer

Function of voltage controlled overcurrent protection for stepdown transformer is equipped with RCS-985A. This protection, consisting of 2 stages and 1 time delay per stage, is used for phase-to-phase backup protection of stepdown transformer. Of which, function of composite voltage element can be enabled or disabled by configuration of logic setting.


It is same to the voltage control element in section 3.3.7.2.1

3.3.24.1.2 Function of current memory

It is same to the function of current memory element in section 3.3.7.2.2




It is same to the influence of VT circuit failure in section 3.3.7.2.3

3.3.24.1.4 Logic diagram of voltage controlled overcurrent protection of stepdown transformer

It is same to the logic diagram in section 3.3.7.2.4.

3.3.24.2 Backup protection of LV side of stepdown transformer

This protection, consisting of 2 stages and 1 time delay per stage, is used for phase-to-phase backup protection of stepdown transformer. Of which, function of composite voltage element can be enabled or disabled by configuration of logic setting.


It is same to the voltage control element in section 3.3.23.3.1


It is same to the influence of VT circuit failure in section 3.3.23.3.2

3.3.24.2.3 Logic diagram of voltage controlled overcurrent protection of stepdown transformer

It is same to the logic diagram in section3.3.23.3.3.

3.3.24.3 Earth fault protection of LV side of stepdown transformer

Two stages zero sequence current protection with delay used for tripping is equipped for LV side of stepdown transformer.

One stage zero sequence voltage protection with delay used for alarm is equipped for LV side of stepdown transformer.

3.3.24.4 Other protection of stepdown transformer

Overload alarm and initial cooling are equipped for backup protection of stepdown transformer. These functions can be set by logic settings. One normal-open contact is used for output of initial cooling.

On load tap change of stepdown transformer is equipped in RCS-985A.

3.3.25 Pole Disagreement Protection

3.3.25.1 Application

Pole disagreement protection is used for protection of HV side circuit breaker. The fault can be detected by auxiliary position contact of breaker, zero sequence current or negative sequence current. Whether zero or negative sequence current is used for detection can be configured by corresponding logic setting. Two time delay stages are provided for pole disagreement protection and time delay stage 2 can be configured to be supervised by binary input of protection tripping contact.

The current criteria are:



≥Φ maxI [I_OC_PD] or ≥2I [I_NegOC_PD] or ≥03I [I_ROC_PD] (Equation 3-58)

Where:

maxΦI is the maximum value of HV side three-phase current.

2I is negative sequence current of HV side.

0I is zero sequence current of HV side.

[I_OC_PD] is setting of pole-disagreement phase current element.

[I_NegOC_PD] is setting of pole-disagreement negative-sequence current element.

[I_ROC_PD] is setting of pole-disagreement zero-sequence current element.

Current element will pick up if any one criterion is satisfied with corresponding logic setting be set as “1”.

3.3.25.2 Logic scheme of pole disagreement protection stage 1

Figure 3-55 Logic diagram of pole-disagreement protection stage 1

[En_ROC_PD]: logic setting of pole disagreement protection operating supervised by zero-sequence current element.

[EN_NegOC_PD]: logic setting of pole disagreement protection operating supervised by negative sequence current element.

[BI_PoleDisagr_CB]: binary input of HV side breaker in pole disagreement.

[EBI_Reserved1]: binary input of enabling pole disagreement protection. Here, we usually adopt the pole disagreement protection in RCS-974.

[En_PoleDisagr_CB]: logic setting of enabling pole disagreement protection



OP_PD1: Pole disagreement protection

Delay: time delay of pole disagreement protection stage 1 [t_PD1].

3.3.25.3 Logic scheme of pole disagreement protection stage 2

Figure 3-56 Logic diagram of pole-disagreement protection stage 2

Where:

[BI_ROC_PD], [En_NegOC_PD], [BI_PoleDisagr_CB], [En_PoleDisagr_CB], and [EBI_Reserved1]: just same as mentioned in section above.

[En_ExTrp_Ctrl_PD2]: logic setting of pole disagreement protection stage 2 initiated by binary input of protection trip contact.

[BI_SyncConderser]: binary input of protection trip contact to initiate pole disagreement protection.

[En_OC_PD2]: logic setting of pole disagreement protection stage 2 operating supervised by phase current element.

OP_PD2: Pole disagreement protection stage 2

Delay: time delay of pole disagreement protection stage 2 [t_PD2].

3.3.26 CT circuit failure alarm

3.3.26.1 Three-phase current circuit failure alarm

Operation criterion of the alarm is:

maxe0 I 0.25 I 0.04 3I +> (Equation 3-59)

Where:

03I is zero sequence current;



eI is secondary rated current

maxI is maximum phase current.

If this criterion is met, CT circuit failure alarm will be issued with 10s delay. Once the condition reverts normal condition, the alarm will be reset with 10s delay.

3.3.26.2 Differential current alarm in differential protection circuit

This function is enabled only when relevant differential protection logic setting is set as enabled. If the criterion is met, the alarm will be sent by delay 10 s and corresponding differential protection will not be blocked. When the differential current eliminates, the alarm will be reset by delay 10 s.

In order to increase sensitivity of this alarm, percentage restraint differential current alarm criterion is adopted as shown as below.

×>>

resbjd

dbjzdd

IkIII

(Equation 3-60)

If the differential current reaches its threshold and reaches differential alarm level of percentage restraint factor multiplied by restraint current, the differential current alarm will be issued.

3.3.26.3 Alarm or blocking to differential protection by CT circuit failure

Function of instantaneous CT circuit failure discrimination is equipped for differential protection. Only when related logic setting and relevant enabling binary input of protection are set “on”, this function of alarm or blocking of instantaneous CT circuit failure discrimination will be enabled.

If internal fault occurs, at least one of following four conditions will be present:

(1) Negative sequence voltage on any side is higher than 2 V;

(2) Any phase current of a certain side increases after fault detector picks up;

(3) Maximum phase current is higher than 1.2 Ie after initiation;

(4) At least three phase-currents increases after fault detector picks up.

If none of above four conditions occurs within 40 ms after differential protection’s fault detectors picks up, the protection treats it as CT circuit failure. If the logic setting [Opt_CTS_Blk_PcntDiff_Gen] (or [Opt_CTS_Blk_SPTDiff_Gen], [Opt_CTS_Blk_PcntDiff_Exc] [Opt_CTS_Blk_PcntDiff_ST], [Opt_CTS_Blk_PcntDiff_GTU], [Opt_CTS_Blk_PcntDiff_Tr]) is set as “1”, the differential protection will be blocked and alarm will be issued. If this logic setting is set as “0”, the differential protection will trip and alarm will be issued simultaneously.

If the alarm is issued, the signal can be removed only when the failure is removed and the equipment is reset by manual.

Note:



The CT failure is disabled and differential protection will not be blocked before generator-transformer unit is connected to power system.

3.3.27 VT circuit failure alarm

3.3.27.1 VT circuit of any side failure alarm

Operation criterion of this failure is:

(1) Positive sequence voltage is below than 18 V and any phase current is higher than 0.04 In;

(2) Negative sequence voltage 3U2 is in excess of 8 V.

If any one condition occurs, VT circuit failure alarm will be issued with delay 10 s, and the alarm will be removed automatically by delay 10 s when the failure is removed.

3.3.27.2 Voltage balance on generator terminals

Two groups of VT are equipped at generator terminal. VT circuit failure can be detected by comparison of phase voltage and positive sequence voltage of these two groups of VT.

Operation criterions are:

; V 3 -

; V 5 -

; V 5 -

; V 5 -

1211

21

21

21

>

>

>

>

UU

UU

UU

UU

CACA

BCBC

ABAB

(Equation 3-61)

Where:

UAB1, UBC1, UCA1 and U11 are phase-to-phase voltage and positive sequence voltage of VT group 1;

UAB2, UBC2, UCA2 and U12 are phase-to-phase voltage and positive sequence voltage of VT group 2.

If any condition mentioned above occurs, VT circuit failure alarm will be issued with delay 0.2 s and the VT group used will be switched over.

When only a VT fails, it will not influence the function of related protection such as loss-of-excitation, out-of-step, overvoltage, over-excitation, reverse power, frequency, impedance protection and overcurrent protection.

If only one group of VT is provided at generator’s terminal, user can set this function as “disable”.


Interfaces of mechanical protection such as thermo-technical protection, interruption of water protection, excitation system protection and one spare mechanical protection are equipped for the equipment. External protection equipments send those signals to RCS-985A makes the event record and sends alarm and maybe tripping command to relevant circuit breaker with delay.



Enabling binary inputs are provided for those protections. Setting ranges of time delay of those protection are all 0 s – 6000 s.

Chapter 4 Self-supervision, measurements and records


Chapter 4 Self-supervision, measurements and

records 4.1 Self-supervision If hardware failure of the equipment itself is detected, protection functions of the equipment will be blocked and equipment blocking alarm will be issued. Hardware failure includes those on RAM, EPROM, settings, power supply, DSP.

When following abnormal status is detected, abnormal warning will be issued: AC voltage or current circuit failure, persist pickup, mismatch state of pickup between CPU and DSP and alarm of protection element.

The relay includes a number of self-monitoring functions to check the operation of its hardware and software when it is in service. These are included so that if an error or fault occurs within the relay’s hardware or software, the relay is able to detect and report the problem and attempt to resolve it by performing a re-boot. This involves the relay being out of service for a short period of time that is indicated by the ‘Healthy’ LED on the faceplate of the relay being extinguished and the watchdog contact at the rear operating. If the restart fails to resolve the problem, then the relay will take itself permanently out of service. Again this will be indicated by the ‘ALARM’ LED and watchdog contact. If a problem is detected by the self-monitoring functions, the relay attempts to store a maintenance record in battery backed-up SRAM to allow the nature of the problem to be notified to the user.

The self-monitoring is implemented in two stages: firstly a thorough diagnostic check which is performed when the relay is booted-up, e.g. at power-on, and secondly a continuous self-checking operation which checks the operation of the relay’s critical functions whilst it is in service.

4.1.1 Start-up self-testing

The self-testing which is carried out when the relay is started takes a few seconds to complete, during which time the relay’s protection is unavailable. This is signaled by the ‘Healthy’ LED on the front of the relay which will illuminate when the relay has passed all of the tests and entered operation. If the testing detects a problem, the relay will remain out of service until it is manually restored to working order.

The operations that are performed at start-up are as follows:

4.1.1.1 System boot

The integrity of the flash memory is verified using a checksum before the program code and data stored in it is copied into SRAM to be used for execution by the processor. When the copy has been completed the data then held in SRAM is compared to that in the flash to ensure that the two are the same and that no errors have occurred in the transfer of data from flash to SRAM. The entry point of the software code in SRAM is then called which is the relay initialization code.



4.1.1.2 Initialization software

The initialization process includes the operations of initializing the processor registers and interrupts, starting the watchdog timers (used by the hardware to determine whether the software is still running), starting the real-time operating system and creating and starting the supervisor task. In the course of the initialization process the relay checks:

• The integrity of the battery backed-up SRAM that is used to store event, fault and disturbance records.

• The integrity of the flash that is used to store program.

• The correctness of the settings that ensures relay’s proper response to fault.

• The operation of DSP and CPU.

• The voltage level of the field voltage supply which is used to drive the opto-isolated inputs.

• The operation of the LCD controller.

• The watchdog operation.

At the conclusion of the initialization software the supervisor task begins the process of starting the platform software.

4.1.1.3 Platform software initialization & monitoring

In starting the platform software, the relay checks the integrity of the data held in non-volatile memory with a checksum. The final test that is made concerns the input and output of data, the presence and healthy condition of the input board is checked and the analog data acquisition system is checked through sampling the reference voltage.

At the successful conclusion of all of these tests the relay is entered into service and the protection started-up.

4.1.2 Continuous self-testing

When the relay is in service, it continually checks the operation of the critical parts of its hardware and software. The checking is carried out by the system services software and the results reported to the platform software. The functions that are checked are as follows:

• The flash containing all program code, setting values and language text is verified by a checksum

• The code and constant data held in SRAM is checked against the corresponding data in flash to check for data corruption

• The SRAM containing all data other than the code and constant data is verified with a checksum

• The level of the field voltage

• The integrity of the digital signal I/O data from the opto-isolated inputs and the relay contacts is checked by the data acquisition function every time it is executed. The operation of the analog data acquisition system is continuously checked by the acquisition function every time it is executed, by means of sampling the reference voltages.

In the unlikely event that one of the checks detects an error within the relay’s subsystems, the



platform software is notified and it will attempt to log a maintenance record in battery backed-up SRAM. If the problem is of no importance (no possibility of leading to maloperation), the relay will continue in operation. However, for problems detected in any important area the relay will initiate a shutdown and re-boot. This will result in a period of up to 5 seconds when the protection is unavailable, but the complete restart of the relay including all initializations should clear most problems that could occur. As described above, an integral part of the start-up procedure is a thorough diagnostic self-check. If this detects the same problem that caused the relay to restart, i.e. the restart has not cleared the problem, then the relay will take itself permanently out of service. This is indicated by the ‘Healthy’ LED on the front of the relay, which will extinguish, and the watchdog contact that will operate.

• Voltage transformer supervision(VTS). See section 3.3.27 for detail.

• Current transformer supervision (CTS). See section 3.3.26 for detail.

If the alarm is issued, the alarm signal can be reset only when the failure is removed and the equipment is reset by pressing “RESET” button on panel or re-power it up.

• Overload Alarm

On condition that the relay does not picks up, adding current in excess of the setting of overload protection, alarm messages are displayed and ALARM LED is lit after the timer stage duration has elapsed.

• Binary input status monitoring

Any status of binary input changing will be monitored.

• Tripping output circuit monitoring

Tripping output relay driving transistor is always monitored in normal program, and blocking message will be issued when the equipment finds abnormality of the tripping output circuit.

4.1.3 List of alarm messages

When hardware failure is detected, all protection functions will be blocked and block signal will be sent. The equipment cannot work in this case. Hardware failure such as failure of RAM, error of EEPROM, settings invalid, loss of power source of opto-coupler, error of DSP, tripping output circuit failure, etc, will be issued whilst the relay will be blocked. All the failure alarms can be found on LCD and in event recording report. The following table gives a list of these alarm signals and the behavior of the relay responding to these failures.

Note:

There are three alarm LEDs on HMI module: “ALARM” LED, “CT ALARM” LED and “VT ALARM” LED. In following tables the solid point “” in columns ”HEALTHY”, “ALARM”, “CT ALARM” and “VT ALARM” means the corresponding LED is turned on. If LED “HEALTHY” illuminates, the relay will be on work ,otherwise the relay will be blocked.

Abnormality information printed or displayed on LCD and trouble shooting are described in following table.



Table 4-1 List of alarm reports No Alarm Report Note HEALTHY ALARM CT

ALARM VT ALARM

Suggestion

1 Alm_SwOv_VTS1_Gen Note1 Note J 2 Alm_SwOv_VTS2_Gen Note2 Note J 3 Alm_BlkV3rdHDiff_VTS1 Note3 Note J 4 Alm_BlkIntTurn_VTS2 Note4 Note J 5 Alm_VTS_HVS_Tr Note5 Note J 6 Alm_VTS1_Term_Gen Note6 Note J 7 Alm_VTS2_Term_Gen Note7 Note J 8 Alm_VTS_NP_Gen Note8 Note J 9 Alm_DeltVTS1_Term_Gen Note9 Note J 10 Alm_DeltVTS2_Term_Gen Note10 Note J 11 Alm_VTS_RotWdg Note11 Note J 12 Alm_Pos_CB_HVS1_Tr Note12 Note I 13 Alm_Pos_CB_HVS2_Tr Note13 Note I 14 Alm_VTS_LossExc_RotWdg Note14 Note J 15 Alm_VTS_ET Note15 Note J 16 Alm_PM_DSP1_CPUBrd Note16 Note A 17 Alm_CTS_HVS1_Tr Note17 Note J 18 Alm_CTS_HVS2_Tr Note18 Note J 19 Alm_CTS_Term_Gen Note19 Note J 20 Alm_CTS_NP_Gen Note20 Note J 21 Alm_CTS_SP1_Gen Note21 Note J 22 Alm_CTS_SP2_Gen Note22 Note J 23 Alm_CTS_S1_Exc Note23 Note J 24 Alm_CTS_S2_Exc Note24 Note J 25 Alm_CTS_TrvDiff_Gen Note25 Note J 26 Alm_Diff_Gen Note26 Note J 27 Alm_SPTDiff_Gen Note27 Note J 28 Alm_Diff_ET Note28 Note J 29 Alm_Diff_Exciter Note29 Note J 30 Alm_DPFC_IntTurn_Gen Note30 Note E 31 Alm_Pos_GCB Note31 Note I 32 Alm_CTS_Diff_Gen Note32 Note K 33 Alm_CTS_SPTDiff_Gen Note33 Note K 34 Alm_CTS_Diff_ET Note34 Note K 35 Alm_CTS_Diff_Exciter Note35 Note K 36 Alm_BO_OC2_Gen Note36 Note E 37 Alm_On_2PEF_RotWdg Note37 Note E 38 Alm_Ext_OOS_Gen Note38 Note E 39 Alm_Int_OOS_Gen Note39 Note E 40 Alm_Accel_OOS_Gen Note40 Note E



No Alarm Report Note HEALTHY ALARM CT ALARM

VT ALARM

Suggestion

41 Alm_Decel_OOS_Gen Note41 Note E 42 Alm_LossExc_Gen Note42 Note E 43 Alm_OvExc_Gen Note43 Note E 44 Alm_OvLd_Sta Note44 Note E 45 Alm_NegOC_Sta Note45 Note E 46 Alm_OvLd_RotWdg Note46 Note E 47 Alm_ROV_Sta Note47 Note E 48 Alm_V3rdHRatio_Sta Note48 Note E 49 Alm_V3rdHDiff_Sta Note49 Note E 50 Alm_Sens_1PEF_RotWdg Note50 Note E 51 Alm_1PEF_RotWdg Note51 Note E 52 Alm_UF1_Gen Note52 Note E 53 Alm_UF2_Gen Note53 Note E 54 Alm_UF3_Gen Note54 Note E 55 Alm_UF4_Gen Note55 Note E 56 Alm_OF1_Gen Note56 Note E 57 Alm_OF2_Gen Note57 Note E 58 Alm_RevP_Gen Note58 Note E 59 Alm_BO_UC_OvSp_Gen Note59 Note E 60 Alm_VTS_Term_Gen Note60 Note J 61 Alm_VTS_HVS_Tr Note61 Note J 62 Alm_VTS_LVS_ST Note62 Note J 63 Alm_MechRly1 Note63 Note E 64 Alm_MechRly2 Note64 Note E 65 Alm_MechRly3 Note65 Note E 66 Alm_MechRly4 Note66 Note E 67 Alm_OvLd_Tr Note67 Note E 68 Alm_InitCool2_OvLd_Tr Note68 Note E 69 Alm_InitCool1_OvLd_Tr Note69 Note E 70 Alm_InitCool2_OvLd_ST Note70 Note E 71 Alm_OvLd_ST Note71 Note E 72 Alm_PwrLoss_MechRly Note72 Note D 73 Alm_InitCool1_OvLd_ST Note73 Note E 74 Alm_PM_DSP2_CPUBrd Note74 Note A 75 Alm_CTS_HVS1_Tr Note75 Note J 76 Alm_CTS_HVS2_Tr Note76 Note J 77 Alm_CTS_LVS_Tr Note77 Note J 78 Alm_CTS_HVS_ST Note78 Note J 79 Alm_CTS_HVS_Tr Note79 Note J 80 Alm_REF_Tr Note80 Note K 81 Alm_CTS2_HVS_ST Note81 Note J



No Alarm Report Note HEALTHY ALARM CT ALARM

VT ALARM

Suggestion

82 Alm_CTS1_HVS_ST Note82 Note J 83 Alm_CTS_LVS_ST Note83 Note J 84 Alm_REF_ST Note84 Note J 85 Alm_Diff_GTU Note85 Note J 86 Alm_Diff_Tr Note86 Note J 87 Alm_Diff_ST Note87 Note J 88 Alm_CTS_Diff_GTU Note88 Note K 89 Alm_CTS_Diff_Tr Note89 Note K 90 Alm_CTS_Diff_ST Note90 Note K 91 Alm_OvLd_LVS_ST Note91 Note E 92 Alm_OvExc_Tr Note92 Note E 93 Alm_UrgBrake Note93 Note E 94 Alm_Inconsist_MechRly Note94 Note D 95 Alm_PoleDisagr_CB Note95 Note I 96 Alm_ROV_LVS_Tr Note96 Note E 97 Alm_ROV_LVS_ST Note97 Note E 98 Alm_RAM_CPUBrd Note98 Note A 99 Alm_ROM_CPUBrd Note99 Note A 100 Alm_EEPROM_CPUBrd Note100 Note A 101 Alm_InvalidSetting Note101 Note B 102 Alm_ModifiedSetting Note102 Note C 103 Alm_PwrLoss_Opto Note103 Note D 104 Alm_TripOutput Note104 Note A 105 Alm_InnerComm Note105 Note F 106 Alm_DSP_CPUBrd Note106 Note A 107 Alm_PersistFD_CPUBrd Note107 Note H 108 Alm_InconsistFD Note108 Note G 109 Alm_Sample_CPUBrd Note109 Note A 110 Alm_BI_CPUBrd Note110 Note A 111 Alm_RAM_MONBrd Note111 Note A 112 Alm_ROM_MONBrd Note112 Note A 113 Alm_EEPROM_MONBrd Note113 Note A 114 Alm_DSP_MONBrd Note114 Note A 115 Alm_PersistFD_MONBrd Note115 Note H 116 Alm_MONBrd Note116 Note A 117 Alm_Sample_MONBrd Note117 Note A

Note: Note1: Alarm indicating VT1 circuit failure and start to switch over voltage circuit. Note2: Alarm indicating VT2 circuit failure and start to switch over voltage circuit.



Note3: Alarm indicating VT1 circuit failure and blocking 3rd harmonics voltage differential protection.

Note4: Alarm indicating VT2 circuit failure and blocking interturn protection. Note5: Alarm indicating secondary circuit failure of VT at HV side of main transformer. Note6: Alarm indicating secondary circuit failure of VT1 at generator terminal. Note7: Alarm indicating secondary circuit failure of VT2 at generator terminal. Note8: Alarm indicating secondary circuit failure of VT at the neutral point of generator. Note9: Alarm indicating secondary circuit failure at open-delta side of VT1 at generator terminal. Note10: Alarm indicating secondary circuit failure at open-delta side of VT2 at generator terminal. Note11: Alarm indicating secondary circuit failure of VT for rotor earth fault protection. Note12: Alarm indicating the position of circuit breaker of branch 1 at HV side is abnormal. Note13: Alarm indicating the position of circuit breaker of branch 2 at HV side is abnormal. Note14: Alarm indicating rotor voltage circuit failure which used by loss-of-excitation protection. Note15: Alarm indicating secondary circuit failure of VT of excitation transformer. Note16: The DSP chip in CPU board damaged. Note17: Alarm indicating secondary circuit abnormality of CT at branch 1 of HV side of

transformer. Note18: Alarm indicating secondary circuit abnormality of CT at branch 2 of HV side of

transformer. Note19: Alarm indicating secondary circuit abnormality of CT at generator terminal. Note20: Alarm indicating secondary circuit abnormality of CT at the neutral point of generator. Note21: Alarm indicating secondary circuit abnormality of CT installed in splitting-phase branch1

at the neutral point of generator . Note22: Alarm indicating secondary circuit abnormality of CT installed in splitting-phase branch2

at the neutral point of generator. Note23: Alarm indicating secondary circuit failure of CT at side1 of excitation set used in

differential protection of excitation. Note24: Alarm indicating secondary circuit failure of CT at side2 of excitation set used in

differential protection of excitation. Note25: Alarm indicating the secondary circuit failure of CT for transverse differential protection of

generator. Note26: Alarm indicating differential current of generator is in excess of normally endurable level. Note27: Alarm indicating splitting-phase transverse differential current of generator is in excess of

normally endurable level. Note28: Alarm indicating differential current of exciter is in excess of normally endurable level. Note29: Alarm indicating differential current of excitation transformer is in excess of normally

endurable level. Note30: Alarm indicating operation of DPFC interturn protective element. Note31: Alarm indicating the position of circuit breaker at terminal of generator is abnormal. Note32: Alarm indicating secondary circuit failure of CTs used for differential protection of

generator. Note33: Alarm indicating secondary circuit failure of CTs used for splitting-phase transverse

differential protection of generator. Note34: Alarm indicating secondary circuit failure of CT used in excitation transformer differential



protection. Note35: Alarm indicating secondary circuit failure of CT used in exciter differential protection. Note36: Alarm indicating operation of overcurrent element used for driving a set of contact to

block other circuit. Note37: Alarm indicating 2 points earth fault protection has been put input operation after

operation of 1 point earth fault protection of rotor. Note38: Alarm indicating out-of-step of system occurs while its oscillation center is outside

protective zone. Note39: Alarm indicating out-of-step of system occurs and its oscillation center is inside protective

zone. Note40: Alarm indicating accelerate out-of-step occurs. Note41: Alarm indicating decelerate out-of-step occurs. Note42: Alarm indicating operation of loss-of-excitation protective element. Note43: Alarm indicating operation of over excitation protective element. Note44: Alarm indicating operation of overload element of stator. Note45: Alarm indicating operation of negative overcurrent protective element of stator. Note46: Alarm indicating operation of overload protective element of rotor winding. Note47: Alarm indicating operation of sensitive stage of ROV protection of stator earth fault. Note48: Alarm indicating operation of 3rd harmonics ratio earth fault protective element of stator. Note49: Alarm indicating operation of 3rd harmonics differential earth fault protective element of

stator. Note50: Alarm indicating operation of sensitive stage of 1 point earth fault protective element of

rotor. Note51: Alarm indicating operation of normal stage of 1 point earth fault protective element of

rotor. Note52: Alarm indicating operation of stage 1 of under frequency protective element of generator. Note53: Alarm indicating operation of stage 2 of under frequency protective element of generator. Note54: Alarm indicating operation of stage 3 of under frequency protective element of generator. Note55: Alarm indicating operation of stage 4 of under frequency protective element of generator. Note56: Alarm indicating operation of stage 1 of over frequency protective element of generator. Note57: Alarm indicating operation of stage 2 of over frequency protective element of generator. Note58: Alarm indicating operation of reverse power protection. Note59: Alarm indicating operation of electric over speed protection of generator. Note60: Alarm indicating secondary circuit failure of VT at generator terminal. Note61: Alarm indicating secondary circuit failure of VT at HV side of main transformer. Note62: Alarm indicating secondary circuit failure of VT at LV side of stepdown transformer. Note63: Alarm indicating operation of mechanical repeater 1. Note64: Alarm indicating operation of mechanical repeater 2. Note65: Alarm indicating operation of mechanical repeater 3. Note66: Alarm indicating operation of mechanical repeater 4. Note67: Alarm indicating overload of main transformer. Note68: Alarm indicating stage 2 of initial cooling of main transformer. Note69: Alarm indicating stage 1 of initial cooling of main transformer. Note70: Alarm indicating stage 2 of initial cooling of stepdown transformer.



Note71: Alarm indicating overload of stepdown transformer. Note72: Alarm indicating power loss of mechanical relay. Note73: Alarm indicating stage 1 of initial cooling of stepdown transformer. Note74: Alarm indicating DSP2 in CPU module damaged. Note75: Alarm indicating secondary circuit failure of CT at branch 1 of HV side of main

transformer. Note76: Alarm indicating secondary circuit failure of CT at branch 2 of HV side of main

transformer. Note77: Alarm indicating secondary circuit failure of CT at LV side of main transformer. Note78: Alarm indicating secondary circuit failure of HV side of stepdown transformer. Note79: Alarm indicating secondary circuit failure of CT at HV side of main transformer. Note80: Alarm indicating the zero sequence differential current is abnormal in REF differential

protection of main transformer. Note81: Alarm indicating secondary circuit failure of CT1 at HV side of stepdown transformer. Note82: Alarm indicating secondary circuit failure of CT2 at HV side of stepdown transformer. Note83: Alarm indicating secondary circuit failure of CT at LV side of stepdown transformer. Note84: Alarm indicating the zero sequence differential current is abnormal in REF differential

protection of stepdown transformer. Note85: Alarm indicating the differential current is abnormal in differential protection of generator

and transformer unit. Note86: Alarm indicating the differential current is abnormal in differential protection of main

transformer. Note87: Alarm indicating the differential current is abnormal in differential protection of stepdown

transformer. Note88: Alarm indicating secondary circuit failure of CT in differential protection of generator and

transformer unit. Note89: Alarm indicating secondary circuit failure of CT in differential protection of main

transformer. Note90: Alarm indicating secondary circuit failure of CT in differential protection of stepdown

transformer. Note91: Alarm indicating overload at LV side of stepdown transformer. Note92: Alarm indicating over excitation of main transformer. Note93: Alarm indicating emergency brake of generator. Note94: Alarm indicating circuit of mechanical is abnormal. Note95: Alarm indicating the binary input of pole disagreement is in excess of 10s. Note96: Alarm indicating operation of ROV protection of LV side of main transformer. Note97: Alarm indicating operation of ROV protection of LV side of stepdown transformer. Note98: CPU module RAM damaged. Note99: CPU module flash memory damaged. Note100: CPU module EEPROM damaged judged by the mismatch of summation of all the

settings with the CRC code. Note101: Without modifying protection setting after modification of rated secondary current of

CT. Note102: The relay is in the proceeding of setting parameters.



Note103: Loss of power supply of the optical couplers for binary inputs. Note104: Driving transistor of binary output damaged. Note105: Inner communication error between CPU and MON modules. Note106: The DSP chip in CPU board damaged. Note107: Duration of pickup of any fault detector in MON board is in excess of 10s. Note108: Mismatch of pickup of same type fault detectors in CPU and MON. Note109: Failure of sampled data in CPU board. Note110: Any one of binary input sampled directly does not match with that of reorganization

of protection itself. Note111: MON module RAM damaged. Note112: MON module flash memory damaged. Note113: MON module EEPROM damaged. Note114: The DSP chip in MON board damaged. Note115: Duration of pickup of any fault detector in MON board is in excess of 10s. Note116: MON module damaged Note117: Failure of sampled data in MON board. Note A: Inform manufacturer for maintenance. Note B: Modify and check protection setting again. Note C: Do nothing except waiting for completion of the process. Note D: Check if the power circuit of OPT module is connected correctly with DC module. Note E: Treat according to specific application requirement. Note F: Check the connection between FACE and CPU modules. Note G: Check the metering between CPU and MON modules. Note H: Check the secondary circuit and the corresponding settings. Note I: Check the corresponding binary input. Note J: Check the metering and secondary circuit. Note K: Disable the link and check the secondary circuit. After clear the error, reset the relay.

4.2 Metering The relay produces a variety of both directly and calculated power system quantities. These measurement values are updated on a per half second basis and can be viewed in the menu “VALUES” of the relay or via relay communication.

This relay is able to measure and display the following quantities as summarized:

4.2.1 Measured voltages and currents

The relay produces both phase-to-ground and phase-to-phase voltage and current values. They are produced directly from the DFT (Discrete Fourier Transform) used by the relay protection functions and present both magnitude and phase angle measurement.

4.2.2 Sequence voltages and currents

Sequence quantities are produced by the relay from the measured Fourier values; these are displayed as magnitude and phase angle values.



4.2.3 Rms. voltages and currents

Rms. phase voltage and current values are calculated by the relay using the sum of the samples squared over a cycle of sampled data.

4.2.4 Differential current and relevant quantities

Differential current and restrained current calculated in differential protection is displayed to user for monitoring the correctness of operation or testing of the differential protection.

4.2.5 Phase angles

Calculated phase angles are also displayed on LCD to help user to check the correctness of CT or VT circuit.

4.2.6 Measurement display quantities

Here are “VALUES” available in the relay for viewing of measurement quantities. All the measurement quantities can be divided into CPU quantities or DSP quantities by their origin where they are derived. These can also be viewed with DBG-2000 (see DBG-2000 User Manual) and are shown below:

4.2.7 All metering data displayed on LCD

4.2.7.1 Differential currents and related values in transformer metering in CPU and MON

DIFF CURR

Id_Diff_Tr: 000.00 000.00 000.00 Ie

Ir_Diff_Tr: 000.00 000.00 000.00 Ie

Id_2ndH: 000.00 000.00 000.00 Ie

Id_5thH: 000.00 000.00 000.00 Ie

Icorr_HVS1_Tr: 000.00 000.00 000.00 Ie

Icorr_HVS2_Tr: 000.00 000.00 000.00 Ie

Icorr_LVS_Tr 000.00 000.00 000.00 Ie

Icorr_HVS_ST: 000.00 000.00 000.00 Ie

Figure 4-1 Differential currents and related values in transformer metering in CPU and MON

Where:

Ie: secondary calculated rated current of generator.

Id_Diff_Tr: Phase A,B and C of per unit value of transformer differential current.

Ir_Diff_Tr: Phase A,B and C of per unit value of transformer restraint current.

Id_2ndH: Phase A, B and C of 2nd harmonic component in differential current of transformer.

Id_5thH: Phase A, B and C of 5th harmonic component in differential current of transformer.

Icorr_HVS1_Tr: Corrected current of phase A, B and C at branch1 of HV side of transformer.



Icorr_HVS2_Tr: Corrected current of phase A, B and C at branch2 of HV side of transformer.

Icorr_LVS_Tr: Corrected current of phase A, B and C at LV side of transformer.

Icorr_HVS_ST: Corrected current of phase A, B and C at HV side of stepdown transformer..

Id_1stH_REF_Tr: Zero sequence differential current for transformer restrict earth fault protection.

Ir_REF_Tr: Zero sequence restraint current for transformer restrict earth fault protection.

I0_Tr: Zero sequence current of HV side branche of transformer.

I0_NP_Tr: Zero sequence current of neutral point of transformer.

Access path in menu is “VALUESà CPU METERINGàTR METERINGà DIFF CURR” and “VALUESà MON METERINGàTR METERINGà DIFF CURR”.

Note:

The contents inside the first window are the default display seen by user entering this submenu. User can navigate to the following items by scrolling the arrow keys on the faceplate of the relay. What user meets similar to this case later can be dealt with in same way.

4.2.7.2 Currents in transformer metering in CPU and MON

TR CURR

I_HVS1_Tr: 000.00 000.00 000.00 A

I1_HVS1_Tr: 000.00 A

I2_HVS1_Tr: 000.00 A

I0_HVS1_Tr: 000.00 A

I_HVS2_Tr: 000.00 000.00 000.00 A

I1_HVS2_Tr: 000.00 A

I2_HVS2_Tr: 000.00 A

I0_HVS2_Tr: 000.00 A

Figure 4-2 Currents in transformer metering in CPU and MON

Where:

I_HVS1_Tr: Currents of phase A,B and C of branch 1 at HV side of transformer.

I1_HVS1_Tr: Positive sequence currents of branch 1 at HV side of transformer.

I2_HVS1_Tr: Negative sequence currents of branch 1 at HV side of transformer.

I0_HVS1_Tr: Zero sequence currents of branch 1 at HV side of transformer.

I_HVS2_Tr: Currents of phase A,B and C of branch 2 at HV side of transformer.

I1_HVS2_Tr: Positive sequence currents of branch 2 at HV side of transformer.

I2_HVS2_Tr: Negative sequence currents of branch 2 at HV side of transformer.

I0_HVS2_Tr: Zero sequence currents of branch 2 at HV side of transformer.

I_LVS_Tr: Currents of phase A,B and C at LV side of transformer.



I1_LVS_Tr: Positive sequence currents of at LV side of transformer.

I2_LVS_Tr: Negative sequence currents of at LV side of transformer.

I0_LVS_Tr: Zero sequence currents of at LV side of transformer.

I_HVS_Tr: Current sum of phase A, B and C of branch 1 and 2 at HV side of transformer.

Ipp_HVS_Tr: phase to phase currents at HV side of transformer.

I1_HVS_Tr: Positive sequence current at HV side of transformer.

I2_HVS_Tr: Negative sequence current at HV side of transformer.

I0_HVS_Tr: Zero sequence current at HV side of transformer.

I0_NP_HVS_Tr: Zero sequence current of neutral point at HV side of transformer.

I0_Gap_HVS_Tr: Zero sequence current of gap CT at HV side of transformer.

Access path in menu is “VALUESà CPU METERINGàTR METERINGà CURR” and “VALUESà MON METERINGàTR METERINGà CURR”.

4.2.7.3 Voltages at HV side of transformer metering in CPU and MON

HVS VOLT

U_HVS_Tr: 000.00 000.00 000.00 V

Upp_HVS_Tr: 000.00 000.00 000.00 V

U1_HVS_Tr: 000.00 V

U2_HVS_Tr: 000.00 V

U0_HVS_Tr: 000.00 V

U0_DeltVT_HVS_Tr: 000.00 V

U0_DeltVT_LVS_Tr: 000.00 V

U/F_OvExc_Tr: 00.000

Figure 4-3 Voltages in transformer metering in CPU and MON

Where:

U_HVS_Tr: Phase voltages at HV side of transformer.

Upp_HVS_Tr: Phase to phase voltages at HV side of transformer.

U1_HVS_Tr: Positive sequence voltage at HV side of transformer.

U2_HVS_Tr: Negative sequence voltage at HV side of transformer.

U0_HVS_Tr: Zero sequence voltage at HV side of transformer.

U0_DeltVT_HVS_Tr: Zero sequence voltage of delta VT at HV side of transformer.

U0_DeltVT_LVS_Tr: Zero sequence voltage of delta VT at LV side of transformer.

U/F_OvExc_Tr: Calculated ratio between voltage and frequency of transformer.

Accu_InvOvExc_Tr: Accumulation of thermal due to inverse time over-excitation of generator.

Access path in menu is “VALUESà CPU METERINGàTR METERINGà HVS VOLT” and “VALUESà MON METERINGàTR METERINGà HVS VOLT”.



4.2.7.4 Differential currents in stepdown transformer metering in CPU and MON

DIFF CURR

Id_Diff_ST: 000.00 000.00 000.00 Ie

Ir_Diff_ST: 000.00 000.00 000.00 Ie

Id_2ndH: 000.00 000.00 000.00 Ie

Icorr_HVS_ST: 000.00 000.00 000.00 Ie

Icorr_LVS_ST: 000.00 000.00 000.00 Ie

Id_1stH_REF_ST: 000.00 In

Ir_REF_ST: 000.00 In

I0_ST: 000.00 In

Figure 4-4 Differential currents in stepdown transformer metering in CPU and MON

Where:

Id_Diff_ST: Phase A, B and C of per unit value of stepdown transformer differential current.

Ir_Diff_ST: Phase A, B and C of per unit value of stepdown transformer restraint current.

Id_2ndH: The 2nd harmonic component in differential current of stepdown transformer.

Icorr_HVS_ST: Corrected current of phase A, B and C at HV side of stepdown transformer.

Icorr_LVS_ST: Corrected current of phase A, B and C at LV side of stepdown transformer.

Id_1stH_REF_ST: Zero sequence differential current for stepdown transformer restrict earth fault protection.

Ir_REF_ST: Zero restraint current for stepdown transformer restrict earth fault protection.

I0_ST: Zero sequence current of LV side branche of stepdown transformer.

I0_NP_ST: Zero sequence current of neutral point of stepdown transformer.

Access path in menu is “VALUESà CPU METERINGàST METERINGà DIFF CURR” and “VALUESà MON METERINGàST METERINGà DIFF CURR”.



4.2.7.5 Currents at HV side of stepdown transformer metering in CPU and MON

HVS CURR

I_CT1_HVS_ST: 000.00 000.00 000.00 A

I1_CT1_HVS_ST: 000.00 A

I2_CT1_HVS_ST: 000.00 A

I0_CT1_HVS_ST: 000.00 A

I_CT2_HVS_ST: 000.00 000.00 000.00 A

I1_CT2_HVS_ST: 000.00 A

I2_CT2_HVS_ST: 000.00 A

I0_CT2_HVS_ST: 000.00 A

Figure 4-5 Currents at HV side of stepdown transformer metering in CPU and MON

Where:

I_CT1_HVS_ST: Currents of CT1 at HV side of stepdown transformer.

I1_CT1_HVS_ST: Positive sequence currents of CT1 at HV side of stepdown transformer.

I2_CT1_HVS_ST: Negative sequence currents of CT1 at HV side of stepdown transformer.

I0_CT1_HVS_ST: Zero sequence currents of CT1 at HV side of stepdown transformer.

I_CT2_HVS_ST: Currents of CT2 at HV side of stepdown transformer.

I1_CT2_HVS_ST: Positive sequence currents of CT2 at HV side of stepdown transformer.

I2_CT2_HVS_ST: Negative sequence currents of CT2 at HV side of stepdown transformer.

I0_CT2_HVS_ST: Zero sequence currents of CT2 at HV side of stepdown transformer.

Access path in menu is “VALUESà CPU METERINGàST METERINGàHVS CURR” and “VALUESà MON METERINGàST METERINGàHVS CURR”.



4.2.7.6 Values at LV side of stepdown transformer metering in CPU and MON

LVS METERING

I_LVS_ST: 000.00 000.00 000.00 A

I1_LVS_ST: 000.00 A

I2_LVS_ST: 000.00 A

I0_LVS_ST: 000.00 A

I0_NP_LVS_ST: 000.00 A

Upp_LVS_ST: 000.00 000.00 000.00 V

U1_LVS_ST: 000.00 V

U2_LVS_ST: 000.00 V

Figure 4-6 Values at LV side of stepdown transformer metering in CPU and MON

Where:

I_LVS_ST: Currents of LV side of stepdown transformer.

I1_LVS_ST: Positive sequence current of LV side of stepdown transformer.

I2_LVS_ST: Negative sequence current of LV side of stepdown transformer.

I0_LVS_ST: Positive sequence current of LV side of stepdown transformer.

I0_NP_LVS_ST: Zero sequence current of neutral point of stepdown transformer.

Upp_LVS_ST: Voltages at LV side of stepdown transformer.

U1_LVS_ST: Positive sequence voltage at LV side of stepdown transformer.

U2_LVS_ST: Negative sequence voltage at LV side of stepdown transformer.

U0_DeltVT_LVS_ST: Zero sequence voltage of delta VT at LV side of stepdown transformer.

Access path in menu is “VALUESà CPU METERINGàST METERINGàLVS METERING” and “VALUESà MON METERINGàST METERINGà LVS METERING”.



4.2.7.7 Values of generator-transformer unit metering in CPU and MON

GTU METERING

Id_Diff_GTU: 000.00 000.00 000.00 Ie

Ir_Diff_GTU: 000.00 000.00 000.00 Ie

Id_2ndH: 000.00 000.00 000.00 Ie

Id_5thH: 000.00 000.00 000.00 Ie

Icorr_HVS_GTU: 000.00 000.00 000.00 Ie

Icorr_NP_Gen: 000.00 000.00 000.00 Ie

Icorr_ST: 000.00 000.00 000.00 Ie

I_HVS_Tr: 000.00 000.00 000.00 A

Figure 4-7 Values of generator-transformer unit metering in CPU and MON

Where:

Id_Diff_GTU: Phase A,B and C of per unit value of generator-transformer unit differential current.

Ir_Diff_GTU: Phase A,B and C of per unit value of generator-transformer unit restraint current.

Id_2ndH: Phase A, B and C of 2nd harmonic component in differential current of generator-transformer unit.

Id_5thH: Phase A, B and C of 5th harmonic component in differential current of generator-transformer unit.

Icorr_HVS_GTU: Corrected current of phase A, B and C at HV side of generator-transformer unit.

Icorr_NP_Gen: Corrected current of phase A, B and C at neutral point of generator-transformer unit.

Icorr_ST: Corrected current of phase A, B and C of stepdown transformer.

I_HVS_Tr: Current of phase A, B and C at HV side of transformer.

I1_HVS_Tr: Positive sequence current at HV side of transformer.

I2_HVS_Tr: Negative sequence current at HV side of transformer.

I0_HVS_Tr: Zero sequence current at HV side of transformer.

Access path in menu is “VALUESà CPU METERINGàGTU METERING” and “VALUESà MON METERINGàGTU METERING”.



4.2.7.8 Differential currents in generator metering in CPU and MON

DIFF CURR

Id_Diff_Gen: 000.00 000.00 000.00 Ie

Ir_Diff_Gen: 000.00 000.00 000.00 Ie

I_Term_Gen: 000.00 000.00 000.00 A

I1_Term_Gen: 000.00 A



I_NP_Gen: 000.00 000.00 000.00 A

I1_NP_Gen: 000.00 A

Figure 4-8 Differential currents in generator metering in CPU and MON

Where:

Id_Diff_Gen: Phase A,B and C of per unit value of generator differential current.

Ir_Diff_Gen: Phase A,B and C of per unit value of generator restraint current.

I_Term_Gen: Phase A,B and C of current derived from CT at generator’ terminal.

I1_Term_Gen: Positive sequence current of generator terminal.

I2_Term_Gen: Negative sequence current of generator terminal.

I0_Term_Gen: Calculated zero sequence current of generator terminal.

I_NP_Gen: Phase A,B and C of current derived from CT at generator’ neutral point.

I1_NP_Gen: Positive sequence current of generator neutral point.

I2_NP_Gen: Negative sequence current of generator neutral point.

I0_NP_Gen: Calculated zero sequence current of generator neutral point.

Access path in menu is “VALUESà CPU METERINGàGEN METERINGà DIFF CURR” and “VALUESà MON METERINGàGEN METERINGà DIFF CURR”.



4.2.7.9 Transverse differential currents of generator in CPU and MON

TRVDIFF CURR

Id_TrvDiff_Gen: 000.00 A

Id_3rdH_TrvDiff_Gen: 000.00 A

Id_SPTDiff_Gen: 000.00 000.00 000.00 Ie

Ir_SPTDiff_Gen: 000.00 000.00 000.00 Ie

Icorr_SP1_Gen: 000.00 000.00 000.00 Ie

Icorr_SP2_Gen: 000.00 000.00 000.00 Ie

I_SP1_Gen: 000.00 000.00 000.00 A

I1_SP1_Gen: 000.00 A

Figure 4-9 Transverse differential current and related values in CPU and MON

Where:

Id_TrvDiff_Gen: transverse differential current of generator.

Id_3rdH_TrvDiff_Gen: 3rd harmonics component of transverse differential current.

Id_SPTDiff_Gen: Phase A, B and C of per unit value of phase-splitting transverse differential current of generator.

Ir_SPTDiff_Gen: Phase A, B and C of per unit value of restraint current of phase-splitting transverse differential protection.

Icorr_SP1_Gen: Phase A, B and C of per unit value of branch1’s corrected current.

Icorr_SP2_Gen: Phase A, B and C of per unit value of branch2’s corrected current.

I_SP1_Gen: Phase A, B and C of split branch1’s current.

I1_SP1_Gen: Split branch1’s positive sequence current.

I2_SP1_Gen: Split branch1’s negative sequence current.

I0_SP1_Gen: Split branch1’s zero sequence current.

I_SP2_Gen: Phase A, B and C of Split branch2’s current.

I1_SP2_Gen: Split branch2’s positive sequence current.

I2_SP2_Gen: Split branch2’s negative sequence current.

I0_SP2_Gen: Split branch2’s zero sequence current.

Access path in menu is “VALUESà CPU METERINGà GEN METERING à GEN TRVDIFF CURR” and “VALUESà MON METERINGà GEN METERING à GEN TRVDIFF CURR”.



4.2.7.10 Voltages of generator metering in CPU and MON

VOLTAGE

U_VT1_Term_Gen: 000.00 000.00 000.00 V

U1_VT1_Term_Gen: 000.00 V



U_VT2_Term_Gen: 000.00 000.00 000.00 V




Figure 4-10 Voltages and related values in CPU and MON

Where:

U_VT1_Term_Gen: Phase A, B and C of voltage derived from VT1 at the generator’s terminal.

U1_VT1_Term_Gen: Calculated positive sequence voltage of VT1.

U2_VT1_Term_Gen: Calculated negative sequence voltage of VT1.

U0_VT1_Term_Gen: Calculated zero sequence voltage of VT1.

U_VT2_Term_Gen: Phase A, B and C of voltage derived from VT2 at the generator’s terminal.

U1_VT2_Term_Gen: Calculated positive sequence voltage of VT2.

U2_VT2_Term_Gen: Calculated negative sequence voltage of VT2.

U0_VT2_Term_Gen: Calculated zero sequence voltage of VT2.

Upp_VT1_Term_G: Phase-to-phase voltage of VT1—Uab, Ubc, Uca.

Upp_VT2_Term_G: Phase-to-phase voltage of VT2—Uab, Ubc, Uca.

U0_DeltVT1_Term_Gen: Zero sequence voltage derived from open-delta side of VT1 at the generator’s terminal.

U0_NP_Gen: Zero sequence voltage derived from VT at the neutral point of generator.

U0_3rdH_VT1_Term_Gen: Calculated 3rd harmonics of VT1 at the generator’s terminal.

U0_3rdH_VT_NP_Gen: Calculated 3rd harmonics of VT at the neutral point of generator.

Ud_3rdH_Sta: 3rd harmonics differential voltage between the terminal and the neutral point of generator.

U0_Longl_Gen: Longitude zero sequence voltage of generator.

U0_3rdH_Longl_Gen: 3rd harmonics voltage in longitude zero voltage.

Access path in menu is “VALUESà CPU METERINGà GEN METERINGà VOLTAGE” and VALUESà MON METERINGà GEN METERINGà VOLTAGE”.



4.2.7.11 Misc metering quantities of generator in CPU and MON

GEN MISC VALUES

P_Gen: + 000.00 %

Q_Gen: + 000.00 %

Accu_InvOvLd_Sta: 000.00 %

Accu_Therm_RotBody: 000.00 %

U/F_OvExc_Gen: 00.000

Accu_InvOvExc_Gen: 000.00 %

f_Gen: 000.00 Hz

Accu_UF1_Gen: 000.00 Min

Figure 4-11 Misc metering quantities of generator

Where:

P_Gen: Active power of generator.

Q_Gen: Reactive power of generator.

Accu_InvOvLd_Sta: Accumulation of thermal due to overload of stator.

Accu_Therm_RotBody: Accumulation of thermal due to negative sequence current through stator result from interaction between rotor and stator.

U/F_OvExc_Gen: Calculated ratio of per unit values of voltage and frequency.

Accu_InvOvExc_Gen: Accumulation of thermal due to overexcitation of generator.

f_Gen: real time calculated frequency of generator.

Accu_UF1_Gen: Accumulation of underfrequency condition time of generator to decide operation of state 1 of underfrequency protection.

Accu_UF2_Gen: Accumulation of underfrequency condition time of generator to decide operation of state 1 of underfrequency protection.

U_RotWdg: voltage of positive pole of rotor to negative pole.

R_EF_RotWdg: Calculated grounded resistance of rotor..

Location_EF_RotWdg: Location of earth fault of rotor winding of generator.

U1_2ndH_VT1_Term_Gen: Positive sequence voltage of 2nd harmonics voltage of stator derived from VT1 at the generator’s terminal.

U2_2ndH_VT1_Term_Gen: Negative sequence voltage of 2nd harmonics voltage of stator derived from VT1 at the generator’s terminal.

Access path in menu is “VALUESà CPU METERINGà GEN METERINGàMISC METERING” and VALUESà MON METERINGà GEN METERINGàMISC METERING”.



4.2.7.12 Differential currents in excitation metering in CPU and MON

DIFF CURR

Id_Diff_Exc: 000.00 000.00 000.00 Ie

Ir_Diff_Exc: 000.00 000.00 000.00 Ie

Id_2ndH: 000.00 000.00 000.00 Ie

Icorr_S1_Exc: 000.00 000.00 000.00 Ie

Icorr_S2_Exc: 000.00 000.00 000.00 Ie

Figure 4-12 Differential currents in excitation metering in CPU and MON

Where:

Id_Diff_Exc: Phase A, B and C of differential current of excitation transformer or exciter.

Ir_Diff_Exc: Phase A, B and C of restraint current of excitation transformer or exciter.

Id_2ndH: Phase A, B and C of 2nd harmonics component in differential current of excitation transformer or exciter.

Icorr_S1_Exc: Phase A, B and C of corrected current on the high voltage side of excitation transformer or terminal side of exciter (Side 1).

Icorr_S2_Exc: Phase A, B and C of corrected current on the low voltage side of excitation transformer or neutral point side of exciter (Side 2) .

Access path in menu is “VALUESà CPU METERINGà EXC METERINGà DIFF CURR” and VALUESà MON METERINGà EXC METERINGà DIFF CURR”.

4.2.7.13 AC metering in excitation metering in CPU and MON

AC METERING

I_S1_Exc: 000.00 000.00 000.00 A

I1_S1_Exc: 000.00 A

I2_S1_Exc: 000.00 A

I0_S1_Exc: 000.00 A

I_S2_Exc: 000.00 000.00 000.00 A

I1_S2_Exc: 000.00 A

I2_S2_Exc: 000.00 A

I0_S2_Exc: 000.00 A

Figure 4-13 AC metering in excitation metering in CPU and MON



Where:

I_S1_Exc: Phase A, B and C current on side 1 of excitation transformer or exciter.

I1_S1_Exc: Positive sequence current of side 1 of excitation transformer or exciter.

I2_S1_Exc: negative sequence current of side 1 of excitation transformer or exciter.

I0_S1_Exc: zero sequence current of side 1 of excitation transformer or exciter.

I_S2_Exc: Phase A, B and C current on side 2 of excitation transformer or exciter.

I1_S2_Exc: Positive sequence current of side 2 of excitation transformer or exciter.

I2_S2_Exc: negative sequence current of side 2 of excitation transformer or exciter.

I0_S2_Exc: zero sequence current of side 2 of excitation transformer or exciter.

Upp_ET: Phase to phase voltages of excitation transformer.

U1_ET: Positive sequence voltage of excitation transformer.

U2_ET: Negative sequence voltage of excitation transformer.

I_RotWdg: excitation current through rotor winding.

I_Exc: alternative excitation current on the rectifier’s AC side

Accu_Therm_RotWdg: accumulation of thermal of rotor winding.

Access path in menu is “VALUESà CPU METERINGà EXC METERINGà AC METERING” and VALUESà MON METERINGà EXC METERINGà AC METERING”.

4.2.7.14 Phase angles of transformer metering

TR PHASE ANGLE

φ_HVS1_Tr_&_HVS2_Tr:

φ_HVS1_Tr_&_LVS_Tr:

φ_HVS1_Tr_&_HVS_ST:

φ_HVS_Tr_&_NP_Tr:

φ_HVS_Tr_&_HVS_ST:

φI0_Tr_&_NP_Tr:

φipp_HVS1_Tr:

φipp_HVS2_Tr:

000 000 000 o

000 000 000 o

000 000 000 o

000 000 000 o

000 000 000 o

000 o

000 000 000 o

000 000 000 o

Figure 4-14 Phase angle of transformer metering

Where:

φ_HVS1_Tr_&_HVS2_Tr：phase angle between same-phase currents derived from branch 1 and 2 of HV side of transformer.

φ_HVS1_Tr_&_LVS_Tr：phase angle between same-phase currents derived from branch 1 at HV side and form LV side of transformer.

φ_HVS1_Tr_&_HVS_ST：phase angle between same-phase currents derived from branch 1 at HV side of transformer and form HV side of stepdown transformer.



φ_HVS_Tr_&_NP_Tr：phase angle between same-phase currents from sum currents of HV side and neutral point of transformer.

φ_HVS_Tr_&_HVS_ST：phase angle between same-phase currents from sum currents of HV side and HV side of stepdown transformer.

φI0_Tr_&_NP_Tr：phase angle between zero sequence currents from sum currents of HV side and neutral point of transformer.

φipp_HVS1_Tr: phase angle between phase A and B, B and C, C and A of currents derived from HVS1 of transformer.

φipp_HVS2_Tr: phase angle between phase A and B, B and C, C and A of currents derived from HVS2 of transformer.

φipp_HVS_Tr: phase angle between phase A and B, B and C, C and A of currents derived from HVS of transformer.

φipp_LVS_Tr: phase angle between phase A and B, B and C, C and A of currents derived from LVS of transformer.

φvpp_Tr: phase angle between phase A and B, B and C, C and A of voltages of transformer.

φvi_Tr: phase angle between voltages and currents of phase A, B and C of transformer.

Φvi0_Tr: phase angle between zero sequence voltage and zero sequence current of transformer.

Access path in menu is “VALUESà PHASE ANGLE à TR PHASE ANGLE”

4.2.7.15 Phase angles of auxiliary metering

ST PHASE ANGLE

φ_HVS_ST_&_LVS_ST:

φi0_ST_&_NP_ST:

φipp_CT1_HVS_ST:

φipp_CT2_HVS_ST:

φipp_LVS_ST:

φvpp_LVS_ST:

000 000 000 o

000 o

000 000 000 o

000 000 000 o

000 000 000 o

000 000 000 o

Figure 4-15 Phase angles of stepdown transformer metering

Where:

φ_HVS_ST_&_LVS_ST：phase angle between same-phase voltages of HVS and LVS of stepdown transformer.

Φi0_ST_&_NP_ST：phase angle of zero sequence current of HVS and neutral point of stepdown transformer.

φipp_CT1_HVS_ST: phase angle between phase A and B, B and C, C and A of current derived from CT1 at HV side of stepdown transformer.



φipp_CT2_HVS_ST: phase angle between phase A and B, B and C, C and A of current derived from CT2 at HV side of stepdown transformer.

φipp_LVS_ST: phase angle between phase A and B, B and C, C and A of currents of LV side of stepdown transformer.

φvpp_LVS_ST: phase angle between phase A and B, B and C, C and A of voltages of LV side of stepdown transformer.

Access path in menu is “VALUESà PHASE ANGLEà ST PHASE ANGLE”.

4.2.7.16 Phase angles of generator metering

GEN PHASE ANGLE

φ_Term_Gen_&_NP_Gen:

φ_SP1_Gen_&_SP2_Gen:

φipp_Term_Gen:

φipp_NP_Gen:

φipp_SP1_Gen:

φipp_SP2_Gen:

φvpp_VT1_Term_Gen:

φvpp_VT2_Term_Gen:

000 000 000 o

000 000 000 o

000 000 000 o

000 000 000 o

000 000 000 o

000 000 000 o

000 000 000 o

000 000 000 o

Figure 4-16 Phase angles of generator metering

Where:

φ_Term_Gen_&_NP_Gen：phase angle between same-phase currents derived from CT at generator’s terminal and at generator’s neutral point.

φ_SP1_Gen_&_SP2_Gen: phase angle between same-phase currents derived from CT at phase-splitting branch 1 and branch2.

φipp_Term_Gen: phase angle between phase A and B, B and C, C and A of current derived from CT at generator’s terminal.

φipp_NP_Gen: phase angle between phase A and B, B and C, C and A of current derived from CT at generator’s neutral point.

φipp_SP1_Gen: phase angle between phase A and B, B and C, C and A of current derived from CT at the phase-splitting branch 1.

φipp_SP2_Gen: phase angle between phase A and B, B and C, C and A of current derived from CT at the phase-splitting branch 2.

φvpp_VT1_Term_Gen: phase angle between phase A and B, B and C, C and A of voltage derived from VT1 at generator’s terminal.

φvpp_VT2_Term_Gen: phase angle between phase A and B, B and C, C and A of voltage derived from VT2 at generator’s terminal.

φv_VT1_Gen_&_VT2_Gen: phase angle between same-phase voltage derived from VT1 and VT2



at generator’s terminal.

φ_V3rdH_Gen: phase angle between phase A and B, B and C, C and A of 3rd harmonics voltage derived from VT1 at generator’s terminal.

φvi_Term_Gen: phase angle between same-phase voltage and current of generator’s terminal.

Access path in menu is “VALUESà PHASE ANGLEà GEN PHASE ANGLE”.

4.2.7.17 Phase angle of excitation metering

EXC PHASE ANGLE

φ1_S1_Exc_&_S2_Exc:

φipp_S1_Exc:

φipp_S2_Exc:

φvpp_Exc:

000 000 000 o

000 000 000 o

000 000 000 o

000 000 000 o

Figure 4-17 Excitation System metering of generator

Where:

φi_S1_Exc_&_S2_Exc: phase angle between same-phase currents derived from CT at generator’s terminal and that at generator’s neutral point

φipp_S1_Exc: phase angle between phase A and B, B and C, C and A of currents derived from CT at side 1 of excitation transformer or exciter.

φipp_S2_Exc: phase angle between phase A and B, B and C, C and A of currents derived from CT at side 2 of excitation transformer or exciter.

φvpp_Exc: phase angle between phase A and B, B and C, C and A of voltages of excitation transformer or exciter.

Access path in menu is “VALUESà PHASE ANGLEà EXC PHASE ANGLE”.

4.3 Signaling Signals here mean changes of binary inputs. All these signals can be displayed on LCD, locally printed or sent to automation system of substation via communication channel.



4.3.1 Enabling binary inputs of transformer

TR PROT EBI

EBI_Diff_GTU:

EBI_Diff_Tr:

EBI_PPF_Tr:

EBI_EF_Tr:

0

EBI_REF_Tr:

0

0

0

0

Figure 4-18 Enabling binary inputs of transformer protection

Where:

EBI_Diff_GTU：Enabling binary input of differential protection of generator-transformer unit.

EBI_Diff_Tr: Enable binary input of differential protection of transformer.

EBI_PPF_Tr：Enabling binary input of phase-to-phase backup protection of transformer.

EBI_EF_Tr：Enabling binary input of earth fault protection of transformer.

EBI_REF_Tr: Enabling binary input of restrict earth fault protection of transformer.

Access path in menu is “VALUESà CPU BI STATE à TR PROT EBI” and “VALUESà MON BI STATE à TR PROT EBI” .

4.3.2 Enabling binary inputs of generator

GEN PROT EBI

EBI_Diff_Gen:

EBI_SPTDiff_Gen:

EBI_PPF_Gen:

EBI_IntTurn_Gen:

0

EBI_ROV_Sta:

0

0

0

0

EBI_V3rd_Sta: 0

EBI_1PEF_RotWdg: 0

EBI_2PEF_RotWdg: 0

Figure 4-19 Enabling binary inputs of generator protection

Where:

EBI_Diff_Gen：Enabling binary input of differential protection of generator.



EBI_SPTDiff_Gen: Enabling binary input of spilt phase differential protection of generator.

EBI_PPF_Gen： Enabling binary input of phase-to-phase backup protection of generator.

EBI_IntTurn_Gen：Enabling binary input of interturn protection of generator.

EBI_ROV_Sta: Enabling binary input of zero sequence overvoltage protection of stator.

EBI_V3rd_Sta: Enabling binary input of 3rd harmonics voltage protection of generator.

EBI_1PEF_RotWdg: Enabling binary input of 1 point earth fault protection of rotor.

EBI_2PEF_RotWdg: Enabling binary input of 2 points earth fault protection of rotor.

EBI_OvLd_Sta: Enabling binary input of overload protection of stator.

EBI_NegOC_Sta: Enabling binary input of negative overcurrent protection of stator.

EBI_LossExc_Gen: Enabling binary input of loss-of-excitation protection of generator.

EBI_OOS_Gen: Enabling binary input of out-of-step protection of generator.

EBI_VoltProt_Gen: Enabling binary input of over-voltage and under-voltage protection of generator.

EBI_OvExc_Gen: Enabling binary input of over-excitation protection of generator.

EBI_PwrProt_Gen: Enabling binary input of power protection of generator.

EBI_FreqProt_Gen: Enabling binary input of over-frequency and under-frequency protection of generator.

EBI_AccEnerg_Gen: Enabling binary input of accidental energization protection of generator.

EBI_StShut_Gen: Enabling binary input of startup and shutdown protection of generator.

Access path in menu is “VALUESà CPU BI STATE à GEN PROT EBI” and “VALUESà MON BI STATE à GEN PROT EBI”.

4.3.3 Enabling binary inputs of excitation and stepdown transformer protection

ET&ST PROT EBI

EBI_Diff_Exc:

EBI_Bak_Exc:

EBI_Diff_ST:

EBI_Bak_HVS_ST:

0

EBI_Bak_LVS_ST:

0

0

0

0

EBI_REF_ST: 0

Figure 4-20 Enabling Binary Input list of excitation and stepdown transformer protection

Where:

EBI_Diff_Exc: Enabling binary input of differential protection of excitation transformer of exciter.

EBI_Bak_Exc: Enabling binary input of backup protection of excitation transformer of exciter.



EBI_Diff_ST: Enabling binary input of differential protection of stepdown transformer.

EBI_Bak_HVS_ST: Enabling binary input of backup protection of HV side of stepdown transformer.

EBI_Bak_LVS_ST: Enabling binary input of backup protection of LV side of stepdown transformer.

EBI_REF_ST: Enabling binary input of restrict earth fault protection of stepdown transformer.

Access path in menu is “VALUESà CPU BI STATE à ET&ST PROT EBI” and “VALUESà MON BI STATE à ET&ST PROT EBI” .

4.3.4 Binary inputs of mechanical protection

Mech Prot BI

EBI_Trp_MechRly1:

EBI_Trp_MechRly2

EBI_Trp_MechRly3:

EBI_Trp_MechRly4:

BI_MechRly1:

BI_MechRly2:

BI_MechRly3:

BI_MechRly4

0

0

0

0

0

0

0

0

Figure 4-21 Binary Inputs of mechanical protection

Where:

EBI_Trp_MechRly x: Enabling binary input of mechanical protection to allow mechanical repeater x to initial tripping.

BI_MechRly x: Binary input indicating operation of mechanical repeater x.

BI_SyncCondenser: Binary input indicating the synchronous condenser is put into operation.

Access path in menu is “VALUESà CPU BI STATE à EXC PROT EBI” and “VALUESà MON BI STATE à EXC PROT EBI”.



4.3.5 Auxiliary binary input

AUX BI

BI_52b_GCB:

BI_52b_CB_HVS1_Tr:

BI_52b_CB_HVS1_Tr:

BI_Valve_Turbine:

BI_PoleDisagr_CB:

BI_UrgBrake:

BI_PS_Superv:

BI_Reserved:

0

0

0

0

0

0

0

0

Figure 4-22 Auxiliary binary input

Where:

BI_52b_GCB：Binary input of auxiliary contact of close position of circuit breaker at generator’s terminal.

BI_52b_CB_HVS1_Tr: Binary input of auxiliary contact of close position of circuit breaker at branch 1 of HV side of transformer.

BI_52b_CB_HVS2_Tr: Binary input of auxiliary contact of close position of circuit breaker at branch 2 of HV side of transformer.

BI_Valve_Turbine: Binary input indicating the valve of steam turbine is in close position.

BI_PoleDisagr_CB: Binary input of pole disagreement of circuit breaker.

BI_UrgBrake: Binary input indicating the generator is in urgent braking condition.

BI_Reserved: Reserved binary input.

BI_PS_Superv: Binary input indicating the power supply for all binary input circuit is working in good condition.

Access path in menu is “VALUESà CPU BI STATE à AUX BI” and “VALUESà MON BI STATE à AUX BI”.



4.3.6 Fault detector flag generated internal by MON

MON FD

MON.FD_Diff_Tr/GTU:

MON.FD_PPF_&_EF_Tr:

MON.FD_Diff_ST:

MON.FD_Bak_ST:

MON.FD_Diff_Gen:

MON.FD_EF_Sta:

MON.FD_EF_RotWdg:

MON.FD_OvLd_Sta:

0

0

0

0

0

0

0

0

Figure 4-23 Fault detector flag generated internal by MON

Where:

MON.FD_Diff_Tr/GTU：Internally generated binary input indicating operation of fault detector of differential protection of transformer or generator-transformer unit.

MON.FD_PPF_&_EF_Tr: Internally generated binary input indicating operation of phase to phase fault and earth fault protection of transformer.

MON.FD_Diff_ST: Internally generated binary input indicating operation of differential protection of stepdown transformer.

MON.FD_Bak_ST: Internally generated binary input indicating operation of backup protection of stepdown transformer.

MON.FD_Diff_Gen: Internally generated binary input indicating operation of differential protection of generator.

MON.FD_EF_Sta: Internally generated binary input indicating operation of fault detector of earth fault protection of stator.

MON.FD_EF_RotWdg: Internally generated binary input indicating operation of fault detector of earth fault protection of rotor.

MON.FD_OvLd_Sta: Internally generated binary input indicating operation of fault detector of overload protection of stator.

MON.FD_Bak_Gen: Internally generated binary input indicating operation of fault detector of backup protection of generator.

MON.FD_OV_&_OvExc_Gen: Internally generated binary input indicating operation of fault detector of overvoltage and overexciatation protection of generator.

MON.FD_FreqProt_Gen: Internally generated binary input indicating operation of fault detector of frequency protection of generator.

MON.FD_LossExc_&_OOS_Gen: Internally generated binary input indicating operation of fault detector of loss-of-excitation and out-of-step protection of generator.



MON.FD_Pwr&AccEnerg_Gen: Internally generated binary input indicating operation of fault detector of power protection and accidental energization protection of generator.

MON.FD_StShut_Gen: Internally generated binary input indicating operation of fault detector of startup and shutdown protection of generator.

MON.FD_Prot_Exc: Internally generated binary input indicating operation of fault detector of protections of excitation transformer or exciter.

MON.FD_MechRly: Internally generated binary input indicating operation of fault detector of mechanical protection of excitation transformer.

Access path in menu is “VALUESà CPU BI STATE à MON FD” and “VALUESà MON BI STATE à MON FD”.

4.3.7 Other Binary Inputs

PS SUPERV BI

BI_PS_Superv:

BI_PS_Opto:

BI_Print:

BI_Pulse_GPS:

BI_ResetTarget:

1

1

0

0

0

Figure 4-24 Other binary inputs

Where:

BI_PS_Superv: binary input indicating the power supply of mechanical repeater is in proper working condition.

BI_PS_Opto: binary input indicating the power supply of optical isolators is in proper working condition.

BI_ResetTarget: binary input of signal reset button.

BI_Pulse_GPS: binary input of GPS clock synchronous pulse.

BI_Print: binary input represents the print button.

Access path in menu is “VALUESà CPU BI STATE à PS SUPERV BI” and “VALUESà MON BI STATE à PS SUPERV BI”.

4.4 Event & fault records 4.4.1 Introduction

The RCS-985A is equipped with integral measurements, event, fault and disturbance recording facilities suitable for analysis of complex system disturbances. The relay is flexible enough to allow



for the programming of these facilities to specific user application requirements and is discussed below.

4.4.2 Event & Fault records

The relay records and time tags up to 32 events and stores them in non-volatile (battery backed up) memory. This enables the system operator to establish the sequence of events that occurred within the relay following a particular power system condition, switching sequence etc. When the available space is exhausted, the oldest event is automatically overwritten by the new one.

The real time clock within the relay provides the time tag to each event, to a resolution of 1ms. The event records are available for viewing either via the front plate LCD or remotely, via the communications ports (courier and MODBUS versions only).

Local viewing on the LCD is achieved in the menu column entitled “REPORT”. This column allows viewing of event and fault records and is shown by setting sequence No. of the event or fault report by user. Refer to section 8 for details of operation method.

4.4.3 Type of event

An event may be a change of state of a control input or output relay, an alarm condition and operation reports of protection etc.

4.4.4 Change of state of binary inputs

If one or more of the opto inputs has changed state since the last time that the protection algorithm ran, the new status is logged as an event. When this event is selected to be viewed on the LCD, the applicable cells will become visible as shown below:

Record No. BI CHANG REPORTData：xxxx - xx – xx Time：xx : xx : xx : xxx

Binary input name Changing manner

Figure 4-25 Format of Event Report

Where “Record NO.” means the sequence No. of the record which is generated by RCS-985A automatically. “Date: DD-MM-YY” and “Time: HH:MM:SS:xxxxms” commonly comprise the absolute time tag of the record. “Binary input Name” shows the name of the binary input whose state changes. “Changing manner” shows how to change of the state of the binary input. For instance:



No. 011 BI Change Report

2007 - 01 - 01 15 : 19 : 00 : 003

EBI_Diff_Gen 0 -> 1

Figure 4-26 Example of Binary Input Changing Report

All the binary input that may be shown in the menu can be found in section 4.3, here list them again.

Table 4-2 List of binary input of RCS-985A No. BI name No. BI name 1. EBI_Diff_Gen 36. EBI_Bak_HVS_ST 2. EBI_IntTurn_Gen 37. EBI_Bak_LVS_ST 3. EBI_ROV_Sta 38. EBI_REF_ST 4. EBI_V3rdH_Sta 39. EBI_Reserved2 5. EBI_1PEF_RotWdg 40. EBI_Reserved3 6. EBI_2PEF_RotWdg 41. BI_Print 7. EBI_OvLd_Sta 42. BI_Pulse_GPS 8. EBI_NegOC_Sta 43. BI_ResetTarget 9. EBI_LossExc_Gen 44. BI_PS_Opto 10. EBI_OOS_Gen 45. BI_MechRly1 11. EBI_VoltProt_Gen 46. BI_MechRly2 12. EBI_OvExc_Gen 47. BI_MechRly3 13. EBI_PwrProt_Gen 48. BI_MechRly4 14. EBI_FreqProt_Gen 49. BI_52b_GCB 15. EBI_AccEnerg_Gen 50. BI_52b_CB_HVS1_Tr 16. EBI_StShut_Gen 51. BI_52b_CB_HVS2_Tr 17. EBI_Diff_Exc 52. BI_PoleDisagr_CB 18. EBI_Bak_Exc 53. BI_Valve_Turbine 19. EBI_Trp_MechRly1 54. MON.FD_Diff_Tr 20. EBI_Trp_MechRly2 55. MON.FD_PPF&EF_Tr 21. EBI_Trp_MechRly3 56. MON.FD_Diff_ST 22. EBI_Trp_MechRly4 57. MON.FD_Bak_ST 23. EBI_PPF_Gen 58. MON.FD_Diff_Gen 24. EBI_SPTDiff_Gen 59. MON.FD_EF_Sta 25. BI_UrgBrake 60. MON.FD_EF_RotWdg



No. BI name No. BI name 26. BI_SyncCondenser 61. MON.FD_OvLd_Sta 27. BI_Reserved 62. MON.FD_PPF_Gen 28. BI_PS_Superv 63. MON.FD_OvExc_Gen 29. EBI_Diff_Tr 64. MON.FD_FreqProt_Gen 30. EBI_PPF_Tr 65. MON.FD_LossExc_&_OOS_Gen 31. EBI_EF_Tr 66. MON.FD_Pwr&AccEnerg_Gen 32. EBI_REF_Tr 67. MON.FD_StShut_Gen 33. EBI_Diff_GTU 68. MON.FD_Prot_Exc 34. EBI_Reserved1 69. MON.FD_MechRly 35. EBI_Diff_ST 70.

4.4.5 Relay alarm conditions

Any alarm conditions generated by the relays will also be logged as individual events. The access method and display format is similar to that of binary input changing record as shown as below.

Record No. ALARM REPORT

Data xxxx - xx – xx Time xx : xx : xx : xxx

ALARM ELEMENT

Figure 4-27 Format of alarm report on LCD

The above figure shows the abbreviated description that is given to the various alarm conditions and also a corresponding value between 0 and 31. This value is appended to each alarm event in a similar way as for the input events previously described. It is used by the event extraction software, such as DBG2000, to identify the alarm and is therefore invisible if the event is viewed on the LCD.

The following table shows all of the alarm elements that may be displayed in this item.

Table 4-3 List of alarm elements No. Alarm name No. Alarm name 1. Alm_SwOv_VTS1_Gen 60. Alm_MechRly2 2. Alm_SwOv_VTS2_Gen 61. Alm_MechRly3 3. Alm_BlkV3rdHDiff_VTS1 62. Alm_MechRly4



No. Alarm name No. Alarm name 4. Alm_BlkIntTurn_VTS2 63. Alm_BO_UC_OvSp_Gen 5. Alm_VTS_HVS_Tr 64. Alm_VTS_Term_Gen 6. Alm_VTS1_Term_Gen 65. Alm_VTS_HVS_Tr 7. Alm_VTS2_Term_Gen 66. Alm_VTS_LVS_ST 8. Alm_VTS_NP_Gen 67. Alm_MechRly1 9. Alm_DeltVTS1_Term_Gen 68. Alm_OvLd_Tr 10. Alm_DeltVTS2_Term_Gen 69. Alm_InitCool2_OvLd_Tr 11. Alm_VTS_RotWdg 70. Alm_InitCool1_OvLd_Tr 12. Alm_Pos_CB_HVS1_Tr 71. Alm_InitCool2_OvLd_ST 13. Alm_Pos_CB_HVS2_Tr 72. Alm_OvLd_ST 14. Alm_VTS_LossExc_RotWdg 73. Alm_PwrLoss_MechRly 15. Alm_VTS_ET 74. Alm_InitCool1_OvLd_ST 16. Alm_PM_DSP1_CPUBrd 75. Alm_PM_DSP2_CPUBrd 17. Alm_CTS_HVS1_Tr 76. Alm_CTS_HVS1_Tr 18. Alm_CTS_HVS2_Tr 77. Alm_CTS_HVS2_Tr 19. Alm_CTS_Term_Gen 78. Alm_CTS_LVS_Tr 20. Alm_CTS_NP_Gen 79. Alm_CTS_HVS_ST 21. Alm_CTS_SP1_Gen 80. Alm_CTS_HVS_Tr 22. Alm_CTS_SP2_Gen 81. Alm_REF_Tr 23. Alm_CTS_S1_Exc 82. Alm_CTS2_HVS_ST 24. Alm_CTS_S2_Exc 83. Alm_CTS1_HVS_ST 25. Alm_CTS_TrvDiff_Gen 84. Alm_CTS_LVS_ST 26. Alm_Diff_Gen 85. Alm_REF_ST 27. Alm_SPTDiff_Gen 86. Alm_Diff_GTU 28. Alm_Diff_ET 87. Alm_Diff_Tr 29. Alm_Diff_Exciter 88. Alm_Diff_ST 30. Alm_DPFC_IntTurn_Gen 89. Alm_CTS_Diff_GTU 31. Alm_Pos_GCB 90. Alm_CTS_Diff_Tr 32. Alm_CTS_Diff_Gen 91. Alm_CTS_Diff_ST 33. Alm_CTS_SPTDiff_Gen 92. Alm_OvLd_LVS_ST 34. Alm_CTS_Diff_ET 93. Alm_OvExc_Tr 35. Alm_CTS_Diff_Exciter 94. Alm_UrgBrake 36. Alm_BO_OC2_Gen 95. Alm_Inconsist_MechRly 37. Alm_On_2PEF_RotWdg 96. Alm_PoleDisagr_CB 38. Alm_Ext_OOS_Gen 97. Alm_ROV_LVS_Tr 39. Alm_Int_OOS_Gen 98. Alm_ROV_LVS_ST 40. Alm_Accel_OOS_Gen 99. Alm_RAM_CPUBrd 41. Alm_Decel_OOS_Gen 100. Alm_ROM_CPUBrd 42. Alm_RevP_Gen 101. Alm_EEPROM_CPUBrd 43. Alm_LossExc_Gen 102. Alm_InvalidSetting 44. Alm_OvExc_Gen 103. Alm_ModifiedSetting 45. Alm_OvLd_Sta 104. Alm_PwrLoss_Opto 46. Alm_NegOC_Sta 105. Alm_TripOutput



No. Alarm name No. Alarm name 47. Alm_OvLd_RotWdg 106. Alm_InnerComm 48. Alm_ROV_Sta 107. Alm_DSP_CPUBrd 49. Alm_V3rdHRatio_Sta 108. Alm_PersistFD_CPUBrd 50. Alm_V3rdHDiff_Sta 109. Alm_InconsistFD 51. Alm_Sens_1PEF_RotWdg 110. Alm_Sample_CPUBrd 52. Alm_1PEF_RotWdg 111. Alm_BI_CPUBrd 53. Alm_UF1_Gen 112. Alm_RAM_MONBrd 54. Alm_UF2_Gen 113. Alm_ROM_MONBrd 55. Alm_UF3_Gen 114. Alm_EEPROM_MONBrd 56. Alm_UF4_Gen 115. Alm_DSP_MONBrd 57. Alm_OF1_Gen 116. Alm_PersistFD_MONBrd 58. Alm_OF2_Gen 117. Alm_MONBrd 59. Alm_RevP_Gen 118. Alm_Sample_MONBrd

4.4.6 Protection element pickup and trips

Any operation of protection elements, (either a pickup or a trip condition) will be logged as an event record, consisting of a text string indicating the operated element and an event sequence NO.. Again, this number is intended not only for use by the event extraction software, such as DBG2000, but also for the user, and is therefore visible when the event is viewed on the LCD. The below figure shows the format of protection element operation record.

Record No. TRIP REPORT

Data xxxx - xx – xx Time xx : xx : xx : xxx

OPERATE ELEMENT xxx ms

Figure 4-28 Format of trip report

Where:

“Record NO.” means the sequence No. of the record which is generated by RCS-985A automatically.

“Date: xxxx-xx-xx” and “Time: xx:xx:xx:xxxxms” commonly comprise the absolute time tag of the record.



“Operation Element” shows the name of the operation element. If there are more than one elements operating, they will scroll one by one to display on LCD.

“xxx ms” shows the relative time of operation element to fault detector of the relay.

The following table lists all the operation elements that may be displayed on LCD.

Table 4-4 List of operation elements No. Operation element name No. Operation element name 1. Op_InstDiff_Gen 55. Op_GenDiff_StShut_Gen 2. Op_PcntDiff_Gen 56. Op_SPTDiff_StShut_Gen 3. Op_DPFC_Diff_Gen 57. Op_ETDiff_StShut_Gen 4. Op_InstSPTDiff_Gen 58. Op_StaROV_StShut_Gen 5. Op_PcntSPTDiff_Gen 59. Op_OC1_ET 6. Op_InstDiff_Exciter 60. Op_OC2_ET 7. Op_PcntDiff_Exciter 61. Op_InstDiff_Tr 8. Op_InstDiff_ET 62. Op_PcntDiff_Tr 9. Op_PcntDiff_ET 63. Op_DPFC_Diff_Tr 10. Op_DPFC_IntTurn_Gen 64. Op_OC11_Tr 11. Op_SensTrvDiff_Gen 65. Op_OC12_Tr 12. Op_UnsensTrvDiff_Gen 66. Op_OC21_Tr 13. Op_SensIntTurn_Gen 67. Op_OC22_Tr 14. Op_UnsensIntTurn_Gen 68. Op_ROC11_Tr 15. Op_SensROV_Sta 69. Op_ROC12_Tr 16. Op_UnsensROV_Sta 70. Op_ROC21_Tr 17. Op_V3rdHRatio_Sta 71. Op_ROC22_Tr 18. Op_V3rdHDiff_Sta 72. Op_ROC31_Tr 19. Op_1PEF_RotWdg 73. Op_ROC32_Tr 20. Op_2PEF_RotWdg 74. Op_TrDiff_StShut_Gen 21. Op_OvLd_Sta 75. Op_STDiff_StShut_Gen 22. Op_InvOvLd_Sta 76. Op_InstDiff_GTU 23. Op_NegOC_Sta 77. Op_PcntDiff_GTU 24. Op_InvNegOC_Sta 78. Op_InstREF_Tr 25. Op_OvLd_RotWdg 79. Op_PcntREF_Tr 26. Op_InvOvLd_RotWdg 80. Op_Z11_Tr 27. Op_OC1_Gen 81. Op_Z12_Tr 28. Op_OC2_Gen 82. Op_Z21_Tr 29. Op_OV1_Gen 83. Op_Z22_Tr 30. Op_OV2_Gen 84. Op_ROV1_Gap_Tr 31. Op_UV_Gen 85. Op_ROV2_Gap_Tr 32. Op_OvExc1_Gen 86. Op_ROC1_Gap_Tr 33. Op_OvExc2_Gen 87. Op_ROC2_Gap_Tr 34. Op_InvOvExc_Gen 88. Op_PD1 35. Op_UF1_Gen 89. Op_PD2 36. Op_UF2_Gen 90. Op_InstREF_ST 37. Op_UF3_Gen 91. Op_PcntREF_ST



No. Operation element name No. Operation element name 38. Op_UF4_Gen 92. Op_InstDiff_ST 39. Op_OF1_Gen 93. Op_PcntDiff_ST 40. Op_OF2_Gen 94. Op_OC1_HVS_ST 41. Op_Z1_Gen 95. Op_OC2_HVS_ST 42. Op_Z2_Gen 96. Op_OC1_LVS_ST 43. Op_LossExc1_Gen 97. Op_OC2_LVS_ST 44. Op_LossExc2_Gen 98. Op_ROC1_LVS_ST 45. Op_LossExc3_Gen 99. Op_ROC2_LVS_ST 46. Op_Ext_OOS_Gen 100. Op_OvExc1_Tr 47. Op_Int_OOS_Gen 101. Op_OvExc2_Tr 48. Op_RevP_Gen 102. Op_InvOvExc_Tr 49. Op_UP_Gen 103. Op_MechRly1 50. Op_SeqTrpRevP_Gen 104. Op_MechRly2 51. Op_AccEnerg1_Gen 105. Op_MechRly3 52. Op_AccEnerg2_Gen 106. Op_MechRly4 53. Op_Flash1_TCB 107. Op_UrgBrake 54. Op_Flash2_TCB 108.

4.4.7 Viewing event records via DBG-2000 support software

What the event records are extracted and viewed on a PC they look slightly different than what viewed on the LCD. The following figure shows an example of how various events appear when displayed using DBG-2000:

Figure 4-29 Trip reports seen by DBG-2000

4.5 Disturbance Record The integral disturbance recorder has an area of memory specifically set aside for record storage. The number of records that may be stored by the relay is dependent upon the selected recording duration. The recorder of CPU board can typically store a minimum of 32 records, among them 8



records with instantaneous waveform. The record is composed of tripping element, faulty phase, operation time and the waveform content is composed of differential currents, corrected current of each side of generator or transformer, three-phase current of each side, zero sequence current of each side (if available), three-phase voltages, zero sequence voltage of each side, negative sequence voltage and tripping pulse.

The MON board can store up to 4 seconds (24 sampling points per cycle) or 8 seconds (12 sampling points per cycle) continual waveform, which including all channels analog quantities (sampled data, differential currents and so on), all the binary input changing state, binary output, pick up flags of fault detectors, alarm signals, operation signals and tripping signals. Disturbance records continue to be recorded until the available memory is exhausted, at which time the oldest record(s) are overwritten to make space for the newest one.

It is not possible to view the disturbance records locally via the LCD; they must be extracted using suitable software such as DBG-2000. This process is fully explained in the section 11.6.

The CPU board can also record latest 8 cycles of waveform in normal operation condition, which is composed of three phases current, corrected current of each side for differential protection, three phases voltage and zero sequence voltage of each side. This function can help user to check the pole’s correctness of secondary circuit by comparing the phase of related quantities shown in wave figure. This manual gives the detail instruction of getting normal operation waveform in section 11.6.

4.6 Time Synchronization In modern protective schemes it is often desirable to synchronize the relays real time clock so that events from different relays can be placed in chronological order. This can be done using the IRIG-B input, if fitted, or via the communication interface connected to the substation control system. In addition to these methods the RCS-985A range offers the facility to synchronize via an opto-input. Pulsing this input will result in the real time clock snapping to the nearest minute. The recommended pulse duration is 20ms to be repeated no more than once per minute. An example of the time sync. function is shown.

Time of “Sync. Pulse” Corrected Time 19:47:00 to 19:47:29 19:47:00

19:47:30 to 19:47:59 19:48:00

Note:

The above assumes a time format of hh:mm:ss

Chapter 5 Hardware Description


Chapter 5 Hardware Description 5.1 Hardware overview The protection’s hardware is based on a modular design whereby the relay is made up of an assemblage of several modules that are drawn from a standard range. Some modules are essential while others are optional depending on the user’s requirements.

The case materials of the relay are constructed from pre-finished steel that has a conductive covering of aluminum and zinc. This provides good earthing at all joints giving a low impedance path to earth that is essential for performance in the presence of external noise.

The boards and modules use a multi-point earthing strategy to improve the immunity to external noise and minimize the effect of circuit noise. Ground planes are used on boards to reduce impedance paths and spring clips are used to ground the module metalwork. Heavy duty terminal blocks are used at the rear of the relay for the current and voltage signal connections. Medium duty terminal blocks are used for the digital logic input signals, the output relay contacts, the power supply and the rear communication port. A BNC connector may be used for the optional IRIG-B signal. 9-pin female D-connector is used at the front of the relay for data communication.

Inside the protection the PCBs plug into the connector blocks at the rear, and can be removed from the rear of the relay only. The connector blocks to the relay’s CT inputs are provided with internal shorting links inside the relay which will automatically short the current generator circuits before they are broken when the board is removed. The front panel consists of a membrane keypad with tactile dome keys, an LCD and 5 LEDs mounted on an aluminum face plate.

5.1.1 Front view

RCS-985A is made of a single layer 12U height 19” chassis with 21 connectors on its rear. Figure 5-1 shows front view.



Figure 5-1 Front view of RCS-985A

Components mounted on its front include a 240×128 dot matrix LCD, a 9 button keypad, 5 LED indicators, a signal reset button, a DB9 connector for communication with HELP-90A or PC.

The five LED indicators are, from top to bottom:

HEALTHY: Equipment running normally; VT ALARM : Voltage circuit failure ; CT ALARM: Current circuit failure; ALARM: Abnormal; TRIP: Tripping output;

As to the buttons of the keypad, ENT is “enter”, GRP is “setting group selector” and ESC is “escape”.



5.1.2 Rear view

Figure 5-2 Rear view of RCS-985A



5.1.3 Functional block diagram of RCS-985A

5.1.3.1 Functional block diagram of RCS-985A

LPF A/D D SP1D SP2

C PU1

binarystatusinput

comm ports andport to printer

outputrelay

CPU module

LPF A/D DSP3DSP4

CPU2

E+

opto-coupler

QDJ

CP

LD

LCDMMI

MMI

MMI

DC

/DC ＋5 V

±12 V＋24 VD

C22

0V

or11

0V

MMI-CPU

opto-coupler

CP

LD

AC currentand voltage

±24 V tooptic-coupler management module

comm ports andport to printer

binarystatusinput

Figure 5-3 Functional block diagram of RCS-985A

5.1.3.2 Brief description of operation

The equipment RCS-985A uses Motorola 32 bits monolithic microprocessor MC68332 as control kernel for output logic and management functions, and high-speed digital signal processor DSP for protection calculation. Sampling rate of the equipment is 24 points per cycle. Real time data are processed parallel for all algorithms during whole process of fault. So the equipment can ensure very high inherent reliability and security.

AC currents and voltages of CT and VT are transferred to low voltage signals by isolating transformers and are inputted to CPU module and MON module. Data and logic are processed respectively in these two modules with same hardware. The CPU module carries out functions of protection algorithms, tripping logic, event record and printing. The MON module comprises general fault detector and fault recorder. The fault detector will connect positive pole of power supply of output relays after pickup. Format of the record is compatible with COMTRADE, and the data recorded can be uploaded via separate serial port for communication or printing.

Power supply part is located in DC module. It converts DC 250/220/125/110 V into different DC voltage levels needed by various modules of the equipment. DC module also comprises 24V and 250/220/125/110V opto-couplers for binary inputs.

AC current and voltage are converted to low voltage signals in modules AC1, AC2, AC3 and AC4. Two ratings of AC current are option, 1A or 5A. It shall be stated definitely during ordering and checked during commissioning.

Binary output of tripping commands, tripping signal output and status binary input parts are comprised in five modules: SIG1, SIG2, SIG3, SIG4 and RLY. 24V and 250/220/125/110V opto-couplers are used here for binary input.



Briefly, the equipment is composed of twelve modules to achieve the work of busbar protection. The modules are AC voltage and current input module1(AC1), AC current input modules(AC2, AC3 and AC4), management/record module(MON)、protection CPU module(CPU), power supply module(DC), signal modules(SIG1, SIG2, SIG3 and SIG4), tripping contacts output(RLY) and human machine interface(HMI).

The relay hardware is based on a modular design whereby the relay is made up of an assemblage of several modules.

5.2 Standard connectors and terminals 5.2.1 General description

There are 21 connectors for external connections mounted on rear panel of the equipment as shown in Figure 5-2, of which, 15 connectors are 30 pins while 6 connectors are 18 pins.

Connectors with 30 pins are used for DC power supply, binary input, communication and printer, tripping, alarm and other signal output and AC voltage input. Numbers of these connectors are 1A, 1B, 2A, 2B, 3A, 3B, 4A, 4B, 5B, 6B, 7B, 8B and 9B. Figure 5-4 a) shows layout of 30 pins of these connectors.

Connectors with 18 pins are used for AC voltage input and current input. Numbers of these connectors are 9C, 10C, 10C, 11B, 11C, 12B and 12C. Figure 5-4 b) shows layout of pins of these connectors.

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

a) connector with 30 pins

1 3 5 7 9 11 13 15 17

2 4 6 8 10 12 14 16 18

b) connector with 18 pins Figure 5-4 Layout of pins of two kinds of connectors

Each connector will be introduced in detail in the following sections.

5.2.2 Pins definition of ‘1A’ connectors.

Connector 1A: 30 pins male connector for tripping output

Attention:

For showing the relation of each terminal clearly, the terminal’s location shown in the figure may be different from the real physical location, and we needn’t figure out the blank terminals.

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

Figure 5-5 Connector 1A of RCS-985A



1A1,1A30 blank Binary output of tripping: 1A3-1A5 tripping output channel 1-1, TJ1-1 1A7-1A9 tripping output channel 1-2, TJ1-2 1A11-1A13 tripping output channel 1-3, TJ1-3 1A15-1A17 tripping output channel 1-4, TJ1-4 1A19-1A21 tripping output channel 2-1, TJ2-1 1A23-1A25 tripping output channel 2-2, TJ2-2 1A27-1A29 tripping output channel 2-3, TJ2-3 1A2-1A4 tripping output channel 3-1, TJ3-1 1A6-1A8 tripping output channel 3-2, TJ3-2 1A10-1A12 tripping output channel 3-3, TJ3-3 1A14-1A16 tripping output channel 3-4, TJ3-4 1A18-1A20 tripping output channel 4-1, TJ4-1 1A22-1A24 tripping output channel 4-2, TJ4-2 1A26-1A28 tripping output channel 5-1, TJ5-1

5.2.3 Pins definition of ‘1B’ connectors

Connector 1B: 30 pins male connector for tripping output

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

Figure 5-6 Connector 1B of RCS-985A

Binary output of tripping: 1B1-1B3 tripping output channel 2-4, TJ2-4 1B5-1B7 tripping output channel 6-1, TJ6-1 1B9-1B11 tripping output channel 6-2, TJ6-2 1B13-1B15 tripping output channel 6-3, TJ6-3 1B17-1B19 tripping output channel 7-1, TJ7-1 1B21 -1B23 tripping output channel 8-1, TJ8-1 1B25-1B27 tripping output channel 9-1, TJ9-1 1B2-1B4 tripping output channel 5-2, TJ5-2 1B6-1B8 tripping output channel 5-3, TJ5-3 1B10-1B12 tripping output channel 5-4, TJ5-4 1B14-1B16 tripping output channel 11-1, TJ11-1



1B18-1B20 tripping output channel 11-2, TJ11-2 1B22-1B24 tripping output channel 12-1, TJ12-1 1B26-1B28 tripping output channel 12-2, TJ12-2 1B29-1B30 tripping output channel 10-1, TJ10-1

5.2.4 Pins definition of ‘2A’ connectors

Connector 2A: 30 pins male connector for signal output


Binary output of local signal: 2A1 local signal: common terminal 1 2A1-2A7 local signal: generator differential protection tripping 2A1-2A13 local signal: stator earth fault protection tripping 2A1-2A19 local signal: stator overload protection tripping 2A1-2A25 local signal: generator loss-of-excitation protection tripping 2A2 Local signal: common terminal 2 2A2-2A8 Local signal: generator-transformer unit differential protection tripping 2A2-2A14 Local signal: transformer differential protection tripping

2A2-2A20 Local signal: phase to phase fault protection of transformer tripping or pole disagreement protection tripping

2A2-2A26 Local signal: earth fault protection of transformer tripping Binary output of remote signal: 2A3 Remote signal: common terminal 1 2A3-2A9 Remote signal: generator differential protection tripping 2A3-2A15 Remote signal: stator earth fault protection tripping 2A3-2A21 Remote signal: stator overload protection tripping 2A3-2A27 Remote signal: generator loss-of-excitation protection tripping 2A4 Remote signal: common terminal 2 2A4-2A10 Remote signal: generator-transformer unit differential protection tripping 2A4-2A16 Remote signal: transformer differential protection tripping

2A4-2A22 Remote signal: phase to phase fault protection of transformer tripping or pole disagreement protection tripping



2A4-2A28 Remote signal: earth fault protection of transformer tripping Binary output of event record: 2A5 Event record: common terminal 1 2A5-2A11 Event signal: generator differential protection tripping 2A5-2A17 Event signal: stator earth fault protection tripping 2A5-2A23 Event signal: stator overload protection tripping 2A5-2A29 Event signal: generator loss-of-excitation protection tripping 2A6 Event signal: common terminal 2 2A6-2A12 Event signal: generator-transformer unit differential protection tripping 2A6-2A18 Event signal: transformer differential protection tripping

2A6-2A24 Event signal: phase to phase fault protection of transformer tripping or pole disagreement protection tripping

2A6-2A30 Event signal: earth fault protection of transformer tripping


Connector 2B: 30 pins male connector for signal output


Binary output of local signal: 2A1-2B1 Local signal: generator loss of excitation protection tripping 2A1-2B7 Local signal: generator over voltage protection tripping 2A1-2B13 Local signal: generator reverse power protection tripping 2A1-2B19 Local signal: generator startup and shutoff protection tripping 2A1-2B25 Local signal: generator accidental energization protection tripping 2A2-2B2 Local signal: restrict earth fault protection of main transformer tripping 2A2-2B8 Local signal: mechanical protection tripping 2A2-2B14 Local signal: exciter differential protection tripping Binary output of remote signal: 2A3-2B3 Remote signal: generator loss of excitation protection tripping 2A3-2B9 Remote signal: generator over voltage protection tripping 2A3-2B15 Remote signal: generator reverse power protection tripping 2A3-2B21 Remote signal: generator startup and shutoff protection tripping



2A3-2B27 Remote signal: generator accidental energization protection tripping 2A4-2B4 Remote signal: restrict earth fault protection of main transformer tripping 2A4-2B10 Remote signal: mechanical protection tripping 2A4-2B16 Remote signal: exciter differential protection tripping Binary output of event record: 2A5-2B5 Event record: generator loss of excitation protection tripping 2A5-2B11 Event record: generator over voltage protection tripping 2A5-2B17 Event record: generator reverse power protection tripping 2A5-2B23 Event record: generator startup and shutoff protection tripping 2A5-2B29 Event record: generator accidental energization protection tripping 2A6-2B6 Event record: restrict earth fault protection of main transformer tripping 2A6-2B12 Event record: mechanical protection tripping 2A6-2B18 Event record: exciter differential protection tripping Other binary output 2B20-2B22 Binary output of stage 2 of initial cooling of main transformer. 2B24-2B26 Tripping output channel 13-1, TJ13-1 2B28-2B30 Tripping output channel 13-2, TJ13-2


Connector 3A: 30 pins male connector for signal output


Binary output of local signal: 3A1 Local signal: common terminal 1 3A1-3A7 Local signal: generator interturn fault protection tripping 3A1-3A13 Local signal: rotor earth fault protection tripping 3A1-3A19 Local signal: generator negative sequence overload protection tripping 3A1-3A25 Local signal: generator out-of-step protection tripping 3A2 Local signal: common terminal 2 3A2-3A8 Local signal: Stepdown transformer differential protection tripping 3A2-3A14 Local signal: HV side of stepdown transformer backup protection tripping



3A2-3A20 Local signal: LV side of stepdown transformer backup protection tripping 3A2-3A26 Local signal: Stepdown transformer restrict earth fault protection tripping Binary output of remote signal: 3A3 Remote signal: common terminal 1 3A3-3A9 Remote signal: generator interturn fault protection tripping 3A3-3A15 Remote signal: rotor earth fault protection tripping 3A3-3A21 Remote signal: generator negative sequence overload protection tripping 3A3-3A27 Remote signal: generator out-of-step protection tripping 3A4 Remote signal: common terminal 2 3A4-3A10 Remote signal: Stepdown transformer differential protection tripping 3A4-3A16 Remote signal: HV side of stepdown transformer backup protection tripping 3A4-3A22 Remote signal: LV side of stepdown transformer backup protection tripping 3A4-3A28 Remote signal: Stepdown transformer restrict earth fault protection tripping Binary output of event record: 3A5 Event record: common terminal 1 3A5-3A11 Event record: generator interturn fault protection tripping 3A5-3A17 Event record: rotor earth fault protection tripping 3A5-3A23 Event record: generator negative sequence overload protection tripping 3A5-3A29 Event record: generator out-of-step protection tripping 3A6 Event record: common terminal 2 3A6-3A12 Event record: Stepdown transformer differential protection tripping 3A6-3A18 Event record: HV side of stepdown transformer backup protection tripping 3A6-3A24 Event record: LV side of stepdown transformer backup protection tripping 3A6-3A30 Event record: Stepdown transformer restrict earth fault protection tripping


Connector 3B: 30 pins male connector for signal output


Binary output of local signal: 3A1-3B1 Local signal: reserved output 1 3A1-3B7 Local signal: generator over excitation protection tripping



3A1-3B13 Local signal: generator sequence reverse power protection tripping 3A1-3B19 Local signal: generator phase to phase backup protection tripping 3A1-3B25 Local signal: generator frequency protection tripping 3A2-3B2 Local signal: reserved output 2 3A2-3B8 Local signal: reserved output 3 3A2-3B14 Local signal: exciter overload protection tripping Binary output of remote signal: 3A3-3B3 Remote signal: reserved output 1 3A3-3B9 Remote signal: generator over excitation protection tripping 3A3-3B15 Remote signal: generator sequence reverse power protection tripping 3A3-3B21 Remote signal: generator phase to phase backup protection tripping 3A3-3B27 Remote signal: generator frequency protection tripping 3A4-3B4 Remote signal: reserved output 2 3A4-3B10 Remote signal: reserved output 3 3A4-3B16 Remote signal: exciter overload protection tripping Binary output of event record: 3A5-3B5 Event record: reserved output 1 3A5-3B11 Event record: generator over excitation protection tripping 3A5-3B17 Event record: generator sequence reverse power protection tripping 3A5-3B23 Event record: generator phase to phase backup protection tripping 3A5-3B29 Event record: generator frequency protection tripping 3A6-3B6 Event record: reserved output 2 3A6-3B12 Event record: reserved output 3 3A6-3B18 Event record: exciter overload protection tripping Other binary output 3B20-3B22 Binary output of stage 2 of initial cooling of stepdown transformer. 3B24-3B26 Tripping output channel 14-1, TJ14-1 3B28-3B30 Tripping output channel 14-2, TJ14-2


Connector 4A: 30 pins male connector for signal and alarm output.




Binary output of local signal: 4A1 Common terminal 4A1-4A3 Equipment being blocked 4A1-4A5 Equipment alarm 4A1-4A7 CT circuit failure alarm 4A1-4A9 VT circuit failure alarm 4A1-4A11 Overload alarm 4A1-4A13 Negative sequence overcurrent alarm 4A1-4A15 Excitation overload alarm 4A1-4A17 Stator earth fault alarm 4A1-4A19 1 point earth fault of rotor alarm 4A1-4A21 Loss-of-excitation alarm 4A1-4A23 Out-of-step alarm 4A1-4A25 Under frequency alarm 4A1-4A27 Reverse power alarm 4A1-4A29 Overexcitation alarm Binary output of remote signal: 4A2 Common terminal 4A2-4A4 Equipment being blocked 4A2-4A6 Equipment alarm 4A2-4A8 CT circuit failure alarm 4A2-4A10 VT circuit failure alarm 4A2-4A12 Overload alarm 4A2-4A14 Negative sequence overcurrent alarm 4A2-4A16 Excitation overload alarm 4A2-4A18 Stator earth fault alarm 4A2-4A20 1 point earth fault of rotor alarm 4A2-4A22 Loss-of-excitation alarm 4A2-4A24 Out-of-step alarm 4A2-4A26 Under frequency alarm 4A2-4A28 Reverse power alarm 4A2-4A30 Overexcitation alarm


Connector 4B: 30 pins male connector for alarm and other output




4B2 blank Binary output of abnormality contact:

4B1-4B3 Normal open contact 1 indicating operation of overcurrent element of stepdown transformer protection

4B5-4B7 Normal closed contact 2 indicating operation of overcurrent element of stepdown transformer protection

4B9-4B11 Normal open contact 1 indicating operation of stage 1 of initial cooling of main transformer.

4B13-B15 Normal open contact 2 indicating operation of stage 1 of initial cooling of main transformer.

4B17-4B19 Normal open contact 1 indicating operation of stage 1 of initial cooling of stepdown transformer.

4B21-4B23 Normal open contact 2 indicating operation of stage 1 of initial cooling of stepdown transformer.

4B25-4B27 Reserved Binary output of event record signal: 4B2 blank 4B4 SOE of event: common terminal 4B4-4B6 CT circuit failure alarm 4B4-4B8 VT circuit failure alarm 4B4-4B10 Overload alarm 4B4-4B12 Negative sequence overload alarm 4B4-4B14 Excitation overload alarm 4B4-4B16 Stator earth fault alarm 4B4-4B18 1 point earth fault of rotor alarm 4B4-4B20 Loss-of-excitation alarm 4B4-4B22 Out-of-step alarm 4B4-4B24 Under frequency alarm 4B4-4B26 Equipment being blocked 4B4-4B28 Equipment alarm 4B4-4B29 Reverse power alarm 4B4-4B30 Overexcitation alarm




Connector 5A: 30 pins male connector for status input (via 220V/250V or 110V/125V opto-coupler)

Figure 5-13 Connector 5A of RCS-985A Binary output of remote signal of mechanical repeaters: 5A1 common terminal 5A1-5A3 External mechanical repeater3 5A1-5A5 External mechanical repeater4 5A1-5A7 External mechanical repeater2 5A1-5A9 External mechanical repeater1 Binary output of event record of mechanical repeaters: 5A2 common terminal 5A2-5A4 External mechanical repeater3 5A2-5A6 External mechanical repeater4 5A2-5A8 External mechanical repeater2 5A2-5A10 External mechanical repeater1 Binary output of local signal of mechanical repeaters: 5A11 common terminal 5A11-5A12 External mechanical repeater4 5A11-5A13 External mechanical repeater2 5A11-5A14 Monitoring of power supply voltage 5A11-5A15 External mechanical repeater3 5A11-5A16 External mechanical repeater1 Binary input (via 220V or 110V opto-coupler) : 5A17 Binary input of external mechanical repeater3-- BI_MechRly3 5A18 Binary input of external mechanical repeater4-- BI_MechRly4 5A19 Binary input of external mechanical repeater2-- BI_MechRly2 5A20 Binary input of external mechanical repeater1-- BI_MechRly1 Binary input of auxiliary contact(via 220V or 110V opto-coupler)

5A21 Monitoring auxiliary contact of power supply of mechanical protection-- BI_PS_Superv

5A22 Auxiliary contact of generator breaker-- BI_52b_GCB



5A23 Auxiliary contact of breaker A at HV side of main transformer-- BI_52b_CB_HVS1_Tr

5A24 Auxiliary contact of breaker B at HV side of main transformer-- BI_52b_CB_HVS2_Tr

5A25 Reversed binary input of pole disagreement of breaker—BI_PoleDisagr_CB 5A26 Auxiliary contact of valve of steam turbine-- BI_Valve_Turbine 5A27 Positive pole of mechanical repeaters’ power supply. 5A28 Blank 5A29 Negative pole of mechanical repeaters’ power supply. 5A30 Blank


Connector 5B: 30 pins male connector for binary input

Figure 5-14 Connector 5B of RCS-985A 5B30 negative pole of DC 24V for 24 V opto-coupler 5B29 positive pole of DC 24V for 24 V opto-couple Binary input (via 24 V opto-coupler): 5B1 Blank 5B2 Blank 5B3 Enabling binary input of generator differential protection—EBI_Diff_Gen 5B4 Enabling binary input of generator interturn protection—EBI_IntTurn_Gen

5B5 Enabling binary input of zero sequence overvoltage stator earth fault protection — EBI_ROV_Sta

5B6 Enabling binary input of 3rd harmonics voltage stator earth fault protection — EBI_V3rd_Sta

5B7 Enabling binary input of rotor 1 point earth fault protection — EBI_1PEF_RotWdg 5B8 Enabling binary input of rotor 2 points earth fault protection — EBI_2PEF_RotWdg 5B9 Enabling binary input of overload protection of stator —EBI_OvLd_Sta 5B10 Enabling binary input of stator negative sequence overcurrent protection —



EBI_NegOC_Sta

5B11 Enabling binary input of generator loss-of-excitation protection — EBI_LossExc_Gen 5B12 Enabling binary input of generator out-of-step protection—EBI_OOS_Gen 5B13 Enabling binary input of generator overvoltage protection — EBI_VoltProt_Gen 5B14 Enabling binary input of generator overexcitation protection — EBI_OvExc_Gen 5B15 Enabling binary input of generator reverse power protection — EBI_PwrProt_Gen 5B16 Enabling binary input of generator frequency protection — EBI_FreqProt_Gen

5B17 Enabling binary input of generator accidental energization protection — EBI_AccEnerg_Gen

5B18 Enabling binary input of generator startup and shutdown protection — EBI_StShut_Gen

5B19 Enabling binary input of excitation transformer differential protection — EBI_Diff_Exc 5B20 Enabling binary input of excitation backup protection—EBI_Bak_Exc

5B21 Enabling binary input of external mechanical repeater 3 for tripping —EBI_Trp_MechRly3




5B25 Enabling binary input of generator backup protection—EBI_PPF_Gen

5B26 Enabling binary input of generator split-phase transverse differential protection —EBI_SPTDiff_Gen

5B27 Blank 5B28 Blank


Connector 6B: 30 pins male connector for status input

DC/DC 24V

0V

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

Figure 5-15 Connector 6B of RCS-985A 6B27 negative pole of DC power supply 6B25 positive pole of DC power supply 6B16 negative pole of DC 24V for 24 V opto-coupler



6B17 positive pole of DC 24V for 24 V opto-couple Binary input (via 24 V opto-coupler): 6B1 Enabling binary input of differential protection of main transformer—EBI_Diff_Tr

6B2 Enabling binary input of phase to phase backup protection of main transformer — EBI_PPF_Tr

6B3 Enabling binary input of earth fault protection of main transformer --- EBI_EF_Tr

6B4 Enabling binary input of restrict earth fault protection of main transformer --- EBI_REF_Tr

6B5 Enabling binary input of differential protection of generator-transformer unit protection --- EBI_Diff_GTU

6B6 Enabling binary input of pole disagreement protection of breaker --- EBI_Reserved1

6B7 Enabling binary input of differential protection of stepdown transformer --- EBI_Diff_ST

6B8 Enabling binary input of backup protection of HV side of stepdown transformer --- EBI_Bak_HVS_ST

6B9 Enabling binary input of backup protection of LV side of stepdown transformer --- EBI_Bak_LVS_ST

6B10 Enabling binary input of restrict earth fault protection of stepdown transformer --- EBI_REF_ST

6B11 Reserved binary input 2 6B12 Reserved binary input 3 6B13 Binary input of print button —BI_Print 6B14 Binary input of clock synchronization pulse —BI_Pulse_GPS 6B15 Binary input of signal reset button —BI_ResetTarget 6B18 Blank 6B19 Binary input indicating the urgent brake condition of generator-- BI_UrgBrake

6B20 Binary input indicating the synchronize condenser generator is put into operation -- BI_SyncCondenser

6B21 Reserved binary input 6B22 Reserved binary input 6B23 Binary input used for monitoring the power supply of all the BIs -- BI_PS_Opto 6B24 Blank 6B26 Blank 6B28 Blank 6B29 Earth 6B30 Earth

5.2.13 Pins definition of ‘7B’, ‘8B’ connectors

Connector 7B, 8B: 30 pins male connector for communication and printing.



Note:

The definitions of connector 7B and connector 8B are same.

Figure 5-16 Connectors 7B, 8B of RCS-985A

7B1/8B1 clock synchronizing pulse input, RS-485 A 7B3/8B3 clock synchronizing pulse input, RS-485 B 7B5/8B5 conmmunication RS-485 port1 A 7B7/8B7 conmmunication RS-485 port1 B 7B9/8B9 conmmunication RS-485 port2 A 7B11/8B11 conmmunication RS-485 port2 B 7B21/8B21 printer RS232 port, Tx 7B23/8B23 printer RS232 port, Rx 7B27/8B27 ground of communication port 7B30/8B30 ground of chassis


Connector 9B: 30 pins for voltage input


9B1, 9B26, Blank



9B28, 9B30

9B3 Zero sequence voltage of TV 1 at generator (polarity mark) 9B5 Zero sequence voltage of TV 1 at generator 9B7 Zero sequence voltage at neutral point of generator (polarity mark) 9B9 Zero sequence voltage at neutral point of generator 9B11 Zero sequence voltage of TV 2 at generator (polarity mark) 9B13 Zero sequence voltage of TV 2 at generator 9B23 Zero sequence voltage of main transformer (polarity mark) 9B25 Zero sequence voltage of main transformer 9B2 Phase A voltage of TV 1 at generator’s terminal 9B4 Phase B voltage of TV 1 at generator’s terminal 9B6 Phase C voltage of TV 1 at generator’s terminal 9B8 Neutral point voltage of TV1 at generator’s terminal 9B10 Phase A voltage of TV 2 at generator’s terminal 9B12 Phase B voltage of TV 2 at generator’s terminal 9B14 Phase C voltage of TV 2 at generator’s terminal 9B16 Neutral point voltage of TV 2 at generator’s terminal 9B18 Phase A voltage at HV side of main transformer 9B20 Phase B voltage at HV side of main transformer 9B22 Phase C voltage at HV side of main transformer 9B24 Neutral point voltage at HV side of main transformer

5.2.15 Pins definition of ‘9C’ connectors

Connector 9B: 18 pins for current input

1 2 3 4 5 6 7 8 9 10 11 12

BIAI CIBNIA NI C NI

STLI _N0 STLI _0

13 14 15 16 17 18

Figure 5-18 Connector 9C of RCS-985A

9C1 IA’ , phase A current from bushing CT at HV side of main transformer 9C2 IA , phase A current from bushing CT at HV side of main transformer (polarity



mark)

9C3 IB’ , phase B current from bushing CT at HV side of main transformer

9C4 IB , phase B current from bushing CT at HV side of main transformer (polarity mark)

9C5 IC’ , phase C current from bushing CT at HV side of main transformer

9C6 IC , phase C current from bushing CT at HV side of main transformer (polarity mark)

9C7-12 Reserved 9C13 3I0’, Zero sequence current from LV side CT of stepdown transformer

9C14 3I0’, Zero sequence current from LV side CT of stepdown transformer (polarity mark)

9C15-18 Reserved


Connector 10B: 30 pins for voltage input 1 2 5 6 9 10 13 14 17 18 21 22 25 26 29 30

3 4 7 8 11 12 15 16 19 20 23 24 27 28

STLU _0'BUBU

AU 'CUCU'

AU

'_0 STLU


10B1 UA , phase A voltage from LV side VT of stepdown transformer(polarity mark) 10B2 UA’ , phase A voltage from LV side VT of stepdown transformer 10B3 UB , phase B voltage from LV side VT of stepdown transformer(polarity mark) 10B4 UB’ , phase B voltage from LV side VT of stepdown transformer 10B5 UC , phase C voltage from LV side VT of stepdown transformer(polarity mark) 10B6 UC’ , phase C voltage from LV side VT of stepdown transformer 10B7-18 Reserved

10B19 3U0, Zero sequence voltage from LV side delta VT of stepdown transformer (polarity mark)

10B20 3U0’, Zero sequence voltage from LV side delta VT of stepdown transformer 10B21-30 Reserved



Note:

The zero sequence voltage of LV side of main transformer shares the same voltage input 10B19-20 with that of stepdown transformer.


Connector 10C: 18 pins for voltage and current input

TO LPF

04I

1 2 3 5 7 9 11 13 15 17

NI 04UR+

2UR-

2IR+ IR-

ΩK20

UR+ UR-


Terminal Name Function 10C1 I04 10C2 I04N

Zero sequence current input channel 4, N means non-polarity terminal

10C3 UR+2 10C5 UR-2

DC voltage input of rotor

10C7 IR+ 10C9 IR-

DC current input of rotor

10C11 Test terminal 10C13 UR+ 10C15 Axis of rotor 10C17 UR-

DC voltage input for rotor earth fault protection

others Reserved





BIAI CIBNIANI CNI BIAI CIBNIANI CNI

ANI AI BIBNI CICNI


11B1 IA’ , phase A current from HV side CT1 of main transformer 11B2 IA , phase A current from HV side CT1 of main transformer (polarity mark) 11B3 IB’ , phase B current from HV side CT1 of main transformer 11B4 IB , phase B current from HV side CT1 of main transformer (polarity mark) 11B5 IC’ , phase C current from HV side CT1 of main transformer 11B6 IC , phase C current from HV side CT1 of main transformer (polarity mark) 11B7 IA’ , phase A current from HV side CT2 of main transformer 11B8 IA , phase A current from HV side CT2 of main transformer (polarity mark) 11B9 IB’ , phase B current from HV side CT2 of main transformer 11B10 IB , phase B current from HV side CT2 of main transformer (polarity mark) 11B11 IC’ , phase C current from HV side CT2 of main transformer 11B12 IC , phase C current from HV side CT2 of main transformer (polarity mark) 11B13 IA’ , phase A current from HV side CT with big ratio of stepdown transformer,

11B14 IA , phase A current from HV side CT with big ratio of stepdown transformer (polarity mark)

11B15 IB’ , phase B current from HV side CT with big ratio of stepdown transformer

11B16 IB , phase B current from HV side CT with big ratio of stepdown transformer (polarity mark)

11B17 IC’ , phase C current from HV side CT with big ratio of stepdown transformer

11B18 IC , phase C current from HV side CT with big ratio of stepdown transformer (polarity mark)


Connector 11C: 18 pins for current input




AIANI BI CIBNI CNI


11C1 IA’ , phase A current from terminal CT of generator 11C2 IA , phase A current from terminal CT of generator (polarity mark) 11C3 IB’ , phase B current from terminal CT of generator 11C4 IB , phase B current from terminal CT of generator (polarity mark) 11C5 IC’ , phase C current from terminal CT of generator 11C6 IC , phase C current from terminal CT of generator (polarity mark) 11C7 IA’ , phase A current from neutral point CT of generator 11C8 IA , phase A current from neutral point CT of generator (polarity mark) 11C9 IB’ , phase B current from neutral point CT of generator 11C10 IB , phase B current from neutral point CT of generator (polarity mark) 11C11 IC’ , phase C current from neutral point CT of generator 11C12 IC , phase C current from neutral point CT of generator (polarity mark) 11C13 IA’ , reserved current input. 11C14 IA , reserved current input (polarity mark) 11C15 IB’ , reserved current input 11C16 IB , reserved current input (polarity mark) 11C17 IC’ , reserved current input 11C18 IC , reserved current input (polarity mark)






BIAI CIBNIANI CNI


12B1 IA’ , phase A current from HV side CT with small ratio of stepdown transformer

12B2 IA , phase A current from HV side CT with small ratio of stepdown transformer (polarity mark)

12B3 IB’ , phase B current from HV side CT with small ratio of stepdown transformer

12B4 IB , phase B current from HV side CT with small ratio of stepdown transformer (polarity mark)

12B5 IC’ , phase C current from HV side CT with small ratio of stepdown transformer

12B6 IC , phase C current from HV side CT with small ratio of stepdown transformer (polarity mark)

12B7 IA’ , phase A current from LV side CT of stepdown transformer 12B8 IA , phase A current from LV side CT of stepdown transformer (polarity mark) 12B9 IB’ , phase B current from LV side CT of stepdown transformer 12B10 IB , phase B current from LV side CT of stepdown transformer (polarity mark) 12B11 IC’ , phase C current from LV side CT of stepdown transformer 12B12 IC , phase C current from LV side CT of stepdown transformer (polarity mark) 12B13 IA’ , reserved current input 12B14 IA , reserved current input (polarity mark) 12B15 IB’ , reserved current input 12B16 IB , reserved current input (polarity mark) 12B17 IC’ , reserved current input 12B18 IC , reserved current input (polarity mark)


Connector 12C: 18 pins for current input




transI 'transI trNI _0 trI _0 trNgI _0 trgI _0


12C1 IA’ , phase A current from one side CT of exciter or excitation transformer.

12C2 IA , phase A current from one side CT of exciter or excitation transformer (polarity mark)

12C3 IB’ , phase B current from one side CT of exciter or excitation transformer

12C4 IB , phase B current from one side CT of exciter or excitation transformer (polarity mark)

12C5 IC’ , phase C current from one side CT of exciter or excitation transformer

12C6 IC , phase C current from one side CT of exciter or excitation transformer (polarity mark)

12C7 IA’ , phase A current from the other side CT of exciter or excitation transformer

12C8 IA , phase A current from the other side CT of exciter or excitation transformer (polarity mark)

12C9 IB’ , phase B current from the other side CT of exciter or excitation transformer

12C10 IB , phase B current from the other side CT of exciter or excitation transformer (polarity mark)

12C11 IC’ , phase C current from the other side CT of exciter or excitation transformer

12C12 IC , phase C current from the other side CT of exciter or excitation transformer (polarity mark)

12C13 Transverse differential current input 12C14 Transverse differential current input (polarity mark) 12C15 3I0’ , zero sequence current input of main transformer 12C16 3I0’ , zero sequence current input of main transformer (polarity mark) 12C17 3I0’ , Gap zero sequence current input of main transformer 12C18 3I0’ , Gap zero sequence current input of main transformer (polarity mark)

5.3 Output 5.3.1 Tripping outputs

The equipment provides 14 groups of tripping relays with 33 pairs of contacts totally as shown in



following figure. These tripping relays can be configured by tripping output logic setting, and practical and flexible tripping modes can be provided by each protective function then. Tripping output logic setting is a specific setting of each certain protective function. Please refer to Chapter 7 for details of setting.

Figure 5-25 List of tripping outputs The tripping output logic setting is a 4 digits hexadecimal number or a 16 bits binary number. Every bit corresponds to a circuit breaker. The breaker will be tripped if the corresponding bit is set as “1” and not tripped if the bit is set as “0”.

Table 5-1 Tripping logic and contacts of output relays No Bit No. Tripping group No. Quantity of tripping contacts 1 Bit 0 Tripping function enabled 2 Bit 1 TJ1: group 1 of tripping output 4 3 Bit 2 TJ2: group 2 of tripping output 4 4 Bit 3 TJ3: group 3 of tripping output 4 5 Bit 4 TJ4: group 4 of tripping output 2 6 Bit 5 TJ5: group 5 of tripping output 4 7 Bit 6 TJ6: group 6 of tripping output 3 8 Bit 7 TJ7: group 7 of tripping output 1 9 Bit 8 TJ8: group 8 of tripping output 1 10 Bit 9 TJ9: group 9 of tripping output 1 11 Bit 10 TJ10: group 10 of tripping output 1 12 Bit 11 TJ11: group 11 of tripping output 2 13 Bit 12 TJ12: group 12 of tripping output 2 14 Bit 13 TJ13: group 13 of tripping output 2 15 Bit 14 TJ14: group 14 of tripping output 2

Note:

Outputs of TJ1, 2, 5, 6 are instantaneous contacts, which can be used to trip CB or initial failure of CB. While other outputs are expand 100ms after contacts operate.

5.3.2 Signaling outputs

The equipment provides 36 signals and each signal consists of 1 magnetic latching contact (for local signals) and 2 wiper-type contacts (for SOE and remote signals). See the figure below.



(a) Group 1

(b) Group 2

(c) Group 3



(d) Group 4

Figure 5-26 List of signaling outputs

5.3.3 Alarming outputs

Figure 5-27 List of alarming outputs



5.3.4 Other outputs

Cooling initiation of MT with time delay 1ZBFL-1

4B01

4B05

4B03

4B07

4B17

4B13

4B09

4B21

4B19

4B15

4B11

4B23

OLTC blockingBSTY-1

BSTY-2

ZBFL-2

Cooling initiation of ST with time delay 1

CBFL-1

CBFL-2

3B20 3B22

Cooling initiation of ST with time delay 2

BY3

Cooling initiation of MT with time delay 2BY2

2B20 2B22

Figure 5-28 List of other outputs

Chapter 6 Software Overview


Chapter 6 Software Overview 6.1 Software Overview The software for the relay can be conceptually split into three elements: the system services software, the platform software and the protection and control software. These three elements are not distinguishable to the user, and are all processed by the same processor board. The distinction between the three parts of the software is made purely for the purpose of explanation here:

Figure 6-1 Software structure of RCS-985A

6.2 System services software As shown in Figure 6-1, the system services software provides the interface between the relay’s hardware and the higher-level functionality of the platform software and the protection & control software. For example, the system services software provides drivers for items such as the LCD display, the keypad and the remote communication ports, and controls the boot of the processor and downloading of the processor code into SRAM from flash EPROM at power up.



6.3 Platform software The platform software has three main functions:

To control the logging of records that are generated by the protection software, including alarms and event, fault, and maintenance records.

To store and maintain a database of all of the relay’s settings in non -volatile memory.

To provide the internal interface between the settings database and each of the relay’s user interfaces, i.e. the front panel interface and the front and rear communication ports, using whichever communication protocol has been specified (Courier, MODBUS, IEC 60870-5-103).

6.3.1 Record logging

The logging function is provided to store all alarms, events, faults and maintenance records. The records for all of these incidents are logged in battery backed-up SRAM in order to provide a non-volatile log of what has happened. The relay maintains four logs: one each for up to 32 alarms, 32 event records, 32 fault records and 8 cycles of normal operation waveform. The logs are maintained such that the oldest record is overwritten with the newest record. The logging function can be initiated from the protection software or the platform software is responsible for logging of a maintenance record in the event of a relay failure. This includes errors that have been detected by the platform software itself or error that are detected by either the system services or the protection software function. See also the section on supervision and diagnostics in this manual.

6.3.2 Settings database

The settings database contains all of the settings and data for the relay, including system parameters, equipments parameters and the protection settings. The parameters and settings are maintained in non-volatile memory. The platform software’s management of the settings database includes the responsibility of ensuring that only one user interface modifies the settings of the database at any one time. This feature is employed to avoid conflict between different parts of the software during a setting change.

6.3.3 Database interface

The other function of the platform software is to implement the relay’s internal interface between the database and each of the relay’s user interfaces. The database of settings and measurements must be accessible from all of the relay’s user interfaces to allow read and modify operations. The platform software presents the data in the appropriate format for each user interface.

6.3.4 Protection and control software

The protection and control software task is responsible for processing all of the protection elements and measurement functions of the relay. To achieve this it has to communicate with both the system services software and the platform software as well as organize its own operations. The protection software has the highest priority of any of the software tasks in the relay in order to provide the fastest possible protection response. The protection & control software has a supervisor task that controls the start-up of the task and deals with the exchange of messages between the task and the platform software.



Figure 6-2 Flow char of protection and control software

6.3.4.1 Overview - protection and control scheduling

After initialization at start-up, the protection and control task is suspended until there are sufficient samples available for it to process. The acquisition of samples is controlled by a ‘sampling function’ which is called by the system services software and takes each set of new samples from the input module and stores them in a two-cycle buffer. The protection and control software resumes execution when the number of unprocessed samples in the buffer reaches a certain number. For the RCS-985A protection relay, the protection task is executed as the same speed as the sampling rate, i.e. the relays finishes calculation of all the relay before next sampling process. During the residual time, operations by other software tasks take place.

6.3.4.2 Signal processing

The sampling function provides filtering of the digital input signals from the opto-isolators and frequency tracking of the analog signals. The digital inputs are checked against their previous value over 15ms. Hence a change in the state of one of the inputs must be maintained over at least 15ms before it is registered with the protection and control software.

The frequency tracking of the analog input signals is achieved by a recursive Fourier algorithm which is applied to one of the input signals, and works by detecting a change in the measured signal’s phase angle. The calculated value of the frequency is used to modify the sample rate being used by the AC modules so as to achieve a constant sample rate of 24 samples per cycle of the power waveform. The value of the frequency is also stored for use by the protection and control task.

6.3.4.3 Fourier filtering

When the protection and control task is re-started by the sampling function, it calculates the Fourier components for the analog signals. With the exception of the RMS measurements all other measurements and protection functions are based on the Fourier derived fundamental component. The Fourier components are calculated using a one-cycle, 24-sample Discrete Fourier Transform (DFT). The DFT is always calculated using the last cycle of samples from the 2-cycle buffer, i.e.



the most recent data is used. The DFT used in this way extracts the power frequency fundamental component from the signal and produces the magnitude and phase angle of the fundamental in rectangular component format. This gives good harmonic rejection for frequencies up to the 11th harmonic. The 13th is the first predominant harmonic that is not attenuated by the Fourier filter and this is known as ‘Alias’. However, the Alias is attenuated by approximately 85% by an additional, analog, ‘anti-aliasing’ filter (low pass filter). The combined affect of the anti-aliasing and Fourier filters is shown below:

Figure 6-3 Frequency response

The Fourier components of the input current and voltage signals are stored in memory so that they can be accessed by all of the protection elements’ algorithms. The samples from the AC modules are also used in an unprocessed form by the disturbance recorder for waveform recording and to calculate true rms. values of current, voltage and power for metering purposes.

6.3.4.4 RCS-985A Convention For Measuring Phase Angles

All phases calculated by RCS-985 series relays and used for protection, control and metering functions are rotating phases that maintain the correct phase angle relationships with each other at all times.

For display and oscillography purposes, all phase angles in a given relay are referred to an AC input channel. The phase angles are assigned as positive in the leading direction, and are presented as negative in the lagging direction, to more closely align with power system metering conventions. This is illustrated below.



Figure 6-4 RCS-985A Phase Angle Measurement Convention

6.3.4.5 Event and fault recording

A change in any digital input signal, protection element output signal, operation flags of fault detectors, tripping flags causes an event record to be created. When this happens, the protection and control task sends a message to the supervisor task to indicate that an event is available to be processed and writes the event data to a fast buffer in SRAM which is controlled by the supervisor task. When the supervisor task receives either an event or fault record message, it instructs the platform software to create the appropriate log in battery backed-up SRAM. The operation of the record logging to battery backed-up SRAM is slower than the supervisor’s buffer. This means that the protection software is not delayed waiting for the records to be logged by the platform software.

6.3.4.6 Disturbance recorder

The disturbance recorder operates as a separate task from the protection and control task. It can record the waveforms for up to 32 analog channels and the values of up to all digital signals of the RCS-985A. The recording time is user selectable up to a maximum of 8 seconds. The disturbance recorder is supplied with data by the protection and control task once per sampling period.

The disturbance recorder collates the data that it receives into the required length disturbance record. The disturbance records can be extracted byDBG-2000 that can also store the data in COMTRADE format, thus allowing the use of other packages to view the recorded data.

6.4 Software downloading The relay supports software downloading for the purpose of debugging or updating on site.

Hardware requirement

Basic requirement of computer:



CPU: Pentium II 300 or higher level CPU, OS: Win98, Win98SE, WinMe, WinNT4.0(service pack 4 or higher), Win2000, WinXP; RAM: at least 128M, 256M is recommended; Space requirement: at least 200M free space on system hard disk; Displayer: support 800*600 or higher resolution at the 16bit color model; RS232 communication port;

Software requirement:

Special software DBG2000.

Downloading method

Note:

Ensure that the board is not a naked one before downloading software to it, i.e., a certain version software exists on the board.

Warning:

If some unexpected cases occur, please do inform the factory firstly instead of dealing with it by yourself.

1 2 3 4 5

9876

9876

1 2 3 4 5

Figure 6-5 Software downloading communication port

Steps：

1. Connect RS-232 communication port of the computer and that mounted on front panel of RCS-985A protection equipment by a cable with DB-9 connectors on both ends, see Figure 6-5.

2. Run the program DBG2000.If the connection and settings are correct, the screen will display “RCS-985A connected”, such as Figure 6-6. But if it doesn’t be connected, please check the



parameter setting of DBG2000 whether corresponds with the relay, such as “COM port” and “Baud rate”, see Figure 6-7.

Figure 6-6 Succeed connecting of DBG2000

Figure 6-7 Parameter setting of DBG2000

3. Download CPU program. At first, make sure it is at CUP mode as “CPU>”, then press the button

and select the correct program file, such as CPU.s19, to download it into the CPU module.

Make sure the file FLASHCPU.s19 is at the same folder with program file.



4. Download MON program. Change it to MON mode by typing “MON”, then “MON>” will appearances. Then repeat step 3 to down load MON.s19 to MON module. Make sure the file FLASHMON.s19 is at the same folder with program file. See Figure 6-8.

Figure 6-8 Change to MON mode and download program

5．After downloading CPU and MON programs, reset the equipment and download default settings. Then the ‘HEALTHY’ LED on the front panel of the relay shall be illuminate.

6. Reset the equipment and download the default settings.

7. Download FACE program. Change it to FACE mode by typing “FACE” or “PNL”, then “PNL>”

will appearances. Press the button and select the 985xx_FACE.hex file to download it into

the panel module. Make sure the file FLASH_FACE.hex is at the same folder with program file.

8. After that course, user should check and ensure the software version, CRC code and generating time of software are as same as recorded in relevant documentation. Enter the menu “Version”, then new version of protection will displayed on LCD, see Figure 6-9.



VERSION

CPUBrd: RCS-985A3YD 3.12 E17F8231

2007 - 2 - 28 10:39

MONBrd: RCS-985A3YD 3.12 15A045C6

2007 - 2 - 28 10:44

HMI: RCS-985A3YD 3.12 7247

2007 - 2 - 28 10:30 T_060707

SUBQ_ID: 00024882

Figure 6-9 Version of protection

Chapter 7 Settings


Chapter 7 Settings The relay must be configured to the system and application by means of appropriate settings. The settings of this relay include system parameters, protection element settings and scheme logic settings.

7.1 Equipment parameters 7.1.1 Setting list

Table 7-1 List of equipment settings No. Symbol Range Step Default 1 Setting_Group 0～1 1 0 2 Equip_ID 6 characters maximum FDJ001 3 Comm_Addr 0～255 1 1 4 COM1_Baud 1.2/2.4/4.8 / 9.6 /14.4/ 19.2 / 38.4 kbit/s 19.2 kbit/s 5 COM2_Baud 1.2/2.4/4.8 / 9.6 /14.4/ 19.2 / 38.4 kbit/s 19.2 kbit/s 6 Printer_Baud 1.2/2.4/4.8 / 9.6 /19.2 kbit/s 9.6k bit/s 7 Protocol 0000-FFFF 0041

logic setting “1” - enable, “0” - disable 8 En_Auto_Print 0/1 0 9 En_Net_Print 0/1 0 10 En_Remote_Cfg 0/1 0 11 GPS_Pulse 0/1 0

Note:

Symbols of the parameter listed in above table are used for communication, printing and displaying on LCD.

7.1.2 Setting instruction of the parameters

1 No.1-- [Setting_Group]

Two setting groups can be configured for the equipment, and only one is active at a time. However, equipment parameters and system parameters are common for all protection setting groups.

2 No.2-- [Equip_ID]

The setting consists of ASCII codes, which is as identification for report printing only. It can be configured according to the name or number of generator.

3 No.3-- [Comm_Addr]

The address used for the host computer to identify the equipment, usually provided by substation system. If the equipment is not connected to automation system, equipment address may be random.

Chapter 7 Settings


4 No.4-- [Com1_Baud]

The baud rate of serial port 1 shall be selected from specified range.

5 No.5-- [Com2_Baud]

The baud rate of serial port 2 shall be selected from specified range.

6 No.6--[Printer_Baud]

The baud rate used for printer port shall be selected from specified range.

7 No.7-- [Protocol]

The logic setting consists of sixteen binary digits but four hexadecimal digits can be viewed through device LCD screen. Every digit has a dedicated meaning and some digits have no definition.

Following will be seen on PC through DBG2000 software.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

B:

MO

DBU

S

B: L

FP

A: M

OD

BUS

A: L

FP

A: 1

03

The definitions of digits are:

Table 7-2 Definition of logic setting of communication protocol Bit Definition 0 communication port A using protocol IEC 60870-5-103 1 communication port A using proprietary protocol LFP 2 communication port A using MODBUS protocol 3 No definition 4 No definition 5 communication port B using proprietary protocol LFP 6 communication port B using MODBUS protocol

7-15 No definitions

For example, if logic setting [Protocol] is set as “0041”, it means communication port A uses IEC 60870-5-103 protocol and communication port B uses MODBUS protocol.

8 No.8-- [En_Auto_Print]

This setting shall be set as “1” if automatic report printing is expected after the relay operates when a fault occurs. Otherwise it shall be set as “0”. It is suggested that the user may set this parameter of the equipment as “1” (i.e. automatic printing), if the equipment is always connected directly with a printer, or set as “0” (i.e. not automatic printing) if the equipment is connected with a printer by a switch on panel.

9 No.9-- [En_Net_Print]

Chapter 7 Settings


Set it as “1” if shared network printer is used for printing. Set it as “0” if dedicated printer is used. Network printer means several protection equipments share one printer through a printer management unit and RS-485 port. Dedicated printer means the protection equipment connected with a printer through RS232 port directly.

10 No.10--[En_Remote_Cfg]

Set it as “0” if only local configuration is permitted. Set it as “1” if local and remote configurations are both permitted.

11 No.11-- [GPS_Pulse]

Set it as “1” for minute pulse and “0” for second pulse.

7.1.3 Setting path

Access path in menu is:

Main Menu -> SETTINGS -> EQUIP SETTINGS -> [setting symbol]

7.2 System Settings 7.2.1 Logic settings of configuring functions

7.2.1.1 Settings list

Table 7-3 List of protection configuration setting No. Symbol Range Default 1 En_Diff_GTU 0/1 0

2 En_Diff_Tr 0/1 0

3 En_PPF_Tr 0/1 0

4 En_EF_Tr 0/1 0

5 En_OvExc_Tr 0/1 0

6 En_Diff_Gen 0/1 0

7 En_SPTDiff_Gen 0/1 0

8 En_IntTurn_Gen 0/1 0

9 En_PPF_Gen 0/1 0

10 En_EF_Sta 0/1 0

11 En_EF_RotWdg 0/1 0

12 En_OvLd_Sta 0/1 0

13 En_NegOC_Sta 0/1 0

14 En_LossExc_Gen 0/1 0

15 En_OOS_Gen 0/1 0

16 En_VoltProt_Gen 0/1 0

17 En_OvExc_Gen 0/1 0

18 En_PwrProt_Gen 0/1 0

19 En_FreqProt_Gen 0/1 0

Chapter 7 Settings


No. Symbol Range Default 20 En_StShut_Gen 0/1 0

21 En_AccEnerg_Gen 0/1 0

22 En_Diff_Exc 0/1 0

23 En_Bak_Exc 0/1 0

24 En_OvLd_RotWdg 0/1 0

25 En_Diff_ST 0/1 0

26 En_Bak_HVS_ST 0/1 0

27 En_Bak_LVS_ST 0/1 0

28 En_REF_ST 0/1 0

29 En_MechRly 0/1 0

30 En_PoleDisagr_CB 0/1 0

31 En_VTComp_Term_Gen 0/1 0

32 Reserved(＃) 0/1 0

33 En_TestMode(＃) 0/1 0

Note:

Symbols of the parameter listed in above table are used for communication, printing and displaying on LCD. Setting marked with “＃” means that it is can not be seen on LCD or by printing and only can be seen through DBG 2000 software.

7.2.1.2 Explanation of the parameters for setting

1 No.1-- [En_Diff_GTU]

This logic setting is used for configuration of protection functions. Setting it as “1” means the generator-transformer unit differential protection is enabled and setting as “0” means the protection is disabled.

2 No.2-- [En_Diff_Tr]

This logic setting is used to enable/disable differential protection of main transformer.

3 N0.3-- [En_PPF_Tr]

This logic setting is used to enable/disable phase to phase fault protection of main transformer.

4 No.4-- [En_EF_Tr]

This logic setting is used to enable/disable earth fault protection of main transformer.

5 No.5-- [En_OvExc_Tr]

This logic setting is used to enable/disable over excitation protection of main transformer.

6 No.6-- [En_Diff_Gen]

This logic setting is used to enable/disable differential protection of generator.

7 No.7-- [En_SPTDiff_Gen]

Chapter 7 Settings


This logic setting is used to enable/disable spilt phase differential protection of generator.

8 No.8-- [En_IntTurn_Gen]

This logic setting is used to enable/disable interturn fault protection of generator.

9 No.9-- [En_PPF_Gen]

This logic setting is used to enable/disable phase to phase fault protection of generator

10 No.10—[En_EF_Sta]

This logic setting is used to enable/disable earth fault protection of stator of generator.

11 No.11—[En_EF_RotWdg]

This logic setting is used to enable/disable earth fault protection of rotor winding.

12 No.12—[En_OvLd_Sta]

This logic setting is used to enable/disable overload protection of stator.

13 No.13—[En_NegOC_Sta]

This logic setting is used to enable/disable negative sequence overcurrent of stator.

14 No.14—[En_LossExc_Gen]

This logic setting is used to enable/disable loss of excitation protection of rotor winding.

15 No.15—[En_OOS_Gen]

This logic setting is used to enable/disable out-of-step protection of generator.

16 No.16-- [En_VoltProt_Gen]

This logic setting is used to enable/disable overvoltage and undervoltage protection of generator.

17 No.17-- [En_OvExc_Gen]

This logic setting is used to enable/disable overexcitation protection of generator.

18 No.18-- [En_PowerProt_Gen]

This logic setting is used to enable/disable overpower and underpower protection of generator.

19 No.19-- [En_FreqProt_Gen]

This logic setting is used to enable/disable overfrequency and underfrequency protection of generator.

20 No.20-- [En_StShut_Gen]

This logic setting is used to enable/disable all relative protections in Startup/shutdown conditions of generator.

21 No.21-- [En_AccEnerg_Gen]

This logic setting is used to enable/disable relevant protection in case of accident energization of

Chapter 7 Settings


generator.

22 No.22-- [En_Diff_Exc]

This logic setting is used to enable/disable differential protection of exciting transformer or exciter.

23 No.23-- [En_Bak_Exc]

This logic setting is used to enable/disable backup protection of exciting transformer or exciter.

24 No.24-- [En_OvLd_RotWdg]

This logic setting is used to enable/disable overload function of rotor winding.

25 No.25-- [En_Diff_ST]

This logic setting is used to enable/disable differential protection of stepdown transformer.

26 No.26-- [En_Bak_HVS_ST]

This logic setting is used to enable/disable backup protection at HV side of stepdown transformer.

27 No.27-- [En_Bak_LVS_ST]

This logic setting is used to enable/disable backup protection at LV side of stepdown transformer.

28 No.28-- [En_REF_ST]

This logic setting is used to enable/disable restrict earth fault protection of stepdown transformer.

29 No.29-- [En_MechRly]

This logic setting is used to enable/disable mechanical protection.

30 No.30-- [En_PoleDisagr_CB]

This logic setting is used to enable/disable pole disagreement protection of circuit breaker.

31 No.31-- [En_VTComp_Term_Gen]

This logic setting is used to enable/disable voltage balance function of VTs at the generator terminal.

32 No.32-- [Reserved] (#)

This logic setting is reserved.

33 No.33-- [En_TestMode] (#)

This logic setting is configured especially for equipment debugging status. It is only seen by DBG-2000, which is used for generating messages of alarm or operation element for remote PC.

“Enable”: enable sending all tripping contacts signals, protection tripping signals, alarm signals and monitoring signals through DBU2000 software.

“Disable”: disable the function mentioned above.

Chapter 7 Settings


7.2.1.3 Setting path

All logic settings of configuring functions are accessible in the following path: Main Menu -> SETTINGS -> SYSTEM SETTINGS -> PROT CONFIG -> [setting symbol]

7.2.2 Transformer system parameters

7.2.2.1 Setting list

Table 7-4 List of transformer system settings No. Symbol Range Step Default

1 Sn_Tr 0-6000 MVA 0.1 MVA 370

2 U1n_HVS_Tr 0-600 kV 0.01 kV 220

3 U1n_LVS_Tr 0-600 kV 0.01 kV 20

4 U1n_VT_HVS_Tr 0-600 kV 0.01 kV 127.02

5 U2n_VT_HVS_Tr 57.74-110 V 0.01 V 57.74

6 U2n_DeltVT_HVS_Tr 33.33-330 V 0.01 V 57.74

7 I1n_CT_HVS1_Tr 0-60000 A 1A 1200

8 I2n_CT_HVS1_Tr 1, 5 A 1A 1

9 I1n_CT_HVS2_Tr 0-60000 A 1A 1200

10 I2n_CT_HVS2_Tr 1, 5 A 1 A 1

11 I1n_CT_HVS_Tr 0-60000 1 A 1200

12 I2n_CT_HVS_Tr 1, 5A 1 A 1

13 I1n_CT_LVS_Tr 0-60000A 1 A 12000

14 I2n_CT_LVS_Tr 1,5A 1 A 1

15 I1n_CT_NP_Tr 0-60000A 1 A 600

16 I2n_CT_NP_Tr 1,5A 1 A 1

17 I1n_CT_Gap_Tr 0-60000A 1 A 200

18 I2n_CT_Gap_Tr 1,5A 1 A 1

Logic setting “1” - enable, “0” – disable 19 Yd11_Conn_Tr 0/1 1 1

20 Yyd11_Conn_Tr 0/1 1 0

21 Opt_GCB 0/1 1 0

7.2.2.2 Setting instruction of the parameters

1 No.1-- [Sn_Tr]

Transformer capacity shall be configured as its name plate stated.

2 No.2-- [U1n_HVS_Tr]

System rated voltage at HV side of transformer. This setting is used for calculating the rated current of main transformer. It should be set according to the real operating voltage of the power system.

Chapter 7 Settings


3 No.3-- [U1n_LVS_Tr]

System rated voltage at LV side of transformer.

4 No.4-- [U1n_VT_HVS_Tr]

Rated primary voltage of VT at HV side of transformer.

5 No.5-- [U2n_VT_HVS_Tr]

Rated secondary voltage of VT at HV side of transformer.

6 No.6-- [U2n_DeltVT_HVS_Tr]

Rated secondary voltage of delta VT at HV side of transformer.

7 No.7-- [I1n_CT_HVS1_Tr]

Rated primary current of CT at branch 1 of HV side of transformer.


Rated secondary current of CT at branch 1 of HV side of transformer.


Rated primary current of CT at branch 2 of HV side of transformer.


Rated secondary current of CT at branch 2 of HV side of transformer.

11 No.11-- [I1n_CT_HVS_Tr]

Rated primary current of bushing CT at HV side of transformer.

12 No.12-- [I2n_CT_HVS_Tr]

Rated secondary current of bushing CT at HV side of transformer.

13 No.13-- [I1n_CT_LVS_Tr]

Rated primary current of CT at LV side of transformer.

14 No.14-- [I2n_CT_LVS_Tr]

Rated secondary current of CT at LV side of transformer.

15 No.15-- [I1n_CT_NP_Tr]

Rated primary current of CT at neutral point of transformer.

16 No.16-- [I2n_CT_ NP_Tr]

Rated secondary current of CT at neutral point of transformer.

17 No.17-- [I1n_CT_Gap_Tr]

Rated primary current of gap CT at HV side of transformer.

Chapter 7 Settings


18 No.18-- [I2n_CT_Gap_Tr]

Rated secondary current of gap CT at HV side of transformer.

19 No.19-- [Yd11_Conn_Tr]

The connection mode of main transformer is Yd-11 mode. The current input for HV side is only one.

20 No.20-- [Yyd11_Conn_Tr]

The connection mode of main transformer is Yd-11 mode. The currents input for HV side are two CTs, such as 3/2 breakers of HV bus.

21 No.21-- [Opt_GCB]

Logic setting of circuit breaker at terminal of generator. “1” means there is a circuit breaker at terminal of generator. “0” means there isn’t a circuit breaker at terminal of generator.


All settings of transformer system parameters are accessible in the following path:

Main Menu -> SETTINGS -> SYSTEM SETTINGS -> TR SYS SETTINGS -> [setting symbol]

7.2.3 Generator system parameters


Table 7-5 List of generator system settings No. Symbol Range Step Default 1 fn_Gen 50/60 Hz 50 2 Pn_Gen 0-6000.0 MW 0.1 MW 300 3 PF_Gen 0.00-1.00 0.01 0.85 4 U1n_Gen 0-600.00 kV 0.01 kV 20 5 U1n_VT_Term_Gen 0-600.00 kV 0.01 V 11.55 6 U2n_VT_Term_Gen 57.74-110.00 V 0.01 V 57.74 7 U2n_DeltVT_Term_Gen 33.33-110.00 V 0.01 V 33.33 8 U1n_VT_NP_Gen 0-600.00 kV 0.01 kV 11.55 9 U2n_VT_NP_Gen 0-300.00 V 0.01 V 57.74 10 I1n_CT_Term_Gen 0-60000 A 1 A 12000 11 I2n_CT_Term_Gen 1A/5A 1 A 5 12 k_SP1_Gen 0-100.00 % 0.01 % 50 13 k_SP2_Gen 0-100.00 % 0.01 % 50 14 I1n_CT_SP1_Gen 0-60000 A 1 A 12000 15 I2n_CT_SP1_Gen 1A/5A 1 A 5 16 I1n_CT_SP2_Gen 0-60000 A 1 A 12000 17 I2n_CT_SP2_Gen 1A/5A 1 A 5 18 I1n_CT_TrvDiff_Gen 0-60000 A 1 A 600

Chapter 7 Settings


No. Symbol Range Step Default 19 I2n_CT_TrvDiff_Gen 1A,5A 1 A 5 20 I1n_RotWdg 0-60000 A 1 A 1000 21 U2n_Shunt_RotWdg 0-75.00 mV 0.01 mV 75 22 U1n_Exc 0-600 V 0.01 V 200


1 No.1-- [fn_Gen]

This setting indicates the nominal frequency of power system in which the generator protection equipment is used.

2 No.2-- [Pn_Gen]

Capacity of active power of the generator shall be configured as its name plate stated.

3 No.3-- [PF_Gen]

Rated power factor of generator.

4 No.4-- [U1n_Gen]

System rated voltage at the terminal of generator. This setting is used for calculating the rated current of generator. It should be set according to the real operating voltage of the power system.

5 No.5-- [U1n_VT_Term_Gen]

Rated primary voltage of VT at the terminal of generator. This parameter can be configured as either phase voltage or phase-to-phase voltage value. For example, if the terminal VT ratio is

3100

3100

320 VVkV

, this parameter and the following two (NO.6 and NO.7) can be set as

11.55kV, 57.74V and 33.33V or can be set as 20kV, 100V and 57.74V. This is used for substation automation system. From this setting and the next two ones, VT ratio can be got. Secondary voltage and current recorded by the equipment will be transferred to primary value by multiplying VT ratio when fault oscillogram is sent to the host.

6 No.6-- [U2n_VT_Term_Gen]

Rated secondary voltage of VT at the terminal of generator.

7 No.7-- [U2n_DeltVT_Term_Gen]

Rated secondary open-delta voltage at the terminal of generator.

8 No.8-- [U1n_VT_NP_Gen]

Rated primary voltage of VT at the neutral point of generator.

9 No.9-- [U2n_VT_NP_Gen]

Rated secondary voltage of VT at the neutral point of generator.

Chapter 7 Settings


10 No.10-- [I1n_CT_Term_Gen]

Rated primary current of CT at the terminal of the generator.

11 No.11-- [I2n_CT_Term_Gen]

Rated secondary current of CT at the terminal of the generator.

12 No.12-- [k_SP1_Gen]

Branching coefficient of the first group of windings to the whole one of stator. At the generator

neutral point, two channels of TA input are reserved which can satisfy the requirement both

differential protection and phase-splitting transverse differential protection. The branching

coefficient can be set according to the proportion of per branch occupying in the whole winding.

For the case that only one branch can be drawn out from the neutral point of generator, the

branching coefficient of the first one group branch must be set as 100% and the other branching

coefficient must be set as 0%.

13 No.13-- [k_SP2_Gen]

Branching coefficient of the second group of windings to the whole of stator.

14 No.14-- [I1n_CT_SP1_Gen]

Rated primary current of CT of the first splitting branch of stator.


Rated secondary current of CT of the first splitting branch of stator.


Rated primary current of CT of the second splitting branch of stator.


Rated secondary current of CT of the second splitting branch of stator.

18 No.18-- [I1n_CT_TrvDiff_Gen]

Rated primary current of CT used for transverse differential protection.

19 No.19-- [I2n_CT_TrvDiff_Gen]

Rated secondary current of CT used for transverse differential protection.

20 No.20-- [I1n_RotWdg]

Primary rated current of rotor. This setting and the next one can be set conveniently by inputting

the rated primary and secondary parameters of the shunt.

21 No.21-- [U2n_Shunt_RotWdg]

Chapter 7 Settings


Secondary rated voltage of rotor shunt.

22 No.22-- [U1n_Exc]

Rated primary voltage of exciter or excitation transformer.


All settings of generator system parameters are accessible in the following path:

Main Menu -> SETTINGS -> SYSTEM SETTINGS -> GEN SYS SETTINGS -> [setting symbol]

Note:

These parameters are as important as the settings. They have to be configured according to actual application on site.

7.2.4 Stepdown transformer system parameters


Table 7-6 List of stepdown transformer settings No. Symbol Range Step Default 1 Sn_ST 0-100 MVA 0.01 MVA 30

2 U1n_HVS_ST 0-600 kV 0.01 kV 20

3 U1n_LVS_ST 0-600 kV 0.01 kV 6.3

4 U1n_VT_LVS_ST 0-600 kV 0.01 kV 6.3

5 U2n_VT_LVS_ST 57.74-110 V 0.01 V 3.46

6 U2n_DeltVT_LVS_ST 33.33-110 V 0.01 V 57.74

7 I1n_CT2_HVS_ST 0-60000 A 1 A 12000

8 I2n_CT2_HVS_ST 1,5 A 1 A 1

9 I1n_CT1_HVS_ST 0-60000 A 1 A 1000

10 I2n_CT1_HVS_ST 1,5 A 1 A 1

11 I1n_CT_LVS_ST 0-60000 A 1 A 3000

12 I2n_CT_LVS_ST 1,5 A 1 A 1

13 I1n_CT_NP_LVS_ST 0-60000 A 1 A 3000

14 I2n_CT_NP_LVS_ST 1,5 A 1 A 1

Logic setting “1” - enable, “0” – disable 15 Yyy12_Conn_ST 0/1 0

16 Ddd12_Conn_ST 0/1 1

17 Dyy11_Conn_ST 0/1 0

18 Ydd11_Conn_ST 0/1 0


Chapter 7 Settings



1 No.1-- [Sn_ST]

Capacity of the exciter or excitation transformer shall be configured as its name plate stated.

2 No.2-- [U1n_HVS_ST]

Rated primary voltage of HV side of stepdown transformer.

3 No.3-- [U1n_LVS_ST]

Rated primary voltage of LV side of stepdown transformer.

4 No.4-- [U1n_VT_LVS_ST]

Rated primary voltage of VT at LV side of stepdown transformer.

5 No.5-- [U2n_VT_LVS_ST]

Rated secondary voltage of VT at LV side of stepdown transformer.

6 No.6-- [U2n_DeltVT_LVS_ST]

Rated secondary voltage of delta VT at LV side of stepdown transformer.

7 No.7-- [I1n_CT2_HVS_ST]

Rated primary current of CT2 with big ratio at HV side of stepdown transformer.


Rated secondary current of CT2 with big ratio at HV side of stepdown transformer.


Rated primary current of CT1 with small ratio at HV side of stepdown transformer.


Rated secondary current of CT1 with small ratio at HV side of stepdown transformer.

11 No.11-- [I1n_CT_LVS_ST]

Rated primary current of CT at LV side of stepdown transformer.

12 No.12-- [I2n_CT_LVS_ST]

Rated secondary current of CT at LV side of stepdown transformer.

13 No.13-- [I1n_CT_NP_LVS_ST]

Rated primary current of CT at neutral point of LV side of stepdown transformer.

14 No.14-- [I2n_CT_NP_LVS_ST]

Rated secondary current of CT at neutral point of LV side of stepdown transformer.

15 No.15-- [Yyy12_Conn_ST]

Chapter 7 Settings


The connection mode of stepdown transformer is Yyy-12 mode.

16 No.16-- [Ddd12_Conn_ST]

The connection mode of stepdown transformer is Ddd-12 mode.

17 No.17-- [Dyy11_Conn_ST]

The connection mode of stepdown transformer is Dyy-11 mode.

18 No.18-- [Ydd11_Conn_ST]

The connection mode of stepdown transformer is Ydd-11 mode.

19 No.19-- [Dyy1_Conn_ST]

The connection mode of stepdown transformer is Dyy-1 mode.


All settings of stepdown transformer system parameters are accessible in the following path:

Main Menu -> SETTING -> SYSTEM SETTINGS -> ST SYS Settings -> [setting symbol]

7.2.5 System parameters of excitation transformer or exciter


Table 7-7 List of excitation transformer of exciter settings No. Symbol Range Step Default 1 fn_Exciter 50,100, 150Hz 1Hz 50 2 Sn_Exc 0-100.00 MVA 0.01 MVA 0.5 3 U1n_S1_Exc 0-600.00 kV 0.01 kV 20 4 U1n_S2_Exc 0-600.00 kV 0.01 kV 6.3 5 U1n_VT_Exc 0-600.00 kV 0.01 kV 3.46 6 U2n_VT_Exc 57.74-110 V 0.01 V 57.74 7 U2n_DeltVT_Exc 33.33-110 V 0.01 V 33.33 8 I1n_CT_S1_Exc 0-60000 A 1 A 20 9 I2n_CT_S1_Exc 1A,5A 1 A 5 10 I1n_CT_S2_Exc 0-60000 A 1 A 60 11 I2n_CT_S2_Exc 1A,5A 1 A 5

Logic setting “1” - enable, “0” – disable 12 Opt_Exc 0, 1 0 13 Yy12_Conn_ET 0, 1 0 14 Dd12_Conn_ET 0, 1 0 15 Dy11_Conn_ET 0, 1 0 16 Yd11_Conn_ET 0, 1 1 17 Dy1_Conn_ET 0, 1 0

Chapter 7 Settings



1 No.1-- [fn_Exc]

This setting indicates the nominal frequency of exciter. If excitation transformer is used, this setting can be set as 50Hz and the other settings in this table should be set according to relevant parameters of excitation transformer.

2 No.2-- [Sn_Exc]

Capacity of the exciter or excitation transformer shall be configured as its name plate stated.

3 No.3-- [U1n_S1_Exc]

The system rated voltage on HV side of the excitation transformer. This setting is used to calculate the correction coefficient of differential protection of excitation transformer.

If exciter is used, this setting and NO.4 setting are all set as the rated voltage of exciter.

4 No.4-- [U1n_S2_Exc]

System rated voltage on LV side of the excitation transformer. This setting is used to calculate the correction coefficient of differential protection of excitation transformer.

5 No.5-- [U1n_VT_Exc]

Primary rated voltage of VT of the excitation transformer.

6 No.6-- [U2n_VT_Exc]

Secondary rated voltage of VT of the excitation transformer.

7 No.7-- [U2n_DeltaVT_Exc]

Secondary rated voltage of delta VT of the excitation transformer.

8 No.8-- [I1n_CT_S1_Exc]

Primary rated current of the CT on HV side of the excitation transformer or CT at the terminal of the exciter.

9 No.9-- [I2n_CT_S1_Exc]

Secondary rated current of the CT on HV side of the excitation transformer or CT at the terminal of the exciter.

10 No.10-- [I1n_CT_S2_Exc]

Primary rated current of the CT on LV side of the excitation transformer or CT at the neutral point of the exciter.

11 No.11-- [I2n_CT_S2_Exc]

Secondary rated current of the CT on LV side of the excitation transformer or CT at the neutral point of the exciter.

12 No.12-- [Opt_Exc]

Chapter 7 Settings


Exciter is used in the system. If this setting is set as “1”, that means exciter is used in the generator system instead of excitation transformer. Otherwise means the contrary.

13 No.13-- [Yy12_Conn_ET]

The connection mode of excitation transformer is Yy-12 mode.

Note:

In the symbol of “Yy-12”, the first letter “Y” represents the connection mode of windings on HV side, and the other “y” represents the connection mode of windings on LV side, “12” represents connection group between HV and LV windings. The following four settings are similar to this one.

14 No.14-- [Dd12_Conn_ET]

The connection mode of excitation transformer is Dd-12 mode.

15 No.15-- [Dy11_Conn_ET]

The connection mode of excitation transformer is Dy-11 mode.

16 No.16-- [Yd11_Conn_ET]

The connection mode of excitation transformer is Yd-11 mode.

17 No.17-- [Dy1_Conn_ET]

The connection mode of excitation transformer is Dy-1 mode.


All settings of excitation system parameters are accessible in the following path:

Main Menu -> SETTING -> SYSTEM SETTINGS -> EXC SYS Settings -> [setting symbol]

7.2.6 Implicit configuration settings

The settings in the following list are associated with application-specific primary layout of generator and exciter, tripping logics. These settings can not be seen on LCD of equipment and only be viewed and configured on PC through DBG2000 software in the submenu “CONFIG SETTINGS”. These settings are usually configured in factory or configured by field commission engineer according to the design drawing and project requirement.


Table 7-8 List of implicit configuration settings No. Symbol Range Default 1 Cfg_CT_Diff_GTU(＃) 0000-FFFF 000E 2 Cfg_CT_Diff_Tr(＃) 0000-FFFF 001B 3 Cfg_CT_Diff_Exc(＃) 0000-FFFF 0001 4 Opt_Polar_CT(＃) 0000-FFFF 1FFF 5 Cfg_CT_Bak_Tr(＃) 0000-FFFF 0002

Chapter 7 Settings


No. Symbol Range Default 6 Cfg_CT_PwrProt_Gen(＃) 0000-FFFF 0001 7 GTU, 2W_ST(＃) 0/1 0 8 3/2Bus, GTU, 2W_ST(＃) 0/1 0 9 GTU, 3W_ST(＃) 0/1 1 10 3/2Bus, GTU, 3W_ST(＃) 0/1 0 11 Tr, Gen, 2W_ST(＃) 0/1 0 12 3/2Bus, Tr, Gen, 2W_ST(＃) 0/1 0 13 Tr, Gen, 3W_ST(＃) 0/1 0 14 3/2Bus, Tr, Gen, 3W_ST(＃) 0/1 0 15 Gen_Only(＃) 0/1 0 16 Opt_WaveRec_MON(＃) Pickup/Trip Pickup 17 Opt_Debug_MON(＃) DSP2/DSP1 DSP2 18 Opt_Dur_WaveRec_MON(＃) 4S/8S 4S 19 En_Displ_Pickup(＃) Yes/No No

Note:

Setting marked with “＃” means that it is can not be seen on LCD or by printing and only can be seen through DBG 2000 software.

7.2.6.2 Explanation of the parameters and notice for setting

1 No.1-- [Cfg_CT_Diff_GTU](＃)

Logic setting of selecting three-phase current channels for differential protection of generator transformer unit. If the bit is set as ”1”, it means this group is used in the differential protection.


15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

CT_

LVS_

ST

CT2

_HVS

_ST

CT1

_HVS

_ST

CT_

NP_

Gen

CT_

HVS

_Tr

CT_

HVS

1&2_

Tr


Table 7-9 Definition of logic setting of CT groups Bit Definition 0 CT group 1 (11B1-6) and 2 (11B7-12) at HV side of main transformer. 1 Bushing CT group (9C1-6) of HV side of main transformer. 2 CT group (11C7-12) at neutral point of generator. 3 CT group 1 (12B1-6) of HV side of stepdown transformer. 4 CT group 2 (11B13-18) of HV side of stepdown transformer.

Chapter 7 Settings


5 CT group (12B7-12) of LV side of stepdown transformer. 6-15 No definition

2 No.2-- [Cfg_CT_Diff_Tr](＃)

Logic setting of selecting three-phase current channels for differential protection of main transformer. If the bit is set as ”1”, it means this group is used in the differential protection.


15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

CT2

_HVS

_ST

CT1

_HVS

_ST

CT_

Term

_Gen

CT_

LVS_

Gen

CT_

HVS

2_Tr

CT_

HVS

1_Tr


Table 7-10 Definition of logic setting of CT groups Bit Definition 0 CT group 1 (11B1-6) at HV side of main transformer. 1 CT group 2 (11B7-12) at HV side of main transformer. 2 CT group (11C13-18) at LV side of main transformer. This group is a reserved

current input channel. 3 CT group (11C1-6) at terminal of generator. 4 CT group 1 (12B1-6) of HV side of stepdown transformer. 5 CT group 2 (11B13-18) of HV side of stepdown transformer.

6-15 No definition

3 No.2-- [Cfg_CT_Diff_Exc](＃)

Logic setting of selecting three-phase current channels for differential protection of exciter or excitation transformer.


15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

CT_

S2_E

xc&

CT_

Br2

_ST

CT_

S1_E

xc&

CT_

LVS_

ST

CT_

S1&

S2_E

xc

Chapter 7 Settings



Table 7-11 Definition of logic setting of CT groups Bit Definition 0 CT group 1 (12C1-6) and 2 (12C7-12) of exciter. 1 CT group 1 (12C1-6) of exciter and CT group (12B7-12) at LV side of stepdown

transformer. 2 CT group 2 (12C7-12) of exciter and CT group (12B13-18) at LV side of

stepdown transformer. 3-15 No definition

4 No.4-- [Opt_Polar_CT](＃)

Generally, CT polarity definition is as Figure 1-1and Figure 1-2 show. However if some CT polarity direction is reversed by incorrect wiring connecting, there is still chance to correct it by configuring this logic setting easily. Please set the corresponding digit of the logic setting.

Following will be seen on PC through DBG2000 software. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Res

erve

d

Spar

eCT_

Exc

CT_

S2_E

xc

CT_

S1_E

xc

CT_

Br2

_ST

CT_

LVS_

ST

CT1

_HVS

_ST

Spar

eCT_

Gen

CT_

NP_

Gen

CT_

Term

_Gen

CT2

_HVS

_ST

CT2

_Tr

CT1

_Tr


Table 7-12 Definition of logic setting of CT polarity Bit Definition 0 CTs polarity of current channel (11B1-6) at HVS of transformer reversed 1 CTs polarity of current channel (11B7-12) at HVS of transformer reversed 2 CTs polarity of current channel (11B13-18) at HVS of stepdown transformer

reversed 3 CTs polarity of current channel (11C1-6) at terminal of generator reversed 4 CTs polarity of current channel (11C7-12) at neutral of generator reversed 5 CTs polarity of current spare channel (11C13-18) reversed 6 CTs polarity of current channel (12B1-6) at HVS of stepdown transformer

reversed 7 CTs polarity of current channel (12B7-12) at LVS of stepdown transformer

reversed 8 CTs polarity of current channel (12B13-18) reversed 9 CTs polarity of current channel (12C1-6) of exciter reversed 10 CTs polarity of current channel (12C7-12) of exciter reversed 11 CTs polarity of current channel (9C1-6) reversed

Chapter 7 Settings


12-15 No definition

5 No.5-- [Cfg_CT_Bak_Tr](＃)

Logic setting of selecting three-phase current channel for backup protection of transformer.


CT_

HVS

_Tr

CT_

CB

_Tr

CT_

Sum

_Cur

r_Tr


Table 7-13 Definition of logic setting of CT polarity Bit Definition 0 CT group 1(11B1-6) and 2 (11B7-12) at HVS of transformer. 1 CT group 1(11B1-6) at HVS of transformer. 2 Bushing CT group (9C1-6) at HVS of transformer.

3-15 No definition

6 No.6-- [Cfg_CT_Power_Gen](＃)

Logic setting of selecting three-phase current channel for reverse power protection of generator.


CT_

S(11

B13

-11B

18)

CT_

S(11

C13

-11C

18)

CT_

P(11

C1-

11C

6)


Table 7-14 Definition of logic setting of CT polarity Bit Definition 0 Protecting CT group (11C1-6) at terminal of generator.

Chapter 7 Settings


Bit Definition 1 Measuring CT group (11C13-11C18). 2 Measuring CT group (11B13-18) at HVS of transformer.

3-15 No definition

Note:

Only one of the follow settings from No.7- No.15 can be set as “1”.

7 No.7-- [GTU, 2W_ST] (＃)

The logic setting of connection type between bus, generator, main transformer, and stepdown transformer.

“1” means there is only one group CT input at HV side, no CB between main transformer and generator, two windings in stepdown transformer.

8 No.8-- [3/2Bus, GTU, 2W_ST] (＃)


“1” means there are two group CT inputs at HV side (3/2 bus), no CB between main transformer and generator, two windings in stepdown transformer.

9 No.9-- [GTU, 3W_ST] (＃)


“1” means there is only one group CT input at HV side, no CB between main transformer and generator, three windings in stepdown transformer.

10 No.10-- [3/2Bus, GTU, 3W_ST] (＃)


“1” means there are two group CT inputs at HV side (3/2 bus), no CB between main transformer and generator, three windings in stepdown transformer.

11 No.11-- [Tr, Gen, 2W_ST] (＃)


“1” means there is only one group CT input at HV side, a CB between main transformer and generator, two windings in stepdown transformer.

12 No.12-- [3/2Bus, Tr, Gen, 2W_ST] (＃)


Chapter 7 Settings


“1” means there are two group CT inputs at HV side, a CB between main transformer and generator, two windings in stepdown transformer.

13 No.13-- [Tr, Gen, 3W_ST] (＃)


“1” means there is only one group CT input at HV side, a CB between main transformer and generator, three windings in stepdown transformer.

14 No.14-- [3/2Bus, Tr, Gen, 3W_ST] (＃)


“1” means there are two group CT inputs at HV side, a CB between main transformer and generator, three windings in stepdown transformer.

15 No.15-- [Gen_Only] (＃)


“1” means there is only a generator protected.

16 No.16--[Opt_WaveRec_MON] (＃)

Logic setting of selecting recording triggering mode of MON module.

“0”: recording is triggered when any fault detector picks up.

“1”: recording is triggered when any protection element trips.

17 No.17--[Opt_Debug_MON](＃)

This logic setting is provided especially for software developing, not for ordinary users.

18 No.18--[Opt_Dur_WaveRec_MON](＃)

Logic setting of selecting recording time of MON module.

“0”: recording persisting time is 4 s with 24 samples per cycle.

“1”: recording persisting time is 8 s with 12 samples per cycle.

19 No.19--[En_Displ_Pickup](＃)

This logic setting is provided especially for software developing, not for ordinary users.

Note:

It is suggested to configure settings No.16-No.19 as default settings.

Chapter 7 Settings


7.3 Protection Settings 7.3.1 Settings of differential protection of generator-transformer unit


Table 7-15 List of generator-transformer unit differential protection settings No. Symbol Range Step Default 1 I_Pkp_PcntDiff_GTU 0.10–1.50 (Ie) 0.01 (Ie) 0.3

2 I_InstDiff_ GTU 2.00–14.00 (Ie) 0.01 (Ie) 6

3 Slope1_PcntDiff_ GTU 0.00–0.50 0.01 0.1


5 k_Harm_PcntDiff_GTU 0.10-0.35 0.01 0.15

6 TrpLog_Diff_ GTU 0000–FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 7 En_InstDiff_ GTU 0, 1 1 8 En_PcntDiff_ GTU 0, 1 1 9 Opt_Inrush_Ident_ GTU 0, 1 1 10 Opt_CTS_Blk_PcntDiff_ GTU 0, 1 1

7.3.1.2 Explanation of the settings

1 No.1-- [I_Pkp_PcntDiff_GTU]

This is pickup setting of percentage current differential protection, which is also the setting of fault detector of percentage differential protection. It shall be higher than maximum unbalance current when the generator-transformer operate on normal rated load.

2 No.2-- [I_InstDiff_GTU]

Setting of unrestrained differential protection.

3 No.3-- [Slope1_PcntDiff_GTU]

Setting of the first slope of percentage differential protection.

4 No.4-- [Slope2_PcntDiff_GTU]

Maximum value of restraint coefficient of the differential characteristic curve.

5 No.5-- [k_Harm_PcntDiff_GTU]

The ratio setting of 2nd harmonic component in differential current. 0.15 is recommended.

6 No.6-- [TrpLog_PcntDiff_GTU]

Tripping output logic setting of differential protection is used to specify which breaker or breakers will be tripped by this protection. This word comprises 16 binary bits as follows and is displayed as a hexadecimal number of 4 digits from 0000H to FFFFH on LCD of equipment. The tripping output logic settings is specified as follows:

Chapter 7 Settings


bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Func

tion

No

defin

ition

TJ14

: Trp

Out

put1

4

TJ13

: Trp

Out

p13

TJ12

: Trp

Out

p12

TJ11

: Trp

Out

p11

TJ10

: Trp

Out

p10

TJ9:

Trp

Out

p9

TJ8:

Trp

Out

p8

TJ7:

Trp

Out

p7

TJ6:

Trp

Out

p6

TJ5:

Trp

Out

p5

TJ4:

Trp

Out

p4

TJ3:

Trp

Out

p3

TJ2:

Trp

Out

p2

TJ1:

Trp

Out

p1

En_T

rp

Note:

“TrpOutp 1” just means to drive tripping output channel 1 and please refer to section 5.3. Set bit “0” as 1 means this protection element will trip breaker or breakers. The bit corresponding to the breaker to be tripped shall be set as“1” and other bits shall be “0”. For example, if differential protection is defined to trip breaker 5 (tripping output channel 5), the bit “0” and “5” bit shall be set as “1” and other bits “0”. Then a hexadecimal number 0021H is formed as the tripping output logic setting.

Please note that tripping output logic settings of the equipment have to be set on basis of application-specific drawings.

All the tripping logic settings mentioned below is defined as same as this one.

7 No.7-- [En_InstDiff_GTU]

Unrestrained instantaneous differential protection enabled. If this setting is set as “1”, it means this protection is enabled. Otherwise it means the protection is disabled.

8 No.8-- [En_PcntDiff_GTU]

Percentage differential protection enabled.

9 No.9-- [Opt_Inrush_Ident_GTU]

The logic setting to select the method to identify inrush current of transformer.

“1” means to use the second harmonic restraint principle. “0” means to use waveform distortion discrimination principle.

10 No.10-- [Opt_CTS_Blk_PcntDiff_Gen]

If this logic setting is set as “1”, it means percentage differential protection will be blocked when CT circuit failure happens. Otherwise it means the function is disabled.


All settings of differential protection settings are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> GTU DIFF PROT --> [setting symbol]

Chapter 7 Settings


7.3.2 Settings of differential protection of main transformer


Table 7-16 List of main transformer differential protection settings No. Symbol Range Step Default 1 I_Pkp_PcntDiff_Tr 0.10–1.50 (Ie) 0.01 (Ie) 0.3

2 I_InstDiff_ Tr 2.00–14.00 (Ie) 0.01 (Ie) 6

3 Slope1_PcntDiff_ Tr 0.00–0.50 0.01 0.1


5 k_Harm_PcntDiff_Tr 0.10-0.35 0.01 0.15

6 TrpLog_Diff_ Tr 0000–FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 7 En_InstDiff_ Tr 0, 1 1 8 En_PcntDiff_ Tr 0, 1 1 9 En_DPFC_Diff_Tr 0, 1 1 10 Opt_Inrush_Ident_ Tr 0, 1 1 11 Opt_CTS_Blk_PcntDiff_Tr 0, 1 1


1 No.1-- [I_Pkp_PcntDiff_Tr]

This is pickup setting of percentage current differential protection, which is also the setting of fault detector of percentage differential protection. It shall be higher than maximum unbalanced current of the transformer during normal rated load, i.e.

eerrelcdqd ImUKKI )( ∆+∆+=

Where:

cdqdI represents the setting [I_Pkp_PcntDiff_Tr].

eI is secondary calculated rated current of transformer (please see details in section 3.3.1);

relK is reliability coefficient (generally relK = 1.3 - 1.5);

erK is the ratio error of CT (=0.03X2, for class 10P; =0.01X2, for class 5P and class TP);

U∆ is the maximum deviation (in percentage of rated voltage) due to tap changing.

m∆ is the error caused by the difference between ratios of CT at all side, 0.05 is recommended.

For practical engineering application, cdqdI =（0.3 - 0.5） eI is reasonable and unbalanced current

in differential scheme during maximum load of transformer shall be measured.

Chapter 7 Settings


2 No.2-- [I_InstDiff_Tr]

Setting of unrestrained instantaneous differential protection, which is used to clear serious internal

fault quickly and prevent operation delay caused by CT saturation. The setting cdsdI (i.e.

[I_InstDiff]) shall be greater than inrush current and maximum unbalanced current due to external fault or asynchronous closing, generally

ecdsd IKI ⋅=

Where:

K is a multiple depending on capacity of transformer and the system reactance, 6 – 8 is recommended.

eI is secondary calculated rated current of transformer.

Sensitivity coefficient of unrestrained instantaneous differential protection senK shall be calculated

according to the phase-to-phase solid short circuit fault in normal operation condition at installed

point of the relay. senK ≥ 1.2 is required.

3 No.3-- [Slope1_PcntDiff_Tr]

Setting of the first slope of percentage differential protection, it shall be:

erbl KK ≥1

Where:

erK is the error of current ratio of CT, no more than 0.1. 1blK is 0.10-0.20 generally.

Sensitivity check for percentage differential protection

The sensitivity coefficient senK shall be calculated according to phase-to-phase short circuit on

outlet of transformer protected by the differential relay in minimum operation mode. From the

calculated minimum short circuit current min.kI and relevant restraint current resI , corresponding

pickup current opI will be found in the operation characteristic curve of percentage differential

relay, and then the sensitivity coefficient is:

opksen IIK /min.=

senK ≥ 1.2 is required.

Chapter 7 Settings


4 No.4-- [Slope2_PcntDiff_Tr]

Setting of second slope of percentage differential protection.

Calculation of secondary unbalanced current:

--- For two winding transformer

max.max. )( kerccapunb ImUKKKI ∆+∆+=

Where:

Definition of erK , U∆ and m∆ have been mentioned above;

ccK is the “same type coefficient” of CT, 0.1 is considered.

max.kI is the maximum value of fundamental component of external short circuit fault current

(secondary).

apK is the coefficient of DC component. apK = 1.0 if CT at both sides are class TP, or apK = 1.5 -

2.0 if CT at both sides are class P.

--- For three winding transformer

Take external short circuit fault at LV side as example:

max..max..max..max.max. IIkIIIkIhkhkerccapunb ImImIUIKKKI ∆+∆+∆+=

Where:

Definition of erK , ccK and apK have been mentioned above;

hU∆ are maximum deviations (in percentage of rated voltage) on HV side due to tap changing.

max.kI is the maximum value of fundamental component of short circuit secondary current flowing

through CT at the fault side during external fault at LV side.

max..hkI is the maximum value of fundamental component of short circuit secondary current flowing

through CT on tap changing sides during external fault at LV side.

max..IkI and max..IIkI are the fundamental components of secondary currents flowing through CT at

other sides during external fault at LV side.

Chapter 7 Settings


Im∆ and IIm∆ are errors caused by difference between ratios of CT (auxiliary CT included if any)

at relevant sides.

Second slope of percentage differential protection is:

33

max*.

1*max*.2 −

−−=

k

blcdqdunbbl I

kIIk

Where:

Definition of max*.unbI , *cdqdI and max*.kI are almost same to max.unbI , cdqdI and

max.kI mentioned above, and the only difference is they are per unit values. eI (secondary

calculated rated current of transformer) is the base value of per unit.

2blk =0.70 is recommended.

5 No.5-- [k_Harm_PcntDiff_Tr]

Restraint coefficient of second harmonic. This parameter is the blocking threshold of second harmonics involving in differential current to against inrush current when the transformer is energized. The differential protection will be blocked when the percentage of second harmonics reaches the threshold because the percentage of second harmonics is high in inrush current but low in fault current. It is recommended that the parameter is set to be 15% -20%.

6 No.6-- [TrpLog_DIff_Tr]

Tripping output logic setting of differential protection is used to specify which breaker or breakers will be tripped by this protection.

7 No.7-- [En_InstDiff_Tr]

Unrestrained instantaneous differential protection enabled. If this setting is set as “1”, it means this protection is enabled. Otherwise, it means the protection is disabled.

8 No.8-- [En_PcntDiff_Tr]

Percentage differential protection enabled. If this setting is set as “1”, it means this protection is enabled. Otherwise, it means the protection is disabled.

9 No.9-- [En_DPFC_Diff_Tr]

DPFC percentage differential protection enabled. If this setting is set as “1”, it means this protection is enabled. Otherwise, it means the protection is disabled.

10 No.10-- [Opt_Inrush_Ident_Tr]

Inrush current blocking principle selection:

Chapter 7 Settings


“0”, discrimination by harmonics.

“1”, waveform distortion criteria is used.

11 No.11-- [Opt_CTS_Blk_PcntDiff_Tr]

If this logic setting is set as “1”, it means percentage differential protection will be blocked when CT circuit failure happens. Otherwise, it means the function is disabled.



Main Menu -> SETTINGS -> PROT SETTINGS -> TR DIFF PROT --> [setting symbol]

7.3.3 Settings of phase to phase fault protection of main transformer


Table 7-17 Definition of phase to phase fault protection settings No. Symbol Range Step Default 1. V_NegOV_VCE_Tr 1.00 V– 20.00 V 0.01 V 4 2. Vpp_VCE_Tr 2.00V-100.00V 0.01 V 60 3. I_OC1_Tr 0.10 A – 100.00 A 0.01 A 15 4. t_OC11_Tr 0.00 s – 10.00 s 0.01 s 1 5. TrpLog_OC11_Tr 0000-FFFF 1 000F 6. t_OC12_Tr 0.00 s – 10.00 s 0.01 s 1.5 7. TrpLog_OC12_Tr 0000-FFFF 1 00F1 8. I_OC2_Tr 0.10 A – 100.00 A 0.01 A 10 9. t_OC21_Tr 0.00 s – 10.00 s 0.01 s 2 10. TrpLog_OC21_Tr 0000-FFFF 1 0F01 11. t_OC22_Tr 0.00 s – 10.00 s 0.01 s 2.2 12. TrpLog_OC22_Tr 0000-FFFF 1 7001 13. Z1_Fwd_Tr 0.00 – 100.00 Ohm 0.01Ohm 20 14. Z1_Rev_Tr 0.00 – 100.00 Ohm 0.01Ohm 20 15. t_Z11_Tr 0.00 – 10.00 s 0.01 s 1 16. TrpLog_Z11_Tr 0000-FFFF 1 0FFF 17. t_Z12_Tr 0.00 – 10.00 s 0.01 s 1 18. TrpLog_Z12_Tr 0000-FFFF 1 0FFF 19. Z2_Fwd_Tr 0.00 – 100.00 Ohm 0.01Ohm 20 20. Z2_Rev_Tr 0.00 – 100.00 Ohm 0.01Ohm 20 21. t_Z21_Tr 0.00 – 10.00 s 0.01 s 1 22. TrpLog_Z21_Tr 0000-FFFF 1 0FFF 23. I_Alm_OvLd_Tr 0.10 – 100.00 A 0.01 A 6 24. t_Alm_OvLd_Tr 0.00 – 10.00 s 0.01 s 8 25. I_InitCool1_OvLd_Tr 0.10 – 100.00 A 0.01 A 5.5

Chapter 7 Settings


No. Symbol Range Step Default 26. t_InitCool1_OvLd_Tr 0.00 – 10.00 s 0.01 s 9 27. I_InitCool2_OvLd_Tr 0.10 – 100.00 A 0.01 A 5.5 28. t_InitCool2_OvLd_Tr 0.00 – 10.00 s 0.01 s 9

logic setting “1” - enable, “0” – disable

29. En_VCE_Ctrl_OC1_Tr 0/1 1


31. En_LVS.VCE_Ctrl_OC_Tr 0/1 1

32. En_Mem_Curr_Tr 0/1 0

33. Opt_VTS_Ctrl_OC_Tr 0/1 1

34. En_OvLd_Tr 0/1 1

35. En_InitCool_OvLd_Tr 0/1 1


1 No.1-- [V_NegOV_VCE_Tr]

This is setting of negative sequence voltage control element of main transformer. Setting and displayed value of negative sequence voltage are U2.

Setting of this relay shall be higher than measured imbalance voltage during normal operation condition, generally

nop UU )08.006.0(2. −=

Where nU is secondary rated phase-to-phase voltage.

Sensitivity factor of negative sequence voltage relay shall be checked by

2.

min.2.

op

ksen U

UK =

Where min.2.kU is minimum secondary negative sequence voltage at location of the relay during

phase-to-phase metallic short circuit fault at end of backup protected zone. senK ≥2.0 is required

for near backup protection and senK ≥1.5 for remote backup protection.

Note:

When sensitivity factor is checked for current relay and voltage relay, unfavorable normal system operation condition and unfavorable type of short circuit fault shall be adopted. If sensitivity factor of under voltage relay is not high enough, function of composite voltage on LV side initiation can

Chapter 7 Settings


be enabled. Voltage is taken from LV side by configure logic setting [En_LVS.VCE_Ctrl_OC_Tr].

2 No.2-- [Vpp_VCE_Tr]

Voltage of voltage control element is taken from LV side usually (logic setting [En_LVS.VCE_Ctrl_OC_TR] is set as 1.). Undervoltage setting shall be higher than the lowest voltage during starting process of the largest motor connected with the LV busbar.

Setting of phase-to-phase under voltage of composite voltage control element. It shall coordinate with generator starting condition.

Setting shall be higher than possible minimum voltage during normal operation, namely

rrelop KK

UU⋅

= min

Where relK is reliability factor, 1.10 – 1.20; rK is release factor, 1.05 – 1.25; minU is possible

minimum voltage during normal operation, 0.9 times of secondary rated line voltage generally.

When VT on HV side of the transformer is used for the under voltage relay

nop UU 7.0=

Where nU is secondary rated line voltage.

When step-up transformer is used in a power plant and VT on generator side is used for under voltage relay, its setting shall be higher than under voltage during operation of generator without excitation,

nop UU )6.05.0( −=

Where nU is secondary rated line voltage.

Sensitivity factor of under voltage relay shall be checked by

max.c

opsen U

UK =

Where max.cU is maximum secondary residual voltage at location of the relay when

phase-to-phase metallic short circuit fault occurs at the check point during operation condition for

calculation. senK ≥1.5 is required for near backup protection and senK ≥1.2 for remote backup

protection.

Chapter 7 Settings


3 No.3-- [I_OC1_Tr]

Setting of overcurrent protection stage 1.

Setting of overcurrent relay shall be higher than rated current of transformer,

er

relop I

KKI =

where relK is reliability factor, 1.2 generally; rK is release factor, 0.85 – 0.95; eI is secondary

rated current.

Sensitivity factor of overcurrent relay shall be checked by following:

op

ksen I

IK)2(min.=

where )2(min.kI is minimum fault current through location of the relay during phase-to-phase metallic

short circuit at end of backup protected section. senK ≥ 1.3 is required for near backup

protection and senK ≥ 1.2 for remote backup protection.

4 No.4-- [t_OC11_Tr]

The first time delay of overcurrent protection stage 1. It shall coordinate with main protection only and oscillation period is not needed to be considered. It is set as 0.5 s generally.

5 No.5 – [TrpLog_OC11_Tr]

Tripping output logic setting of the first time delay of over current protection stage 1, please refer to section 7.3.1

6 No.6-- [t_OC12_Tr]

The second time delay of overcurrent protection stage 1. It shall coordinate with main protection only and oscillation period is not needed to be considered.


Tripping output logic setting of the second time delay of over current protection stage 1, please refer to section 7.3.1

8 No.8-- [I_OC2_Tr]


9 No.9-- [t_OC21_Tr]

The first time delay of overcurrent protection stage 2.

Chapter 7 Settings



Tripping output logic setting of the first time delay of over current protection stage 2, please refer to section 7.3.1

11 No.11-- [t_OC22_Tr]

The second time delay of overcurrent protection stage 2.


Tripping output logic setting of the second time delay of over current protection stage 2, please refer to section 7.3.1

13 No.13 – [Z1_Fwd_Tr]

Stage 1 of positive direction impedance setting of phase-to-phase impedance protection. Here positive direction means the direction is pointing to the transformer instead of generator itself.

If the value of this setting is greater than the next one, then the characteristic of distance protection is set as excursive impedance circle; if it is equal to the next one, the characteristic is whole impedance circle; if the next one is set as “0”, the characteristic becomes directional impedance.

Generally, low impedance protection is considered as the backup protection of transformer in case that voltage-controlled overcurrent protection cannot satisfy the sensitivity requirement of transformer.

Setting of this impedance relay shall coordinate with that of HV side outlet, namely

ZKKZ relop inf=

Where relK is reliability factor, 0.8 generally; infK is enhanced factor, taking minimum value of

various operation conditions; Z is setting of impedance protection of coordinating HV side outlet;

Sensitivity shall be checked by phase-to-phase short circuit on end of designated protected zone, namely

ZZ

K opsen =

Where Z is equivalent secondary impedance value of designated protected section. senK ≥1.3

Is required.

When this direction of impedance relay points to transformer.

The forward setting can be based on enough sensitivity for fault on terminal of generator and referred to equation hereinabove. Reverse impedance equals to 5% - 10% of forward impedance. Reverse setting shall be lower than setting of the shortest zone 1 of impedance protection of outlet from this side busbar.

Chapter 7 Settings


14 NO.14—[Z1_Rev_Tr]

Stage 1 of negative direction impedance setting of distance protection. In general, this setting is set as 5-10% of the positive direction impedance setting.

15 NO.15—[t_Z11_Tr]

The first time delay of distance protection stage 1.

16 NO.16—[TrpLog_Z11_Tr]

Tripping output logic setting of distance protection stage 1 with time delay 1.

17 NO.17—[t_Z12_Tr]

The second time delay of distance protection stage 1.


Tripping output logic setting of distance protection with time delay 2.

19 No.19 – [Z2_Fwd_Tr]

Stage 2 of ppositive direction impedance setting of phase-to-phase impedance protection.

20 NO.20—[Z2_Rev_Tr]

Stage 2 of negative direction impedance setting of distance protection.

21 NO.21—[t_Z21_Tr]

The time delay of distance protection stage 2.


Tripping output logic setting of stage 2 of distance protection.

23 No.23-- [I_Alm_OvLd_Tr]

Current setting of overload alarm.

24 No.24-- [t_Alm_OvLd_Tr]

Time delay of overload alarm.

25 No.25-- [I_InitCool1_OvLd_Tr]

Current setting of stage 1 of air cooling initiation of main transformer.

26 No.26-- [t_InitCool1_OvLd_Tr]

Time delay of stage 1 of cooling initiation of main transformer.

27 No.27-- [I_InitCool2_OvLd_Tr]

Current setting of stage 2 of air cooling initiation of main transformer.

28 No.28-- [t_InitCool2_OvLd_Tr]

Chapter 7 Settings


Time delay of stage 2 of cooling initiation of main transformer.

29 No.29-- [En_VCE_Ctrl_OC1_Tr]

Logic setting of overcurrent protection stage 1 controlled by voltage element.

“1”: the overcurrent protection stage 1 is controlled by voltage element.

“0”: the protection is not controlled by voltage element.

30 No.30-- [En_VCE_Ctrl_OC2_Tr]

Logic setting of overcurrent protection stage2 controlled by voltage element.

31 No.31 -- [En_LVS.VCE_Ctrl_OC_Tr]

Logic setting of overcurrent protection controlled by LV side VCE.

32 No.32 -- [En_Mem_Curr_Tr]

Logic setting of memory function of current.

Note:

For generator with self parallel excitation system, the memory function is usually disabled for phase to phase backup protection. But if it is enabled, the overcurrent protection must be configured as voltage controlled overcurrent protection.

33 No.33-- [Opt_VTS_Ctrl_OC_Tr]

Protection performance during VT circuit failure.

“1”: when VT circuit failure at one side is detected, voltage control element at the same side will be disabled but overcurrent relay on the same side can still be controlled by voltage control elements of other side if corresponding logic setting is set as “1”.

“0”: when VT circuit failure at one side is detected, the overcurrent relay will become an overcurrent relay without voltage element control.

34 No.34-- [En_OvLd_Tr]

Logic setting of enabling overload alarm of main transformer.

35 No.45-- [En_InitCool_OvLd_Tr]

Logic setting of enabling cooling initiation of main transformer.


Settings of HV side voltage phase to phase fault protection are accessible in the following path:

Main Menu -> Setting -> PROT SETTINGS -> TR PPF BAK PROT

7.3.4 Settings of earth fault protection of main transformer


Table 7-18 Definition of earth fault protection settings of main transformer

Chapter 7 Settings


No. Symbol Range Step Default 1. V_ROV_VCE_Tr 2.00 –100.00V 0.01V 10 2. I_ROC1_Tr 0.10 –100.00A 0.01A 10 3. t_ROC11_Tr 0.00–10.00s 0.01s 1 4. TrpLog_ROC11_Tr 0000-FFFF 1 0021 5. t_ROC12_Tr 0.00–10.00s 0.01s 1.5 6. TrpLog_ROC12_Tr 0000-FFFF 1 0003 7. I_ROC2_Tr 0.10–100.00A 0.01A 10 8. t_ROC21_Tr 0.00– 10.00s 0.01 s 2 9. TrpLog_ROC21_Tr 0000-FFFF 1 0003 10. t_ROC22_Tr 0.00– 10.00s 0.01s 2.5 11. TrpLog_ROC22_Tr 0000-FFFF 1 001F 12. I_ROC3_Tr 0.10–100.00A 0.01A 10 13. t_ROC31_Tr 0.00– 10.00s 0.01 s 2 14. TrpLog_ROC31_Tr 0000-FFFF 1 0003 15. t_ROC32_Tr 0.00– 10.00s 0.01s 2.5 16. TrpLog_ROC32_Tr 0000-FFFF 1 001F 17. V_ROV_Gap_Tr 2.00 – 200.00 V 0.01 V 150 18. t_ROV1_Gap_Tr 0.00 – 10.00s 0.01s 0.5 19. TrpLog_ROV1_Gap_Tr 0000-FFFF 1 0003 20. t_ROV2_Gap_Tr 0.00 – 10.00s 0.01s 1 21. TrpLog_ROV2_Gap_Tr 0000 – FFFF 1 001F 22. I_Alm_REF_Tr 0.10 – 10.00 In 0.01 In 0.1 23. I_Pkp_PcntREF_Tr 0.10 – 10.00 In 0.01 In 0.3 24. I_InstREF_Tr 2.00 – 50.00 In 0.01 In 6 25. Slope_PcntREF_Tr 0.30 – 0.70 0.01 0.3 26. TrpLog_REF_Tr 0000-FFFF 1 7FFF 27. V_Alm_ROV_LVS_Tr 10.00 – 100.00V 0.01 V 100 28. t_Alm_ROV_LVS_Tr 0.00 – 10.00s 0.01s 0.5

logic setting “1” - enable, “0” – disable 29. En_VCE.ROV_Ctrl_ROC1_Tr 0/1 0

30. En_VCE.ROV_Ctrl_ROC2_Tr 0/1 0

31. En_Dir_Ctrl_ROC1_Tr 0/1 0


33. En_Alm_ROV_LVS_Tr 0/1 0

34. En_BI_Ctrl_ROC_Gap_Tr 0/1 0

35. En_InstREF_Tr 0/1 1

36. En_PcntREF_Tr 0/1 1

Chapter 7 Settings



1 No.1 --[ V_ROV_VCE_Tr]

Setting (3U0) of zero-sequence voltage control element for zero-sequence overcurrent protection.

2 No.2-- [I_ROC1_Tr]

Setting of stage 1 of zero-sequence overcurrent protection.

This setting shall coordinate with unrestraint main protection or stage 1 or 2 of zero sequence overcurrent relay of adjacent power line.

IoopbrIrelIoop IKKI 1.... =

Where:

IoopI .. is setting of stage 1 of zero sequence overcurrent relay,

brIK is branch factor of zero sequence current which is ratio of zero sequence current passing

through the relay and passing through the faulty line during ground fault at end of protected zone of stage 1 of power line zero sequence overcurrent protection, maximum value for various operation conditions being Taken;

relK is reliability factor, 1.1 generally;

IoopI 1.. is setting of relevant stage of coordinating line protection.

Sensitivity factor of zero sequence overcurrent relay shall be checked by

oop

oksen I

IK.

min..3=

Where:

min..3 okI is minimum secondary zero sequence current passing through location of the relay

during ground fault at end of protected zone; oopI . is this setting. senK ≥1.5 Is required.

3 No.3-- [t_ROC11_Tr]

Time delay 1 of stage 1 of zero-sequence overcurrent protection.

When earth fault occurs on near end of HV side outlet of startup/standby transformer, it is

protected by both this protection and zero-sequence overcurrent protection stage 2 on remote end,

so the time delay setting of this protection is

Chapter 7 Settings


ttt II ∆−=

Where:

t is time delay [t_ROC11_Tr].

IIt is time delay of zero-sequence overcurrent protection stage2 on remote end.

t∆ is the step difference of delay.

4 No.4-- [TrpLog_ROC11_Tr]

Tripping output logic setting of zero-sequence overcurrent protection stage 1 with time delay 1.

5 No.5-- [t_ROC12_Tr]




7 No.7-- [I_ROC2_Tr]


The setting shall coordinate with operating current of zero-sequence overcurrent protection of HV side feeders for remote end earth fault:

TA

opcIIoop n

ICKI

)3( 0'00.. =

Where:

0cK is coordination coefficient, (generally coK = 1.1);

opoI )3( is the primary operating current of backup zone of zero-sequence overcurrent protection

of HV side feeders to be coordinated.

'0C is the distribution coefficient of zero sequence current that is equal to the ratio of zero

sequence current passing through this end protection and that passing through the power line,

takes the maximum value in various operation modes; and TAn is current ratio of CT.

8 No.8-- [t_ROC21_Tr]

Delay 1 of stage 2 of zero-sequence overcurrent protection.



Chapter 7 Settings


10 No.10-- [t_ROC22_Tr]




12 No.12-- [I_ROC3_Tr]


13 No.13-- [t_ROC31_Tr]

Delay 1 of stage 3 of zero-sequence overcurrent protection.



15 No.15-- [t_ROC32_Tr]




17 No.17-- [V_ROV_Gap_Tr]

Voltage setting of zero sequence overvoltage protection for gap.

Setting of zero sequence voltage relay

satoopo UUU ≤< .max.

Where:

oopU . is setting of this relay;

max.oU is possible maximum zero sequence voltage at location of the relay during single phase

ground fault in power system with part of neutral points grounded, or during two phases operation of transformer with ungrounded neutral point;

satU is possible minimum open-delta voltage of VT in directly grounded system during single

phase ground fault and missing grounded neutral point condition. Rated phase voltage of open delta VT is 100 V.

Considering that ΞΣ 10 / XX ≤3 in a directly grounded system, oopU . is 180 V generally.

18 No.18-- [t_ROV1_Gap_Tr]

Chapter 7 Settings


Time delay 1 of zero sequence overvoltage protection for gap.

19 No.19-- [TrpLog_ROV1_Gap_Tr]

Tripping output logic setting of zero sequence overvoltage protection with time delay 1.

20 No.20-- [t_ROV2_Gap_Tr]

Time delay 2 of zero sequence overvoltage protection for gap.

21 No.21-- [TrpLog_ROV2_Gap_Tr]

Tripping output logic setting of zero sequence overvoltage protection with time delay 2.

22 No.22-- [I_Alm_REF_Tr]

Setting of zero sequence differential current alarm. This setting shall be greater than the maximum zero sequence unbalance differential current in normal operation condition meanwhile smaller than REF pickup value.

23 No.23-- [I_Pkp_PcntREF_Tr]

Pickup setting of zero sequence differential current. Calculation of this setting is based on secondary rated current of CT. The pick up current of zero sequence differential protection shall be higher than the maximum unbalance current while transformer operates on normal rated load, i.e.

nerrelcdqd ImKKI )(0 ∆+=

Where:

cdqdI0 represents for [I_Pkp_PcntREF_Tr];

nI is rated secondary current of CT;

relK is reliability coefficient (generally relK = 1.3 - 1.5);

erK is the ratio errors of CT (for type 10P, erK = 0.03×2; for class 5P and class TP, erK =0.01X2);

m∆ is the error caused by the difference between ratios of CT at all side, 0.05 is recommended.

For practical engineering calculation, ocdqdI =（0.2 - 0.5） nI is reasonable and imbalance current

in differential scheme during maximum load of transformer shall be measured.

Please note that calculation of zero sequence differential current settings is based on the secondary rated current of CT. If a setting value got from calculation is together with its unit Ampere, this setting shall be divided by secondary rated current of this side of CT, to get per unit value.

Sensitivity check for zero sequence percentage differential protection

Chapter 7 Settings


Sensitivity of zero sequence percentage differential protection shall be checked with the solid

earthed short circuit in its protected zone. senK ≥ 2 is required. In solid earthed system,

distribution of zero sequence current for single phase to ground fault depends on the configuration of zero sequence network of power system. Magnitude of the single-phase ground fault current depends on not only zero sequence distance of system but also positive and negative sequence distance or power system operation mode. When power system is in maintenance status, in order to remain the zero sequence network unchanged and increase sensitivity for earth fault protection, the 220 kV power system is generally compensated by properly changing earth mode of the transformer. Neutral point of transformer of 400 kV power system is now generally earthed with small reactance. Therefore, sensitivity of zero sequence differential protection shall be checked in minimum operation mode for 220 kV power system and minimum operation mode or small maintenance mode for 400 kV power system.

Note:

Positive polarity of CT is at busbar side on HV side and at neutral point for serial-winding.

24 No.24-- [I_InstREF_Tr]

Setting of unrestrained instantaneous zero sequence differential protection.

25 No.25-- [Slope_PcntREF_Tr]

Restraint coefficient of percentage zero sequence differential current.

26 No.26-- [TrpLog_REF_Tr]

Tripping output logic setting of zero sequence differential protection.

27 No.27-- [V_Alm_ROV_LVS_Tr]

Voltage setting of zero sequence overvoltage alarm at LV side.

28 No.28-- [t_Alm_ROV_LVS_Tr]

Delay of zero sequence overvoltage alarm at LV side.

29 No.29-- [En_VCE.ROC_Ctrl_ROC1_Tr]

Stage 1 of zero-sequence overcurrent protection controlled by zero-sequence voltage element.

30 No.30-- [En_VCE.ROC_Ctrl_ROC2_Tr]

Stage 2 of zero-sequence overcurrent protection controlled by zero-sequence voltage element.

31 No.31-- [En_Dir_Ctrl_ROC1_Tr]

Stage 1 of zero-sequence overcurrent protection is controlled by direction element.

32 No.32-- [En_Dir_Ctrl_ROC2_Tr]

Stage 2 of zero-sequence overcurrent protection is controlled by direction element.

Chapter 7 Settings


33 No.33-- [En_Alm_ROV_LVS_Tr]

Enable zero sequence overvoltage alarm on LV side.

34 No.34-- [En_BI_Ctrl_ROC_Gap_Tr]

Gap zero sequence overcurrent protection controlled by the state of external contact (6B22).

35 No.35-- [En_InstREF_Tr]

Enable unrestrained instantaneous zero sequence differential current protection.

36 No.36-- [En_PcntREF_Tr]

Enable percentage zero sequence differential current protection.

7.3.4.3 Settings path

Settings of earth fault protection of main transformer are accessible in the following path:

Main Menu -> SETTING -> PROT SETTINGS -> TR EF BAK PROT

7.3.5 Settings of over excitation protection of main transformer


Table 7-19 List of over excitation protection settings of main transformer No. Symbol Range Step Default 1. k_OvExc1_Tr 1.00 – 2.00 0.01 1.4 2. t_OvExc1_Tr 0.00 – 3000.00 s 0.01s 1 3. TrpLog_OvExc1_Tr 0000 – FFFF 1 000F 4. K_OvExc2_Tr 1.00 – 2.00 0.01 1.2 5. t_OvExc2_Tr 0.00 – 3000.00 s 0.01s 20 6. TrpLog_OvExc2_Tr 0000 – FFFF 1 0F01 7. k_Alm_OvExc_Tr 1.00 – 2.00 0.01 1.1 8. t_Alm_OvExc_Tr 0.00 – 3000.00 s 0.01s 10 9. k0_InvOvExc_Tr 1.00 – 2.00 0.01 1.5 10. t0_InvOvExc_Tr 0.00 – 3000.00 s 0.01s 1 11. k1_InvOvExc_Tr 1.00 – 2.00 0.01 1.45 12. t1_InvOvExc_Tr 0.00 – 3000.00 s 0.01s 2 13. k2_InvOvExc_Tr 1.00 – 2.00 0.01 1.4 14. t2_InvOvExc_Tr 0.00 – 3000.00 s 0.01s 5 15. k3_InvOvExc_Tr 1.00 – 2.00 0.01 1.3 16. t3_InvOvExc_Tr 0.00 – 3000.00 s 0.01s 15 17. k4_InvOvExc_Tr 1.00 – 2.00 0.01 1.25 18. t4_InvOvExc_Tr 0.00 – 3000.00 s 0.01s 30 19. k5_InvOvExc_Tr 1.00 – 2.00 0.01 1.2 20. t5_InvOvExc_Tr 0.00 – 3000.00 s 0.01s 100

Chapter 7 Settings


21. k6_InvOvExc_Tr 1.00 – 2.00 0.01 1.15 22. t6_InvOvExc_Tr 0.00 – 3000.00 s 0.01s 300 23. k7_InvOvExc_Tr 1.00 – 2.00 0.01 1.1 24. t7_InvOvExc_Tr 0.00 – 3000.00 s 0.01s 1000 25. TrpLog_InvOvExc_Tr 0000 – FFFF 1 7FFF


1 No.1-- [k_OvExc1_Tr]

Setting of stage 1 of definite time over excitation protection of main transformer.

3.1==== ∗∗ / fU f

fU

U

BB N

gn

gn

n

or data provided by the factory

2 NO.2—[t_OvExc1_Tr]

Delay of stage 1 of definite time over excitation protection of main transformer.

3 NO.3—[TrpLog_OvExc1_Tr]

Tripping output logic setting of stage 1 of definite time over excitation protection of main transformer. The function of this protection is used for islanding, excitation shutting or programming, excitation reducing etc.

4 NO.4—[k_OvExc2_Tr]

Setting of stage 2 of definite time over excitation protection of main transformer.

5 NO.5—[t_OvExc2_Tr]

Delay of stage 2 of definite time over excitation protection of main transformer.

6 NO.6—[TrpLog_OvExc2_Tr]

Tripping output logic setting of stage 2 of definite time over excitation protection of main transformer.

7 NO.7—[k_Alm_OvExc_Tr]

Setting of over excitation alarm of main transformer. Setting of alarm shall be lower than that of over excitation protection. 1.1 is recommended.

8 NO.8—[t_Alm_OvExc_Tr]

Delay of over excitation alarm of main transformer.

9 NO.9—[k0_InvOvExc_Tr]

Upper limit of inverse time over excitation protection of main transformer—n0

10 NO.10—[t0_InvOvExc_Tr]

Delay of upper limit of inverse time over excitation protection of main transformer.


Inverse time over excitation factor1—n1. Setting range of various inverse time over excitation

Chapter 7 Settings


coefficient s is 1.1 – 2.0. However setting of upper limit (NO.9) of over excitation factor n0 shall be higher than that of over excitation factor1 n1, that of factor1 n1 shall be higher than that of factor2 n2, etc.. Finally, setting of over excitation factor6 n6 (NO.23) shall be higher than that of lower limit.


Delay at the point n1 on inverse time over excitation curve—t1

The range of delay of various inverse time over excitation protection stage is 0s to 6000 s, ie.,0--50 min. Delay of upper limit (NO.10) of over excitation factor shall be shorter than that of over excitation factor1, that of factor1 shall be shorter than that of factor2, etc.. Finally, delay of over excitation factor6 (NO.22) shall be shorter than that of lower limit (NO.24).


Inverse time over excitation factor n2.




Inverse time over excitation Ratio n3.


Delay at the point n3 on inverse time over excitation curve—t3.

















25 NO.25—[TrpLog_InvOvExc_Tr]

Tripping output logic setting of inverse time over excitation protection of main transformer.

Chapter 7 Settings



Settings of main transformer overexcitation protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> TR OVEXC PROT --> [setting symbol]

Note:

The over excitation protection of generator-transformer unit comprises two over excitation protection: generator over excitation protection and transformer over excitation protection.

Configuration of the generator over excitation protection shall be higher than over excitation capability of generator, while that of transformer shall be higher than over excitation capability of transformer. If only one set of over excitation protection is used, configuration of the lower one shall be adopted.

7.3.6 Settings of differential protection of generator


Table 7-20 List of generator differential protection settings No. Symbol Range Step Default 1 I_Pkp_PcntDiff_Gen 0.10–1.50 (Ie) 0.01 (Ie) 0.1

2 I_InstDiff_Gen 2.00–14.00 (Ie) 0.01 (Ie) 6

3 Slope1_PcntDiff_Gen 0.00–0.50 0.01 0.05


5 TrpLog_Diff_Gen 0000–FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 6 En_InstDiff_Gen 0, 1 1 7 En_PcntDiff_Gen 0, 1 1 8 En_DPFC_Diff_Gen 0, 1 1 9 Opt_CTS_Blk_PcntDiff_Gen 0, 1 1


1 No.1-- [I_Pkp_PcntDiff_Gen]

This is pickup setting of percentage current differential protection, which is also the setting of fault detector of percentage differential protection. It shall be higher than maximum unbalance current when the generator operates on normal rated load, i.e.

nfrelcdqd IKI 203.02××= or 0.unbrelcdqd IKI ×= (Equation 7-1)

Where:

nfI 2 is secondary rated current of generator,

fLH

nfnf n

II 1

2 =

Chapter 7 Settings


Where:

nfI 1 is primary rated current of generator and fLHn is ratio of generator CT.

nf

nnf U

PI

11 3

cos/ θ=

Where:

nP is rated capacity of generator;

θcos is power factor of generator and

nfU 1 is rated voltage of generator terminal.

relK is reliability factor, 1.5 in general;

0.unbI is the measured actual unbalance current during rated load of generator, 0.2 nfI 2 -0.3

nfI 2 is recommended for reference.

Where:

cdqdI represents the setting [I_Pkp_PcntDiff_Gen].

2 No.2-- [I_InstDiff_Gen]

Setting of unrestrained differential protection.

Unrestraint differential protection is a complementary part of differential protection. Its current setting shall be higher than maximum unbalance current due to breaker’s asynchronous closure. For large unit, it can be set as 3 or 4 times of rated current. 4 times of rated current is recommended.

3 No.3-- [Slope1_PcntDiff_Gen]

Setting of the first slope of percentage differential protection, it shall be:

erccrelbl KKKK ××=1 (Equation 7-2)

Where:

relK is reliability factor which is considered to be 1.0~2.0 in general;

ccK is the type factor of CT, 0.5 in general;

erK is error factor of CT ratio, no more than 0.1.

1blK represents [Slope1_PcntDiff_Gen] which is set as 0.05~0.1 in general.

4 No.4-- [Slope2_PcntDiff_Gen]

Chapter 7 Settings



With type factor of CT not considered, the maximum unbalance current is, ,

max.max. kerapunb KKKK ××= (Equation 7-3)

Where:

apK is non periodic component factor, usually no less than 2.0;

erK is error factor of CT ratio, no more than 0.1;

max.kI is periodic component of secondary value of external three phase short circuit current and it

can be taken as 4 times of rated current if it is less than 4 times of rated current.

Maximum slope of percentage differential protection is:

22

max*.

1*max*.2 −

−−=

k

blcdqdunbbl I

kIIk

where:

max*.unbI， *cdqdI and max*.kI are all per unit value of rated current of generator;

2blk ([Slope2_PcntDiff_Gen] ) is taken as 0.50 generally.

If the percentage differential protection is configured based on rules mentioned above, when phase-to-phase metallic short circuit fault occurs at the terminal of generator, sensitivity factor will

meet requirement senK≥ 2 surely.

5 No.5-- [TrpLog_Diff_Gen]

Tripping output logic setting of differential protection of generator.

6 No.6-- [En_InstDiff_Gen]

Unrestrained instantaneous differential protection enabled. If this setting is set as “1”, it means this protection is enabled. Otherwise it means the protection is disabled.

7 No.7-- [En_PcntDiff_Gen]

Percentage differential protection enabled.

8 No.8-- [En_DPFC_Diff_Gen]

DPFC percentage differential protection enabled.

Chapter 7 Settings


9 No.9-- [Opt_CTS_Blk_PcntDiff_Gen]

If this logic setting is set as “1”, it means percentage differential protection will be blocked when CT circuit failure happens. Otherwise it means the function is disabled.



Main Menu -> SETTINGS -> PROT SETTINGS -> GEN DIFF PROT --> [setting symbol]

7.3.7 Settings of splitting-phase transverse differential protection of generator


Table 7-21 List of splitting-phase transverse differential protection settings No. Symbol Range Step Default 1. I_Pkp_PcntSPTDiff_Gen 0.10 – 1.50 (Ie) 0.01 (Ie) 0.1 2. I_InstSPTDiff_Gen 2.00 – 14.00 (Ie) 0.01 (Ie) 6 3. Slope1_PcntSPTDiff_Gen 0.00 -- 0.50 0.01 0.05 4. Slope2_PcntSPTDiff_Gen 0.30 – 0.80 0.01 0.5 5. TrpLog_SPTDiff_Gen 0000 -- FFFF 1 1FFF

Logic setting “1” - enable, “0” – disable 6. En_InstSPTDiff_Gen 0，1 1 7. En_PcntSPTDiff_Gen 0，1 1 8. Opt_CTS_Blk_PcntSPTDiff_Gen 0，1 1


1 No.1-- [I_Pkp_PcntSPTDiff_Gen]

This is pickup setting of splitting-phase transverse percentage current differential protection, which is also the setting of fault detector of this protection. It shall be higher than maximum unbalance current when the generator operates on normal rated load, i.e.

)I I ( K I 'unb.2unb.1

'relop.0

' +=

Where:

I op.0' : represents the setting [I_Pkp_PcntSPTDiff_Gen],

relK : is reliability coefficient. In general, Krel = 1.3 – 1.5,

I unb.1 ' : is unbalance current due to amplitude error between the CTs used in this protection in

load condition. In practical application, I unb.1 ' = 0.06 I 2n

' . Here, I 2n ' is the secondary rated

current of CT.

Chapter 7 Settings


I unb.2 '

: the second type unbalance current. Because each shunt branch of every phase is

distributed in different groove on the surface of rotor for hydro generator and the air gap field of each groove is different, therefore this second type unbalance current appears.

User can also get the maximum unbalance current value by metering the real transverse unbalance current in full load condition of the generator. Generally speaking, the value is a little greater than the one of differential protection of generator.

For reference, it can be set as eI0I 'op.0

' 5.= . Here, 'eI is secondary rated current of generator.

2 No.2-- [I_InstSPTDiff_Gen]

Setting of unrestrained splitting-phase transverse differential protection.

3 No.3-- [Slope1_PcntSPTDiff_Gen]

Setting of the first slope of percentage differential protection

4 No.4-- [Slope2_PcntSPTDiff_Gen]


5 No.5-- [TrpLog_SPTDiff_Gen]

Tripping output logic setting of splitting-phase transverse differential protection.

6 No.6-- [En_InstSPTDiff_Gen]

Instantaneous splitting-phase transverse differential protection enabled.

7 No.7-- [En_PcntSPTDiff_Gen]

Percentage splitting-phase transverse differential protection enabled.

8 No.8-- [Opt_CTS_Blk_PcntSPTDiff_Gen]

If this logic setting is set as “1”, it means percentage splitting-phase transverse differential protection will be blocked when CT circuit failure happens. Otherwise it means the function is disabled.


Settings of generator phase-splitting transverse protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> GEN SPTDIFF PROT-> [setting symbol]

7.3.8 Settings of turn-to-turn fault protection of generator


Table 7-22 List of turn-to-turn fault protection settings No. Symbol Range Step Default 1 I_SensTrvDiff_Gen 0.10 – 50.00 A 0.01 A 2.0 2 I_UnsensTrvDiff_Gen 0.10 – 50.00 A 0.01 A 10 3 t_TrvDiff_Gen 0.00 – 10.00 S 0.01 S 0.2

Chapter 7 Settings


4 V_SensROV_Longl_Gen 1 – 10.00 V 0.01 V 1 5 V_UnsensROV_Longl_Gen 2 – 20.00 V 0.01 V 6 6 t_ROV_Longl_Gen 0.10 – 10.00 S 0.01 S 0.1 7 TrpLog_IntTurn_Gen 0000 - FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 8 En_SensTrvDiff_Gen 0，1 1 9 En_UnsensTrvDiff_Gen 0，1 1 10 En_SensROV_Longl_Gen 0，1 0 11 En_UnsensROV_Longl_Gen 0，1 0 12 En_DPFC_IntTurn_Gen 0，1 0


1 NO.1—[I_SensTrvDiff_Gen]

Current setting of high sensitive transverse differential protection.

Setting of this protection shall be higher than maximum unbalance current during normal operation condition. Reliability factor can be more than 2. The setting value is usually:

afop nII / 0.05 ln=

Where:

OPI represents the setting [I_SensTrvDiff_Gen].

lnfI is primary rated current of generator and

an is ratio of zero sequence CT of transverse differential protection.

Phase current restraint factor is a fixed coefficient in the program.

2 NO.2—[I_UnsensTrvDiff_Gen]

Current setting of high-setting transverse differential protection.

It is equivalent to traditional transverse differential protection. Setting of this protection is as follows which shall be higher than maximum unbalance current during external short circuit fault.

afop nII /0.30~0.20 ln）（=

Where:

OPI represents the setting [I_SensTrvDiff_Gen].

lnfI is primary rated current of generator and

Chapter 7 Settings


an is ratio of zero sequence CT of transverse differential protection.

3 NO.3—[t_TrvDiff_Gen]

Delay of transverse differential protection (act on only after the occurrence of one-point ground of rotor).

When one point earth fault occurs within rotor of generator and one point earth fault protection operates, in order to prevent unwanted operation of transverse protection due to instantaneous two points earth fault within the rotor, operation of this protection shall be delayed for 0.5 s – 1 s.

Note:

When a turn-to-turn fault occurs, the equipment will trip relevant breakers without delay according to the tripping output logic setting, but a time delay decided by user will act on after occurrence of one-point ground of rotor.

4 NO.4—[V_SensROV_Longl_Gen]

Voltage setting of high sensitive longitudinal zero sequence overvoltage protection .

Setting of this protection shall be higher than maximum unbalance voltage during normal operation condition, usually:

V 3 - 0.5 =opU

At beginning of configuration, 2 – 3 V is preferred. After fault waveform analysis, the setting can be reduced properly and sensitivity of the protection can be improved than.

Phase current restraint factor is a fixed coefficient in the program.

5 NO.5—[V_UnsensROV_Longl_Gen]

Setting of this protection shall be higher than maximum unbalance voltage during external fault, usually:

V 12 - 8 =opU

6 NO.6—[t_ROV_Longl_Gen]

Delay of longitudinal zero sequence overvoltage. Short delay 0.10 s – 0.20 s is recommended for operation and output of this protection.

7 NO.7—[TrpLog_IntTurn_Gen]

Tripping output logic setting of turn-to-turn fault protection of generator.

8 NO.8—[En_SensTrvDiff_Gen]

Enable high sensitive transverse differential protection of generator.

Chapter 7 Settings


9 NO.9—[En_UnsensTrvDiff_Gen]

Enable high-setting transverse differential protection of generator.

10 NO.10—[En_SensROV_Longl_Gen]

Enable high sensitive longitude zero sequence overvoltage protection of generator.

11 NO.11—[En_UnsensROV_Longl_Gen]

Enable high-setting longitude zero sequence overvoltage protection of generator.

12 NO.12—[En_DPFC_IntTurn_Gen]

Enable directional DPFC turn-to-turn fault protection of generator.


Settings of generator interturn protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> GEN INTTURN PROT --> [setting symbol].

7.3.9 Settings of phase to phase fault backup protection of generator


Table 7-23 List of phase to phase fault protection settings No. Symbol Range Step Default 1 V_NegOV_VCE_Gen 1.00 – 20.00 V 0.01 V 4 2 Vpp_VCE_Gen 10.00 –100.00 V 0.01 V 60 3 I_OC1_Gen 0.10 –100.00 A 0.01 A 20 4 t_OC1_Gen 0.00 – 10.00 S 0.01 S 1 5 TrpLog_OC1_Gen 0000 - FFFF 1 000F 6 I_OC2_Gen 0.10 –100.00 A 0.01 A 17 7 t_OC2_Gen 0.00 – 10.00 S 0.01 S 2 8 TrpLog_OC2_Gen 0000 - FFFF 1 0F01 9 Z1_Fwd_Gen 0.00 –100.00 Ω 0.01 Ω 20 10 Z1_Rev_Gen 0.00 –100.00 Ω 0.01 Ω 20 11 t_Z1_Gen 0.00 – 10.00 S 0.01 S 1 12 TrpLog_Z1_Gen 0000 - FFFF 1 0FFF 13 Z2_Fwd_Gen 0.00 –100.00 Ω 0.01 Ω 20 14 Z2_Rev_Gen 0.00 –100.00 Ω 0.01 Ω 20 15 t_Z2_Gen 0.00 – 10.00 S 0.01 S 1 16 TrpLog_Z2_Gen 0000 - FFFF 1 0FFF

Logic setting “1” - enable, “0” – disable 17 En_VCE_Ctrl_OC1_Gen 0，1 1 18 En_VCE_Ctrl_OC2_Gen 0，1 1 19 En_HVS.VCE_Ctrl_OC_Gen 0，1 0 20 Opt_VTS_Ctrl_OC_Gen 0，1 1 21 Opt_ExcMode_Gen 0，1 1

Chapter 7 Settings


No. Symbol Range Step Default 22 En_BO_OC2_Gen 0，1 1


1 No.1-- [V_NegOV_VCE_Gen]

Negative sequence voltage setting of composite voltage control element. Setting and displayed value of negative sequence voltage are U2.

Setting of negative sequence voltage relay shall be higher than unbalance voltage during normal operation, generally

nop.2 U) -0.08-(0.06 U =

Where: nU is secondary rated voltage.

Sensitivity factor shall be checked by phase-to-phase short circuit fault on HV side bus of main transformer:

2

min.2

opsen U

UK =

Where:

min.2U is minimum negative sequence voltage at location of the equipment during phase-to-phase

short circuit fault on HV side bus of main transformer. senK ≥ 1.5 is required.

2 NO.2—[Vpp_VCE_Gen]

Setting of phase-to-phase under voltage of composite voltage control element.

Its operating voltage opU can be set as following:

For turbine generator, gnU6.0Uop = and for hydro-generator, gnU7.0Uop =

Where gnU is rated phase-to-phase voltage of generator.

Sensitivity factor shall be checked by three-phase short circuit fault on HV side bus of main transformer:

)3(max.kt

opsen IX

UK

×=

Chapter 7 Settings


Where )3(max.kI is maximum secondary fault current during three-phase short circuit on HV side bus

of main transformer; tX is reactance of main transformer, tt ZX = . senK ≥ 1.2 is required.

3 NO.3—[I_OC1_Gen]


Setting of overcurrent relay shall be higher than rated current of generator.

gnr

relop I

KKI =

Where:

relK is reliability factor, 1.3 – 1.5;

rK is release factor, 0.85 – 0.95;

gnI is secondary rated current of generator.

Sensitivity factor of overcurrent relay shall be checked by following:

op

ksen I

IK)2(min.=

Where )2(min.kI is minimum fault current through location of the relay during phase-to-phase

metallic short circuit on HV side of main transformer. senK ≥ 1.2 is required.

4 NO.4—[t_OC1_Gen]

Time delay of overcurrent protection stage 1. Delay of this protection shall be higher than that of operation of backup protection of step-up transformer. This protection is used for islanding and generator shutting off.

5 NO.5—[TrpLog_OC1_Gen]

Tripping output logic setting of overcurrent protection stage 1.

6 NO.6—[I_OC2_Gen]

Setting of overcurrent protection stage 2. Setting of overcurrent relay shall be higher than rated current of transformer.

7 NO.7—[t_OC2_Gen]

Chapter 7 Settings


Time delay of overcurrent protection stage2.

8 NO.8—[TrpLog_OC2_Gen]

Tripping output logic setting of overcurrent protection stage2.

9 NO.9—[Z1_Fwd_Gen]

Positive direction impedance setting of distance protection stage1. Here positive direction means the direction is pointing to the transformer instead of generator itself.

If the value of this setting is greater than the next one, then the characteristic of distance protection is set as excursive impedance circle; if it is equal to the next one, the characteristic is whole impedance circle; if the next one is set as “0”, the characteristic becomes directional impedance.

Generally, low impedance protection is considered as the backup protection of generator in case that voltage-controlled overcurrent protection can’t satisfy the sensitivity requirement of generator.

10 NO.10—[Z1_Rev_Gen]

Negative direction impedance setting of distance protection stage1. In general, this setting is set as 5-10% of the positive direction impedance setting.

11 NO.11—[t_Z1_Gen]

Delay of distance protection stage1.

12 NO.12—[TrpLog_Z1_Gen]

Tripping output logic setting of distance protection stage 1.

13 NO.13—[Z2_Fwd_Gen]

Positive direction impedance setting of distance protection stage2.

14 NO.14—[Z2_Rev_Gen]

Negative direction impedance setting of distance protection stage2

15 NO.15—[t_Z2_Gen]

Delay of distance protection stage2

16 NO.16—[TrpLog_Z2_Gen]

Tripping output logic setting of distance protection stage1. Please refer to the tripping output logic setting of differential protection of main transformer for details.

17 NO.17—[En_VCE_Ctrl_OC1_Gen]

Enable controlling function to stage 1 of overcurrent protection by Composite Voltage Element.

18 NO.18—[En_VCE_Ctrl_OC2_Gen]

Enable controlling function to stage 2 of overcurrent protection by Composite Voltage Element.

19 NO.19—[En_HVS.VCE_Ctrl_OC_Gen]

Chapter 7 Settings


Enable Composite Voltage Element of HV side to control overcurrent protection of generator.

20 NO.19—[Opt_VTS_Ctrl_OC_Gen]


“1”: when VT circuit failure at one side is detected, composite voltage element will be disabled if corresponding logic setting is set as “1”.

“0”: when VT circuit failure at one side is detected, the voltage-controlled overcurrent element will become an pure overcurrent relay without composite voltage element controlling.

21 NO.21—[Opt_ExcMode_Gen]

That the setting is set as “1” indicates the excitation mode of generator is self shunt excitation mode. In that case, the protection will remember the current value at the initiation of fault, and operates based on it, no matter whether the current will decrease due to the descending excitation voltage result from terminal voltage’s getting down when external fault occurs. Once this setting is set as “1”, the backup overcurrent protection of generator is always controlled by composite voltage element.

22 NO.22—[Opt_BO_OC2_Gen]

Enable blocking function of overcurrent element stage 2 by outputting a set of contact.

Note:

In the above Table，current used in impedance protection of generator comes from the phase to phase current input channels at neutral point of generator.


Settings of generator phase-to-phase backup protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> GEN PPF BAK PROT --> [setting symbol].

7.3.10 Settings of earth fault protection of stator windings


Table 7-24 List of earth fault protection settings of stator windings No. Symbol Range Step Default 1 V_SensROV_Sta 0.10 – 50.00 V 0.01 V 2.0 2 V_UnsensROV_Sta 0.10 – 50.00 V 0.01 V 10 3 t_ROV_Sta 0.00 – 10.00 S 0.01 S 2 4 k_V3rdHRatio_PreSync_Sta 0.50 – 10.00 0.01 1 5 k_V3rdHRatio_PostSync_Sta 0.50 – 10.00 0.01 1 6 k_V3rdHDiff_Sta 0.10 – 2.00 0.01 1 7 t_V3rdH_Sta 0.00 – 10.00S 0.01 S 3 8 TrpLog_EF_Sta 0000 – FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable

Chapter 7 Settings


9 En_Alm_ROV_Sta 0，1 1 10 En_Trp_ROV_Sta 0，1 1 11 En_Alm_V3rdHRatio_Sta 0，1 1 12 En_Alm_V3rdHDiff_Sta 0，1 1 13 En_Trp_V3rdHRatio_Sta 0，1 0 14 En_Trp_UnsensRov_Sta 0，1 1


1 No.1-- [V_SensROV_Sta]

Setting of fundamental zero sequence overvoltage protection.

Setting of this protection opU shall be higher than maximum unbalance voltage max.unbU of single

phase VT at neutral point during normal operation.

max.unbrelop UKU =

Where relK is reliability factor, 1.2 – 1.3 generally; max.unbU is the maximum measured

fundamental unbalance zero sequence voltage derived from single VT at the neutral point of generator.

To assure its security, user should check the transferred zero sequence voltage through coupling capacitance between HV side and LV side of transformer when external earth fault occurs on the HV side of the transformer. Meanwhile, settings, including time delay and operation setting, should be considered to cooperate with that of earth fault protection of the system.

Note:

The zero sequence voltage used in this protection comes from VT at the neutral point of generator.

2 NO.2—[V_UnsensROV_Sta]

Setting of high-setting fundamental zero sequence overvoltage protection.

Only zero sequence voltage at neutral point is taken for high setting zone of fundamental zero sequence voltage protection. Its setting is usually 20 V – 25 V.

Zero sequence voltage transferred by coupling capacitance per phase between HV and LV side windings of step-up transformer shall be checked when external fault occurs at HV side of the transformer. Coordination both on setting and delay between this protection and system earth fault protection could be achieved then.

3 NO.3—[t_ROV_Sta]

Delay of fundamental zero sequence overvoltage protection.

Chapter 7 Settings


4 NO.4—[k_V3rdHRatio_PreSync_Sta]

Ratio setting of 3rd harmonics before incorporation of generator in power network.

Let third harmonic voltage at the end and neutral point of generator be tU•

and nU•

, ratio setting of

third harmonic voltage percentage earth fault protection shall be

α>••

nt UU

and 0

3

TV

TVNrel n

nK ×=α during pre-configuration,

Where:

relK is reliability factor, 1.3 – 1.5 in general;

0TVn is ratio of open-delta zero sequence voltage at the terminal of generator;

TVNn is ratio of zero sequence VT on neutral point.

During incorporation of generator to power system, the ratio / UU 3N3T changes considerably

owing to variation of equivalent capacitive reactance at generator terminal. So two different settings are designed for protection before and after connection of generator with system, and these two settings can be switched over with alternation of contacts’ position of the terminal breaker.

The setting shall be (1.3 – 1.5)× 1α before incorporation and (1.3 – 1.5)× 2α after that.

Where 1α and 2α are the maximum real-measured third harmonic voltage ratio before and after incorporation respectively.

5 NO.5—[k_V3rdHRatio_PostSync_Sta]

Ratio setting of 3rd harmonics after incorporation in power network.

6 NO.6—[k_V3rdHDiff_Sta]

Restraint coefficient of percentage third harmonic voltage earth fault protection.

••••

>− nzdnpt UkUkU

Where:

Chapter 7 Settings


pk& is vectorial automatic tracing regulation factor;

zdk is restraint factor [k_V3rdHDiff_Sta], 0.3 is recommended.

tU is 3rd harmonics derived from the terminal of generator.

nU is 3rd harmonics derived from the neutral point of generator.

7 NO.7—[t_V3rdH_Sta]

Delay of percentage third harmonic voltage earth fault protection. It shall be longer than that of backup protection against external fault .

8 NO.8—[TrpLog_EF_Sta]

Tripping output logic setting of stator earth fault protection.

9 NO.9—[En_Alm_ROV_Sta]

Enable alarm function of zero sequence overvoltage.

10 NO.10—[En_Trp_ROV_Sta]

Enable zero sequence overvoltage protection.

11 NO.11—[En_Alm_V3rdHRatio_Sta]

Enable alarm function of third harmonic voltage ratio element .

12 NO.12—[En_Alm_V3rdHDiff_Sta]

Enable alarm function of third harmonics differential voltage.

13 NO.13—[En_Trp_V3rdHRatio_Sta]

Enable tripping function of third harmonic voltage ratio element.

14 NO.14—[En_Trp_UnsensRov_Sta]

Enable tripping function of high-setting zero sequence overvoltage protection


Settings of stator earth fault protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> STA EF PROT --> [setting symbol].

7.3.11 Settings of earth fault protection of rotor


Table 7-25 List of earth fault protection settings of rotor No. Symbol Range Step Default

Chapter 7 Settings


1 R_Sens_1PEF_RotWdg 0.10 –100.00 kΩ 0.01 kΩ 20 2 R_1PEF_RotWdg 0.10 –100.00 kΩ 0.01 kΩ 20 3 t_1PEF_RotWdg 0.00 – 10.00 S 0.01 S 1 4 V2ndH_VCE_2PEF_RotWdg 0.10 – 10.00 V 0.01 V 2 5 t_2PEF_RotWdg 0.00 - 10.00 S 0.01 S 1 6 TrpLog_EF_RotWdg 0000 – FFFF 1 0FFF

Logic setting “1” - enable, “0” – disable 7 En_Alm_Sens_1PEF_RotWdg 0，1 1 8 En_Alm_1PEF_RotWdg 0，1 1 9 En_Trp_1PEF_RotWdg 0，1 1 10 En_2PEF_RotWdg 0，1 1 11 En_VCE_2PEF_RotWdg 0，1 0

7.3.11.2 Explanation of setting

1 NO.1—[R_Sens_1PEF_RotWdg]

Impedance setting of sensitive stage of one-point earth fault protection of rotor.

General specification of generator specifies that insulation resistance of its excitation winding shall be higher than 1 MΩ for air cooled and hydrogen-cooled turbine generator during cooling state, and 2 kΩ for water cooled excitation winding. General specification of hydro-generator specifies that insulation resistance of its excitation winding shall be higher than 0.5 kΩ in any case.

Sensitive stage of this protection is used for alarm. Its setting could be 20 kΩ – 80 kΩ generally.

2 NO.2—[R_1PEF_RotWdg]

Impedance setting of one-point earth fault protection of rotor.

Setting of one point earth fault protection can be 20 kΩ for air cooled and hydrogen-cooled turbine generator and 2.5 kΩ for water cooled excitation winding. This protection can be used for alarm or generator shutting with delay.

Actual measured insulation resistance is used for this protection.

3 NO.3—[t_1PEF_RotWdg]

Delay of one-point earth fault protection of rotor.

4 NO.4--[V2ndH_VCE_2PEF_RotWdg]

Second harmonics voltage setting of two-point earth fault protection of rotor.

5 NO.5—[t_2PEF_RotWdg]

Delay of two-point earth fault protection of rotor.

6 NO.6—[TrpLog_EF_RotWdg]

Tripping output logic setting of earth fault protection of rotor.

Chapter 7 Settings


7 NO.7—[En_Alm_Sens_1PEF_RotWdg]

Enable alarm function of sensitive stage of one-point earth fault protection of rotor.

8 NO.8—[En_Alm_1PEF_RotWdg]

Enable alarm function of one-point earth fault protection of rotor.

9 NO.9—[En_Trp_1PEF_RotWdg]

Enable tripping function of one-point earth fault protection of rotor.

10 NO.10—[En_2PEF_RotWdg]

Enable two-point earth fault protection of rotor.

11 NO.11—[En_VCE_2PEF_RotWdg]

Enable second harmonics used in two-point earth fault protection of rotor.


Settings of rotor earth fault protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> ROTWDG EF PROT --> [setting symbol].

7.3.12 Settings of thermal overload protection of stator


Table 7-26 List of thermal overload protection settings of stator No. Symbol Range Step Default 1 I_OvLd_Sta 0.10 – 50.00 A 0.01 A 10 2 t_OvLd_Sta 0.00 – 10.00 S 0.01 S 1 3 TrpLog_OvLd_Sta 0000 – FFFF 1 000F 4 I_Alm_OvLd_Sta 0.10 – 50.00 A 0.01 A 7 5 t_Alm_OvLd_Sta 0.00 – 10.00 S 0.01 S 2 6 I_InvOvLd_Sta 0.10 – 100.00 A 0.01 A 6 7 tmin_InvOvLd_Sta 0.10 – 10.00 S 0.01 S 1 8 A_Therm_Sta 1.00 –100.00 0.01 40 9 Kb_Therm_Sta 0.00 – 10.00 0.01 1 10 TrpLog_InvOvLd_Sta 0000 – FFFF 1 7FFF


1 NO.1—[I_OvLd_Sta]

Setting of definite time overcurrent protection.

Setting of this protection is determined by the requirement of reliable release during permissive continuous load current of generator.

Chapter 7 Settings


r

gnrelOP K

IKI =

Where:

relK is reliability factor, 1.05 generally;



Delay of this protection shall be longer than maximum delay of backup protection. Alarm will be issued or load will be reduced when it operates.

2 NO.2—[t_OvLd_Sta]

Delay of definite time overcurrent protection.

3 NO.3—[TrpLog_OvLd_Sta]

Tripping output logic setting of definite time overcurrent protection.

4 NO.4-- [I_Alm_OvLd_Sta]

Setting of definite time overcurrent alarm.

5 NO.5—[t_Alm_OvLd_Sta]

Delay of alarm issued by definite time overcurrent element.

6 NO.6—[I_InvOvLd_Sta]

Pickup current of inverse time overcurrent protection.

Characteristic of this protection is indefinite time relationship between multiple of load current and corresponding permissive duration which is determined by permissive overload capability of stator provided by the factory.

22* sr

tc

KIKt−

=

Where:

tcK is heat capacity factor of stator winding;

*I is per unit value of load current referred to rated current of stator;

Chapter 7 Settings


srK is heat dissipation factor, 1.0 – 1.05 generally.

Minimum delay for upper limit of this protection shall coordinate with unrestraint protection. Current setting of lower limit of this protection shall coordinate with definite time overload protection mentioned above, namely

sr

gnrelCOP K

IKKI 0min. =

Where: 0CK is coordination factor, 1.05 in general.

7 NO.7—[tmin_InvOvLd_Sta]

Delay of upper limit of inverse time overcurrent protection.

8 NO.8—[A_Therm_Sta]

Thermal capacity parameter of stator winding.

9 NO.9—[Kb_Therm_Sta]

Heat dissipation factor for inverse time overcurrent.

10 NO.10—[TrpLog_InvOvLd_Sta]

Tripping output logic setting of inverse time overcurrent protection.


Settings of stator overload protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> STA OVLD PROT --> [setting symbol].

7.3.13 Settings of negative sequence overload protection of stator


Table 7-27 List of negative sequence overload protection No. Symbol Range Step Default 1 I_NegOC_Sta 0.10 – 20.00 A 0.01 A 10 2 t_NegOC_Sta 0.00 – 10.00 S 0.01 S 1 3 TrpLog_NegOC_Sta 0000 - FFFF 1 000F 4 I_Alm_NegOC_Sta 0.10 – 20.00 A 0.01 A 1.0 5 t_Alm_NegOC_Sta 0.00 – 10.00 S 0.01 S 2 6 I_InvNegOC_Sta 0.05 – 5.00 A 0.01 A 0.5 7 I2 _Perm_Sta 0.05 – 5.00 A 0.01 A 0.4 8 tmin_InvNegOC_Sta 0.00 – 10.00 S 0.01 S 1 9 A_Therm_RotBody 1 – 100.00 0.01 40 10 TrpLog_InvNegOC_Sta 0000 - FFFF 1 7FFF

Chapter 7 Settings



1 NO.1—[I_NegOC_Sta]

Setting of definite time negative sequence overcurrent protection.

Setting of this protection is determined by the threshold under which this protection can release

reliably, that threshold value is continuously permissive negative sequence current ∞2I . So,

r

gnrelOP K

IIKI ∞= 2

Where:

OPI is the setting [I_NegOC_Sta].

relK is reliability factor, 1.05;


∞2I is per unit value of continuously permissive negative sequence current,


2 NO.2—[t_NegOC_Sta]

Delay of definite time negative sequence overcurrent protection.

Delay of this protection shall be longer than maximum delay of backup protection. Alarm will be issued when it operates.

3 NO.3—[TrpLog_NegOC_Sta]

Tripping output logic setting of definite time negative sequence overcurrent protection.

4 NO.4—[I_Alm_NegOC_Sta]

Setting of alarm issued by negative sequence overcurrent element.

5 NO.5—[t_Alm_NegOC_Sta]

Delay of alarm issued by negative sequence overcurrent element.

6 NO.6—[I_InvNegOC_Sta]

Pickup current of inverse time negative sequence overcurrent protection.

Chapter 7 Settings


Characteristic of this protection is determined by permissive negative sequence overload capability of rotor surface provided by the manufacturer.

22

2*2 ∞−

=II

At

Where:

A is permissive negative sequence current factor of rotor surface;

*2I is per unit value of negative sequence current of generator;

∞2I is per unit value of permissive continues negative sequence current.

Minimum delay for upper limit of this protection shall coordinate with unrestraint protection.

7 NO.7—[I2_Perm_Sta]

Permitted continuous currents of inverse time negative sequence overcurrent protection for lasting operation.

Current setting of lower limit of this protection shall be the operating current corresponding to delay 1000 s, namely

22min. 1000 ∞+= IAIOP

This protection is used for Islanding or program tripping.

8 NO.8—[tmin_InvNegOC_Sta]

Delay of upper limit of inverse negative sequence overcurrent protection. Minimum delay for upper limit of this protection shall coordinate with unrestraint protection.

9 NO.9—[A_Therm_RotBody]

Heat dissipation factor for inverse time negative sequence overcurrent.

10 NO.10—[TrpLog_InvNegOC_Sta]

Tripping output logic setting of inverse time overcurrent protection.


Settings of stator negative sequence overcurrent protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> STA NEGOC PROT --> [setting symbol].

Chapter 7 Settings


7.3.14 Settings of Loss-of-Excitation protection of generator


Table 7-28 List of loss-of-excitation protection of generator No. Symbol Range Step Default 1 X1_LossExc_Gen 0.00 -100.00 Ω 0.01 Ω 5 2 X2_LossExc_Gen 0.00 -100.00 Ω 0.01 Ω 20 3 Q_RevQ_LossExc_Gen 0.01 – 50.00 % 0.01 % 10 4 V_RotUV_LossExc_Gen 1.0 – 500.00 V 0.01 V 30 5 V_RotNoLoad_LossExc_Gen 1.0 – 500.00 V 0.01 V 50 6 k_RotUV_LossExc_Gen 0.10 – 10.00 (pu) 0.01 (pu) 2 7 V_BusUV_LossExc_Gen 10.00 – 100.00 V 0.01 V 85 8 P_UP_LossExc_Gen 10 – 100.00 % 0.01 % 50.0 9 t_LossExc1_Gen 0.10 – 10.00 S 0.01 S 0.5 10 t_LossExc2_Gen 0.10 – 10.00 S 0.01 S 1.0 11 t_LossExc3_Gen 0.10 – 3000.00 S 0.01 S 3.0 12 TrpLog_LossExc1_Gen 0000 - FFFF 1 7FFF 13 TrpLog_LossExc2_Gen 0000 - FFFF 1 7FFF 14 TrpLog_LossExc3_Gen 0000 - FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 15 En_Z_LossExc1_Gen 0，1 1 16 En_RotUV_LossExc1_Gen 0，1 1 17 En_P_LossExc1_Gen 0，1 0 18 En_BusUV_LossExc2_Gen 0，1 1 19 En_Z_LossExc2_Gen 0，1 1 20 En_RotUV_LossExc2_Gen 0，1 1 21 En_Z_LossExc3_Gen 0，1 1 22 En_RotUV_LossExc3_Gen 0，1 1 23 En_Alm_LossExc1_Gen 0，1 0 24 Opt_Z_LossExc_Gen 0，1 1 25 En_RevQ_LossExc_Gen 0，1 0 26 Opt_UV_LossExc_Gen 0，1 0


1 NO.1—[X1_LossExc_Gen]

Impedance setting1 of loss-of-excitation protection. In the following figure,

Chapter 7 Settings


R

jx

Xa

Xb

Xc

Figure 7.3.1 Impedance circle of loss of excitation protection

For asynchronous impedance cycle, this setting represents for aX , and the next setting (NO.2) is

bX . Here

vgn

agnda nS

nUXX××

×−=2'

2

vgn

agnddb nS

nUXXX××

×+−=2'

)2

(

Where:

'dX and dX are unsaturated per unit value of transient reactance and synchronous reactance of

generator,

gnU and gnS are rated voltage and rated apparent power of generator;

an and vn are CT ratio and VT ratio.

For steady state stability limit circle, this setting represents for CX , and the next setting (NO.2) is

bX , here

vgn

agnsc nS

nUXX

××

×=2

vgn

agnddb nS

nUXXX××

×+−=2'

)2

(

Chapter 7 Settings


Where:

sX is equivalent reactance on system side (including step-up transformer) connected with the

generator (per unit value, reference capacity is apparent power of the generator).

Asynchronous impedance circle and steady state stability limit circle can be selected by logic setting [Opt_Z_LossExc_Gen] (No. 24).

For practical project, impedance between asynchronous impedance circle and steady state stability limit circle can be selected for optimal combination of reliability and speed.

2 NO.2—[X2_LossExc_Gen]

Impedance setting2 of loss-of-excitation protection

3 NO.3—[Q_RevQ_LossExc_Gen]

Reverse power setting of reactive power

Reverse reactive power criterion:

gn

jxrelzd P

QKQ ×=

Where:

relK is reliability factor, 1 - 1.3;

jxQ is permissive incoming reactive power to the generator;

gnP is rated active power of the generator.

Reverse reactive power criterion can be selected by logic setting [En_RevQ_LossExc_Gen] (NO. 26).

4 NO.4—[V_RotUV_LossExc_Gen]

Low voltage setting of rotor. There are two low voltage setting of rotor, they are

a) Excitation undervoltage criterion

0. fdrelopfd UKU ×=

Where:

opfdU . is this setting.

Chapter 7 Settings



0fdU is rated excitation voltage of the generator without load, i.e. NO.5 setting.

b) Variable excitation voltage criterion

For a generator connecting with power system, there is a necessary excitation voltage 0fdU for

keeping steady state stability.

Variable excitation voltage criterion is

n

tfdxsopfd S

PPUKU −××≤ 0.

)( Sdrelxs XXKK +×=

Where:

xsK is rotor voltage criterion coefficient, i.e. NO. 6 setting.


dX and SX are per unit value of synchronous reactance of generator and equivalent reactance of

system connecting with the generator (referred to rated capacity of the generator);

P is current active power of the generator;

Pt is the salient pole power of generator, i.e. NO. 8 setting.

0fdU is rated excitation voltage of generator without load;

5 NO.5—[V_RotNoLoad_LossExc_Gen]

Rated excitation voltage of the generator without load.

6 NO.6—[k_RotUV_LossExc_Gen]

Restrained coefficient of low voltage criterion of rotor.

7 NO.7—[V_BusUV_LossExc_Gen]

Low voltage setting for busbar undervoltage criterion.

This criterion is used mainly to prevent voltage collapse due to loss of excitation of generator for a system without enough spare reactive power. Voltage on bus of system side is adopted for this

Chapter 7 Settings


criterion.

Under voltage criterion for three phase simultaneously:

min.3. hrelphop UKU ×=

Where:


min.hU is minimum normal operation voltage of HV side of the system.

This criterion can also be configured as 0.85 – 0.90 times of terminal voltage of generator.

8 NO.8—[P_UP_LossExc_Gen]

Power setting for reducing power output. This criterion is configured as 40% - 50% of rated capacity of the generator.

9 NO.9—[t_LossExc1_Gen]

Delay of loss-of-excitation protection stage 1





12 NO.12—[TrpLog_LossExc1_Gen]

Tripping output logic setting of loss-of-excitation protection stage1





15 NO.15—[En_Z_LossExc1_Gen]

Enable impedance criterion in loss-of-excitation protection stage1

16 NO.16—[En_RotUV_LossExc1_Gen]

Enable the criterion of rotor voltage in loss-of-excitation protection stage1

17 NO.17—[En_P_LossExc1_Gen]

Enable power-reducing criterion in loss-of-excitation protection stage1

Chapter 7 Settings


18 NO.18—[En_BusUV_LossExc2_Gen]

Enable the low voltage criterion of busbar in loss-of-excitation protection stage2


Enable impedance criterion in loss-of-excitation protection stage2




Enable impedance criterion in loss-of-excitation protection stage3.



23 NO.23—[En_Alm_LossExc1_Gen]

Enable alarm function of loss-of-excitation protection stage1

24 NO.24—[Opt_Z_LossExc_Gen]

Impedance circle option.

“0”, choose steady state stability circle.

“1”, choose asynchronous impedance cycle.

25 NO.25—[En_RevQ_LossExc_Gen]

Enable reverse power criterion

26 NO.26—[Opt_UV_LossExc_Gen]

Enable low voltage criterion.

Note:

Following criterion are recommended for various stages of this protection:

Criterion Stage 1 Stage 2 Stage 3 Stator side impedance √ √ √ Under voltage criterion of system √ Rotor voltage √ √ √ Reducing power output √ Delay ( s ) 0.5 – 1.0 0.5 – 1.0 Long delay


Settings of generator loss-of-excitation protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> GEN LOSSEXC PROT --> [setting symbol].

Chapter 7 Settings


7.3.15 Settings of out-of-step protection of generator


Table 7-29 List of out-of-step protection of generator No. Symbol Range Step Default 1 Za_OOS_Gen 0.00 –100.00 Ω 0.01 Ω 10 2 Zb_OOS_Gen 0.00 –100.00 Ω 0.01 Ω 5 3 Zc_OOS_Gen 0.00 –100.00 Ω 0.01 Ω 5 4 φ_Reach_OOS_Gen 60.00 – 90.00 ° 0.1 ° 85 5 φ_Inner_OOS_Gen 60.00 –150.00 ° 0.1 ° 120 6 n_Slip_Ext_OOS_Gen 1-1000 1 5 7 n_Slip_Int_OOS_Gen 1-1000 1 2 8 Ibrk_TCB 1.00 – 100.00 A 0.01 A 10 9 TrpLog_OOS_Gen 0000 - FFFF 0.01 1FFF

Logic setting “1” - enable, “0” – disable 10 En_Alm_Ext_OOS_Gen 0，1 1 11 En_Trp_Ext_OOS_Gen 0，1 1 12 En_Alm_Int_OOS_Gen 0，1 1 13 En_Trp_Int_OOS_Gen 0，1 1


Out-of-step protection operates only when out-of-step occurs in power system. Then, based on situation at that time, the dispatching center will adopt islanding, generator shutting or restraint and other necessary measures. Only if center of oscillation situates within the generator or near the generator, or the oscillation lasts too long, and phase difference of electro-motive force between two sides of the breaker less than 90°, this protection will trip.

Characteristic of this protection comprises three parts: lens part ②, boundary part ① and reactance line part ③. See the following figure.

R

jx

0

Zc

Za

Zb

OL

U

ORIR

IL

3

2

1

1

D

L R

φα

Figure 7-1 Impedance of out-of-step protection

1 NO.1—[Za_OOS_Gen]

Chapter 7 Settings


Impedance setting A of out-of-step protection.

Refer to Figure 7-1, this setting can be set by means of the following formula.

vgn

agnCSa nS

nUXXZ

××

×+=2

)(

Where:

CX is per unit value of equivalent reactance of transformer connecting to the generator;

SX is equivalent reactance of power system network;

gnU and gnS are rated voltage and rated apparent power of generator;

an and vn are CT ratio and VT ratio.

2 NO.2—[Zb_OOS_Gen]

Impedance setting B of out-of-step protection.

Refer to Figure 7-1, this setting can be set by means of the following formula.

vgn

agndb nS

nUXZ

××

×−=2

'

Where:

'dX is transient reactance of generator;

3 NO.3—[Zc_OOS_Gen]

Impedance setting C of out-of-step protection. Reactance line is the dividing line of oscillation center. Refer to Figure 7-1, this setting can be set by means of the following formula. In practice, 0.9 times of transformer impedance is recommended.

vgn

agncc nS

nUXZ

×

×××=

2

9.0

4 NO.4—[φ_Reach_OOS_Gen]

Reach angle of system impedance.

φ = 80°- 85°according to the real angle of system.

5 NO.5—[φ_Inner_OOS_Gen]

Internal angle of lens characteristic α . The following formula is for reference,

Chapter 7 Settings


ba

r

ZZZ+

−°=2arctan2180α

min.3.11

Lr RZ ≤

Where min.LR is minimum load impedance of generator.

6 NO.6—[n_Slip_Ext_OOS_Gen]

Pole sliding number setting for external fault of generator. When the oscillation center situates outside the protected section, times of pole sliding shall be set as 2 – 15 for alarm and more than 15 for tripping.

7 NO.7—[n_Slip_Int_OOS_Gen]

Pole sliding number setting for internal fault of generator. When the oscillation center situates within the protected section, time of pole sliding shall be set as 1-2 in general.

8 NO.8—[Ibrk_TCB]

Tolerating current of breaker in tripping. This is an auxiliary criterion and is determined by interruption capacity of the circuit breaker.

9 NO.9—[TrpLog_OOS_Gen]

Tripping output logic setting of out-of-step protection.

10 NO.10—[En_Alm_Ext_OOS_Gen]

Enable alarm in out-of-step case outside the generator.

11 NO.11—[En_Trp_Ext_OOS_Gen]

Enable tripping in out-of-step case outside the generator.

12 NO.12—[En_Alm_Int_OOS_Gen]

Enable alarm in out-of-step case inside the generator.

13 NO.13—[En_Trp_Int_OOS_Gen]

Enable tripping in out-of-step case inside the generator.


Settings of generator out-of-step protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> GEN OOS PROT --> [setting symbol].

Chapter 7 Settings


7.3.16 Settings of voltage protection


Table 7-30 List of voltage protection settings No. Symbol Range Step Default 1 V_OV1_Gen 10.0 –170.00 V 0.01V 150 2 t_OV1_Gen 0.10 – 10.00 S 0.01S 0.3 3 TrpLog_OV1_Gen 0000 – FFFF 1 7FFF 4 V_OV2_Gen 10.0 –170.00 V 0.01V 130 5 t_OV2_Gen 0.10 – 10.00 S 0.01S 0.5 6 TrpLog_OV2_Gen 0000 – FFFF 1 7FFF 7 V_UV_Gen 10.0 –100.00 V 0.01V 80 8 t_UV_Gen 0.10 – 10.00 S 0.01S 1.5 9 TrpLog_UV_Gen 0000 – FFFF 1 7FFF


1 NO.1—[V_OV1_Gen]

Voltage setting of overvoltage protection stage 1.

Setting of overvoltage protection of stator shall base on permissive overvoltage capability provided by the factory or insulation condition of the stator.

For turbo-generator with capacity more than 200 MW,

gnop UU 3.1=

Where:

gnU is the secondary rated phase-to-phase voltage.

This is used for islanding and excitation shutting with delay 0.5 s.

For hydro-generator,

gnop UU 5.1=


For hydro-generator with SCR excitation,

gnop UU 3.1=


2 NO.2—[t_OV1_Gen]

Delay of overvoltage protection stage1.

3 NO.3—[TrpLog_OV1_Gen]

Tripping output logic setting of overvoltage protection stage1.

Chapter 7 Settings


4 NO.4—[V_OV2_Gen]

Voltage setting of overvoltage protection stage 2.

5 NO.5—[t_OV2_Gen]

Delay of overvoltage protection stage2.

6 NO.6—[TrpLog_OV2_Gen]

Tripping output logic setting of overvoltage protection stage2.

7 NO.7—[V_UV_Gen]

Voltage setting of under voltage protection

8 NO.8—[t_UV_Gen]

Delay of under voltage protection

9 NO.9—[TrpLog_UV_Gen]

Tripping output logic setting of under voltage protection.


Settings of generator voltage protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> GEN VOLT PROT --> [setting symbol].

7.3.17 Settings of overexcitation protection of generator


Table 7-31 List of over excitation protection settings of generator No. Symbol Range Step Default 1 k_OvExc1_Gen 1.00 – 2.00 0.01 1.4 2 t_OvExc1_Gen 0.1 – 3000.0 S 0.1 S 1 3 TrpLog_OvExc1_Gen 0000 - FFFF 1 000F 4 k_OvExc2_Gen 0.10 – 2.00 0.01 1.2 5 t_OvExc2_Gen 0.1 – 3000.0 S 0.1 S 20 6 TrpLog_OvExc2_Gen 0000 - FFFF 1 0F01 7 k_Alm_OvExc_Gen 1.00 – 2.00 0.01 1.1 8 t_Alm_OvExc_Gen 0.1 – 10.00 S 0.1 S 10 9 k0_InvOvExc_Gen 1.00 – 2.00 0.01 1.5 10 t0_InvOvExc_Gen 1.0 – 3000.0 S 0.1 S 1 11 k1_InvOvExc_Gen 1.00 – 2.00 0.01 1.45 12 t1_InvOvExc_Gen 1.0 – 3000.0 S 0.1 S 2 13 k2_InvOvExc_Gen 1.00 – 2.00 0.01 1.4 14 t2_InvOvExc_Gen 1.0 – 3000.0 S 0.1 S 5 15 k3_InvOvExc_Gen 1.00 – 2.00 0.01 1.3 16 t3_InvOvExc_Gen 1.0 – 3000.0 S 0.1 S 15

Chapter 7 Settings


No. Symbol Range Step Default 17 k4_InvOvExc_Gen 1.00 – 2.00 0.01 1.25 18 t4_InvOvExc_Gen 1.0 – 3000.0 S 0.1 S 30 19 k5_InvOvExc_Gen 1.00 – 2.00 0.01 1.2 20 t5_InvOvExc_Gen 1.0 – 3000.0 S 0.1 S 100 21 k6_InvOvExc_Gen 1.00 – 2.00 0.01 1.15 22 t6_InvOvExc_Gen 1.0 – 3000.0 S 0.1 S 300 23 k7_InvOvExc_Gen 1.00 – 2.00 0.01 1.1 24 t7_InvOvExc_Gen 1.0 – 3000.0 S 0.1 S 1000 25 TrpLog_InvOvExc_Gen 0000 - FFFF 1 7FFF


1 NO.1—[k_OvExc1_Gen]

Setting of stage 1 of definite time over excitation protection.

3.1==== ∗∗ / fU f

fU

U

BB N

gn

gn

n

or data provided by the factory

2 NO.2—[t_OvExc1_Gen]

Delay of stage 1 of definite time over excitation protection .

3 NO.3—[TrpLog_OvExc1_Gen]

Tripping output logic setting of stage 1 of definite time over excitation protection. The function of this protection is used for islanding, excitation shutting or programming, excitation reducing etc.

4 NO.4—[k_OvExc2_Gen]

Setting of stage 2 of definite time over excitation protection.

5 NO.5—[t_OvExc2_Gen]

Delay of stage 2 of definite time over excitation protection .

6 NO.6—[TrpLog_OvExc2_Gen]

Tripping output logic setting of stage 2 of definite time over excitation protection.

7 NO.7—[k_Alm_OvExc_Gen]

Setting of over excitation alarm. Setting of alarm shall be lower than that of over excitation protection. 1.1 is recommended.

8 NO.8—[t_Alm_OvExc_Gen]

Delay of over excitation alarm.

9 NO.9—[k0_InvOvExc_Gen]

Chapter 7 Settings


Upper limit of inverse time over excitation protection—n0

10 NO.10—[t0_InvOvExc_Gen]

Delay of upper limit of inverse time over excitation protection.


Inverse time over excitation factor1—n1. Setting range of various inverse time over excitation coefficient s is 1.1 – 2.0. However setting of upper limit (NO.9) of over excitation factor n0 shall be higher than that of over excitation factor1 n1, that of factor1 n1 shall be higher than that of factor2 n2, etc.. Finally, setting of over excitation factor6 n6 (NO.23) shall be higher than that of lower limit.



The range of delay of various inverse time over excitation protection stage is 0s to 6000 s, ie.,0--50 min. Delay of upper limit (NO.10) of over excitation factor shall be shorter than that of over excitation factor1, that of factor1 shall be shorter than that of factor2, etc.. Finally, delay of over excitation factor6 (NO.22) shall be shorter than that of lower limit (NO.24).


Inverse time over excitation factor n2.



















Chapter 7 Settings






25 NO.25—[TrpLog_InvOvExc_Gen]

Tripping output logic setting of inverse time over excitation protection.


Settings of generator overexcitation protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> GEN OVEXC PROT --> [setting symbol]

7.3.18 Settings of power protection of generator


Table 7-32 List of power protection settings of generator No. Symbol Range Step Default 1 P_RevP_Gen 0.50 – 10.00 % 0.01% 2 2 t_Alm_RevP_Gen 0.10 – 25.00 S 0.1 S 10 3 t_Trp_RevP_Gen 0.10 – 600.0 S 0.1 S 10 4 TrpLog_RevP_Gen 0000 – FFFF 1 7FFF 5 P_UP_Gen 1.00 – 200.00 % 0.01 % 20 6 t_UP_Gen 0.00 – 300.00 M 0.01 M 10 7 TrpLog_UP_Gen 0000 – FFFF 1 7FFF 8 P_SeqTrp_RevP_Gen 0.50 – 10.00 % 0.01 % 2 9 t_SeqTrp_RevP_Gen 0.10 – 10.00 S 0.01 S 1 10 TrpLog_SeqTrp_RevP_Gen 0000 – FFFF 1 7FFF


1 NO.1—[P_RevP_Gen]

Power setting of reverse power protection.

)( 21 PPKP relop +=

Where:

relK is reliability coefficient, 0.5 – 0.8 generally;

1P is minimum loss of turbine during reverse power operation, 2% - 4% of rated power generally;

2P is minimum loss of generator during reverse power operation, gnPP )1(2 η−= generally, η

Chapter 7 Settings


is efficiency factor of generator, 98.6% - 98.7%;

gnP is rated power of generator.

opP is set as 1% - 2% of rated active power generally, and 1% is recommended.

2 NO.2—[t_Alm_RevP_Gen]

Delay of reverse power alarm. For reverse power protection without steam valve contact blocking, delay 15 s for alarm.

3 NO.3—[t_Trp_RevP_Gen]

Delay of reverse power protection. For reverse power protection without steam valve contact blocking, according to permissive operation time of reverse power, delay 1 min – 3 min is set for islanding in general.

For program reverse power protection with steam valve contact blocking, delay 0.5 s – 1.00 s is set for islanding.

4 NO.4—[TrpLog_RevP_Gen]

Tripping output logic setting of reverse power protection.

5 NO.5—[P_UP_Gen]

Power setting of low power protection.

6 NO.6—[t_UP_Gen]

Power setting of low power protection.

7 NO.7—[TrpLog_UP_Gen]

Tripping output logic setting of low power protection.

8 NO.8—[P_SeqTrp_RevP_Gen]

Power setting of sequent-tripping reverse power protection.

9 NO.9—[t_SeqTrp_RevP_Gen]

Delay of sequent-tripping reverse power protection.

For sequent-tripping reverse power protection with steam valve contact blocking, delay 0.5 s – 1.00 s for islanding.

10 NO.10—[TrpLog_SeqTrp_RevP_Gen]

Tripping output logic setting of sequent-tripping reverse power protection.


Settings of generator power protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> GEN PWR PROT --> [setting symbol].

Chapter 7 Settings


7.3.19 Settings of underfrequency and overfrequency protection of generator


Table 7-33 List of frequency protection settings No. Symbol Range Step Default

1 f_UF1_Gen 45.00 – 51.00 Hz 0.01 Hz 48.5 2 t_UF1_Gen 0.00 –300.00 min 0.01min 10 3 f_UF2_Gen 45.00 – 51.00 Hz 0.01 Hz 48 4 t_UF2_Gen 0.00 –300.00 min 0.01min 10 5 f_UF3_Gen 45.00 – 51.00 Hz 0.01 Hz 47.5 6 t_UF3_Gen 0.00 –100.00 min 0.01 min 10 7 f_UF4_Gen 45.00 – 51.00 Hz 0.01 Hz 46 8 t_UF4_Gen 0.00 –100.00 min 0.01 min 10 9 TrpLog_UF_Gen 0000 - FFFF 1 7FFF 10 f_OF1_Gen 50.00 – 60.00 Hz 0.01 Hz 51.5 11 t_OF1_Gen 0.10 –100.00 min 0.01min 10 12 f_OF2_Gen 50.00 – 60.00 Hz 0.01 Hz 55 13 t_OF2_Gen 0.10 –100.00 S 0.01 S 10 14 TrpLog_OF_Gen 0000 - FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 15 En_Alm_UF1_Gen 0，1 1 16 En_Trp_UF1_Gen 0，1 0 17 En_Alm_UF2_Gen 0，1 1 18 En_Trp_UF2_Gen 0，1 0 19 En_Alm_UF3_Gen 0，1 1 20 En_Trp_UF3_Gen 0，1 0 21 En_Alm_UF4_Gen 0，1 1 22 En_Trp_UF4_Gen 0，1 0 23 En_Alm_OF1_Gen 0，1 1 24 En_Trp_OF1_Gen 0，1 0 25 En_Alm_OF2_Gen 0，1 1 26 En_Trp_OF2_Gen 0，1 1 27 En_BO_UC_OvSp_Gen 0，1 0


1 NO.1—[f_UF1_Gen]

Frequency setting of under frequency protection stage1.

Permissive range of frequency during operation for large turbo-generator with capacity more than 300 MW is 48.5 Hz – 50.5 Hz.

Recommended permissive operation time of abnormal frequency for large generator is as follows. Table 7-34 Operating time under differential frequency

Chapter 7 Settings


Freq. Permissive operating time Freq. Permissive operating time

Hz accumulated, min once, s Hz accumulated, min once, s

51.5 30 30 48.0 300 300

51.0 180 180 47.5 60 60

48.5-50.5 continuous 47.0 10 10

Three stages of under frequency protection are provided in which function of accumulated operating time is equipped for stage 1(NO.2 setting).

Two zones of over frequency protection are provided, in which no function of accumulated operating time is equipped.

Each zone can be used for alarm or tripping by configuration of logic setting.

2 NO.2—[t_UF1_Gen]

The sum of delay setting of under frequency protection stage1.



4 NO.4-- [t_UF2_Gen]

Delay of under frequency protection stage2.









9 NO.9—[TrpLog_UF_Gen]

Tripping output logic setting of under frequency protection.

10 NO.10—[f_OF1_Gen]

Frequency setting of over frequency protection stage1.

11 NO.11—[t_OF1_Gen]

Delay of over frequency protection stage1.

12 NO.12—[f_OF2_Gen]

Chapter 7 Settings


Frequency setting of over frequency protection stage2.

13 NO.13—[t_OF2_Gen]

Delay of over frequency protection stage2.

14 NO.14—[TrpLog_OF_Gen]

Tripping output logic setting of over frequency protection.

15 NO.15—[En_Alm_UF1_Gen]

Enable alarm function of under frequency protection stage1.

16 NO.16—[En_Trp_UF1_Gen]

Enable tripping function of under frequency protection stage1.













23 NO.23—[En_Alm_OF1_Gen]

Enable alarm function of over frequency protection stage1.

24 NO.24—[En_Trp_OF1_Gen]

Enable tripping function of over frequency protection stage1.

25 NO.25—[En_Alm_OF2_Gen]

Enable alarm function of over frequency protection stage2.

26 NO.26—[En_Trp_OF2_Gen]

Enable tripping function of over frequency protection stage2.

27 NO.27—[En_BO_UC_OvSp_Gen]

Chapter 7 Settings


Enable binary output function of over speed of generator. When the current is higher than a internal setting, the equipment will output a pair of contacts (4B1-3 and 4B5-7)


Settings of generator frequency protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> GEN FREQ PROT --> [setting symbol].

7.3.20 Settings of startup and shutdown protection of generator


Table 7-35 List of startup and shutdown protection settings of generator No. Symbol Range Step Default 1 f_UF_StShut_Gen 40.0 – 50.0Hz 0.01 Hz 45 2 I_TrDiff_StShut_Gen 0.1 - 14.0 (Ie) 0.01 (Ie) 1 3 I_STDiff_StShut_Gen 0.1 - 14.0 (Ie) 0.01 (Ie) 1 4 I_GenDiff_StShut_Gen 0.1 - 14.0 (Ie) 0.01 (Ie) 1 5 I_SPTDiff_StShut_Gen 0.1 - 14.0 (Ie) 0.01 (Ie) 1 6 I_ExcDiff_StShut_Gen 0.1 - 14.0 (Ie) 0.01 (Ie) 1 7 TrpLog_Diff_StShut_Gen 0000 - FFFF 1 7FFF 8 V_StaROV_StShut_Gen 5 – 25.0 V 0.01 V 10 9 t_StaROV_StShut_Gen 0.10 – 10.0 S 0.01 S 10 10 TrpLog_StaROV_StShut_Gen 0000 - FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 11 En_TrDiff_StShut_Gen 0，1 1 12 En_STDiff_StShut_Gen 0，1 0 13 En_GenDiff_StShut_Gen 0，1 1 14 En_SPTDiff_StShut_Gen 0，1 0 15 En_ExcDiff_StShut_Gen 0，1 0 16 En_StaROV_StShut_Gen 0，1 1 17 En_UF_Ctrl_StShut_Gen 0，1 1


1 NO.1—[f_UF_Ctrl_StShut_Gen]

Frequency setting for blocking startup and shutdown protection of generator.

Startup and shutdown protection is used for earth fault and phase-to-phase fault of stator during low speed operation of the generator. Its algorithm is insensitive to variation of frequency.

This protection is auxiliary protection of generator during low frequency operation. Blocking setting of this protection is 0.8 – 0.9 times of rated frequency.

2 NO.2—[I_TrDiff_StShut_Gen]

Differential current setting for the differential protection of main transformer in start-stop condition.

For phase-to-phase fault, differential current protection is used. The equipment comprises

Chapter 7 Settings


differential current protection of generator, main transformer and stepdown transformer.

Setting of this protection during rated frequency shall be higher than imbalance current in differential circuit during full load operation,

unbrelop IKI =

Where:

relK is reliability factor, 1.30 – 1.50 generally;

unbI is imbalance current in differential circuit during full load operation during rated frequency.

3 NO.3—[I_STDiff_StShut_Gen]

Differential current setting for the differential protection of stepdown transformer in startup and shutdown condition. The setting principle is as same as No.2.

4 NO.4—[I_GenDiff_StShut_Gen]

Differential current setting for the differential protection of generator in startup and shutdown condition.

5 NO.5—[I_SPTDiff_StShut_Gen]

Differential current setting for the split phase differential protection of generator in startup and shutdown condition.

6 NO.6—[I_ExcDiff_StShut_Gen]

Differential current setting for the differential protection of exciter in startup and shutdown condition.

7 NO.7—[TrpLog_Diff_StShut_Gen]

Tripping output logic setting of low frequency overcurrent protection.

8 NO.8—[V_StaROV_StShut_Gen]

Zero sequence voltage setting of stator earth fault protection in startup and shutdown condition.

For earth fault, zero sequence voltage derived from neutral point is adopted as criterion with setting 10 V in general and delay not shorter than that of fundamental zero sequence voltage earth fault protection for stator in normal condition.

9 NO.9—[t_StaROV_StShut_Gen]

Delay of stator earth fault protection in startup and shutdown condition.

10 NO.10—[TrpLog_StaROV_StShut_Gen]

Tripping output logic setting of stator earth fault protection in startup and shutdown condition.

11 NO.11—[En_TrDiff_StShut_Gen]

Chapter 7 Settings


Enable differential current protective element of main transformer.

12 NO.12—[En_STDiff_StShut_Gen]

Enable differential current protective element of stepdown transformer.

13 NO.13—[En_GenDiff_StShut_Gen]

Enable differential current protective element of generator.

14 NO.14—[En_SPTDiff_StShut_Gen]

Enable spilt phase differential current protective element of generator.

15 NO.15—[En_ExcDiff_StShut_Gen]

Enable differential current protective element of exciter.

16 NO.16—[En_StaROV_StShut_Gen]

Enable zero sequence voltage criterion.

17 NO.17—[En_UF_Ctrl__StShut_Gen]

Enable blocking function in under frequency condition.


Settings of generator startup and shutdown protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> GEN STSHUT PROT --> [setting symbol].

7.3.21 Settings of accidental energization protection of generator


Table 7-36 List of accidental energization protection settings of generator No. Symbol Range Step Default 1 f_UF_AccEnerg_Gen 40 – 50.00 Hz 0.01 Hz 45 2 I_OC_AccEnerg_Gen 0.10 - 100.00 A 0.01 A 3 3 Ibrk_TCB 1.00 – 100.00 A 0.01 A 10 4 t_AccEnerg_Gen 0.0 – 1.00 S 0.01 A 0.1 5 TrpLog_AccEnerg_Gen 0000- FFFF 0.01 A 7FFF 6 I_NegOC_Flash_TCB 0.1 – 20.0 A 0.01 A 3 7 t_Flash1_TCB 0.1 - 1.0 S 0.01 A 3 8 TrpLog_Flash1_TCB 0000 – FFFF 0.01 A 7FFF 9 t_Flash2_TCB 0.1 - 1.0 S 0.01 A 3 10 TrpLog_Flash2_TCB 0000 – FFFF 0.01 A 7FFF

Logic setting “1” - enable, “0” – disable 11 En_UF_Ctrl_AccEnerg_Gen 0，1 1 12 En_CB_Ctrl_AccEnerg_Gen 0，1 1 13 En_Ibrk_Ctrl_Trp_TCB 0，1 0

Chapter 7 Settings



1 NO.1—[f_UF_AccEnerg_Gen]

Frequency setting for blocking accident energization protection of generator.

Frequency blocking setting shall be 80% - 90% of the rated frequency, i.e., 40 Hz – 45 Hz.

2 NO.2—[I_OC_AccEnerg_Gen]

Current setting of accident energization overcurrent protection.

Current setting shall be 50% of minimum accidental closing current (generator side) during process of generator starting up but having not been excited. If accidental closing current of circuit breaker on stepdown transformer side shall be considered, current setting shall base on minimum accidental closing current during this condition. The current used for this setting is derived from the CT at the terminal of generator.

In general, this setting shall be in excess of 1.3 times of rated current of generator.

3 NO.3—[Ibrk_TCB]

Current setting of CB capacity of HV side of main transformer.

4 NO.4—[t_AccEnerg_Gen]

Delay of accident energization overcurrent protection.

5 NO.5—[TrpLog_AccEnerg_Gen]

Tripping output logic setting of accident energization overcurrent protection.

6 NO.6—[I_NegOC_Flash_TCB]

Negative sequence current setting of breaker flashover protection of CB at HV side of main transformer. This setting shall be higher than possible unbalance current during normal operation. It must be set according to the secondary current of the CT at the terminal of generator.

7 NO.7—[t_Flash1_TCB]

Delay 1 of breaker flashover protection.

This setting shall be longer than operation time of circuit breaker.

8 NO.8—[TrpLog_Flash1_TCB]

Tripping output logic setting stage 1 of breaker flashover protection.

If impulse current may be higher than capacity of circuit breaker during asynchronous closing, the protection shall shut off the excitation firstly. If current passing through circuit breaker is lower than permissive value, the protection can trip the circuit breaker on outlet.

Permissive tripping current of circuit breaker shall be configured as that provided by factory.

9 NO.9—[t_Flash2_TCB]

Delay 2 of breaker flashover protection.

10 NO.10—[TrpLog_Flash2_TCB]

Chapter 7 Settings


Tripping output logic setting stage 2 of breaker flashover protection.

11 NO.11—[En_UF_Ctrl_AccEnerg_Gen]

Enable blocking function in under frequency condition.

12 NO.12—[En_CB_Ctrl_AccEnerg_Gen]

Enable breaker position auxiliary contact blocking function.

If asynchronous unwanted closing is considered, breaker position contact blocking shall be selected.

13 NO.13—[En_Ibrk_Ctrl_Trp_TCB]

Enable breaker capacity blocking function.


Settings of generator accidental energization protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> GEN ACCENERG PROT --> [setting symbol].

7.3.22 Settings of differential protection of excitation transformer or exciter


Table 7-37 List of differential protection settings of excitation transformer or exciter

No. Symbol Range Step Default 1 I_Pkp_PcntDiff_Exc 0.10 –1.50 (Ie) 0.01 (Ie) 0.3 2 I_InstDiff_Exc 2.0 – 14.0 (Ie) 0.01 (Ie) 6 3 Slope1_PcntDiff_Exc 0.00 – 0.50 0.01 0.1 4 Slope2_PcntDiff_Exc 0.50 – 0.80 0.01 0.7 5 k_Harm_PcntDiff_Exc 0.10 – 0.35 0.01 0.15 6 TrpLog_Diff_Exc 0000 – FFFF 1 7FFF

Logic setting “1” – enable, “0” – disable 7 En_InstDiff_Exc 0，1 1 8 En_PcntDiff_Exc 0，1 1 9 Opt_Inrush_Ident_Exc 0，1 1 10 Opt_CTS_Blk_PcntDiff_Exc 0，1 1


1 NO.1—[I_Pkp_PcntDiff_Exc]

Setting of pickup value of percentage differential current of excitation transformer or exciter. In practice, for excitation transformer, characteristic of CT on two sides may differ significantly and the unbalance differential current may be larger than that of main transformer. So for pickup setting, 0.5 Ie is recommended.

Chapter 7 Settings


2 NO.2—[I_InstDiff_Exc]

Setting of unrestrained instantaneous differential protection.

3 NO.3—[Slope1_PcntDiff_Exc]

Restraint coefficient of the first slope of the differential characteristic curve.

4 NO.4—[Slope2_PcntDiff_Exc]


5 NO.5—[k_Harm_PcntDiff_Exc]

Restraint coefficient of second harmonics.

6 NO.6—[TrpLog_Diff_Exc]

Tripping output logic setting of differential protection of excitation transformer of exciter.

7 NO.7—[En_InstDiff_Exc]

Enable unrestrained instantaneous differential protection of excitation transformer or exciter.

8 NO.8—[En_PcntDiff_Exc]

Enable percentage differential protection of excitation transformer or exciter.

9 NO.9—[Opt_Inrush_Ident_Exc]

Inrush current blocking mode. Select criterion of Inrush current detection.

“0”, discrimination by harmonics;

“1”, waveform distortion criterion is used.

10 NO.10—[Opt_CTS_Blk_PcntDiff_Exc]

Enable differential protection blocked by CT circuit failure.

Setting “0”: Differential protection is not blocked by CT circuit failure.

Setting “1”: Differential protection is blocked by CT circuit failure


Settings of excitation differential protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> EXC DIFF PROT --> [setting symbol].

7.3.23 Settings of backup protection of excitation transformer or exciter


Table 7-38 List of backup protection settings of excitation transformer or exciter No. Symbol Range Step Default 1 V_NegOV_VCE_Exc 1.00 – 20.00 V 0.01 V 4 2 Vpp_VCE_Exc 2.00 – 100.00 V 0.01 V 60 3 I_OC1_Exc 0.10 – 100.00 A 0.01 A 20

Chapter 7 Settings


4 t_OC1_Exc 0.00 – 10.00 S 0.01 S 1 5 TrpLog_OC1_Exc 0000 – FFFF 1 0081 6 I_OC2_Exc 0.10 – 100.00 A 0.01 A 20 7 t_OC2_Exc 0.00 – 25.00 S 0.01 S 1.5 8 TrpLog_OC2_Exc 0000 – FFFF 1 0081

Logic setting “1” – enable, “0” – disable 9 En_VCE_Ctrl_OC1_Exc 0，1 1 10 En_VCE_Ctrl_OC2_Exc 0，1 1 11 En_Mem_Curr_Exc 0，1 0 12 Opt_VTS_Ctrl_OC_Exc 0，1 1 13 Opt_AC_Input_S1_Exc 0，1 0 14 Opt_AC_Input_S2_Exc 0，1 0


1 NO.1—[V_NegOV_VCE_Exc]

Negative sequence voltage setting of composite voltage control element. Setting and displayed value of negative sequence voltage are U2.

Note:

Please refer to the setting explanation of backup protection of main transformer for reference.

2 NO.2—[Vpp_VCE_Exc]


3 NO.3—[I_OC1_Exc]

Setting of definite time overcurrent protection stage1.

4 NO.4—[t_OC1_Exc]

Delay of definite time overcurrent protection stage1.

5 NO.5—[TrpLog_OC1_Exc]


6 NO.6—[I_OC2_Exc]

Setting of definitive time overcurrent protection stage2.

7 NO.7—[t_OC2_Exc]


8 NO.8—[TrpLog_OC2_Exc]

Tripping output logic setting of definite time overcurrent protection stage2.

Chapter 7 Settings


9 NO.9—[En_VCE_Ctrl_OC1_Exc]


10 NO.10—[En_VCE_Ctrl_OC2_Exc]


11 NO.11—[En_Mem_Curr_Exc]

Logic setting of memory function of current of exciter.

12 NO.12—[Opt_VTS_Ctrl_OC__Exc]




13 NO.13—[Opt_AC_Input_S1_Exc]

Type selection configuration logic setting of current input. “1” is the AC current input for overcurrent protection is derived from S1 side of exciter.

14 NO.14—[Opt_AC_Input_S2_Exc]

Type selection configuration logic setting of current input. “1” is the AC current input for overcurrent protection is derived from S2 side of exciter.

Note:

The current used in the overcurrent protection is derived from the CT at the HV side of excitation transformer or the CT at the neutral point of exciter.


Settings of excitation backup protection are accessible in the following path:

Main Menu -> SETTINGS -> GEN PROT SETTINGS -> EXC BAK PROT --> [setting symbol].

7.3.24 Settings of overload protection of excitation


Table 7-39 List of overload protection settings of exciter

No. Symbol Range Step Default 1 I_OvLd_RotWdg 0.10 –100.00 A（kA） 0.01A（kA） 10 2 t_OvLd_RotWdg 0.00 – 25.00 S 0.01S 1 3 TrpLog_OvLd_RotWdg 0000 – FFFF 1 000F 4 I_Alm_OvLd_RotWdg 0.10 –100.00 A（kA） 0.01A（kA） 7

Chapter 7 Settings


5 t_Alm_OvLd_RotWdg 0.10 – 25.00 S 0.01S 2 6 I_InvOvLd_RotWdg 0.10 – 50.00 A（kA） 0.01A（kA） 6 7 tmin_InvOvLd_RotWdg 0.10 – 10.00 S 0.01S 1 8 A_Therm_RotWdg 1.00 – 100.00 0.01 40 9 Ib_InvOvLd_RotWdg 0.1 – 50.00A（kA） 0.01A（kA） 1 10 TrpLog_InvOvLd_RotWdg 0000 – FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 11 Opt_AC_Input_RotWdg 0，1 1 12 Opt_DC_Input_RotWdg 0，1 0 13 Opt_AC_Input_S1_RotWdg 0，1 0 14 Opt_AC_Input_S2_RotWdg 0，1 0


1 NO.1—[I_OvLd_RotWdg]

Setting of overload protection of rotor winding. If the measured current is input by DC type, the unit of the setting is ‘kA’. Otherwise, ‘A’ is the unit of AC type current.

2 NO.2—[t_OvLd_RotWdg]

Delay setting of overload protection of rotor winding.

3 NO.3—[TrpLog_OvLd_RotWdg]

Tripping output logic setting of overload protection of rotor winding.

4 NO.4—[I_Alm_OvLd_RotWdg]

Current setting of overload alarm.

5 NO.5—[t_Alm_OvLd_RotWdg]

Delay of overload alarm.

6 NO.6—[I_InvOvLd_RotWdg]

Pickup current of inverse time overload protection.

7 NO.7—[tmin_InvOvLd_RotWdg]

Delay of upper limit of inverse time overload protection.

8 NO.8—[A_Therm_RotWdg]

Thermal capacity parameter of excitation winding.

9 NO.9—[Ib_InvOvLd_RotWdg]

Reference current setting of inverse time overload.

10 NO.10—[TrpLog_InvOvLd_RotWdg]

Chapter 7 Settings


Tripping output logic setting of inverse time overload protection.

11 NO.11—[Opt_AC_Input_RotWdg]

Type selection configuration logic setting of current input. “1” is AC current input for overload protection of rotor winding.

12 NO.12—[Opt_DC_Input_RotWdg]

Type selection configuration logic setting of current input. “1” is DC current input for overload protection of rotor winding.

13 NO.13—[Opt_AC_Input_S1_RotWdg]

Type selection configuration logic setting of current input. “1” is the AC current input for overload protection of rotor winding is derived from HV side of excitation transformer.

14 NO.14—[Opt_AC_Input_S2_RotWdg]

Type selection configuration logic setting of current input. “1” is the AC current input for overload protection of rotor winding is derived from LV side of excitation transformer.


Settings of excitation overload protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> EXC OVLD PROT --> [setting symbol].

7.3.25 Settings of differential protection of stepdown transformer


Table 7-40 List of differential protection settings of stepdown transformer No. Symbol Range Step Default 1 I_Pkp_PcntDiff_ST 0.10 –1.50 (Ie) 0.01 (Ie) 0.3 2 I_InstDiff_ST 2.0 – 14.0 (Ie) 0.01 (Ie) 6 3 Slope1_PcntDiff_ST 0.00 – 0.50 0.01 0.1 4 Slope2_PcntDiff_ST 0.50 – 0.80 0.01 0.7 5 k_Harm_PcntDiff_ST 0.10 – 0.35 0.01 0.15 6 TrpLog_Diff_ST 0000 – FFFF 1 7FFF

Logic setting “1” – enable, “0” – disable 7 En_InstDiff_ST 0，1 1 8 En_PcntDiff_ST 0，1 1 9 Opt_Inrush_Ident_ST 0，1 1 10 Opt_CTS_Blk_PcntDiff_ST 0，1 1


1 NO.1—[I_Pkp_PcntDiff_ST]

Setting of pickup value of percentage differential current of stepdown transformer.

Chapter 7 Settings


2 NO.2—[I_InstDiff_ST]

Setting of unrestrained instantaneous differential protection of stepdown transformer.

3 NO.3—[Slope1_PcntDiff_ST]

Restraint coefficient of the first slope of the differential characteristic curve.

4 NO.4—[Slope2_PcntDiff_ST]


5 NO.5—[k_Harm_PcntDiff_ST]

Restraint coefficient of second harmonics.

6 NO.6—[TrpLog_Diff_ST]

Tripping output logic setting of differential protection of stepdown transformer.

7 NO.7—[En_InstDiff_ST]

Enable unrestrained instantaneous differential protection of stepdown transformer.

8 NO.8—[En_PcntDiff_ST]

Enable percentage differential protection of stepdown transformer.

9 NO.9—[Opt_Inrush_Ident_ST]

Inrush current blocking mode. Select criterion of Inrush current detection.

“0”, discrimination by harmonics;

“1”, waveform distortion criterion is used.

10 NO.10—[Opt_CTS_Blk_PcntDiff_ST]

Enable differential protection blocked by CT circuit failure.

Setting “0”: Differential protection is not blocked by CT circuit failure.

Setting “1”: Differential protection is blocked by CT circuit failure


Settings of stepdown transformer differential protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> ST DIFF PROT --> [setting symbol].

7.3.26 Settings of backup protection at HVS of stepdown transformer


Table 7-41 List of HVS backup protection settings of stepdown transformer No. Symbol Range Step Default 1 V_NegOV_VCE_HVS_ST 1.00 – 20.00 V 0.01 V 4 2 Vpp_VCE_ HVS_ST 2.00 – 100.00 V 0.01 V 60 3 I_OC1_HVS_ST 0.10 – 100.00 A 0.01 A 20

Chapter 7 Settings


4 t_OC1_HVS_ST 0.00 – 10.00 S 0.01 S 1 5 TrpLog_OC1_HVS_ST 0000 – FFFF 1 0021 6 I_OC2_HVS_ST 0.10 – 100.00 A 0.01 A 17 7 t_OC2_HVS_ST 0.00 – 10.00 S 0.01 S 2 8 TrpLog_OC2_HVS_ST 0000 – FFFF 1 0003 9 I_Alm_OvLd_HVS_ST 0.10 – 50.00 A 0.01 A 6 10 t_Alm_OvLd_HVS_ST 0.00 – 10.00 S 0.01 S 8 11 I_InitCool1_OvLd_HVS_ST 0.10 – 50.00 A 0.01 A 5.5 12 t_InitCool1_OvLd_HVS_ST 0.00 – 10.00 S 0.01 S 9 13 I_InitCool2_OvLd_HVS_ST 0.10 – 50.00 A 0.01 A 5.5 14 t_InitCool2_OvLd_HVS_ST 0.00 – 10.00 S 0.01 S 9

Logic setting “1” – enable, “0” – disable 15 En_VCE_Ctrl_OC1_HVS_ST 0，1 1 16 En_VCE_Ctrl_OC2_HVS_ST 0，1 1 17 En_Mem_Curr_HVS_ST 0，1 0 18 Opt_VTS_Ctrl_OC_HVS_ST 0，1 1 19 En_Alm_OvLd_HVS_ST 0，1 1 20 En_InitCool_OvLd_HVS_ST 0，1 1 21 En_LVSProt_Blk_OC1_HVS_ST 0，1 0


1 NO.1—[V_NegOV_VCE_HVS_ST]

Negative sequence voltage setting of composite voltage control element at HVS of stepdown transformer.

2 NO.2—[Vpp_VCE_HVS_ST]


3 NO.3—[I_OC1_HVS_ST]


4 NO.4—[t_OC1_HVS_ST]


5 NO.5—[TrpLog_OC1_HVS_ST]


6 NO.6—[I_OC2_HVS_ST]


7 NO.7—[t_OC2_HVS_ST]


Chapter 7 Settings


8 NO.8—[TrpLog_OC2_HVS_ST]


9 NO.9—[I_Alm_OvLd_HVS_ST]

Current setting of overload protection at HVS of stepdown transformer.

10 NO.10—[t_Alm_OvLd_HVS_ST]

Time setting of overload protection at HVS of stepdown transformer.

11 NO.11—[I_InitCool1_OvLd_HVS_ST]

Current setting of stage 1 of overload to initial cooling system at HVS of stepdown transformer.

12 NO.12—[t_InitCool1_OvLd_HVS_ST]

Time setting of stage 1 of overload to initial cooling system at HVS of stepdown transformer.

13 NO.13—[I_InitCool2_OvLd_HVS_ST]

Current setting of stage 2 of overload to initial cooling system at HVS of stepdown transformer.

14 NO.14—[t_InitCool2_OvLd_HVS_ST]

Time setting of stage 2 of overload to initial cooling system at HVS of stepdown transformer.

15 NO.15—[En_VCE_Ctrl_OC1_ HVS_ST]


16 NO.16—[En_VCE_Ctrl_OC2_ HVS_ST]


17 NO.17—[En_Mem_Curr_ HVS_ST]

Logic setting of memory function of current of exciter.

18 NO.18—[Opt_VTS_Ctrl_OC_HVS_ST]




19 NO.19—[En_Alm_OvLd_HVS_ST]

Enable alarm for overload protection at HVS of stepdown transformer.

20 NO.20—[En_InitCool_OvLd_HVS_ST]

Enable overload to initial cooling system at HVS of stepdown transformer.

Chapter 7 Settings


21 NO.21—[En_LVSProt_Blk_OC1_HVS_ST]

Enable protection at LVS to block overcurrent stage 1 at HVS of stepdown transformer.


Settings of HVS backup protection of stepdown transformer are accessible in the following path:

Main Menu -> SETTINGS -> GEN PROT SETTINGS -> ST HVS BAK PROT --> [setting symbol].

7.3.27 Settings of backup protection at LVS of stepdown transformer


Table 7-42 List of LVS backup protection settings of stepdown transformer No. Symbol Range Step Default 1 V_NegOV_VCE_LVS_ST 1.00 – 20.00 V 0.01 V 4 2 Vpp_VCE_LVS_ST 2.00 – 100.00 V 0.01 V 60 3 I_OC1_LVS_ST 0.10 – 100.00 A 0.01 A 20 4 t_OC1_LVS_ST 0.00 – 10.00 S 0.01 S 1 5 TrpLog_OC1_LVS_ST 0000 – FFFF 1 0021 6 I_OC2_LVS_ST 0.10 – 100.00 A 0.01 A 17 7 t_OC2_LVS_ST 0.00 – 10.00 S 0.01 S 2 8 TrpLog_OC2_LVS_ST 0000 – FFFF 1 0003 9 I_ROC1_LVS_ST 0.10 – 100.00 A 0.01 A 20 10 t_ROC1_LVS_ST 0.00 – 10.00 S 0.01 S 1 11 TrpLog_ROC1_LVS_ST 0000 – FFFF 1 0021 12 I_ROC2_LVS_ST 0.10 – 100.00 A 0.01 A 17 13 t_ROC2_LVS_ST 0.00 – 10.00 S 0.01 S 2 14 TrpLog_ROC2_LVS_ST 0000 – FFFF 1 0003 15 I_OvLd_LVS_ST 0.10 – 100.00 A 0.01 A 15 16 t_OvLd_LVS_ST 0.00 – 10.00 S 0.01 S 2 17 V_ROV_LVS_ST 0.10 – 100.00 V 0.01 V 15 18 t_ROV_LVS_ST 0.00 – 10.00 S 0.01 S 2

Logic setting “1” – enable, “0” – disable 19 En_VCE_Ctrl_OC1_LVS_ST 0，1 1 20 En_VCE_Ctrl_OC2_LVS_ST 0，1 1 21 Opt_VTS_Ctrl_OC_LVS_ST 0，1 1 22 En_Alm_OvLd_LVS_ST 0，1 0 23 En_Alm_ROV_LVS_ST 0，1 0


1 NO.1—[V_NegOV_VCE_LVS_ST]

Negative sequence voltage setting of composite voltage control element at LVS of stepdown

Chapter 7 Settings


transformer.

2 NO.2—[Vpp_VCE_LVS_ST]


3 NO.3—[I_OC1_LVS_ST]


4 NO.4—[t_OC1_LVS_ST]


5 NO.5—[TrpLog_OC1_LVS_ST]


6 NO.6—[I_OC2_LVS_ST]


7 NO.7—[t_OC2_LVS_ST]


8 NO.8—[TrpLog_OC2_LVS_ST]


9 NO.9—[I_ROC1_LVS_ST]

Setting of definitive time zero sequence overcurrent protection stage1.

10 NO.10—[t_ROC1_LVS_ST]

Delay of definite time zero sequence overcurrent protection stage1.

11 NO.11—[TrpLog_ROC1_LVS_ST]

Tripping output logic setting of definite time zero sequence overcurrent protection stage1.

12 NO.12—[I_ROC2_LVS_ST]

Setting of definitive time zero sequence overcurrent protection stage2.

13 NO.13—[t_ROC2_LVS_ST]

Delay of definite time zero sequence overcurrent protection stage2.

14 NO.14—[TrpLog_ROC2_LVS_ST]

Tripping output logic setting of definite time zero sequence overcurrent protection stage2.

15 NO.15—[I_OvLd_LVS_ST]

Current setting of overload protection at LVS of stepdown transformer.

16 NO.16—[t_OvLd_LVS_ST]

Chapter 7 Settings


Time setting of overload protection at LVS of stepdown transformer.

17 NO.17—[V_ROV_LVS_ST]

Voltage setting of zero sequence overvoltage protection at LVS of stepdown transformer.

18 NO.18—[t_ROV_LVS_ST]

Time setting of zero sequence overvoltage protection at LVS of stepdown transformer.

19 NO.19—[En_VCE_Ctrl_OC1_ LVS_ST]


20 NO.20—[En_VCE_Ctrl_OC2_ LVS_ST]


21 NO.21—[Opt_VTS_Ctrl_OC_LVS_ST]




22 NO.22—[En_Alm_OvLd_LVS_ST]

Enable alarm for overload protection at LVS of stepdown transformer.

23 NO.20—[En_Alm_ROV_LVS_ST]

Enable zero sequence overvoltage protection at LVS of stepdown transformer.


Settings of LVS backup protection of stepdown transformer are accessible in the following path:

Main Menu -> SETTINGS -> GEN PROT SETTINGS -> ST LVS BAK PROT --> [setting symbol].

7.3.28 Settings of restrict earth fault protection of stepdown transformer


Table 7-43 List of restrict earth fault protection settings of stepdown transformer No. Symbol Range Step Default 1 I_Alm_REF_ST 0.10 –10.00 In 0.01In 0.1 2 I_Pkp_PcntREF_ST 0.10 –10.00 In 0.01In 0.3 3 I_InstREF_ST 2.00 –50.00 In 0.01In 6 4 Slope_PcntREF_ST 0.30 – 0.70 0.01 0.3 5 TrpLog_REF_ST 0000 – FFFF 1 7FFF


Chapter 7 Settings


No. Symbol Range Step Default 6 En_InstREF_ST 0，1 1 7 En_PcntREF_ST 0，1 0


1 NO.1—[I_Alm_REF_ST]

Setting of zero sequence differential current alarm. This setting shall be greater than the maximum zero sequence unbalance differential current in normal operation condition meanwhile smaller than REF pickup value.

2 No.2-- [I_Pkp_PcntREF_ST]

Pickup setting of zero sequence differential current.

3 No.3-- [I_InstREF_ST]

Setting of unrestrained instantaneous zero sequence differential protection.

4 No.4-- [Slope_PcntREF_ST]

Restraint coefficient of percentage zero sequence differential current.

5 No.5-- [TrpLog_REF_ST]

Tripping output logic setting of zero sequence differential protection.

6 NO.6—[En_InstREF_ST]

Logic setting to enable/disable instantaneous restrict earth fault protection of stepdown transformer.

7 NO.7—[En_PcntREF_ST]

Logic setting to enable/disable percentage restrict earth fault protection of stepdown transformer.


Settings of restrict earth fault protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> ST REF PROT --> [setting symbol].

7.3.29 Settings of mechanical protection


Table 7-44 List of mechanical protection settings No. Symbol Range Step Default 1 t_MechRly1 0.00 – 6000.0 S 0.1S 1 2 TrpLog_MechRly1 0000 - FFFF 1 0011 3 t_MechRly2 0.00 – 6000.0 S 0.1S 1 4 TrpLog_MechRly2 0000 - FFFF 1 0011

Chapter 7 Settings


No. Symbol Range Step Default 5 t_MechRly3 0.00 – 6000.0 S 0.1S 1 6 TrpLog_MechRly3 0000 - FFFF 1 0011 7 t_MechRly4 0.00 – 6000.0 S 0.1S 1 8 TrpLog_MechRly4 0000 - FFFF 1 0011

Logic setting “1” - enable, “0” – disable 9 En_Supv_MechRly 0，1 1


1 NO.1—[t_MechRly1]

Time delay of output contact of external mechanical contact input1 repeater.

2 NO.2—[TrpLog_MechRly1]

Tripping output logic setting of output contact of mechanical contact input1.













9 NO.9—[En_Supv_MechRly]

Logic setting to enable/disable mechanical circuit supervision.


Settings of mechanical protection are accessible in the following path:

Main Menu -> SETTINGS -> PROT SETTINGS -> MECH RLY PROT --> [setting symbol].

Chapter 7 Settings


7.3.30 Settings of pole disagreement protection of circuit breaker


Table 7-45 Definition of pole disagreement protection settings No Symbol Range Step Default

1 I_OC_PD 0.10 – 20.00 A 0.01A 1 2 I_NegOC_PD 0.10 – 20.00 A 0.01A 1 3 I_ROC_PD 0.10 – 20.00 A 0.01A 3 4 T_PD1 0.00 –10.00 s 0.01s 0.5 5 TrpLog_PD1 0000 – FFFF 1 000F 6 t_PD2 0.00 –10.00 s 0.01s 1 7 TrpLog_PD2 0000 – FFFF 1 00FF


8 En_NegOC_PD 0/1 1

9 En_ROC_PD 0/1 1

10 En_ExTrp_Ctrl_PD2 0/1 1

11 En_OC_PD2 0/1 0


1 No.1--[I_OC_PD]

Setting of pole-disagreement phase current element.

2 No.2--[I_NegOC_PD]

Setting of pole-disagreement negative-sequence current element.

3 No.3--[I_ROC_PD]

Setting of pole-disagreement zero-sequence current element.

4 No.4--[t_PD1]

Delay of stage 1 of pole disagreement protection.

5 No.5--[TrpLog_PD1]

Tripping output logic setting of pole disagreement protection stage 1.

6 No.6--[t_PD2]

Delay of stage 2 of pole disagreement protection.

7 No.7--[TrpLog_PD2]

Tripping output logic setting of pole disagreement protection stage 2.

8 No.8--[En_NegOC_PD]

Logic setting of enabling pole disagreement protection controlled by negative-sequence current

Chapter 7 Settings


element.

9 No.9--[En_ROC_PD]

Logic setting of enabling pole disagreement protection controlled by zero-sequence current element.

10 No.10--[En_ExTrp_Ctrl_PD2]

Logic setting of enabling pole disagreement protection stage 2 initiated by binary input of protection tripping contact.

11 No.11--[En_OC_PD2]

Logic setting of enabling pole disagreement protection stage 2 controlled by phase current element.


The calculated parameters are accessible in the following path:

Main Menu -> SETTING -> PROT SETTINGS -> PD PROT

7.4 Calculated parameters The settings listed in the following tables calculated by the RCS-985A itself automatically, they need not to be set by user. The settings are calculated according to the system parameters that user input, include primary rated currents, secondary rated currents, secondary rated voltages and correction coefficients used in all kinds of differential protection relays. Listing of the calculated settings is only for reference of setting check or commission.

7.4.1 Calculated parameters of primary rated current

7.4.1.1 Parameters list

Table 7-46 List of calculated parameters of primary rated current NO. Symbol Range Note 1 I1b_SnTr_CT_HVS_Tr 0-60000 A 2 I1b_SnTr_CT_LVS_Tr 0-60000 A 3 I1b_SnGen_CT_Gen 0-60000 A 4 I1b_SnGen_CT_SP1_Gen 0-60000 A 5 I1b_SnGen_CT_SP2_Gen 0-60000 A 6 I1b_SnST_CT_HVS_ST 0-60000 A 7 I1b_SnST_CT_LVS_ST 0-60000 A 8 I1b_SnST_CT_Br2_ST 0-60000 A 9 I1b_SnExc_CT_S1_Exc 0-60000 A 10 I1b_SnExc_CT_S2_Exc 0-60000 A

7.4.1.2 Explanation of the parameters

1 No.1-- [I1b_SnTr_CT_HVS_Tr]

Chapter 7 Settings


Primary rated current at HV side of main transformer. The equation is nb

nnb U

SI1

1 3= . Please

refer to section 3.3.1 to see more details.

2 No.2-- [I1b_SnTr_CT_LVS_Tr]

Primary rated current at LV side of main transformer.

3 No.3-- [I1b_SnGen_CT_Gen]

Primary rated current of generator. The equation is nf

nnf U

PI1

1 3cos/ θ

= . Please refer to section 3.3.2

to see more details.

4 No.4-- [I1b_SnGen_CT_SP1_Gen]

Primary rated current of the first splitting branch at the neutral point of generator.


Primary rated current of the second splitting branch at the neutral point of generator.

6 No.6-- [I1b_SnST_CT_HVS_ST]

Primary rated current at HV side of stepdown transformer.

7 No.7-- [I1b_SnST_CT_LVS_ST]

Primary rated current at LV side of stepdown transformer.

8 No.8-- [I1b_SnST_CT_Br2_ST]

Primary rated current at branch 2 of stepdown transformer.

9 No.9-- [I1b_SnExc_CT_S1_Exc]

Primary rated current at HV side of excitation transformer or terminal side of exciter.


Primary rated current at LV side of excitation transformer or neutral point side of exciter.


All settings of calculated primary rated current are accessible in the following path:

Main Menu -> SETTINGS -> CALC SETTINGS -> PRI RATED CURR -> [setting symbol]

7.4.2 Calculated parameters of secondary rated current


Table 7-47 List of calculated parameters of secondary rated current NO. Symbol Range Note

Chapter 7 Settings


1 I2b_SnTr_CT_HVS1_Tr 0-600 A 2 I2b_SnTr_CT_HVS2_Tr 0-600 A 3 I2b_SnTr_CT_LVS_Tr 0-600 A 4 I2b_SnTr_CT_HVS_ST 0-600 A 5 I2b_SnTr_CT_HVS_GTU 0-600 A 6 I2b_SnTr_CT_LVS_GTU 0-600 A 7 I2b_SnTr_CT_ST_GTU 0-600 A 8 I2b_SnGen_CT_Term_Gen 0-600 A 9 I2b_SnGen_CT_SP1_Gen 0-600 A 10 I2b_SnGen_CT_SP2_Gen 0-600 A 11 I2b_SnST_CT2_HVS_ST 0-600 A 12 I2b_SnST_CT1_HVS_ST 0-600 A 13 I2b_SnST_CT_LVS_ST 0-600 A 14 I2b_SnST_CT_Br2_ST 0-600 A 15 I2b_SnExc_CT_S1_Exc 0-600 A 16 I2b_SnExc_CT_S2_Exc 0-600 A


1 No.1-- [I2b_SnTr_CT_HVS1_Tr]

Secondary rated current at HVS 1 of main transformer. The equation is bLH

nbnb n

II 12 = . Please refer

to section 3.3.1 to see more details.

2 No.2-- [I2b_SnTr_CT_HVS2_Tr]

Secondary rated current at HVS 2 of main transformer.

3 No.3-- [I2b_SnTr_CT_LVS_Tr]

Secondary rated current at LVS of main transformer.

4 No.4-- [I2b_SnTr_CT_HVS_ST]

Secondary rated current at HVS of stepdown transformer.

5 No.5-- [I2b_SnTr_CT_HVS_GTU]

Secondary rated current at HVS of transformer. It is used for differential protection of generator-transformer unit.

6 No.6-- [I2b_SnTr_CT_LVS_GTU]

Secondary rated current at LVS of transformer. It is used for differential protection of generator-transformer unit.

7 No.7-- [I2b_SnTr_CT_ST_GTU]

Chapter 7 Settings


Secondary rated current at HVS of stepdown transformer. It is used for differential protection of generator-transformer unit.

8 No.8-- [I2b_SnGen_CT_Term_Gen]

Secondary rated current at terminal of generator.


Secondary rated current of the first splitting branch at the neutral point of generator.


Secondary rated current of the second splitting branch at the neutral point of generator.

11 No.11-- [I2b_SnST_CT2_HVS_ST]

Secondary rated current at HV side CT2 of stepdown transformer which with big ratio.

12 No.12-- [I2b_SnST_CT1_HVS_ST]

Secondary rated current at HV side CT1 of stepdown transformer which with small ratio.

13 No.12-- [I2b_SnST_CT_LVS_ST]

Secondary rated current at LV side of stepdown transformer.

14 No.14-- [I2b_SnST_CT_Br2_ST]

Secondary rated current at branch 2 of stepdown transformer.


Secondary rated current at HV side of excitation transformer or terminal side of exciter.


Secondary rated current at LV side of excitation transformer or neutral point side of exciter.


All settings of calculated primary rated current are accessible in the following path:

Main Menu -> SETTINGS -> CALC SETTINGS -> SEC RATED CURR -> [setting symbol]

7.4.3 Calculated parameters of secondary rated voltage


Table 7-48 List of calculated parameters of secondary rated current NO. Symbol Range Note 1 U2b_VT_HVS_Tr 0-600 V 2 U2b_DeltVT_HVS_Tr 0-600 V 3 U2b_VT_Term_Gen 0-600 V 4 U2b_DeltVT_Term_Gen 0-600 V 5 U2b_NP_Gen 0-600 V

Chapter 7 Settings


6 k_DeltVT_Gen 0-600 V 7 U2b_VT_LVS_ST 0-600 V 8 U2b_DeltVT_LVS_ST 0-600 V 9 U2b_VT_Br2_ST 0-600 V 10 U2b_DeltVT_Br2_ST 0-600 V 11 U2b_VT_Exc 0-600 V 12 U2b_DeltVT_LVS_Tr 0-600 V


1 No.1-- [V2b_VT_HVS_Tr]

Secondary rated voltage at HVS of main transformer.

2 No.2-- [U2b_DeltVT _HVS_Tr]

Secondary rated voltage of delta VT at HVS of main transformer.

3 No.3-- [U2b_VT_Term_Gen]

Secondary rated voltage at terminal VT of generator.

4 No.4-- [U2b_DeltaVT_Term_Gen]

Secondary rated voltage of delta VT at terminal of generator.

5 No.5-- [U2b_NP_Gen]

Secondary rated voltage at neutral point VT of generator.

6 No.6-- [k_DeltVT_Gen]

The ratio of zero sequence voltage between terminal and neutral point of generator. That is the ratio between [U2b_DeltVT_Term_Gen] to [U2b_NP_Gen].

7 No.7-- [U2b_VT_LVS_ST]

Secondary rated voltage at LVS of stepdown transformer.

8 No.8-- [U2b_DeltVT_LVS_ST]

Secondary rated voltage of delta VT at LVS of stepdown transformer.

9 No.9-- [U2b_VT_Br2_ST]

Secondary rated voltage at branch 2 of stepdown transformer.

10 No.10-- [U2b_DeltVT_Br2_ST]

Secondary rated voltage of delta VT at branch 2 of stepdown transformer.

11 No.11-- [U2b_VT_Exc]

Secondary rated voltage of excitation transformer or exciter.

Chapter 7 Settings


12 No.12-- [U2b_DeltVT_LVS_Tr]

Secondary rated voltage of delta VT at LVS of main transformer.


All settings of calculated primary rated voltage are accessible in the following path:

Main Menu -> SETTINGS -> CALC SETTINGS -> SEC RATED VOLT -> [setting symbol]

7.4.4 Calculated parameters of differential coefficient


Table 7-49 List of calculated parameters of differential coefficient NO. Symbol Range Note 1 k_TrHVS1_Diff_Tr 0-60 2 k_TrHVS2_Diff_Tr 0-60 3 k_TrLVS_Diff_Tr 0-60 4 k_ST_Diff_Tr 0-60 5 k_TrHVS_Diff_GTU 0-60 6 k_NP_Diff_GTU 0-60 7 k_ST_Diff_GTU 0-60 8 k_Term_Diff_Gen 0-60 9 k_SP1_Diff_Gen 0-60 10 k_SP2_Diff_Gen 0-60 11 k_HVS_Diff_ST 0-60 12 k_LVS_Diff_ST 0-60 13 k_Br2_Diff_ST 0-60 14 k_S1_Diff_Exc 0-60 15 k_S2_Diff_Exc 0-60 16 k_NP_REF_Tr 0-60 17 k_REF_Tr 0-60 18 k_NP_REF_ST 0-60 19 k_REF_ST 0-60


1 No.1-- [k_TrHVS1_Diff _Tr]

Differential coefficient at side 1 of HVS of main transformer for differential protection of main transformer.

2 No.2-- [k_TrHVS2_Diff _Tr]

Differential coefficient at side 2 of HVS of main transformer for differential protection of main transformer.

3 No.3-- [k_TrLVS_Diff _Tr]

Chapter 7 Settings


Differential coefficient of LVS of main transformer. For differential protection of main transformer, the base side is LV side.

4 No.4-- [k_ST_Diff_Tr]

Differential coefficient of HVS of stepdown transformer for differential protection of main transformer.

5 No.5-- [k_TrHVS_Diff_GTU]

Differential coefficient of HVS of main transformer for differential protection of generator and transformer unit.

6 No.6-- [k_NP_Diff_GTU]

Differential coefficient of neutral point of generator for differential protection of generator and transformer unit.

7 No.7-- [k_ST_Diff_GTU]

Differential coefficient of HVS of stepdown transformer for differential protection of generator and transformer unit.

8 No.8-- [k_Term_Diff_Gen]

Differential coefficient of terminal of generator for differential protection of generator.

9 No.9-- [k_SP1_Diff_Gen]

Differential coefficient of split phase 1 of generator for differential protection of generator.

10 No.10-- [k_SP2_Diff_Gen]

Differential coefficient of split phase 2 of generator for differential protection of generator.

11 No.11-- [k_HVS_Diff_ST]

Differential coefficient of HVS of stepdown transformer for differential protection of stepdown transformer.

12 No.12-- [k_LVS_Diff_ST]

Differential coefficient of LVS of stepdown transformer for differential protection of stepdown transformer.

13 No.13-- [k_Br2_Diff_ST]

Differential coefficient of branch 2 of stepdown transformer for differential protection of stepdown transformer.

14 No.14-- [k_S1_Diff_Exc]

Differential coefficient of side 1 of exciter for differential protection of exciter.

15 No.15-- [k_S2_Diff_Exc]

Chapter 7 Settings


Differential coefficient of side 2 of exciter for differential protection of exciter.

16 No.16-- [k_NP_REF_Tr]

Differential coefficient of neutral point of main transformer for restrict earth fault protection of main transformer.

17 No.17-- [k_REF_Tr]

Differential coefficient of HVS of main transformer for restrict earth fault protection of main transformer.

18 No.18-- [k_NP_REF_ST]

Differential coefficient of neutral point of stepdown transformer for restrict earth fault protection of stepdown transformer.

19 No.19-- [k_REF_ST]

Differential coefficient of HVS of stepdown transformer for restrict earth fault protection of stepdown transformer.


All settings of calculated differential coefficient are accessible in the following path:

Main Menu -> SETTINGS -> CALC SETTINGS -> DIFF CORR COEF -> [setting symbol]

Chapter 8 Human Machine Interface


Chapter 8 Human Machine Interface User can access the relay from the front panel of the device. Local communication with the relay is possible using a computer (PC) with the DBG-2000 software via an RS232 port on the front panel. Furthermore, remote communication is also possible switched-in substation automatic system via a RS485 port.

This chapter describes human machine interface (HMI), menu tree and LCD display. At the same time how to input settings using keypad is described in detail. Finally, this chapter introduces the DBG2000 software and wave analysis software.

8.1 User interfaces and menu structure The settings and functions of the RCS-985A protection relay can be accessed both from the front panel keypad and LCD, and via the front and rear communication ports. Information on each of these methods is given in this section to describe how to start using the relay.

8.2 Introduction to the relay 8.2.1 Front panel

The front panel of the relay is shown in Figure 8-1. The human-machine interface consists of a human-machine interface (HMI) module which allows a communication as simple as possible for the user.



Figure 8-1 Front view of the protection

The front panel of the relay includes the following, as indicated in Figure 8-1:

Table 8-1 Description of each part

No. Brief description

1 A 320*240 dots liquid crystal display (LCD)

2 The relay front panel features control pushbutton switches with LEDs that facilitate local control. Factory default settings associate specific relay functions with these 9 direct-action pushbuttons and LEDs e.g.

3 A 9-key keypad comprising 4 arrow keys ( , , and ), an plus key (+), a minus key (-), a escape key ( ESC) and a active group setting key (GRP)

4 A 9-pin female D-type front port for communication with a PC locally to the relay (up to 15m distance) via an EIA(RS)232 serial data connection, which providing internal signal monitoring and high speed local downloading of software.



No. Brief description

5 Name of protection

6 Name of manufacture

8.2.2 LCD

A 320*240 dots liquid crystal display (LCD) with LED backlight. The backlight can be switched on automatically whenever the keypad is operated or operation or alarm issued. Backlight will be turned off after a while.

8.2.2.1 Default Display

The front panel menu has a default display under normal state after powered-up. If there is no keypad activity for the 5 minutes timeout period, the default will return again and the LCD backlight will turn off. When the equipment is switched on or during normal operation condition, based on actual connection of the generator-transformer unit, the LCD will display different connection diagrams and related information.

If the unit comprises a 3/2 bus at HV side of main transformer and an stepdown transformer with two windings, the LCD will display:

Figure 8-2 Default display 1 of RCS-985A

If the unit comprises a main transformer with single outlet and an stepdown transformer with three windings, the LCD will display:




If the unit comprises a breaker between main transformer and generator, the LCD will display:


8.2.2.2 Fault report

Whenever there is an un-eliminated fault record in the relay, the default display will be replaced by fault report.



Figure 8-5 Fault display of RCS-985A

All the protection elements listed below may be displayed.

Table 8-2 List of operation elements NO. Protection Element Note

1 Op_InstDiff_Gen Operation of instantaneous unrestraint differential protection of generator

2 Op_PcntDiff_Gen Operation of percentage differential protection of generator

3 Op_DPFC_Diff_Gen Operation of DPFC (Deviation of Power Frequency Component) differential protection of generator

4 Op_InstSPTDiff_Gen Operation of instantaneous phase-splitting transverse differential protection of generator

5 Op_PcntSPTDiff_Gen Operation of percentage phase-splitting transverse differential protection of generator

6 Op_InstDiff_Exciter Operation of instantaneous differential protection of exciter

7 Op_PcntDiff_Exciter Operation of percentage differential protection of exciter

8 Op_InstDiff_ET Operation of instantaneous differential protection of excitation transformer

9 Op_PcntDiff_ET Operation of percentage differential protection of excitation transformer

10 Op_DPFC_IntTurn_Gen Operation of DPFC interturn protection of generator

11 Op_SensTrvDiff_Gen Operation of transverse differential protection of generator

12 Op_UnsensTrvDiff_Gen Operation of unsensitive stage of transverse differential protection of generator

13 Op_SensIntTurn_Gen Operation of any of the interturn protection of generator



NO. Protection Element Note

14 Op_UnsensIntTurn_Gen Operation of any of the unsensitive stage of interturn protection of generator

15 Op_SensROV_Sta Operation of sensitive stage zero sequence over voltage element of earth fault protection of stator

16 Op_UnsensROV_Sta Operation of unsensitive stage zero sequence over voltage element of earth fault protection of stator

17 Op_V3rdHRatio_Sta Operation of 3rd harmonics ratio earth fault protection of stator

18 Op_V3rdHDiff_Sta Operation of 3rd harmonics differential earth fault protection of stator

19 Op_1PEF_RotWdg Operation of 1 point earth fault protection of rotor

20 Op_2PEF_RotWdg Operation of 2 point earth fault protection of rotor

21 Op_OvLd_Sta Operation of definitive time overload protection of stator

22 Op_InvOvLd_Sta Operation of inverse time overload protection of stator

23 Op_NegOC_Sta Operation of negative sequence overcurrent protection of rotor

24 Op_InvNegOC_Sta Operation of inverse time negative sequence overcurrent protection of rotor

25 Op_OvLd_RotWdg Operation of definitive time overload protection of rotor winding

26 Op_InvOvLd_RotWdg Operation of inverse time overload protection of rotor winding

27 Op_OC1_Gen Operation of stage 1 of overcurrent protection of generator

28 Op_OC2_Gen Operation of stage 2 of overcurrent protection of generator

29 Op_OV1_Gen Operation of stage 1 of overvoltage protection of generator

30 Op_OV2_Gen Operation of stage 2 of overvoltage protection of generator

31 Op_UV_Gen Operation of undervoltage protection of generator

32 Op_OvExc1_Gen Operation of stage 1 of overexcitation protection of generator

33 Op_OvExc2_Gen Operation of stage 2 of overexcitation protection of generator

34 Op_InvOvExc_Gen Operation of inverse time stage of overexcitation protection of generator




35 Op_UF1_Gen Operation of stage 1 of underfrequency protection of generator




39 Op_OF1_Gen Operation of stage 1 of overfrequency protection of generator

40 Op_OF2_Gen Operation of stage 2 of overfrequency protection of generator

41 Op_Z1_Gen Operation of stage 1 of distance protection of generator

42 Op_Z2_Gen Operation of stage 2 of distance protection of generator

43 Op_LossExc1_Gen Operation of stage 1 of loss-of-excitation protection of generator



46 Op_Ext_OOS_Gen Operation of out-of-step protection outside zone of generator

47 Op_Int_OOS_Gen Operation of out-of-step protection inside zone of generator

48 Op_RevP_Gen Operation of reverse power protection of generator

49 Op_UP_Gen Operation of under power protection of generator

50 Op_SeqTrpRevP_Gen Operation of under power protection of generator

51 Op_AccEnerg1_Gen Operation of stage 1 of accidental energization protection of generator

52 Op_AccEnerg2_Gen Operation of stage 2 of accidental energization protection of generator

53 Op_Flash1_TCB Operation of stage 1 of flashover protection of circuit breaker

54 Op_Flash2_TCB Operation of stage 2 of flashover protection of circuit breaker




55 Op_GenDiff_StShut_Gen Operation of differential current element of startup and shut off protection of generator

56 Op_SPTDiff_StShut_Gen Operation of spilt phase transverse differential current element of startup and shut off protection of generator

57 Op_ETDiff_StShut_Gen Operation of differential current element of excitation transformer during startup and shutoff of generator

58 Op_StaROV_StShut_Gen Operation of residual over voltage element of startup and shut off protection of generator

59 Op_OC1_ET Operation of stage 1 of overcurrent protection of excitation transformer

60 Op_OC2_ET Operation of stage 2 of overcurrent protection of excitation transformer

61 Op_InstDiff_Tr Operation element of instantaneous unrestrained differential protection of main transformer

62 Op_PcntDiff_Tr Operation element of percentage differential protection of main transformer

63 Op_DPFC_Diff_Tr Operation element of DPFC percentage differential protection of main transformer

64 Op_OC11_Tr Operation element of stage 1 with time delay 1 of overcurrent protection at HV side of main transformer




68 Op_ROC11_Tr Operation element of stage 1 with time delay 1 of zero sequence overcurrent protection at HV side of main transformer









74 Op_TrDiff_StShut_Gen Operation of differential current element of main transformer during startup and shut off of generator

75 Op_STDiff_StShut_Gen Operation of differential current element of auxiliary transformer during startup and shut off of generator

76 Op_InstDiff_GTU Operation element of instantaneous unrestrained differential protection of generator-transformer unit

77 Op_PcntDiff_GTU Operation element of percentage differential protection of generator-transformer unit

78 Op_InstREF_Tr Operation element of instantaneous restrict earth fault protection of main transformer

79 Op_PcntREF_Tr Operation element of percentage restrict earth fault protection of main transformer

80 Op_Z11_Tr Operation element of stage 1 with time delay 1 of phase-to-phase impedance protection at HV side of main transformer




84 Op_ROV1_Gap_Tr Operation element of stage 1 of residual over voltage protection of air gap of main transformer

85 Op_ROV2_Gap_Tr Operation element of stage 2 of residual over voltage protection of air gap of main transformer




86 Op_ROC1_Gap_Tr Operation element of stage 1 of residual over current protection of air gap of main transformer

87 Op_ROC2_Gap_Tr Operation element of stage 2 of residual over current protection of air gap of main transformer

88 Op_PD1 Operation element of stage 1 of pole disagreement protection at HV side of main transformer

89 Op_PD2 Operation element of stage 2 of pole disagreement protection at HV side of main transformer

90 Op_InstREF_ST Operation element of instantaneous restrict earth fault protection of stepdown transformer

91 Op_PcntREF_ST Operation element of percentage restrict earth fault protection of stepdown transformer

92 Op_InstDiff_ST Operation element of instantaneous unrestrained differential protection of stepdown transformer

93 Op_PcntDiff_ST Operation element of percentage differential protection of stepdown transformer

94 Op_OC1_HVS_ST Operation element of stage 1 of overcurrent protection at HV side of stepdown transformer

95 Op_OC2_HVS_ST Operation element of stage 2 of overcurrent protection at HV side of stepdown transformer

96 Op_OC1_LVS_ST Operation element of stage 1 of overcurrent protection at LV side of stepdown transformer

97 Op_OC2_LVS_ST Operation element of stage 2 of overcurrent protection at LV side of stepdown transformer

98 Op_ROC1_LVS_ST Operation element of stage 1 of residual overcurrent protection at LV side of stepdown transformer

99 Op_ROC2_LVS_ST Operation element of stage 2 of residual overcurrent protection at LV side of stepdown transformer

100 Op_OvExc1_Tr Operation element of stage 1 of over excitation protection of main transformer

101 Op_OvExc2_Tr Operation element of stage 2 of over excitation protection of main transformer

102 Op_InvOvExc_Tr Operation element of reverse time over excitation protection of main transformer

103 Op_MechRly1 Operation of repeater of external mechanical input 1







107 Op_UrgBrake Operation of urgency brake of generator

8.2.2.3 Alarm report

Whenever there is an un-eliminated internal failure record in the relay, the default display will be replaced by alarm report.

Figure 8-6 Alarm display of RCS-985A All the alarm elements listed below may be displayed.

Table 8-3 List of alarm elements NO. Alarm Element Brief description

1. Alm_SwOv_VTS1_Gen Alarm indicating VT1 circuit failure and start to switch over voltage circuit.

2. Alm_SwOv_VTS2_Gen Alarm indicating VT2 circuit failure and start to switch over voltage circuit.

3. Alm_BlkV3rdHDiff_VTS1 Alarm indicating VT1 circuit failure and blocking 3rd harmonics voltage differential protection.

4. Alm_BlkIntTurn_VTS2 Alarm indicating VT2 circuit failure and blocking interturn protection.

5. Alm_VTS_HVS_Tr Alarm indicating secondary circuit failure of VT at HV side of main transformer.

6. Alm_VTS1_Term_Gen Alarm indicating secondary circuit failure of VT1 at generator terminal.

7. Alm_VTS2_Term_Gen Alarm indicating secondary circuit failure of VT2 at generator terminal.



NO. Alarm Element Brief description

8. Alm_VTS_NP_Gen Alarm indicating secondary circuit failure of VT at the neutral point of generator.

9. Alm_DeltVTS1_Term_Gen Alarm indicating secondary circuit failure at open-delta side of VT1 at generator terminal.

10. Alm_DeltVTS2_Term_Gen Alarm indicating secondary circuit failure at open-delta side of VT2 at generator terminal.

11. Alm_VTS_RotWdg Alarm indicating secondary circuit failure of VT for rotor earth fault protection.

12. Alm_Pos_CB_HVS1_Tr Alarm indicating the position of circuit breaker of branch 1 at HV side is abnormal.

13. Alm_Pos_CB_HVS2_Tr Alarm indicating the position of circuit breaker of branch 2 at HV side is abnormal.

14. Alm_VTS_LossExc_RotWdg

Alarm indicating rotor voltage circuit failure which used by loss-of-excitation protection.

15. Alm_VTS_ET Alarm indicating secondary circuit failure of VT of excitation transformer.

16. Alm_PM_DSP1_CPUBrd The DSP chip in CPU board damaged.

17. Alm_CTS_HVS1_Tr Alarm indicating secondary circuit abnormality of CT at branch 1 of HV side of transformer.

18. Alm_CTS_HVS2_Tr Alarm indicating secondary circuit abnormality of CT at branch 2 of HV side of transformer.

19. Alm_CTS_Term_Gen Alarm indicating secondary circuit abnormality of CT at generator terminal.

20. Alm_CTS_NP_Gen Alarm indicating secondary circuit abnormality of CT at the neutral point of generator.

21. Alm_CTS_SP1_Gen Alarm indicating secondary circuit abnormality of CT installed in splitting-phase branch1 at the neutral point of generator .

22. Alm_CTS_SP2_Gen Alarm indicating secondary circuit abnormality of CT installed in splitting-phase branch2 at the neutral point of generator.

23. Alm_CTS_S1_Exc Alarm indicating secondary circuit failure of CT at side1 of excitation set used in differential protection of excitation.

24. Alm_CTS_S2_Exc Alarm indicating secondary circuit failure of CT at side2 of excitation set used in differential protection of excitation.

25. Alm_CTS_TrvDiff_Gen Alarm indicating the secondary circuit failure of CT for transverse differential protection of generator.

26. Alm_Diff_Gen Alarm indicating differential current of generator is in excess of normally endurable level.

27. Alm_SPTDiff_Gen Alarm indicating splitting-phase transverse differential current of generator is in excess of normally endurable level.




28. Alm_Diff_ET Alarm indicating differential current of exciter is in excess of normally endurable level.

29. Alm_Diff_Exciter Alarm indicating differential current of excitation transformer is in excess of normally endurable level.

30. Alm_DPFC_IntTurn_Gen Alarm indicating operation of DPFC interturn protective element.

31. Alm_Pos_GCB Alarm indicating the position of circuit breaker at terminal of generator is abnormal.

32. Alm_CTS_Diff_Gen Alarm indicating secondary circuit failure of CTs used for differential protection of generator.

33. Alm_CTS_SPTDiff_Gen Alarm indicating secondary circuit failure of CTs used for splitting-phase transverse differential protection of generator.

34. Alm_CTS_Diff_ET Alarm indicating secondary circuit failure of CT used in excitation transformer differential protection.

35. Alm_CTS_Diff_Exciter Alarm indicating secondary circuit failure of CT used in exciter differential protection.

36. Alm_BO_OC2_Gen Alarm indicating operation of overcurrent element used for driving a set of contact to block other circuit.

37. Alm_On_2PEF_RotWdg Alarm indicating 2 points earth fault protection has been put input operation after operation of 1 point earth fault protection of rotor.

38. Alm_Ext_OOS_Gen Alarm indicating out-of-step of system occurs while its oscillation center is outside protective zone.

39. Alm_Int_OOS_Gen Alarm indicating out-of-step of system occurs and its oscillation center is inside protective zone.

40. Alm_Accel_OOS_Gen Alarm indicating accelerate out-of-step occurs. 41. Alm_Decel_OOS_Gen Alarm indicating decelerate out-of-step occurs.

42. Alm_LossExc_Gen Alarm indicating operation of loss-of-excitation protective element.

43. Alm_OvExc_Gen Alarm indicating operation of over excitation protective element.

44. Alm_OvLd_Sta Alarm indicating operation of overload element of stator.

45. Alm_NegOC_Sta Alarm indicating operation of negative overcurrent protective element of stator.

46. Alm_OvLd_RotWdg Alarm indicating operation of overload protective element of rotor winding.

47. Alm_ROV_Sta Alarm indicating operation of sensitive stage of ROV protection of stator earth fault.

48. Alm_V3rdHRatio_Sta Alarm indicating operation of 3rd harmonics ratio earth fault protective element of stator.




49. Alm_V3rdHDiff_Sta Alarm indicating operation of 3rd harmonics differential earth fault protective element of stator.

50. Alm_Sens_1PEF_RotWdg Alarm indicating operation of sensitive stage of 1 point earth fault protective element of rotor.

51. Alm_1PEF_RotWdg Alarm indicating operation of normal stage of 1 point earth fault protective element of rotor.

52. Alm_UF1_Gen Alarm indicating operation of stage 1 of under frequency protective element of generator.




56. Alm_OF1_Gen Alarm indicating operation of stage 1 of over frequency protective element of generator.

57. Alm_OF2_Gen Alarm indicating operation of stage 2 of over frequency protective element of generator.

58. Alm_RevP_Gen Alarm indicating operation of reverse power protection.

59. Alm_BO_UC_OvSp_Gen Alarm indicating operation of electric over speed protection of generator.

60. Alm_VTS_Term_Gen Alarm indicating secondary circuit failure of VT at generator terminal.

61. Alm_VTS_HVS_Tr Alarm indicating secondary circuit failure of VT at HV side of main transformer.

62. Alm_VTS_LVS_ST Alarm indicating secondary circuit failure of VT at LV side of stepdown transformer.

63. Alm_MechRly1 Alarm indicating operation of mechanical repeater 1. 64. Alm_MechRly2 Alarm indicating operation of mechanical repeater 2. 65. Alm_MechRly3 Alarm indicating operation of mechanical repeater 3. 66. Alm_MechRly4 Alarm indicating operation of mechanical repeater 4. 67. Alm_OvLd_Tr Alarm indicating overload of main transformer.

68. Alm_InitCool2_OvLd_Tr Alarm indicating stage 2 of initial cooling of main transformer.

69. Alm_InitCool1_OvLd_Tr Alarm indicating stage 1 of initial cooling of main transformer.

70. Alm_InitCool2_OvLd_ST Alarm indicating stage 2 of initial cooling of stepdown transformer.

71. Alm_OvLd_ST Alarm indicating overload of stepdown transformer. 72. Alm_PwrLoss_MechRly Alarm indicating power loss of mechanical relay.

73. Alm_InitCool1_OvLd_ST Alarm indicating stage 1 of initial cooling of stepdown transformer.



NO. Alarm Element Brief description 74. Alm_PM_DSP2_CPUBrd Alarm indicating DSP2 in CPU module damaged.

75. Alm_CTS_HVS1_Tr Alarm indicating secondary circuit failure of CT at branch 1 of HV side of main transformer.

76. Alm_CTS_HVS2_Tr Alarm indicating secondary circuit failure of CT at branch 2 of HV side of main transformer.

77. Alm_CTS_LVS_Tr Alarm indicating secondary circuit failure of CT at LV side of main transformer.

78. Alm_CTS_HVS_ST Alarm indicating secondary circuit failure of HV side of stepdown transformer.

79. Alm_CTS_HVS_Tr Alarm indicating secondary circuit failure of CT at HV side of main transformer.

80. Alm_REF_Tr Alarm indicating the zero sequence differential current is abnormal in REF differential protection of main transformer.

81. Alm_CTS2_HVS_ST Alarm indicating secondary circuit failure of CT1 at HV side of stepdown transformer.

82. Alm_CTS1_HVS_ST Alarm indicating secondary circuit failure of CT2 at HV side of stepdown transformer.

83. Alm_CTS_LVS_ST Alarm indicating secondary circuit failure of CT at LV side of stepdown transformer.

84. Alm_REF_ST Alarm indicating the zero sequence differential current is abnormal in REF differential protection of stepdown transformer.

85. Alm_Diff_GTU Alarm indicating the differential current is abnormal in differential protection of generator and transformer unit.

86. Alm_Diff_Tr Alarm indicating the differential current is abnormal in differential protection of main transformer.

87. Alm_Diff_ST Alarm indicating the differential current is abnormal in differential protection of stepdown transformer.

88. Alm_CTS_Diff_GTU Alarm indicating secondary circuit failure of CT in differential protection of generator and transformer unit.

89. Alm_CTS_Diff_Tr Alarm indicating secondary circuit failure of CT in differential protection of main transformer.

90. Alm_CTS_Diff_ST Alarm indicating secondary circuit failure of CT in differential protection of stepdown transformer.

91. Alm_OvLd_LVS_ST Alarm indicating overload at LV side of stepdown transformer.

92. Alm_OvExc_Tr Alarm indicating over excitation of main transformer. 93. Alm_UrgBrake Alarm indicating emergency brake of generator. 94. Alm_Inconsist_MechRly Alarm indicating circuit of mechanical is abnormal.

95. Alm_PoleDisagr_CB Alarm indicating the binary input of pole disagreement is in excess of 10s.




96. Alm_ROV_LVS_Tr Alarm indicating operation of ROV protection of LV side of main transformer.

97. Alm_ROV_LVS_ST Alarm indicating operation of ROV protection of LV side of stepdown transformer.

98. Alm_RAM_CPUBrd CPU module RAM damaged. 99. Alm_ROM_CPUBrd CPU module flash memory damaged.

100. Alm_EEPROM_CPUBrd CPU module EEPROM damaged judged by the mismatch of summation of all the settings with the CRC code .

101. Alm_InvalidSetting Without modifying protection setting after modification of rated secondary current of CT.

102. Alm_ModifiedSetting In the proceeding of setting parameters.

103. Alm_PwrLoss_Opto Loss of power supply of the optical couplers for binary inputs.

104. Alm_TripOutput Driving transistor of binary output damaged.

105. Alm_InnerComm Alarm indicating that the communication between MON and CPU interrupts.

106. Alm_DSP_CPUBrd The DSP chip in CPU board damaged.

107. Alm_PersistFD_CPUBrd Duration of pickup of any fault detector in CPU board is in excess of 10s.

108. Alm_InconsistFD Mismatch of pickup of same type fault detectors in CPU and MON.

109. Alm_Sample_CPUBrd Failure of sampled data in CPU board.

110. Alm_BI_CPUBrd Any one of binary input sampled directly doesn’t match with that of recognition of protection itself.

111. Alm_RAM_MONBrd MON module RAM damaged. 112. Alm_ROM_MONBrd MON module flash memory damaged. 113. Alm_EEPROM_MONBrd MON module EEPROM damaged. 114. Alm_DSP_MONBrd The DSP chip in MON board damaged.

115. Alm_PersistFD_MONBrd Duration of pickup of any fault detector in MON board is in excess of 10s.

116. Alm_MONBrd MON module damaged. 117. Alm_Sample_MONBrd Failure of sampled data in MON board.

8.2.2.4 Change of Binary inputs

Whenever there is change of state of any binary input, the default display will be replaced by change report of binary input as shown as below.



Figure 8-7 Binary input state changing display of RCS-985A All the binary inputs listed below may be displayed.

Table 8-4 List of binary input change elements NO. BI_Chg Element Brief description 1 EBI_Diff_Gen Enabling binary input of differential protection of generator

2 EBI_IntTurn_Gen Enabling binary input of turn-to-turn protection of generator

3 EBI_ROV_Sta Enabling binary input of residual overvoltage stator earth fault protection of generator

4 EBI_V3rdH_Sta Enabling binary input of 3rd harmonics stator earth fault protection of generator

5 EBI_1PEF_RotWdg Enabling binary input of 1 point rotor earth fault protection of generator

6 EBI_2PEF_RotWdg Enabling binary input of 2 point rotor earth fault protection of generator

7 EBI_OvLd_Sta Enabling binary input of stator overload protection of generator

8 EBI_NegOC_Sta Enabling binary input of stator negative sequence overcurrent protection of generator

9 EBI_LossExc_Gen Enabling binary input of loss-of-excitation protection of generator

10 EBI_OOS_Gen Enabling binary input of loss-of-step protection of generator

11 EBI_VoltProt_Gen Enabling binary input of overvoltage protection of generator

12 EBI_OvExc_Gen Enabling binary input of overexcitation protection of generator

13 EBI_PwrProt_Gen Enabling binary input of reverse power protection of generator

14 EBI_FreqProt_Gen Enabling binary input of frequency protection of generator



NO. BI_Chg Element Brief description

15 EBI_AccEnerg_Gen Enabling binary input of accidental energization protection of generator

16 EBI_StShut_Gen Enabling binary input of startup and shutdown protection of generator

17 EBI_Diff_Exc Enabling binary input of differential protection of excitation set

18 EBI_Bak_Exc Enabling binary input of backup protection of excitation set

19 EBI_Trp_MechRly3 Enabling binary input of tripping function of repeater of mechanical input 3




23 EBI_PPF_Gen Enabling binary input of backup protection of generator

24 EBI_SPTDiff_Gen Enabling binary input of phase-splitting transverse differential protection of generator

25 BI_UrgBrake Binary input indicating urgent braking of generator

26 BI_SyncCondenser Binary input indicating synchronism condenser is put into operation

27 BI_Reserved Reserved binary input

28 BI_Guard_MechRly Binary input indicating working condition of all other binary inputs

29 EBI_Diff_Tr Enable binary input of differential protection of transformer.

30 EBI_PPF_Tr Enabling binary input of phase-to-phase backup protection of transformer.

31 EBI_EF_Tr Enabling binary input of earth fault protection of transformer.

32 EBI_REF_Tr Enabling binary input of restrict earth fault protection of transformer.

33 EBI_Diff_GTU Enabling binary input of differential protection of generator-transformer unit.

34 EBI_Reserved1 Reserved binary input 1

35 EBI_Diff_ST Enabling binary input of differential protection of stepdown transformer.

36 EBI_Bak_HVS_ST Enabling binary input of backup protection of HV side of stepdown transformer.

37 EBI_Bak_LVS_ST Enabling binary input of backup protection of LV side of stepdown transformer.




38 EBI_REF_ST Enabling binary input of restrict earth fault protection of stepdown transformer.



41 BI_Print Binary input represents the print button.

42 BI_Pulse_GPS Binary input of GPS clock synchronous pulse.

43 BI_ResetTarget Binary input of signal reset button.

44 BI_PS_Opto Binary input indicating the working state of power supply of optical isolators

45 BI_MechRly2 Binary input indicating the position of mechanical input 2




49 BI_PS_MechRly Binary input indicating the working state of power supply of mechanical input circuit

50 BI_52b_GCB Binary input indicating the position of breaker at generator terminal

51 BI_52b_CB_HVS1_Tr Binary input of auxiliary contact of close position of circuit breaker at branch 1 of HV side of transformer.

52 BI_52b_CB_HVS2_Tr Binary input of auxiliary contact of close position of circuit breaker at branch 2 of HV side of transformer.

53 BI_PoleDisagr_CB Binary input of pole disagreement of circuit breaker.

54 BI_Valve_Turbine Binary input indicating the valve of steam turbine is in close position.

55 MON.FD_Diff_Tr Internally generated binary input indicating operation of fault detector of differential protection of transformer.

56 MON.FD_PPF&EF_T Internally generated binary input indicating operation of phase to phase fault and earth fault protection of transformer.

57 MON.FD_Diff_ST Internally generated binary input indicating operation of differential protection of stepdown transformer.

58 MON.FD_Bak_ST Internally generated binary input indicating operation of backup protection of stepdown transformer.

59 MON.FD_Diff_Gen Internally generated binary input indicating operation of fault detector of differential protection of generator.

60 MON.FD_EF_Sta Internally generated virtual binary input in MON indicating operation of the fault detector of stator earth fault protection

61 MON.FD_EF_RotWdg Internally generated virtual binary input in MON indicating operation of the fault detector of rotor earth fault protection

62 MON.FD_OvLd_Sta Internally generated virtual binary input in MON indicating operation of the fault detector of stator overload element




63 MON.FD_PPF_Gen Internally generated virtual binary input in MON indicating operation of the fault detector of backup protection of generator

64 MON.FD_OvExc_Gen Internally generated virtual binary input in MON indicating operation of the fault detector of overexcitation protection of generator

65 MON.FD_FreqProt_Gen Internally generated virtual binary input in MON indicating operation of the fault detector of frequency protection of generator

66 MON.FD_LossExc_&_OOS_Gen

Internally generated virtual binary input in MON indicating operation of the fault detector of loss-of-excitation protection of generator

67 MON.FD_Pwr&AccEnerg_Gen

Internally generated virtual binary input in MON indicating operation of the fault detector of power protection or accidental energization protection of generator

68 MON.FD_StShut_Gen Internally generated virtual binary input in MON indicating operation of the fault detector of startup and shutdown protection of generator

69 MON.FD_Prot_Exc Internally generated virtual binary input in MON indicating operation of the fault detector of any protection of excitation

70 MON.FD_MechRly Internally generated virtual binary input in MON indicating operation of the fault detector of mechanical protection

8.2.3 LED indications

LED indicators include：HEALTHY, VT ALARM, CT ALARM, ALARM, TRIP.

Figure 8-8 LEDs on faceplate of RCS-985A

Healthy (Green) indicates that the relay is in correct working order, and should be on at all times. It will be extinguished when some internal error in hardware or software have been detected by self-diagnosing facilities, such as setting error, RAM or ROM error, power source failure, output circuit failure and so on. The state of the healthy LED is reflected by the watchdog contact at the rear terminals of the relay. The healthy cannot light again automatically even if the failure is eliminated except that the relay is reset or powered up by manual.

VT Alarm (Yellow) indicates that the relay has found any failure of VT circuit.



CT Alarm (Yellow) indicates that the relay has found any failure of CT circuit.

Alarm (Yellow) indicates that the relay has registered an alarm. This may be triggered by one of the following failures: defective pickup, failure of analog or digital input circuit, optical isolator power loss and so on. The LED will constantly illuminate, and will extinguish, when the alarms have been cleared.

Trip (RED) indicates that the relay has issued a trip signal. It is reset when the reset button on the front of panel is pushed down or by remote resetting command.

8.2.4 Keypad

A keypad compromises 4 arrow keys ( , , and ), two adjusting keys(“+”、“-”), one ”enter” key (“ENT”) and one cancel key (“ESC”).

Figure 8-9 Keypad of RCS-985A

The keypad provides full access to the menu options of the relay, with the information displayed on the LCD, such as setting configuration, report display, printing and signal resetting.

The , , and keys are used to move the cursor. Push “ ” will enter into the main menu.

“+”、“-” change parameters or setting values.

ENT provide Enter/Execute function.

ESC is used to exit the present level in the menu tree. Brief description about keypad is given in the following table.

Key Function 1 , , and ,

arrow buttons move between selectable branches of the menu tree

2 “+”, “-“ change parameters or setting values 3 ENT provide Enter/Execute function 4 GRP setting Group selection 5 ESC exit the present level in the menu tree.



8.2.5 Menu

8.2.5.1 Menu tree

This part presents the main layout of the menu tree for the local human-machine interface (HMI). The menu tree includes menus of:

n VALUES n REPORT n PRINT n SETTINGS n CLOCK n VERSION n DEBUG

DEBUG

VERSION

CLOCK

SETTINGS

PRINT

REPORT

VALUES CPU METERING

CPU BI STATE

TR METERING

ST METERING

GEN METERING

EXC METERING

GTU METERING

Figure 8-10 View diagram of menu

The default display can be replaced by the menu when press“ ” or “ESC”.

The menu of this relay is arranged as a tree-shaped cascade structure. See Figure 8-11. The menu can be browsed using the keypad.

Starting at the default display, to enter into main menu, press “ ”.

To select the required item, use the “ ” “ ”keys.

To enter the lower level menu, select the required item and press “ENT”.

To return to the upper level menu, press “ESC” or select “0. Exit” and push “ENT”.

The menu can be browsed using the four arrow keys, following the structure shown in Figure 8-10. Thus, starting at the default display the “ ” key will display the first column heading. To select the required column heading use the “ ”and “ ” keys. To return to the default display press the clear key “ESC” from any of the column headings.



GTU DIFF PROT

TR DIFF PROT

TR PPF BAK PROT

TR EF BAK PROT

TR OVEXC PROT

GEN DIFF PROT

GEN SPTDIFF PROT

GEN INTTURN PROT

GEN PPF BAK PROT

STA EF PROT

ROTWDG EF PROT

STA OVLD PROT

STA NEGOC PROT

GEN LOSSEXC PROT

GEN OOS PROT

GEN VOLT PROT

GEN OVEXC PROT

GEN PWR PROT

GEN FREQ PROT

GEN STSHUT PROT

GEN ACCENERG PROT

EXC DIFF PROT

EXC BAK PROT

ROTWDG OVLD PROT

ST DIFF PROT

ST HVS BAK PROT

ST LVS BAK PROT

ACTIVE SETTINGS

EQUIP SETTINGS

SYSTEM SETTINGS

PROT SETTINGS

CALC SETTINGS

TRIP LOGIC

MODIFIED SETTINGS

OTHER GRP SETTINGS

VALUES

REPORT

PRINT

SETTINGS

CLOCK

VERSION

DEBUG

CPU METERING

CPU BI STATE

TRIP REPORT

ALARM REPORT

BI CHG REPORT

SETTINGS

TRIP RECORD

ALARM REPORT

BI CHG REPORT

TR PROT EBI

MENU

MON METERING

MON BI STATE

PHASE ANGLE

GEN PROT EBI

PRESENT WAVE

EQUIP SETTINGS

SYSTEM SETTINGS

ET&ST PROT EBI

PROT SETTINGS

SETTINGS COPY

CALC SETTINGS

MECH RLY EBE

AUX BI

MON FD

COMM STATUS

MEMORY IMAGE

PRI RATED CURR

SEC RATED CURR

SEC RATED VOLT

DIFF CORR COEF

SAME TO CPU METERINGSAME TO CPU BI STATE

TR PHASE ANGLE

ST PHASE ANGLE

TRIGGER

BI STATE

PHASE ANGLE

GTU DIFF WAVE

TR DIFF WAVE

TR CURR WAVE

TR HVS WAVE

ST DIFF WAVE

ST LVS WAVE

TR METERING

ST METERING

GTU METERING

GEN METERING

EXC METERING

TRIP REPORT

GTU DIFF WAVE

TR DIFF WAVE

TR CURR WAVE

TR HVS WAVE

ST DIFF WAVE

ST LVS WAVE

DIFF CURR

TR CURR

HVS VOLT

DIFF CURR

HVS CURR

LVS METERING

DIFF CURR

TRVDIFF CURR

VOLTAGE

MISC METERING

DIFF CURR

AC METERING

PS SUPERV BI

GEN PHASE ANGLE

EXC PHASE ANGLE

ST REF WAVE

GEN DIFF WAVE

GEN TRVDIFF WAVE

GEN MISC WAVE

EXC CURR WAVE

ST REF WAVE

GEN DIFF WAVE

GEN TRVDIFF WAVE

GEN VOLT WAVE

GEN MISC WAVE

EXC CURR WAVE

ST REF PROT

MECH RLY PROT

PD PROT

PROT CONFIG

TR SYS SETTINGS

GEN SYS SETTINGS

ST SYS SETTINGS

EXC SYS SETTINGS

Figure 8-11 Relay menu map of RCS-985A



8.2.5.2 Password protection

The menu structure contains two levels of access. The level of access is enabled determines what users can do by entry of password. The levels of access are summarized in the following table:

Table 8-5 Password level Access level Operations enabled Level 0 No password required

Read access to all settings, alarms, event records and fault records

Level 1 Password required

All settings modified

The password is 4 digits. The factory default passwords is sequently pressing of the keys “+”, “ ”, “ ”, “-” and “ENT”.

8.2.6 Operation instruction of Menu

The following contents are to tell user how to make use of each submenu in detail.

8.2.6.1 View CPU and MON metering values

Metering data consists of AC sampled data and phase angle in the submenu VALUES. Take viewing data relevant to differential protection of CPU metering as an example. User can view data of MON in the same way by entering “MON METERING” submenu.

Navigate the menu through the following path and you will see the interface of LCD as shown in Figure 8-12.

Main menu -> VALUES -> CPU METERING-> TR METERING ->DIFF CURR

DIFF CURR

Id_Diff_Tr: 000.00 000.00 000.00 Ie

Ir_Diff_Tr: 000.00 000.00 000.00 Ie

Id_2ndH: 000.00 000.00 000.00 Ie

Id_5thH: 000.00 000.00 000.00 Ie

Icorr_HVS1_Tr: 000.00 000.00 000.00 Ie

Icorr_HVS2_Tr: 000.00 000.00 000.00 Ie

Icorr_LVS_Tr 000.00 000.00 000.00 Ie

Icorr_HVS_ST: 000.00 000.00 000.00 Ie

Figure 8-12 LCD display of metering data

A scroll bar appears on the right means there are more rows needed to be displayed. Please press key “”to see the next page and press key “ESC” to exit to the upper level submenu.



8.2.6.2 View state of all binary inputs in CPU and MON

The status of binary input comprises enabling binary inputs and other binary inputs of auxiliary contacts.

For instance, navigate the menu through the following path and you will see the interface of LCD to see binary inputs related to generator’s protection sampled by CPU.

Main menu -> CPU BI STATE-> -> GEN PROT EBI -> [symbols]

GEN PROT EBI

EBI_Diff_Gen:

EBI_SPTDiff_Gen:

EBI_PPF_Gen:

EBI_IntTurn_Gen:

0

EBI_ROV_Sta:

0

0

0

0

EBI_V3rd_Sta: 0

EBI_1PEF_RotWdg: 0

EBI_2PEF_RotWdg: 0

Figure 8-13 LCD display of status of binary inputs

Press key “ESC” to exit to the submenu.

8.2.6.3 View phase angle

Entering into “PHASE ANGLE” submenu, the calculated angles between sampled voltages or between sampled voltages and currents by CPU system will be displayed on LCD as shown below, which can be used to check the correctness of secondary circuit wiring.

The angles displayed is that the former value leading to the later one, which varies from -180～＋180, as shown as figure below for example.



GEN PHASE ANGLE

φ_Term_Gen_&_NP_Gen:

φ_SP1_Gen_&_SP2_Gen:

φipp_Term_Gen:

φipp_NP_Gen:

φipp_SP1_Gen:

φipp_SP2_Gen:

φvpp_VT1_Term_Gen:

φvpp_VT2_Term_Gen:

000 000 000 o

000 000 000 o

000 000 000 o

000 000 000 o

000 000 000 o

000 000 000 o

000 000 000 o

000 000 000 o

Figure 8-14 Phase angle displayed on LCD

Push “ ” key to show the other information.

Push “ESC” key to return to upper level menu.

8.2.6.4 Operation Instruction of Report menu

REPORTàTRIP REPORT

Scrolling the cursor to this submenu and press “ENT” key, the LCD will display the latest trip report if exist, otherwise a clew of “NO TRIP REPORT” will appear. If there are several trip reports stored in memory, user can look up historical record one by one by pushing “ ” key.

RCS-985A can store up to 24 latest trip reports. When the available space is exhausted, the oldest report is automatically overwritten by the new one .

Push either “ENT” or “ESC” key to return to upper level menu.

REPORT—ALARM REPORT

Scrolling the cursor to this submenu and press “ENT” key, the LCD will display the latest alarm report if exist, otherwise a clew of “NO ALARM REPORT” will appear. If there are several alarm reports stored in memory, user can look up historical record one by one by pushing “ ” key.

RCS-985A can store up to 64 latest alarm reports. When the available space is exhausted, the oldest report is automatically overwritten by the new one.

Push either “ENT” or “ESC” key to revert to upper level menu.

REPORT àBI CHG REPORT

Scrolling the cursor to this submenu and press “ENT” key, the LCD will display the last BI CHG report if exist, otherwise a clew of “NO BI CHG REPORT” will appear. If there are several BI CHG reports stored in memory, user can look up historical record one by one by pushing “ ” key.

RCS-985A can store up to 64 latest signaling reports at a resolution of 2ms. When the available space is exhausted, the oldest report is automatically overwritten by the new one



Push either “ENT” or “ESC” key to return to upper level menu.

Delete fault records and event records

If you want to delete the content of fault records or event records, you can follow the operating steps. Note you cannot select which kind of records or which one record to be deleted but delete all records.

Operating steps:

Press key “” to enter the main menu at first.

Figure 8-15 LCD display of deleting report step 1

Press keys “+”, “-”, “+”, “-”, “ENT” in sequence in the main menu to make LCD display Figure 8-16.


Press key “ENT” to delete all records or press key “ESC” to exit to main menu. If key “ENT” is pressed, LCD will display Figure 8-17 when equipment is deleting all records. If key “ESC” is pressed, Figure 8-15 will be displayed. LCD will automatically return to Figure 8-15 in 3 seconds without pressing any key.




8.2.6.5 Operation Instruction of PRINT menu

PRINTàSETTINGSà[submenu]

Used for printing of settings. The following figure gives an example of the first submenu [ACTIVE SETTINGS].

Note:

If the protection is disabled by configuring the setting in the <PROT CONFIG>, the settings of this protection element will not be printed.



Figure 8-18 Example of settings printing



PRINTàTRIP REPORT

Used for printing of trip report of protection. User can select the report that he wants to print by pushing ” ” and “ ” keys to select the SOE number. Here is an example.



Figure 8-19 Example of tripping report printing



PRINTàALARM REPORT

Used for printing of alarm. User can select the report that he wants to print by pushing ” ” and “ ” keys. Here is an example.

Figure 8-20 Example of alarm report printing

PRINT—BI CHG REPORT

Used for printing of signaling report. User can select the report that he wants to print by pushing ” ” and “ ” keys. Here is an example.



Figure 8-21 Example of BI CHG report printing

PRINTàPRESENT VALUES

Used for printing of present values of relay, including sampled binary inputs, analog qualities and so on. If you want to see the normal recording waveform, please follow the operating steps.

Operating steps:

First, please go in to the main menu by pressing key “”.

Press key or to select “PRINT” item by scrolling the cursor upward or downward and then press the “ENT” to the lower level submenu.

Then press key or to select “PRESENT WAVE” by scrolling the cursor upward or downward. Press key “ENT” to enter the lower level submenu.



Press “TRIGGER” submenu to start recording. The equipment will record 5-cycle waveform after pressing the key.

Please select the other items in the submenu “GTU DIFF WAVE” by scrolling cursor to print the waveform.

Here is an example.

Figure 8-22 Example of present values printing

8.2.6.6 Instruction of Settings Manu

SettingsàEquip Settings

To change the value of a equipment settings, first navigate the SETTING menu to display the relevant cell. Press ENT to enter the submenu, then proceed to “Equip Settings” submenu. Keys “ ” and “ ”are used to select which kind of the settings to be modified by scrolling the cursor upward or downward. Press key “ ” or “ ” to move the cursor to the digit to be modified. Press key “+” and “–” to modify data. Press key “ESC” to return back without modification. Pressing key “ENT” the LCD will prompt to input confirm password, then enter password mentioned in section 8.2.5.2 and quit to default display by pressing “ESC” key. After a period of extinguishing of the HEALTHY LED and blocking of relay itself, RCS-985A is ready for new operation to fault according to new settings, the modification is completed. The following figure shows the path to access this submenu.

SettingsàProtection settings

To change the value of a setting, first navigate the menu to “SETTING” then corresponding



submenu to display the relevant cell. Please locate the setting you want to change after entering the right submenu by operating the keypad as described before. Then go on to operate as following steps.

Press key “” or “” to move the cursor to the digit to be modified. Pressing key “+” and “–” to change the digit. Press key “+” once to add 1 to the digit and press key “–” once to subtract 1 from the digit.

Press key “ESC” to cancel the modification and return to upper level submenu.

Press key “ENT” to confirm the modification and the LCD will prompt you to input confirm code.

Figure 8-23 LCD display of inputting password

Press keys “+”,” “”, “” and “–” in sequence to complete the modification. If the password input is wrong, prompt for password will appear again. If no operation in 3 seconds, LCD will return to last display.

If the password inputted is right, then equipment will check setting and Figure 8-24 will be displayed temporarily. If there is no error in checking setting, Equipment will modify setting with Figure 8-25 displayed temporarily. Then LCD will return to upper level submenu automatically.



Figure 8-24 LCD display of equipment checking setting

Figure 8-25 LCD display of equipment modifying setting

If errors in settings are detected, the LCD will display wrong setting warning for 3 s.

Figure 8-26 LCD display of wrong setting warning



Then LCD will display the setting list for the operator to modify the wrong setting. The cursor will stay at the first wrong setting needed to be modified.

Note:

If the group number or protection system parameter is changed, all protection settings will be invalid and have to be configured again.

Attentions should be paid that before modifying the protection settings, the active group number in “Equip Settings” should modified firstly, otherwise what is modified will be applied to current active group.

SettingsàSettings Copy

The relay stores 2 setting groups from No.0 through No.1. Only present setting group is active, the others are provided for different operating conditions. The equipment settings are shared for the two setting groups, but the protection settings are independent. Generally the equipment is delivered with default settings stored in active setting group “0”. The contents of other setting groups may be invalid. Therefore after application-specific settings for group No.0 have been ready, it is necessary to copy settings of group No.0 to No. 1 setting groups, and make some modification afterwards when necessary, so as to avoid entering all settings one by one. Please copy settings as following steps.

Press key “” to enter the main menu at first.

Figure 8-27 LCD display step 1 of copying setting

Move cursor to “SETTINGS” item and press key “ENT” or key“” to enter submenu.



NA

RI-

RE

LA

YS

DEBUG

VERSION

CLOCK

PRINT

REPORT

VALUES

SETTINGS

CALC SETTINGS

PROT SETTINGS

SYSTEM SETTINGS

EQUP SETTINGS

SETTINGS COPY


Move cursor to “SETTINGS COPY” item and press “ENT” to display following interface.


Press key “+” and “–” to change digit where the cursor stays. Pressing key “+” once will add 1 to the digit and pressing key “–“once will subtract 1 from the digit. (For example: input 01)

Press “ENT” the LCD will prompt to input confirm code. Please see the figure below.



Figure 8-30 Password input interface

Please press keys “+”, “”, “” and “–” in sequence, and then the equipment will copy setting and display following interface.

Figure 8-31 LCD display of equipment copying setting

Then the contents of setting group 0 will be totally copied to setting group 1 and present active setting group will be switched to Group1.

Note:

Press “ENT” to confirm, Then settings group 0 will be totally copied to settings group 1 and present active group will be switched to group 01.

8.2.6.7 Clock set

Please set the equipment clock as following steps.

Navigate the menu:

Main menu -> CLOCK



After you press key “ENT”, the following will be displayed on the LCD.

Figure 8-32 LCD display of device clock

2007 – 02 – 05: shows the date February 5th 2007.

09: 08: 39: shows the time 09:08:39

Press keys “”, “”, “” and “” to select the digit to be modified. Press key “+” and “–” to modify data. Pressing key “+” once will add 1 to the digit and pressing key “–” once will subtract 1 from the digit.

Press key “ESC” to return to main menu without modification.

Press key “ENT” to confirm the modification and return to the main menu.

8.2.6.8 View software version

The equipment program has following parts. One is CPU module program, one is MON module program, and another is HMI module program. There are totally independent.

Navigate the menu:

Main menu -> VERSION

After you press key “ENT”, the follow will be displayed on the LCD.



VERSION

CPUBrd: RCS-985A3YD 3.12 E17F8231

2007 - 2 - 28 10:39

MONBrd: RCS-985A3YD 3.12 15A045C6

2007 - 2 - 28 10:44

HMI: RCS-985A3YD 3.12 7247

2007 - 2 - 28 10:30 T_060707

SUBQ_ID: 00024882

Figure 8-33 LCD display of software information

CPUBrd/MONBrd/HMI : shows CPU/MON/HMI module program information.

RCS-985A3YD: shows the program name of CPU/MON/HMI

3.12: shows the software version number of CPU/MON/HMI.

E17F8231: shows the CRC (check code) of CPU module program.

15A045C6: shows the CRC (check code) of MON module program.

7247: shows the CRC (check code) of HMI module program.

2007-2-28 10:39: shows that CPU software creating time is 10:39 Feb 28th 2007.

2007-2-28 10:44: shows that MON software creating time is 10:44 Feb 28th 2007.

2007-2-28 10:30: shows that HMI software creating time is 10:30 Feb 28th 2007.

T-060707: shows the project number.

SUBQ_ID: 00024882: shows management sequential number of the software

Note:

What Figure 8-33 shows is just an example to introduce the meaning of VERSION, the actual program VERSION is application-specific.

Press key “ESC” to return to upper level submenu.

8.2.6.9 DEBUG menu

COMM STATUS

This submenu is used to monitor communication condition of the equipment with external system. Display of this submenu is as follows:



485A 485 B

data received N Y frame received N Ymessage received N Ysend data N Y

Figure 8-34 Display of communication status

Columns 485A and 485B display communication condition of RS-485 port1 and RS-485 port2 respectively. If communication condition is normal, “Y” will flash in the related position. If there is flashing “N” in the position, it mean there are some problems. Please check the communication.

Table 8-6 Items of DEBUG MENU item status problem

Receive Data N Communication circuit is open or no data is sent from external system.

Valid Frame N Baud rate or protocol is wrong. Valid Address N Communication address is wrong. Send Data N There is problem in the sent message.

“Receive Data” means the equipment has received data from external system. If “N” flashes means the circuit is open or no data is sent from external system.

“Valid Frame” means the equipment has received complete frame from external system. If “N” flashes means Configuration of the baud rate or protocol is wrong.

“Valid Address” means the equipment has received related message from external system. If “N” flashes means Configuration of the address is wrong.

“Send data” means the equipment has sent data to external system. If “N” flashes means there is problem with the message.

Communication condition is normal if “Y” of all items flashes.

MEMPRY DEBUG

The LCD displays real time value in memory of CPU, DSP1 and DSP2. These data are used mainly for program debugging.

Chapter 9 Communications


Chapter 9 Communications 9.1 Introduction This section outlines the remote communications interfaces of the RCS-985A. The protection supports a choice of one of three protocols via the rear communication interface, selected via the model number by setting.

The rear EIA(RS)485 interface is isolated and is suitable for permanent connection whichever protocol is selected. The advantage of this type of connection is that up to 32 relays can be ‘daisy chained’ together using a simple twisted pair electrical connection.

It should be noted that the descriptions contained within this section do not aim to fully detail the protocol itself. The relevant documentation for the protocol should be referred to for this information. This section serves to describe the specific implementation of the protocol in the relay. The following figure shows typical scheme of communication via RS-485 port of RCS-985A used in substation automation system.

Figure 9-1 Typical scheme in substation automation system

9.2 Rear communication port of EIA(RS)485 9.2.1 Rear communication port EIA(RS)485 interface

The rear EIA(RS)485 communication port is provided by a 3-terminal screw connector located on the back of the relay. See relevant sections for details of the connection terminals. The rear port provides EIA(RS)485 serial data communication and is intended for use with a permanently wired connection to a remote control center.



Figure 9-2 RS485 port interface

The protocol provided by the relay is indicated in the relay menu in the ‘SETTINGS’ column. Using the keypad and LCD, check the communication protocol being used by the rear port according to the definition of relevant settings described in section 7.

9.2.2 EIA(RS)485 bus

The EIA(RS)485 two-wire connection provides a half-duplex fully isolated serial connection to the product. The connection is polarized and whilst the product’s connection diagrams indicate the polarization of the connection terminals it should be borne in mind that there is no agreed definition of which terminal is which. If the master is unable to communicate with the product, and the communication parameters match, then it is possible that the two-wire connection is reversed.

9.2.3 Bus termination

The EIA(RS)485 bus must have 120Ω (Ohm) ½ Watt terminating resistors fitted at either end across the signal wires – see Figure 9-2. Some devices may be able to provide the bus terminating resistors by different connection or configuration arrangements, in which case separate external components will not be required. However, this product does not provide such a facility, so if it is located at the bus terminus then an external termination resistor will be required.

9.2.4 Bus connections & topologies

The EIA(RS)485 standard requires that each device be directly connected to the physical cable that is the communications bus. Stubs and tees are expressly forbidden, as are star topologies. Loop bus topologies are not part of the EIA(RS)485 standard and are forbidden by it.

Two-core screened cable is recommended. The specification of the cable will be dependent on the application, although a multi-strand 0.5mm2 per core is normally adequate. Total cable length must not exceed 1000m. The screen must be continuous and connected to ground at one end, normally at the master connection point; it is important to avoid circulating currents, especially when the cable runs between buildings, for both safety and noise reasons.

This product does not provide a signal ground connection. If a signal ground connection is present in the bus cable then it must be ignored, although it must have continuity for the benefit of other devices connected to the bus. At no stage must the signal ground be connected to the cables screen or to the product’s chassis. This is for both safety and noise reasons.



Note:

• It is extremely important that the 120Ω termination resistors are fitted. Failure to do so will result in an excessive bias voltage that may damage the devices connected to the bus.

• As the field voltage is much higher than that required, NR cannot assume responsibility for any damage that may occur to a device connected to the network as a result of incorrect application of this voltage.

9.3 IEC60870-5-103 communication 9.3.1 Overview of IEC60870-5-103

The IEC specification IEC60870-5-103: Telecontrol Equipment and Systems, Part 5: Transmission Protocols Section 103 defines the use of standards IEC60870-5-1 to IEC60870-5-5 to perform communication with protection equipment. The standard configuration for the IEC60870-5-103 protocol is to use a twisted pair EIA(RS)485 connection over distances up to 1000m. The relay operates as a slave in the system, responding to commands from a master station.

To use the rear port with IEC60870-5-103 communication, the relay’s communication settings must be configured. To do this use the keypad and LCD user interface. Please refer to section 8.2.5 for detail instructions.

Three settings apply to the rear port using IEC60870-5-103 that are described below.

[Protocol] indicates the communication protocol.

[Equip_ID] controls the IEC60870-5-103 address of the relay. Up to 32 relays can be connected to one IEC60870-5-103 spur, and therefore it is necessary for each relay to have a unique address so that messages from the master control station are accepted by one relay only. IEC60870-5-103 uses an integer number between 0 and 254 for the relay address. It is important that no two relays have the same IEC60870-5-103 address. The IEC60870-5-103 address is then used by the master station to communicate with the relay.

[Com1_Baud (COM2_Baud)]: controls the baud rate to be used. IEC60870-5-103 communication is asynchronous. It is important that whatever baud rate is selected on the relay is the same as that set on the IEC60870-5-103 master station.

9.3.2 Messages description in IEC60870-5-103 protocol type

Messages sent to substation automation system are grouped according to IEC60870-5-103 protocol. Operation elements are sent by ASDU2 (time-tagged message with relative time), and status of Binary Input and Self-Supervision are sent by ASDU1 (time-tagged message).

9.3.2.1 Settings

Settings are transferred via Generic Service.

Note:



If the item “En_Remote_Cfg” in Equipment Settings is set as 0, to modify settings remotely will not be allowed. Moreover, Equipment Settings & System Settings are not allowed to be modified remotely whether the item “En_Remote_Cfg” is true (=1)or not.

9.3.2.2 Trip Reports

Sent by ASDU2 (time-tagged message with relative time).

FUN INF Item Name FUN INF Item Name 227 171 Op_PcntDiff_ET 227 242 Op_ROC12_Tr 227 172 Op_DPFC_IntTurn_Gen 227 243 Op_ROC21_Tr 227 173 Op_SensTrvDiff_Gen 227 244 Op_ROC22_Tr 227 174 Op_UnsensTrvDiff_Gen 227 245 Op_ROC31_Tr 227 175 Op_SensIntTurn_Gen 227 246 Op_ROC32_Tr 227 176 Op_UnsensIntTurn_Gen 227 247 Op_TrDiff_StShut_Gen 227 163 Op_InstDiff_Gen 227 248 Op_STDiff_StShut_Gen 227 164 Op_PcntDiff_Gen 227 234 Op_InstDiff_Tr 227 165 Op_DPFC_Diff_Gen 227 235 Op_PcntDiff_Tr 227 166 Op_InstSPTDiff_Gen 227 236 Op_DPFC_Diff_Tr 227 167 Op_PcntSPTDiff_Gen 227 237 Op_OC11_Tr 227 168 Op_InstDiff_Exciter 227 238 Op_OC12_Tr 227 169 Op_PcntDiff_Exciter 227 239 Op_OC21_Tr 227 170 Op_InstDiff_ET 227 240 Op_OC22_Tr 227 183 Op_OvLd_Sta 229 216 Op_ROV1_Gap_Tr 227 184 Op_InvOvLd_Sta 229 217 Op_ROV2_Gap_Tr 227 185 Op_NegOC_Sta 229 18 Op_ROC1_Gap_Tr 227 186 Op_InvNegOC_Sta 229 19 Op_ROC2_Gap_Tr 227 187 Op_OvLd_RotWdg 231 106 Op_PD1 227 188 Op_InvOvLd_RotWdg 231 107 Op_PD2 227 177 Op_SensROV_Sta 235 69 Op_InstREF_ST 227 178 Op_UnsensROV_Sta 235 70 Op_PcntREF_ST 227 179 Op_V3rdHRatio_Sta 227 249 Op_InstDiff_GTU 227 180 Op_V3rdHDiff_Sta 227 250 Op_PcntDiff_GTU 227 181 Op_1PEF_RotWdg 231 201 Op_InstREF_Tr 227 182 Op_2PEF_RotWdg 231 202 Op_PcntREF_Tr 227 201 Op_UF1_Gen 227 251 Op_Z11_Tr 227 203 Op_UF2_Gen 227 252 Op_Z12_Tr 227 204 Op_UF3_Gen 227 253 Op_Z21_Tr 227 205 Op_UF4_Gen 227 254 Op_Z22_Tr 233 128 Op_OF1_Gen 229 20 Op_InstDiff_ST 233 129 Op_OF2_Gen 229 21 Op_PcntDiff_ST 227 208 Op_Z1_Gen 229 22 Op_OC1_HVS_ST 227 209 Op_Z2_Gen 229 23 Op_OC2_HVS_ST 227 189 Op_OC1_Gen 229 24 Op_OC1_LVS_ST 227 190 Op_OC2_Gen 229 25 Op_OC2_LVS_ST



FUN INF Item Name FUN INF Item Name 227 191 Op_OV1_Gen 229 26 Op_ROC1_LVS_ST 227 192 Op_OV2_Gen 229 27 Op_ROC2_LVS_ST 227 193 Op_UV_Gen 231 108 Op_MechRly1 227 197 Op_OvExc1_Gen 231 109 Op_MechRly2 227 198 Op_OvExc2_Gen 231 153 Op_MechRly3 227 199 Op_InvOvExc_Gen 231 154 Op_MechRly4 227 221 Op_RevP_Gen 229 218 Op_UrgBrake 227 222 Op_UP_Gen 229 28 Op_OvExc1_Tr 227 224 Op_SeqTrpRevP_Gen 229 29 Op_OvExc2_Tr 227 225 Op_AccEnerg1_Gen 229 30 Op_InvOvExc_Tr 227 226 Op_AccEnerg2_Gen 231 91 TripOutp8 233 149 Op_Flash1_TCB 231 92 TripOutp9 233 150 Op_Flash2_TCB 231 93 TripOutp10 227 210 Op_LossExc1_Gen 231 94 TripOutp11 227 212 Op_LossExc2_Gen 231 95 TripOutp12 227 213 Op_LossExc3_Gen 231 96 TripOutp13 227 219 Op_Ext_OOS_Gen 231 97 TripOutp14 227 220 Op_Int_OOS_Gen 231 84 TripOutp1 227 228 Op_GenDiff_StShut_Gen 231 85 TripOutp2 227 229 Op_SPTDiff_StShut_Gen 231 86 TripOutp3 227 230 Op_ETDiff_StShut_Gen 231 87 TripOutp4 227 231 Op_StaROV_StShut_Gen 231 88 TripOutp5 227 232 Op_OC1_ET 231 89 TripOutp6 227 233 Op_OC2_ET 231 90 TripOutp7 227 241 Op_ROC11_Tr

9.3.2.3 Alarm Reports

Sent by ASDU1 (time-tagged message); FUN INF Item Name FUN INF Item Name 227 72 Alm_DeltVTS1_Term_Gen 235 72 Alm_InitCool2_OvLd_ST 227 73 Alm_DeltVTS2_Term_Gen 227 134 Alm_OvLd_ST 227 74 Alm_VTS_RotWdg 227 135 Alm_PwrLoss_MechRly 227 75 Alm_Pos_CB_HVS1_Tr 227 136 Alm_InitCool1_OvLd_ST 227 76 Alm_Pos_CB_HVS2_Tr 227 137 Alm_PM_DSP2_CPUBrd 227 77 Alm_VTS_LossExc_RotWdg 227 123 Alm_VTS_Term_Gen 227 78 Alm_VTS_ET 227 68 Alm_VTS_HVS_Tr 227 79 Alm_PM_DSP1_CPUBrd 227 125 Alm_VTS_LVS_ST 227 64 Alm_SwOv_VTS1_Gen 227 65 Alm_SwOv_VTS2_Gen 231 104 Alm_MechRly2 227 66 Alm_BlkV3rdHDiff_VTS1 231 143 Alm_MechRly4



FUN INF Item Name FUN INF Item Name 227 67 Alm_BlkIntTurn_VTS2 231 142 Alm_MechRly3 227 68 Alm_VTS_HVS_Tr 231 105 Alm_MechRly1 227 69 Alm_VTS1_Term_Gen 235 81 Alm_CTS_LVS_ST 227 70 Alm_VTS2_Term_Gen 235 73 Alm_REF_ST 227 71 Alm_VTS_NP_Gen 227 146 Alm_Diff_GTU 227 88 Alm_CTS_TrvDiff_Gen 227 147 Alm_Diff_Tr 227 89 Alm_Diff_Gen 227 148 Alm_Diff_ST 227 90 Alm_SPTDiff_Gen 227 149 Reserved 227 91 Alm_Diff_ET 227 150 Reserved 227 92 Alm_Diff_Exciter 227 151 Reserved 227 172 Alm_DPFC_IntTurn_Gen 227 138 Alm_CTS_HVS1_Tr 231 17 Alm_Pos_GCB 227 139 Alm_CTS_HVS2_Tr 227 80 Alm_CTS_Term_Gen 227 140 Alm_CTS_LVS_Tr 227 83 Alm_CTS_NP_Gen 227 141 Alm_CTS_HVS_Tr 227 84 Alm_CTS_SP1_Gen 231 193 Alm_REF_Tr 227 85 Alm_CTS_SP2_Gen 227 142 Alm_CTS2_HVS_ST 227 86 Alm_CTS_S1_Exc 227 143 Alm_CTS1_HVS_ST 227 87 Alm_CTS_S2_Exc 227 158 Alm_UrgBrake 227 100 Alm_Ext_OOS_Gen 229 215 Alm_Inconsist_MechRly 227 101 Alm_Int_OOS_Gen 229 119 Alm_PoleDisagr_CB 227 102 Alm_Accel_OOS_Gen 227 160 Alm_ROV_LVS_Tr 227 103 Alm_Decel_OOS_Gen 235 83 Alm_ROV_LVS_ST 227 104 Alm_RevP_Gen 227 152 Alm_CTS_Diff_GTU 227 105 Alm_LossExc_Gen 227 153 Alm_CTS_Diff_Tr 227 106 Alm_OvExc_Gen 227 154 Alm_CTS_Diff_ST 227 93 Alm_CTS_Diff_Gen 235 82 Alm_OvLd_LVS_ST 227 94 Alm_CTS_SPTDiff_Gen 227 95 Alm_CTS_Diff_ET 227 157 Alm_OvExc_Tr 227 96 Alm_CTS_Diff_Exciter 227 82 Alm_DSP_CPUBrd 229 213 Alm_BO_OC2_Gen 227 214 Alm_PersistFD_CPUBrd 229 123 Alm_On_2PEF_RotWdg 229 250 Alm_InconsistFD 227 115 Alm_UF1_Gen 227 217 Alm_Sample_CPUBrd 227 116 Alm_UF2_Gen 229 246 Alm_BI_CPUBrd 227 117 Alm_UF3_Gen 227 194 Alm_RAM_CPUBrd 227 118 Alm_UF4_Gen 227 195 Alm_ROM_CPUBrd 233 126 Alm_OF1_Gen 227 196 Alm_EEPROM_CPUBrd 233 127 Alm_OF2_Gen 227 223 Alm_InvalidSetting 227 121 Alm_RevP_Gen 227 81 Alm_ModifiedSetting 227 122 Alm_BO_UC_OvSp_Gen 227 202 Alm_PwrLoss_Opto 227 107 Alm_OvLd_Sta 227 200 Alm_TripOutput 227 108 Alm_NegOC_Sta 227 211 Alm_InnerComm 227 109 Alm_OvLd_RotWdg 229 202 Alm_DSP_MONBrd



FUN INF Item Name FUN INF Item Name 227 110 Alm_ROV_Sta 229 203 Alm_PersistFD_MONBrd 227 111 Alm_V3rdHRatio_Sta 227 216 Alm_MONBrd 227 112 Alm_V3rdHDiff_Sta 229 204 Alm_Sample_MONBrd 227 113 Alm_Sens_1PEF_RotWdg 229 205 Alm_RAM_MONBrd 227 114 Alm_1PEF_RotWdg 229 206 Alm_ROM_MONBrd 227 131 Alm_OvLd_Tr 229 207 Alm_EEPROM_MONBrd 235 71 Alm_InitCool2_OvLd_Tr 227 132 Alm_InitCool1_OvLd_Tr

9.3.2.4 Disturbance ACC(Actual Channel)

No. ID Name No. ID Name 64 DIFBA Ida_Diff_GTU 132 Reserved 65 DIFBB Idb_Diff_GTU 133 UDA1 Ua_LVS_ST 66 DIFBC Idc_Diff_GTU 134 UDB1 Ub_LVS_ST 67 IHA31 Icorra_HVS_GTU 135 UDC1 Uc_LVS_ST 68 IHB31 Icorrb_HVS_GTU 136 Reserved 69 IHC31 Icorrc_HVS_GTU 137 Reserved 70 INA31 Icorra_NP_Gen 138 Reserved 71 INB31 Icorrb_NP_Gen 139 UD10 U_DeltVT_LVS_ST 72 INC31 Icorrc_NP_Gen 140 Reserved 73 ICA21 Icorra_HVS_ST 141 ICA31 Icorra_LVS_ST 74 ICB21 Icorrb_HVS_ST 142 ICB31 Icorrb_LVS_ST 75 ICC21 Icorrc_HVS_ST 143 ICC31 Icorrc_LVS_ST 76 DIBA Ida_Diff_Tr 144 DIFA Ida_Diff_Gen 77 DIBB Idb_Diff_Tr 145 DIFB Idb_Diff_Gen 78 DIBC Idc_Diff_Tr 146 DIFC Idc_Diff_Gen 79 IHA11 Icorra_HVS1_Tr 147 IFA Ia_Term_Gen 80 IHB11 Icorrb_HVS1_Tr 148 IFB Ib_Term_Gen 81 IHC11 Icorrc_HVS1_Tr 149 IFC Ic_Term_Gen 82 IHA21 Icorra_HVS2_Tr 150 INA Ia_NP_Gen 83 IHB21 Icorrb_HVS2_Tr 151 INB Ib_NP_Gen 84 IHC21 Icorrc_HVS2_Tr 152 INC Ic_NP_Gen 85 IBA21 Icorra_LVS_Tr 153 DILXA Ida_SPTDiff_Gen 86 IBB21 Icorrb_LVS_Tr 154 DILXB Idb_SPTDiff_Gen 87 IBC21 Icorrc_LVS_Tr 155 DILXC Idc_SPTDiff_Gen 88 IHA Ia_HVS_Tr 156 INA1 Ia_SP1_Gen 89 IHB Ib_HVS_Tr 157 INB1 Ib_SP1_Gen 90 IHC Ic_HVS_Tr 158 INC1 Ic_SP1_Gen 91 IHA1 Ia_HVS1_Tr 159 INA2 Ia_SP2_Gen 92 IHB1 Ib_HVS1_Tr 160 INB2 Ib_SP2_Gen 93 IHC1 Ic_HVS1_Tr 161 INC2 Ic_SP2_Gen



No. ID Name No. ID Name 94 IHA2 Ia_HVS2_Tr 162 IHC Id_TrvDiff_Gen 95 IHB2 Ib_HVS2_Tr 163 RP P_Gen 96 IHC2 Ic_HVS2_Tr 164 IP Q_Gen 97 IBA Ia_LVS_Tr 165 UFA1 Ua_VT1_Term_Gen 98 IBB Ib_LVS_Tr 166 UFB1 Ub_VT1_Term_Gen 99 IBC Ic_LVS_Tr 167 UFC1 Uc_VT1_Term_Gen 100 IB0 I0_NP_HVS_Tr 168 UFA2 Ua_VT2_Term_Gen 101 IBJ0 I0_Gap_HVS_Tr 169 UFB2 Ub_VT2_Term_Gen 102 UB0 U0_DeltVT_HVS_Tr 170 UFC2 Uc_VT2_Term_Gen 103 UBF U/F_OvExc_Tr 171 U/F U/F_OvExc_Gen 104 UHA Ua_HVS_Tr 172 U0 U0_DeltVT1_Term_Gen 105 UHB Ub_HVS_Tr 173 UN U0_NP_Gen 106 UHC Uc_HVS_Tr 174 UZ U0_Longl_Gen 107 DICA Ida_Diff_ST 175 UF3 U0_3rdH_VT1_Term_Gen 108 DICB Idb_Diff_ST 176 UN3 U0_3rdH_NP_Gen 109 DICC Idc_Diff_ST 177 UFN3 Ud_3rdH_Sta 110 ICA11 Icorra_HVS_ST 178 UR+ U(+)_RotWdg 111 ICB11 Icorrb_HVS_ST 179 UR- U(-)_RotWdg 112 ICC11 Icorrc_HVS_ST 180 UR U_RotWdg 113 IDA11 Icorra_LVS_ST 181 IR I_RotWdg 114 IDB11 Icorrb_LVS_ST 182 Reserved 115 IDC11 Icorrc_LVS_ST 183 DILA Ida_Diff_Exc 116 DIH0 Id_REF_Tr 184 DILB Idb_Diff_Exc 117 DI0CB Id_REF_ST 185 DILC Idc_Diff_Exc 118 IH0 I0_HVS_Tr 186 ILA11 Icorra_S1_Exc 119 ICA1 Ia_CT1_HVS_ST 187 ILB11 Icorrb_S1_Exc 120 ICB1 Ib_CT1_HVS_ST 188 ILC11 Icorrc_S1_Exc 121 ICC1 Ic_CT1_HVS_ST 189 ILA21 Icorra_S2_Exc 122 ICA2 Ia_CT2_HVS_ST 190 ILB21 Icorrb_S2_Exc 123 ICB2 Ib_CT2_HVS_ST 191 ILC21 Icorrc_S2_Exc 124 ICC2 Ic_CT2_HVS_ST 192 ILA1 Ia_S1_Exc 125 IDA1 Ia_LVS_ST 193 ILB1 Ib_S1_Exc 126 IDB1 Ib_LVS_ST 194 ILC1 Ic_S1_Exc 127 IDC1 Ic_LVS_ST 195 ILA2 Ia_S2_Exc 128 ICB0 I0_ST 196 ILB2 Ib_S2_Exc 129 Reserved 197 ILC2 Ic_S2_Exc 130 Reserved 198 F f_Gen 131 ID10 I0_NP_LVS_ST 199 Reserved

9.3.2.5 Metering

Sent via Generic Service.



The metering values were format as IEEE STD754 R32.23.

9.3.2.6 BinaryInput

Sent by ASDU1. (time-tagged message). FUN INF Item Name FUN INF Item Name 227 25 EBI_LossExc_Gen 231 100 EBI_Trp_MechRly1 227 26 EBI_OOS_Gen 227 39 EBI_PPF_Gen 227 27 EBI_VoltProt_Gen 227 40 EBI_SPTDiff_Gen 227 28 EBI_OvExc_Gen 227 52 EBI_Bak_LVS_ST 227 29 EBI_PwrProt_Gen 227 53 EBI_REF_ST 227 30 EBI_FreqProt_Gen 229 242 EBI_Reserved2 227 31 EBI_AccEnerg_Gen 229 252 EBI_Reserved3 227 32 EBI_StShut_Gen 227 45 EBI_Diff_Tr 227 16 EBI_Diff_Gen 227 46 EBI_PPF_Tr 227 17 EBI_IntTurn_Gen 227 47 EBI_EF_Tr 227 18 EBI_ROV_Sta 227 48 EBI_REF_Tr 227 19 EBI_V3rdH_Sta 227 49 EBI_Diff_GTU 227 21 EBI_1PEF_RotWdg 229 241 EBI_Reserved1 227 22 EBI_2PEF_RotWdg 227 50 EBI_Diff_ST 227 23 EBI_OvLd_Sta 227 51 EBI_Bak_HVS_ST 227 24 EBI_NegOC_Sta 227 59 BI_52b_GCB 227 41 BI_UrgBrake 227 60 BI_52b_CB_HVS1_Tr 227 42 BI_SyncCondenser 227 61 BI_52b_CB_HVS2_Tr 229 210 BI_Reserved 229 243 BI_PoleDisagr_CB 227 44 BI_PS_Superv 227 63 BI_Valve_Turbine 231 98 EBI_Diff_Exc 231 102 BI_MechRly2 231 99 EBI_Bak_Exc 231 134 BI_MechRly4 231 129 EBI_Trp_MechRly3 231 133 BI_MechRly3 231 130 EBI_Trp_MechRly4 231 103 BI_MechRly1 231 101 EBI_Trp_MechRly2 227 58 BI_PS_MechRly

9.3.2.7 Blocking of monitoring direction

FUN = 227; INF = 20

9.3.2.8 Generic service

Group No. Group Name(English) 1 Setting_Group 2 Equip Settings 3 Protection Config 4 Tr Sys Settings 5 Gen Sys Settings 6 ST Sys Settings



Group No. Group Name(English) 7 Exc Sys Settings 8 GTU Diff Prot Settings 9 Tr Diff Prot Settings 10 Tr PPF Bak Prot Settings 11 Tr EF Bak Prot Settings 12 Tr OvExc Prot Settings 13 Gen Diff Prot Settings 14 Gen SPTDiff Prot Settings 15 Gen IntTurn Prot Settings 16 Gen PPF Bak Prot Settings 17 Sta EF Prot Settings 18 RotWdg EF Prot Settings 19 Sta OvLd Prot Settings 20 Sta NegOC Prot Settings 21 Gen LossExc Prot Settings 22 Gen OOS Prot Settings 23 Gen Volt Prot Settings 24 Gen OvExc Prot Settings 25 Gen Pwr Prot Settings 26 Gen Freq Prot Settings 27 Gen StShut Prot Settings 28 Gen AccEnerg Prot Settings 29 Exc Diff Prot Settings 30 Exc Bak Prot Settings 31 RotWdg OvLd Prot Settings 32 ST Diff Prot Settings 33 ST HVS Bak Prot Settings 34 ST LVS Bak Prot Settings 35 ST REF Prot Settings 36 MechRly Prot Settings 37 PoleDisagr Prot Settings 65 Prot Metering of Tr 66 Prot Metering of ST 67 Prot Metering of GTU 68 Prot Metering of Gen 69 Prot Metering of Exc

9.4 MODBUS protocol 9.4.1 Overview

The RCS-985A relay support several communications protocols to allow connection to equipment such as personal computers, RTUs, SCADA masters, and programmable logic controllers. The



Modicon Modbus RTU protocol is the most basic protocol supported by the RCS-985A. Modbus is available via RS485 serial links or via Ethernet (using the Modbus/TCP specification). The following information is provided intended primarily for users who wish to develop their own master communication drivers and applies to the serial Modbus RTU protocol. The characteristic is listed below:

l Standard: Modicon Modbus Protocol Reference Guide, PI-MBUS-300 Rev.E l Physical Layer Setup：RS485, 1 start bit,8 data bits, no bit for parity,1 stop bit l Link Layer Setup：Only RTU Mode Supported l Frame Length Up limit：256 Bytes l Baud Rate: Configurable l Device Address: Configurable l Parity: no

The following modbus function codes are supported but re-defined by the relay:

02 Read Input Status-Get real-time status (binary)

03 Read Holding Registers- Get Settings

04 Read Input Registers- Get metering values of equipment

9.4.2 Fetch real time status (Binary)

Function Code: 02H

Reads the ON/OFF status of discrete inputs in the slave. The status in the response message is packed as one input per bit of the data field. Status is indicated as: 1 = ON; 0 = OFF. The LSB of the first data byte contains the input addressed in the query. The other inputs follow toward the high order end of this byte, and from ‘low order to high order’ in subsequent bytes.

Example 1: If the master want to fetch Trip Information (0000H~0003H), the query frame would be as follows(Suppose the slave address was 1):

01 02 00 00 00 04 79 C9

CRC Hi

CRC Lo

Num of Status Lo

Num of Status Hi

Start Register Addr Lo

Start Register Addr Hi

Function Code

Slave Addr

The response fame would be as follows (Suppose the value of 0000H~0003H equal to 1,1,0,1



respectively):

01 0B E0 4F01 02

CRC Hi

CRC Lo

Status

Length

Function Code

Slave Addr

Example 2: If the master want to fetch Trip Information(0002H~000DH),the query frame would be as follows(Suppose the slave address was 1):

01 02 00 02 00 0C D9 CF

CRC Hi

CRC Lo

Num of Status Lo

Num of Status Hi

Start Register Addr Lo

Start Register Addr Hi

Function Code

Slave Addr

The response fame would be as follows (Suppose the value of 0002H~000DH equal to 1,1,0,1,0,0,1,0,1,1,1,0 respectively):

02 07 FB BF01 02

CRC Hi

CRC Lo

Status Hi

Length

Function Code

Slave Addr

4B

Status Lo



9.4.2.1 Trip information：“1” means trip,”0” for no trip or draw off.

Address Item Name 0000H Op_InstDiff_Gen 0001H Op_PcntDiff_Gen 0002H Op_DPFC_Diff_Gen 0003H Op_InstSPTDiff_Gen 0004H Op_PcntSPTDiff_Gen 0005H Op_InstDiff_Exciter 0006H Op_PcntDiff_Exciter 0007H Op_InstDiff_ET 0008H Op_PcntDiff_ET 0009H Op_DPFC_IntTurn_Gen 000AH Op_SensTrvDiff_Gen 000BH Op_UnsensTrvDiff_Gen 000CH Op_SensIntTurn_Gen 000DH Op_UnsensIntTurn_Gen 000EH Op_SensROV_Sta 000FH Op_UnsensROV_Sta 0010H Op_V3rdHRatio_Sta 0011H Op_V3rdHDiff_Sta 0012H Op_1PEF_RotWdg 0013H Op_2PEF_RotWdg 0014H Op_OvLd_Sta 0015H Op_InvOvLd_Sta 0016H Op_NegOC_Sta 0017H Op_InvNegOC_Sta 0018H Op_OvLd_RotWdg 0019H Op_InvOvLd_RotWdg 001AH Op_OC1_Gen 001BH Op_OC2_Gen 001CH Op_OV1_Gen 001DH Op_OV2_Gen 001EH Op_UV_Gen 001FH Op_OvExc1_Gen 0020H Op_OvExc2_Gen 0021H Op_InvOvExc_Gen 0022H Op_UF1_Gen 0023H Op_UF2_Gen 0024H Op_UF3_Gen 0025H Op_UF4_Gen 0026H Op_OF1_Gen 0027H Op_OF2_Gen



Address Item Name 0028H Op_Z1_Gen 0029H Op_Z2_Gen 002AH Op_LossExc1_Gen 002BH Op_LossExc2_Gen 002CH Op_LossExc3_Gen 002DH Op_Ext_OOS_Gen 002EH Op_Int_OOS_Gen 002FH Op_RevP_Gen 0030H Op_UP_Gen 0031H Op_SeqTrpRevP_Gen 0032H Op_AccEnerg1_Gen 0033H Op_AccEnerg2_Gen 0034H Op_Flash1_TCB 0035H Op_Flash2_TCB 0036H Op_GenDiff_StShut_Gen 0037H Op_SPTDiff_StShut_Gen 0038H Op_ETDiff_StShut_Gen 0039H Op_StaROV_StShut_Gen 003AH Op_OC1_ET 003BH Op_OC2_ET 003CH Op_InstDiff_Tr 003DH Op_PcntDiff_Tr 003EH Op_DPFC_Diff_Tr 003FH Op_OC11_Tr 0040H Op_OC12_Tr 0041H Op_OC21_Tr 0042H Op_OC22_Tr 0043H Op_ROC11_Tr 0044H Op_ROC12_Tr 0045H Op_ROC21_Tr 0046H Op_ROC22_Tr 0047H Op_ROC31_Tr 0048H Op_ROC32_Tr 0049H Op_TrDiff_StShut_Gen 004AH Op_STDiff_StShut_Gen 004BH Op_InstDiff_GTU 004CH Op_PcntDiff_GTU 004DH Op_InstREF_Tr 004EH Op_PcntREF_Tr 004FH Op_Z11_Tr 0050H Op_Z12_Tr 0051H Op_Z21_Tr



Address Item Name 0052H Op_Z22_Tr 0053H Op_ROV1_Gap_Tr 0054H Op_ROV2_Gap_Tr 0055H Op_ROC1_Gap_Tr 0056H Op_ROC2_Gap_Tr 0057H Op_PD1 0058H Op_PD2 0059H Op_InstREF_ST 005AH Op_PcntREF_ST 005BH Op_InstDiff_ST 005CH Op_PcntDiff_ST 005DH Op_OC1_HVS_ST 005EH Op_OC2_HVS_ST 005FH Op_OC1_LVS_ST 0060H Op_OC2_LVS_ST 0061H Op_ROC1_LVS_ST 0062H Op_ROC2_LVS_ST 0063H Op_OvExc1_Tr 0064H Op_OvExc2_Tr 0065H Op_InvOvExc_Tr 0066H Op_MechRly1 0067H Op_MechRly2 0068H Op_MechRly3 0069H Op_MechRly4 006AH Op_UrgBrake 006BH TripOutp1 006CH TripOutp2 006DH TripOutp3 006EH TripOutp4 006FH TripOutp5 0070H TripOutp6 0071H TripOutp7 0072H TripOutp8 0073H TripOutp9 0074H TripOutp10 0075H TripOutp11 0076H TripOutp12 0077H TripOutp13 0078H TripOutp14



9.4.2.2 Alarm information：“1” means alarm,”0” for no alarm or draw off.

Address Item Name 1000H Alm_SwOv_VTS1_Gen 1001H Alm_SwOv_VTS2_Gen 1002H Alm_BlkV3rdHDiff_VTS1 1003H Alm_BlkIntTurn_VTS2 1004H Alm_VTS_HVS_Tr 1005H Alm_VTS1_Term_Gen 1006H Alm_VTS2_Term_Gen 1007H Alm_VTS_NP_Gen 1008H Alm_DeltVTS1_Term_Gen 1009H Alm_DeltVTS2_Term_Gen 100AH Alm_VTS_RotWdg 100BH Alm_Pos_CB_HVS1_Tr 100CH Alm_Pos_CB_HVS2_Tr 100DH Alm_VTS_LossExc_RotWdg 100EH Alm_VTS_ET 100FH Alm_PM_DSP1_CPUBrd 1010H Alm_CTS_Term_Gen 1011H Alm_CTS_NP_Gen 1012H Alm_CTS_SP1_Gen 1013H Alm_CTS_SP2_Gen 1014H Alm_CTS_S1_Exc 1015H Alm_CTS_S2_Exc 1016H Alm_CTS_TrvDiff_Gen 1017H Alm_Diff_Gen 1018H Alm_SPTDiff_Gen 1019H Alm_Diff_ET 101AH Alm_Diff_Exciter 101BH Alm_DPFC_IntTurn_Gen 101CH Alm_Pos_GCB 101DH Alm_CTS_Diff_Gen 101EH Alm_CTS_SPTDiff_Gen 101FH Alm_CTS_Diff_ET 1020H Alm_CTS_Diff_Exciter 1021H Alm_BO_OC2_Gen 1022H Alm_On_2PEF_RotWdg 1023H Alm_Ext_OOS_Gen 1024H Alm_Int_OOS_Gen 1025H Alm_Accel_OOS_Gen 1026H Alm_Decel_OOS_Gen 1027H Alm_RevP_Gen



Address Item Name 1028H Alm_LossExc_Gen 1029H Alm_OvExc_Gen 102AH Alm_OvLd_Sta 102BH Alm_NegOC_Sta 102CH Alm_OvLd_RotWdg 102DH Alm_ROV_Sta 102EH Alm_V3rdHRatio_Sta 102FH Alm_V3rdHDiff_Sta 1030H Alm_Sens_1PEF_RotWdg 1031H Alm_1PEF_RotWdg 1032H Alm_UF1_Gen 1033H Alm_UF2_Gen 1034H Alm_UF3_Gen 1035H Alm_UF4_Gen 1036H Alm_OF1_Gen 1037H Alm_OF2_Gen 1038H Alm_RevP_Gen 1039H Alm_BO_UC_OvSp_Gen 103AH Alm_VTS_Term_Gen 103BH Alm_VTS_HVS_Tr 103CH Alm_VTS_LVS_ST 103DH Alm_MechRly2 103EH Alm_MechRly4 103FH Alm_MechRly3 1040H Alm_MechRly1 1041H Alm_OvLd_Tr 1042H Alm_InitCool2_OvLd_Tr 1043H Alm_InitCool1_OvLd_Tr 1044H Alm_InitCool2_OvLd_ST 1045H Alm_OvLd_ST 1046H Alm_PwrLoss_MechRly 1047H Alm_InitCool1_OvLd_ST 1048H Alm_PM_DSP2_CPUBrd 1049H Alm_CTS_HVS1_Tr 104AH Alm_CTS_HVS2_Tr 104BH Alm_CTS_LVS_Tr 104CH Alm_CTS_HVS_Tr 104DH Alm_REF_Tr 104EH Alm_CTS2_HVS_ST 104FH Alm_CTS1_HVS_ST 1050H Alm_CTS_LVS_ST 1051H Alm_REF_ST



Address Item Name 1052H Alm_Diff_GTU 1053H Alm_Diff_Tr 1054H Alm_Diff_ST 1055H Reserved1 1056H Reserved2 1057H Reserved3 1058H Alm_CTS_Diff_GTU 1059H Alm_CTS_Diff_Tr 105AH Alm_CTS_Diff_ST 105BH Alm_OvLd_LVS_ST 105CH Alm_OvExc_Tr 105DH Alm_UrgBrake 105EH Alm_Inconsist_MechRly 105FH Alm_PoleDisagr_CB 1060H Alm_ROV_LVS_Tr 1061H Alm_ROV_LVS_ST 1062H Alm_RAM_CPUBrd 1063H Alm_ROM_CPUBrd 1064H Alm_EEPROM_CPUBrd 1065H Alm_InvalidSetting 1066H Alm_ModifiedSetting 1067H Alm_PwrLoss_Opto 1068H Alm_TripOutput 1069H Alm_InnerComm 106AH Alm_DSP_CPUBrd 106BH Alm_PersistFD_CPUBrd 106CH Alm_InconsistFD 106DH Alm_Sample_CPUBrd 106EH Alm_BI_CPUBrd 106FH Alm_RAM_MONBrd 1070H Alm_ROM_MONBrd 1071H Alm_EEPROM_MONBrd 1072H Alm_DSP_MONBrd 1073H Alm_PersistFD_MONBrd 1074H Alm_MONBrd 1075H Alm_Sample_MONBrd

9.4.2.3 BinaryInput Change Information. “1” means binary change,”0” for no change or draw off.

Address Item Name



Address Item Name 2000H EBI_Diff_Gen 2001H EBI_IntTurn_Gen 2002H EBI_ROV_Sta 2003H EBI_V3rdH_Sta 2004H EBI_1PEF_RotWdg 2005H EBI_2PEF_RotWdg 2006H EBI_OvLd_Sta 2007H EBI_NegOC_Sta 2008H EBI_LossExc_Gen 2009H EBI_OOS_Gen 200AH EBI_VoltProt_Gen 200BH EBI_OvExc_Gen 200CH EBI_PwrProt_Gen 200DH EBI_FreqProt_Gen 200EH EBI_AccEnerg_Gen 200FH EBI_StShut_Gen 2010H EBI_Diff_Exc 2011H EBI_Bak_Exc 2012H EBI_Trp_MechRly3 2013H EBI_Trp_MechRly4 2014H EBI_Trp_MechRly2 2015H EBI_Trp_MechRly1 2016H EBI_PPF_Gen 2017H EBI_SPTDiff_Gen 2018H BI_UrgBrake 2019H BI_SyncCondenser 201AH BI_Reserved 201BH BI_PS_Superv 201CH EBI_Diff_Tr 201DH EBI_PPF_Tr 201EH EBI_EF_Tr 201FH EBI_REF_Tr 2020H EBI_Diff_GTU 2021H EBI_Reserved1 2022H EBI_Diff_ST 2023H EBI_Bak_HVS_ST 2024H EBI_Bak_LVS_ST 2025H EBI_REF_ST 2026H EBI_Reserved2 2027H EBI_Reserved3 2028H BI_MechRly2 2029H BI_MechRly4



Address Item Name 202AH BI_MechRly3 202BH BI_MechRly1 202CH BI_PS_MechRly 202DH BI_52b_GCB 202EH BI_52b_CB_HVS1_Tr 202FH BI_52b_CB_HVS2_Tr 2030H BI_PoleDisagr_CB 2031H BI_Valve_Turbine

9.4.3 Fetch metering values of equipment

Function Code: 04H

The metering values in the response message are packed as two bytes per register. For each register, the first byte contains the high order bits and the second contains the low order bits.

9.4.3.1 Tr Metering

Address Analog Name Unit 0000H Ida_Diff_Tr(decimal digits=2) Ie 0001H Idb_Diff_Tr(decimal digits=2) Ie 0002H Idc_Diff_Tr(decimal digits=2) Ie 0003H Ira_Diff_Tr(decimal digits=2) Ie 0004H Irb_Diff_Tr(decimal digits=2) Ie 0005H Irc_Diff_Tr(decimal digits=2) Ie 0006H Ida_2ndH(decimal digits=2) Ie 0007H Idb_2ndH(decimal digits=2) Ie 0008H Idc_2ndH(decimal digits=2) Ie 0009H Ida_5thH(decimal digits=2) Ie 000AH Idb_5thH(decimal digits=2) Ie 000BH Idc_5thH(decimal digits=2) Ie 000CH Icorra_HVS1_Tr(decimal digits=2) Ie 000DH Icorrb_HVS1_Tr(decimal digits=2) Ie 000EH Icorrc_HVS1_Tr(decimal digits=2) Ie 000FH Icorra_HVS2_Tr(decimal digits=2) Ie 0010H Icorrb_HVS2_Tr(decimal digits=2) Ie 0011H Icorrc_HVS2_Tr(decimal digits=2) Ie 0012H Icorra_LVS_Tr(decimal digits=2) Ie 0013H Icorrb_LVS_Tr(decimal digits=2) Ie 0014H Icorrc_LVS_Tr(decimal digits=2) Ie 0015H Icorra_HVS_ST(decimal digits=2) Ie 0016H Icorrb_HVS_ST(decimal digits=2) Ie 0017H Icorrc_HVS_ST(decimal digits=2) Ie



Address Analog Name Unit 0018H Id_1stH_REF_Tr(decimal digits=2) In 0019H Ir_REF_Tr(decimal digits=2) In 001AH I0_Tr(decimal digits=2) In 001BH I0_NP_Tr(decimal digits=2) In 001CH Ia_HVS1_Tr(decimal digits=2) A 001DH Ib_HVS1_Tr(decimal digits=2) A 001EH Ic_HVS1_Tr(decimal digits=2) A 001FH I1_HVS1_Tr(decimal digits=2) A 0020H I2_HVS1_Tr(decimal digits=2) A 0021H I0_HVS1_Tr(decimal digits=2) A 0022H Ia_HVS2_Tr(decimal digits=2) A 0023H Ib_HVS2_Tr(decimal digits=2) A 0024H Ic_HVS2_Tr(decimal digits=2) A 0025H I1_HVS2_Tr(decimal digits=2) A 0026H I2_HVS2_Tr(decimal digits=2) A 0027H I0_HVS2_Tr(decimal digits=2) A 0028H Ia_LVS_Tr(decimal digits=2) A 0029H Ib_LVS_Tr(decimal digits=2) A 002AH Ic_LVS_Tr(decimal digits=2) A 002BH I1_LVS_Tr(decimal digits=2) A 002CH I2_LVS_Tr(decimal digits=2) A 002DH I0_LVS_Tr(decimal digits=2) A 002EH Ia_HVS_Tr(decimal digits=2) A 002FH Ib_HVS_Tr(decimal digits=2) A 0030H Ic_HVS_Tr(decimal digits=2) A 0031H Iab_HVS_Tr(decimal digits=2) A 0032H Ibc_HVS_Tr(decimal digits=2) A 0033H Ica_HVS_Tr(decimal digits=2) A 0034H I1_HVS_Tr(decimal digits=2) A 0035H I2_HVS_Tr(decimal digits=2) A 0036H I0_HVS_Tr(decimal digits=2) A 0037H I0_NP_HVS_Tr(decimal digits=2) A 0038H I0_Gap_HVS_Tr(decimal digits=2) A 0039H Ua_HVS_Tr(decimal digits=2) V 003AH Ub_HVS_Tr(decimal digits=2) V 003BH Uc_HVS_Tr(decimal digits=2) V 003CH Uab_HVS_Tr(decimal digits=2) V 003DH Ubc_HVS_Tr(decimal digits=2) V 003EH Uca_HVS_Tr(decimal digits=2) V 003FH U1_HVS_Tr(decimal digits=2) V 0040H U2_HVS_Tr(decimal digits=2) V 0041H U0_HVS_Tr(decimal digits=2) V



Address Analog Name Unit 0042H U0_DeltVT_HVS_Tr(decimal digits=2) V 0043H U0_DeltVT_LVS_Tr(decimal digits=2) V 0044H U/F_OvExc_Tr(decimal digits=3) 0045H Accu_InvOvExc_Tr(decimal digits=3) %

9.4.3.2 ST Metering

Address Analog Name Unit 1000H Ida_Diff_ST(decimal digits=2) Ie 1001H Idb_Diff_ST(decimal digits=2) Ie 1002H Idc_Diff_ST(decimal digits=2) Ie 1003H Ira_Diff_ST(decimal digits=2) Ie 1004H Irb_Diff_ST(decimal digits=2) Ie 1005H Irc_Diff_ST(decimal digits=2) Ie 1006H Ida_2ndH(decimal digits=2) Ie 1007H Idb_2ndH(decimal digits=2) Ie 1008H Idc_2ndH(decimal digits=2) Ie 1009H Icorra_HVS_ST(decimal digits=2) Ie 100AH Icorrb_HVS_ST(decimal digits=2) Ie 100BH Icorrc_HVS_ST(decimal digits=2) Ie 100CH Icorra_LVS_ST(decimal digits=2) Ie 100DH Icorrb_LVS_ST(decimal digits=2) Ie 100EH Icorrc_LVS_ST(decimal digits=2) Ie 100FH Reserved Ie 1010H Reserved Ie 1011H Reserved Ie 1012H Id_1stH_REF_ST(decimal digits=2) In 1013H Ir_REF_ST(decimal digits=2) In 1014H I0_ST(decimal digits=2) In 1015H I0_NP_ST(decimal digits=2) In 1016H Ia_CT1_HVS_ST(decimal digits=2) A 1017H Ib_CT1_HVS_ST(decimal digits=2) A 1018H Ic_CT1_HVS_ST(decimal digits=2) A 1019H I1_CT1_HVS_ST(decimal digits=2) A 101AH I2_CT1_HVS_ST(decimal digits=2) A 101BH I0_CT1_HVS_ST(decimal digits=2) A 101CH Ia_CT2_HVS_ST(decimal digits=2) A 101DH Ib_CT2_HVS_ST(decimal digits=2) A 101EH Ic_CT2_HVS_ST(decimal digits=2) A 101FH I1_CT2_HVS_ST(decimal digits=2) A 1020H I2_CT2_HVS_ST(decimal digits=2) A



Address Analog Name Unit 1021H I0_CT2_HVS_ST(decimal digits=2) A 1022H Ia_LVS_ST(decimal digits=2) A 1023H Ib_LVS_ST(decimal digits=2) A 1024H Ic_LVS_ST(decimal digits=2) A 1025H I1_LVS_ST(decimal digits=2) A 1026H I2_LVS_ST(decimal digits=2) A 1027H I0_LVS_ST(decimal digits=2) A 1028H I0_NP_LVS_ST(decimal digits=2) A 1029H Uab_LVS_ST(decimal digits=2) V 102AH Ubc_LVS_ST(decimal digits=2) V 102BH Uca_LVS_ST(decimal digits=2) V 102CH U1_LVS_ST(decimal digits=2) V 102DH U2_LVS_ST(decimal digits=2) V 102EH U0_DeltVT_LVS_ST(decimal digits=2) V

9.4.3.3 GTU Metering

Address Analog Name Unit 2000H Ida_Diff_GTU(decimal digits=2) Ie 2001H Idb_Diff_GTU(decimal digits=2) Ie 2002H Idc_Diff_GTU(decimal digits=2) Ie 2003H Ira_Diff_GTU(decimal digits=2) Ie 2004H Irb_Diff_GTU(decimal digits=2) Ie 2005H Irc_Diff_GTU(decimal digits=2) Ie 2006H Ida_2ndH(decimal digits=2) Ie 2007H Idb_2ndH(decimal digits=2) Ie 2008H Idc_2ndH(decimal digits=2) Ie 2009H Ida_5thH(decimal digits=2) Ie 200AH Idb_5thH(decimal digits=2) Ie 200BH Idc_5thH(decimal digits=2) Ie 200CH Icorra_HVS_GTU(decimal digits=2) Ie 200DH Icorrb_HVS_GTU(decimal digits=2) Ie 200EH Icorrc_HVS_GTU(decimal digits=2) Ie 200FH Icorra_NP_Gen(decimal digits=2) Ie 2010H Icorrb_NP_Gen(decimal digits=2) Ie 2011H Icorrc_NP_Gen(decimal digits=2) Ie 2012H Icorra_ST(decimal digits=2) Ie 2013H Icorrb_ST(decimal digits=2) Ie 2014H Icorrc_ST(decimal digits=2) Ie 2015H Ia_HVS_Tr(decimal digits=2) A 2016H Ib_HVS_Tr(decimal digits=2) A 2017H Ic_HVS_Tr(decimal digits=2) A



Address Analog Name Unit 2018H I1_HVS_Tr(decimal digits=2) A 2019H I2_HVS_Tr(decimal digits=2) A 201AH I0_HVS_Tr(decimal digits=2) A

9.4.3.4 Gen Metering

Address Analog Name Unit 3000H Ida_Diff_Gen(decimal digits=2) Ie 3001H Idb_Diff_Gen(decimal digits=2) Ie 3002H Idc_Diff_Gen(decimal digits=2) Ie 3003H Ira_Diff_Gen(decimal digits=2) Ie 3004H Irb_Diff_Gen(decimal digits=2) Ie 3005H Irc_Diff_Gen(decimal digits=2) Ie 3006H Ia_Term_Gen(decimal digits=2) Ie 3007H Ib_Term_Gen(decimal digits=2) Ie 3008H Ic_Term_Gen(decimal digits=2) Ie 3009H I1_Term_Gen(decimal digits=2) A 300AH I2_Term_Gen(decimal digits=2) A 300BH I0_Term_Gen(decimal digits=2) A 300CH Ia_NP_Gen(decimal digits=2) A 300DH Ib_NP_Gen(decimal digits=2) A 300EH Ic_NP_Gen(decimal digits=2) A 300FH I1_NP_Gen(decimal digits=2) A 3010H I2_NP_Gen(decimal digits=2) A 3011H I0_NP_Gen(decimal digits=2) A 3012H Id_TrvDiff_Gen(decimal digits=2) A 3013H Id_3rdH_TrvDiff_Gen(decimal digits=2) A 3014H Ida_SPTDiff_Gen(decimal digits=2) Ie 3015H Idb_SPTDiff_Gen(decimal digits=2) Ie 3016H Idc_SPTDiff_Gen(decimal digits=2) Ie 3017H Ira_SPTDiff_Gen(decimal digits=2) Ie 3018H Irb_SPTDiff_Gen(decimal digits=2) Ie 3019H Irc_SPTDiff_Gen(decimal digits=2) Ie 301AH Icorra_SP1_Gen(decimal digits=2) Ie 301BH Icorrb_SP1_Gen(decimal digits=2) Ie 301CH Icorrc_SP1_Gen(decimal digits=2) Ie 301DH Icorra_SP2_Gen(decimal digits=2) Ie 301EH Icorrb_SP2_Gen(decimal digits=2) Ie 301FH Icorrc_SP2_Gen(decimal digits=2) Ie 3020H Ia_SP1_Gen(decimal digits=2) A 3021H Ib_SP1_Gen(decimal digits=2) A 3022H Ic_SP1_Gen(decimal digits=2) A



Address Analog Name Unit 3023H I1_SP1_Gen(decimal digits=2) A 3024H I2_SP1_Gen(decimal digits=2) A 3025H I0_SP1_Gen(decimal digits=2) A 3026H Ia_SP2_Gen(decimal digits=2) A 3027H Ib_SP2_Gen(decimal digits=2) A 3028H Ic_SP2_Gen(decimal digits=2) A 3029H I1_SP2_Gen(decimal digits=2) A 302AH I2_SP2_Gen(decimal digits=2) A 302BH I0_SP2_Gen(decimal digits=2) A 302CH Ua_VT1_Term_Gen(decimal digits=2) V 302DH Ub_VT1_Term_Gen(decimal digits=2) V 302EH Uc_VT1_Term_Gen(decimal digits=2) V 302FH U1_VT1_Term_Gen(decimal digits=2) V 3030H U2_VT1_Term_Gen(decimal digits=2) V 3031H U0_VT1_Term_Gen(decimal digits=2) V 3032H Ua_VT2_Term_Gen(decimal digits=2) V 3033H Ub_VT2_Term_Gen(decimal digits=2) V 3034H Uc_VT2_Term_Gen(decimal digits=2) V 3035H U1_VT2_Term_Gen(decimal digits=2) V 3036H U2_VT2_Term_Gen(decimal digits=2) V 3037H U0_VT2_Term_Gen(decimal digits=2) V 3038H Uab_VT1_Term_Gen(decimal digits=2) V 3039H Ubc_VT1_Term_Gen(decimal digits=2) V 303AH Uca_VT1_Term_Gen(decimal digits=2) V 303BH Uab_VT2_Term_Gen(decimal digits=2) V 303CH Ubc_VT2_Term_Gen(decimal digits=2) V 303DH Uca_VT2_Term_Gen(decimal digits=2) V 303EH U0_DeltVT1_Term_Gen(decimal digits=2) V 303FH U0_NP_Gen(decimal digits=2) V 3040H U0_3rdH_VT1_Term_Gen(decimal digits=2) V 3041H U0_3rdH_NP_Gen(decimal digits=2) V 3042H Ud_3rdH_Sta(decimal digits=2) V 3043H U0_Longl_Gen(decimal digits=2) V 3044H U0_3rdH_Longl_Gen(decimal digits=2) V 3045H P_Gen(Signed decimal digits=2) % 3046H Q_Gen(Signed decimal digits=2) % 3047H Accu_InvOvLd_Sta(decimal digits=2) % 3048H Accu_Therm_RotBody(decimal digits=2) % 3049H U/F_OvExc_Gen(decimal digits=3) 304AH Accu_InvOvExc_Gen(decimal digits=2) % 304BH f_Gen(decimal digits=2) Hz 304CH Accu_UF1_Gen(decimal digits=2) Min



Address Analog Name Unit 304DH Accu_UF2_Gen(decimal digits=2) Min 304EH U_RotWdg(Signed decimal digits=1) V 304FH R_EF_RotWdg(decimal digits=2) kΩ 3050H Location_EF_RotWdg(decimal digits=2) % 3051H U1_2ndH_VT1_Term_Gen(decimal digits=2) V 3052H U2_2ndH_VT1_Term_Gen(decimal digits=2) V

9.4.3.5 Exc Metering

Address Analog Name Unit 4000H Ida_Diff_Exc(decimal digits=2) Ie 4001H Idb_Diff_Exc(decimal digits=2) Ie 4002H Idc_Diff_Exc(decimal digits=2) Ie 4003H Ira_Diff_Exc(decimal digits=2) Ie 4004H Irb_Diff_Exc(decimal digits=2) Ie 4005H Irc_Diff_Exc(decimal digits=2) Ie 4006H Ida_2ndH(decimal digits=2) Ie 4007H Idb_2ndH(decimal digits=2) Ie 4008H Idc_2ndH(decimal digits=2) Ie 4009H Icorra_S1_Exc(decimal digits=2) Ie 400AH Icorrb_S1_Exc(decimal digits=2) Ie 400BH Icorrc_S1_Exc(decimal digits=2) Ie 400CH Icorra_S2_Exc(decimal digits=2) Ie 400DH Icorrb_S2_Exc(decimal digits=2) Ie 400EH Icorrc_S2_Exc(decimal digits=2) Ie 400FH Ia_S1_Exc(decimal digits=2) A 4010H Ib_S1_Exc(decimal digits=2) A 4011H Ic_S1_Exc(decimal digits=2) A 4012H I1_S1_Exc(decimal digits=2) A 4013H I2_S1_Exc(decimal digits=2) A 4014H I0_S1_Exc(decimal digits=2) A 4015H Ia_S2_Exc(decimal digits=2) A 4016H Ib_S2_Exc(decimal digits=2) A 4017H Ic_S2_Exc(decimal digits=2) A 4018H I1_S2_Exc(decimal digits=2) A 4019H I2_S2_Exc(decimal digits=2) A 401AH I0_S2_Exc(decimal digits=2) A 401BH Uab_ET(decimal digits=2) V 401CH Ubc_ET(decimal digits=2) V 401DH Uca_ET(decimal digits=2) V 401EH U1_ET(decimal digits=2) V 401FH U2_ET(decimal digits=2) V



Address Analog Name Unit 4020H I_RotWdg(Signed integer) A 4021H I_Exc(decimal digits=2) A 4022H Accu_Therm_RotWdg(decimal digits=2) %

9.4.4 Fetch settings value of equipment

Function Code: 03H

9.4.4.1 Equipment Settings

Address Setting Name Unit 0000H Setting_Group 0001H Equip_ID(ASCII Hi Word) 0002H Equip_ID(ASCII Mi Word) 0003H Equip_ID(ASCII Lo Word) 0004H Comm_Addr 0005H COM1_Baud bps 0006H COM2_Baud bps 0007H Printer_Baud bps

Bit0: COM1 870-5-103 Protocal Bit1: COM1 LFP Protocal Bit2: COM1 Modbus Protocal Bit4: COM2 870-5-103 Protocal Bit5: COM2 LFP Protocal

0008H Protocol

Bit6: COM2 Modbus Protocal

Bit0: En_Auto_Print Bit1: En_Net_Print Bit3: En_Remote_Cfg

0009H Control Word

Bit4: GPS_Pulse

9.4.4.2 System Settings

(1) Protection Configuration

Address Setting Name Unit Bit0:En_Diff_GTU Bit1:En_Diff_Tr Bit2:En_PPF_Tr Bit3:En_EF_Tr Bit4:En_OvExc_Tr Bit5:En_Diff_Gen Bit6:En_SPTDiff_Gen Bit7:En_IntTurn_Gen Bit8:En_PPF_Gen

1000H Protection Config Word 1

Bit9:En_EF_Sta



Address Setting Name Unit Bit10:En_EF_RotWdg Bit11:En_OvLd_Sta Bit12:En_NegOC_Sta Bit13:En_LossExc_Gen Bit14:En_OOS_Gen Bit15:En_VoltProt_Gen Bit0:En_OvExc_Gen Bit1:En_PwrProt_Gen Bit2:En_FreqProt_Gen Bit3:En_StShut_Gen Bit4:En_AccEnerg_Gen Bit6:En_Diff_Exc Bit7:En_Bak_Exc Bit8:En_OvLd_RotWdg Bit9:En_Diff_ST Bit10:En_Bak_HVS_ST Bit11:En_Bak_LVS_ST Bit12:En_REF_ST Bit13:En_MechRly Bit14:En_PoleDisagr_CB

1001H Protection Config Word 2

Bit15:En_VTComp_Term_Gen

1002H Reserved

(2) Tr System Settings

Address Setting Name Unit 1003H Sn_Tr(decimal digits=1) MVA 1004H U1n_HVS_Tr(decimal digits=2) kV 1005H U1n_LVS_Tr(decimal digits=2) kV 1006H U1n_VT_HVS_Tr(decimal digits=2) kV 1007H U2n_VT_HVS_Tr V 1008H U2n_DeltVT_HVS_Tr V 1009H I1n_CT_HVS1_Tr(integer) A 100AH I2n_CT_HVS1_Tr A 100BH I1n_CT_HVS2_Tr(integer) A 100CH I2n_CT_HVS2_Tr A 100DH I1n_CT_HVS_Tr(integer) A 100EH I2n_CT_HVS_Tr A 100FH I1n_CT_LVS_Tr(integer) A 1010H I2n_CT_LVS_Tr A 1011H I1n_CT_NP_Tr(integer) A



Address Setting Name Unit 1012H I2n_CT_NP_Tr A 1013H I1n_CT_Gap_Tr(integer) A 1014H I2n_CT_Gap_Tr A

Bit0:Yd11_Conn_Tr Bit1:Yyd11_Conn_Tr

1015H Control Word

Bit2:Opt_GCB

(3) Gen System Settings

Address Setting Name Unit 1016H fn_Gen Hz 1017H Sn_Gen(decimal digits=1) MW 1018H PF_Gen(decimal digits=2) 1019H U1n_Gen(decimal digits=2) kV 101AH U1n_VT_Term_Gen(decimal digits=2) kV 101BH U2n_VT_Term_Gen V 101CH U2n_DeltVT_Term_Gen V 101DH U1n_VT_NP_Gen(decimal digits=2) kV 101EH U2n_VT_NP_Gen(decimal digits=2) V 101FH I1n_CT_Term_Gen(integer) A 1020H I2n_CT_Term_Gen A 1021H k_SP1_Gen(decimal digits=2) % 1022H k_SP2_Gen(decimal digits=2) % 1023H I1n_CT_SP1_Gen(integer) A 1024H I2n_CT_SP1_Gen A 1025H I1n_CT_SP2_Gen(integer) A 1026H I2n_CT_SP2_Gen A 1027H I1n_CT_TrvDiff_Gen(integer) A 1028H I2n_CT_TrvDiff_Gen A 1029H I1n_RotWdg(integer) A 102AH U2n_Shunt_RotWdg(decimal digits=2) mV 102BH U1n_Exc(decimal digits=2) V

(4) ST System Settings

Address Setting Name Unit 102CH Sn_ST(decimal digits=2) MVA 102DH U1n_HVS_ST(decimal digits=2) kV 102EH U1n_LVS_ST(decimal digits=2) kV 102FH U1n_Br2_ST(decimal digits=2) (Reserved) kV 1030H U1n_VT_LVS_ST(decimal digits=2) kV



Address Setting Name Unit 1031H U2n_VT_LVS_ST V 1032H U2n_DeltVT_LVS_ST V 1033H U1n_VT_Br2_ST(decimal digits=2)(Reserved) kV 1034H U2n_VT_Br2_ST(Reserved) V 1035H U2n_DeltVT_Br2_ST(Reserved) V 1036H I1n_CT2_HVS_ST(integer) A 1037H I2n_CT2_HVS_ST A 1038H I1n_CT1_HVS_ST(integer) A 1039H I2n_CT1_HVS_ST A 103AH I1n_CT_LVS_ST(integer) A 103BH I2n_CT_LVS_ST A 103CH I1n_CT_Br2_ST(integer) (Reserved) A 103DH I2n_CT_Br2_ST(Reserved) A 103EH I1n_CT_NP_LVS_ST(integer) A 103FH I2n_CT_NP_LVS_ST A 1040H I1n_CT_NP_Br2_ST(integer) (Reserved) A 1041H I2n_CT_NP_Br2_ST(Reserved) A

Bit0:Yyy12_Conn_ST Bit1:Ddd12_Conn_ST Bit2:Dyy11_Conn_ST Bit3:Ydd11_Conn_ST

1042H Control Word

Bit4:Dyy1_Conn_ST

(5) Exc System Settings

Address Setting Name Unit 1043H fn_Exciter Hz 1044H Sn_Exc(decimal digits=2) MVA 1045H U1n_S1_Exc(decimal digits=2) kV 1046H U1n_S2_Exc(decimal digits=2) kV 1047H U1n_VT_Exc(decimal digits=2) kV 1048H U2n_VT_Exc V 1049H U2n_DeltVT_Exc V 104AH I1n_CT_S1_Exc(integer) A 104BH I2n_CT_S1_Exc A 104CH I1n_CT_S2_Exc(integer) A 104DH I2n_CT_S2_Exc A

Bit0:Opt_Exc Bit1:Yy12_Conn_ET Bit2:Dd12_Conn_ET

104EH Control Word

Bit3:Dy11_Conn_ET



Address Setting Name Unit Bit4:Yd11_Conn_ET Bit5:Dy1_Conn_ET

9.4.4.3 Prot Settings

(1) GTU Diff Prot Settings

Address Setting Name Unit 2000H I_Pkp_PcntDiff_GTU(decimal digits=2) Ie 2001H I_InstDiff_GTU(decimal digits=2) Ie 2002H Slope1_PcntDiff_GTU(decimal digits=2) 2003H Slope2_PcntDiff_GTU(decimal digits=2) 2004H k_Harm_PcntDiff_GTU(decimal digits=2) 2005H TrpLog_Diff_GTU

Bit0:En_InstDiff_GTU Bit1:En_PcntDiff_GTU Bit2:Opt_Inrush_Ident_GTU

2006H Control Word

Bit3:Opt_CTS_Blk_PcntDiff_GTU

(2) Tr Diff Prot Settings

Address Setting Name Unit 2007H I_Pkp_PcntDiff_Tr(decimal digits=2) Ie 2008H I_InstDiff_Tr(decimal digits=2) Ie 2009H Slope1_PcntDiff_Tr(decimal digits=2) 200AH Slope2_PcntDiff_Tr(decimal digits=2) 200BH k_Harm_PcntDiff_Tr(decimal digits=2) 200CH TrpLog_Diff_Tr

Bit0:En_InstDiff_Tr Bit1:En_PcntDiff_Tr Bit2:En_DPFC_Diff_Tr Bit3:Opt_Inrush_Ident_Tr

200DH Control Word

Bit4:Opt_CTS_Blk_PcntDiff_Tr

(3) Tr PPF Bak Prot Settings

Address Setting Name Unit 200EH V_NegOV_VCE_Tr(decimal digits=2) V 200FH Vpp_VCE_Tr(decimal digits=2) V 2010H I_OC1_Tr(decimal digits=2) A 2011H t_OC11_Tr(decimal digits=2) S



Address Setting Name Unit 2012H TrpLog_OC11_Tr 2013H t_OC12_Tr(decimal digits=2) S 2014H TrpLog_OC12_Tr 2015H I_OC2_Tr(decimal digits=2) A 2016H t_OC21_Tr(decimal digits=2) S 2017H TrpLog_OC21_Tr 2018H t_OC22_Tr(decimal digits=2) S 2019H TrpLog_OC22_Tr 201AH Z1_Fwd_Tr(decimal digits=2) Ω 201BH Z1_Rev_Tr(decimal digits=2) Ω 201CH t_Z11_Tr(decimal digits=2) S 201DH TrpLog_Z11_Tr 201EH t_Z12_Tr(decimal digits=2) S 201FH TrpLog_Z12_Tr 2020H Z2_Fwd_Tr(decimal digits=2) Ω 2021H Z2_Rev_Tr(decimal digits=2) Ω 2022H t_Z21_Tr(decimal digits=2) S 2023H TrpLog_Z21_Tr 2024H I_Alm_OvLd_Tr(decimal digits=2) A 2025H t_Alm_OvLd_Tr(decimal digits=2) S 2026H I_InitCool1_OvLd_Tr(decimal digits=2) A 2027H t_InitCool1_OvLd_Tr(decimal digits=2) S 2028H I_InitCool2_OvLd_Tr(decimal digits=2) A 2029H t_InitCool2_OvLd_Tr(decimal digits=2) S

Bit0:En_VCE_Ctrl_OC1_Tr Bit1:En_VCE_Ctrl_OC2_Tr Bit2:En_LVS.VCE_Ctrl_OC_Tr Bit3:En_Mem_Curr_Tr Bit4:Opt_VTS_Ctrl_OC_Tr Bit5:En_OvLd_Tr

202AH Control Word

Bit6:En_InitCool_OvLd_Tr

(4) Tr EF Bak Prot Settings

Address Setting Name Unit 202BH V_ROV_VCE_Tr(decimal digits=2) V 202CH I_ROC1_Tr(decimal digits=2) A 202DH t_ROC11_Tr(decimal digits=2) S 202EH TrpLog_ROC11_Tr 202FH t_ROC12_Tr(decimal digits=2) S 2030H TrpLog_ROC12_Tr



Address Setting Name Unit 2031H I_ROC2_Tr(decimal digits=2) A 2032H t_ROC21_Tr(decimal digits=2) S 2033H TrpLog_ROC21_Tr 2034H t_ROC22_Tr(decimal digits=2) S 2035H TrpLog_ROC22_Tr 2036H I_ROC3_Tr(decimal digits=2) A 2037H t_ROC31_Tr(decimal digits=2) S 2038H TrpLog_ROC31_Tr 2039H t_ROC32_Tr(decimal digits=2) S 203AH TrpLog_ROC32_Tr 203BH V_ROV_Gap_Tr(decimal digits=2) V 203CH t_ROV1_Gap_Tr(decimal digits=2) S 203DH TrpLog_ROV1_Gap_Tr 203EH t_ROV2_Gap_Tr(decimal digits=2) S 203FH TrpLog_ROV2_Gap_Tr 2040H I_Alm_REF_Tr(decimal digits=2) In 2041H I_Pkp_PcntREF_Tr(decimal digits=2) 2042H I_InstREF_Tr(decimal digits=2) In 2043H Slope_PcntREF_Tr(decimal digits=2) 2044H TrpLog_REF_Tr 2045H V_Alm_ROV_LVS_Tr(decimal digits=2) V 2046H t_Alm_ROV_LVS_Tr(decimal digits=2) S

Bit0:En_ VCE.ROV _Ctrl_ROC1_Tr Bit1:En_Dir_Ctrl_ROC1_Tr Bit2:En_VCE.ROV_Ctrl_ROC2_Tr Bit3:En_Dir_Ctrl_ROC2_Tr Bit5:En_Alm_ROV_LVS_Tr Bit7:En_BI_Ctrl_ROC_Gap_Tr Bit8:En_InstREF_Tr

2047H Control Word

Bit9:En_PcntREF_Tr

(5) Tr OvExc Prot Settings

Address Setting Name Unit 2048H k_OvExc1_Tr(decimal digits=2) 2049H t_OvExc1_Tr(decimal digits=1) S 204AH TrpLog_OvExc1_Tr 204BH k_OvExc2_Tr(decimal digits=2) 204CH t_OvExc2_Tr(decimal digits=1) S 204DH TrpLog_OvExc2_Tr 204EH k_Alm_OvExc_Tr(decimal digits=2)



Address Setting Name Unit 204FH t_Alm_OvExc_Tr(decimal digits=1) S 2050H k0_InvOvExc_Tr(decimal digits=2) 2051H t0_InvOvExc_Tr(decimal digits=1) S 2052H k1_InvOvExc_Tr(decimal digits=2) 2053H t1_InvOvExc_Tr(decimal digits=1) S 2054H k2_InvOvExc_Tr(decimal digits=2) 2055H t2_InvOvExc_Tr(decimal digits=1) S 2056H k3_InvOvExc_Tr(decimal digits=2) 2057H t3_InvOvExc_Tr(decimal digits=1) S 2058H k4_InvOvExc_Tr(decimal digits=2) 2059H t4_InvOvExc_Tr(decimal digits=1) S 205AH k5_InvOvExc_Tr(decimal digits=2) 205BH t5_InvOvExc_Tr(decimal digits=1) S 205CH k6_InvOvExc_Tr(decimal digits=2) 205DH t6_InvOvExc_Tr(decimal digits=1) S 205EH k7_InvOvExc_Tr(decimal digits=2) 205FH t7_InvOvExc_Tr(decimal digits=1) S 2060H TrpLog_InvOvExc_Tr

(6) Gen Diff Prot Settings

Address Setting Name Unit 2061H I_Pkp_PcntDiff_Gen(decimal digits=2) Ie 2062H I_InstDiff_Gen(decimal digits=2) Ie 2063H Slope1_PcntDiff_Gen(decimal digits=2) 2064H Slope2_PcntDiff_Gen(decimal digits=2) 2065H TrpLog_Diff_Gen

Bit0:En_InstDiff_Gen Bit1:En_PcntDiff_Gen Bit2:En_DPFC_Diff_Gen

2066H Control Word

Bit3:Opt_CTS_Blk_PcntDiff_Gen

(7) Gen SPTDiff Prot Settings

Address Setting Name Unit 2067H I_Pkp_PcntSPTDiff_Gen(decimal digits=2) Ie 2068H I_InstSPTDiff_Gen(decimal digits=2) Ie 2069H Slope1_PcntSPTDiff_Gen(decimal digits=2) 206AH Slope2_PcntSPTDiff_Gen(decimal digits=2) 206BH TrpLog_SPTDiff_Gen 206CH Control Bit0:En_InstSPTDiff_Gen



Address Setting Name Unit Bit1:En_PcntSPTDiff_Gen Word Bit2:Opt_CTS_Blk_PcntSPTDiff_Gen

(8) Gen IntTurn Prot Settings

Address Setting Name Unit 206DH I_SensTrvDiff_Gen(decimal digits=2) A 206EH I_UnsensTrvDiff_Gen(decimal digits=2) A 206FH t_TrvDiff_Gen(decimal digits=2) S 2070H V_SensROV_Longl_Gen(decimal digits=2) V 2071H V_UnsensROV_Longl_Gen(decimal digits=2) V 2072H t_ROV_Longl_Gen(decimal digits=2) S 2073H TrpLog_IntTurn_Gen

Bit0:En_SensTrvDiff_Gen Bit1:En_UnsensTrvDiff_Gen Bit2:En_SensROV_Longl_Gen Bit3:En_UnsensROV_Longl_Gen

2074H Control Word

Bit4:En_DPFC_IntTurn_Gen

(9) Gen PPF Bak Prot Settings

Address Setting Name Unit 2075H V_NegOV_VCE_Gen(decimal digits=2) V 2076H Vpp_VCE_Gen(decimal digits=2) V 2077H I_OC1_Gen(decimal digits=2) A 2078H t_OC1_Gen(decimal digits=2) S 2079H TrpLog_OC1_Gen 207AH I_OC2_Gen(decimal digits=2) A 207BH t_OC2_Gen(decimal digits=2) S 207CH TrpLog_OC2_Gen 207DH Z1_Fwd_Gen(decimal digits=2) Ω 207EH Z1_Rev_Gen(decimal digits=2) Ω 207FH t_Z1_Gen(decimal digits=2) S 2080H TrpLog_Z1_Gen 2081H Z2_Fwd_Gen(decimal digits=2) Ω 2082H Z2_Rev_Gen(decimal digits=2) Ω 2083H t_Z2_Gen(decimal digits=2) S 2084H TrpLog_Z2_Gen

Bit0:En_VCE_Ctrl_OC1_Gen Bit1:En_VCE_Ctrl_OC2_Gen

2085H Control Word

Bit2:En_HVS.VCE_Ctrl_OC_Gen



Address Setting Name Unit Bit3:Opt_VTS_Ctrl_OC_gen Bit4:Opt_ExcMode_Gen Bit5:En_BO_OC2_Gen

(10) Sta EF Prot Settings

Address Setting Name Unit 2086H V_SensROV_Sta(decimal digits=2) V 2087H V_UnsensROV_Sta(decimal digits=2) V 2088H t_ROV_Sta(decimal digits=2) S 2089H k_V3rdHRatio_PreSync_Sta(decimal digits=2) 208AH k_V3rdHRatio_PostSync_Sta(decimal digits=2) 208BH k_V3rdHDiff_Sta(decimal digits=2) 208CH t_V3rdH_Sta(decimal digits=2) S 208DH TrpLog_EF_Sta

Bit0:En_Alm_ROV_Sta Bit1:En_Trp_ROV_Sta Bit2:En_Alm_V3rdHRatio_Sta Bit3:En_Alm_V3rdHDiff_Sta Bit4:En_Trp_V3rdHRatio_Sta

208EH Control Word

Bit5:En_Trp_UnsensRov_Sta

(11) RotWdg EF Prot Settings

Address Setting Name Unit 208FH R_Sens_1PEF_RotWdg(decimal digits=2) kΩ 2090H R_1PEF_RotWdg(decimal digits=2) kΩ 2091H t_1PEF_RotWdg(decimal digits=2) S 2092H V2ndH_VCE_2PEF_RotWdg(decimal digits=2) v 2093H t_2PEF_RotWdg(decimal digits=2) S 2094H TrpLog_EF_RotWdg

Bit0:En_Alm_Sens_1PEF_RotWdg Bit1:En_Alm_1PEF_RotWdg Bit2:En_Trp_1PEF_RotWdg Bit3:En_2PEF_RotWdg

2095H Control Word

Bit4:En_VCE_2PEF_RotWdg

(12) Sta OvLd Prot Settings

Address Setting Name Unit 2096H I_OvLd_Sta(decimal digits=2) A



Address Setting Name Unit 2097H t_OvLd_Sta(decimal digits=2) S 2098H TrpLog_OvLd_Sta 2099H I_Alm_OvLd_Sta(decimal digits=2) A 209AH t_Alm_OvLd_Sta(decimal digits=2) S 209BH I_InvOvLd_Sta(decimal digits=2) A 209CH tmin_InvOvLd_Sta(decimal digits=2) S 209DH A_Therm_Sta(decimal digits=2) 209EH Kb_Therm_Sta(decimal digits=2) 209FH TrpLog_InvOvLd_Sta

(13) Sta NegOC Prot Settings

Address Setting Name Unit 20A0H I_NegOC_Sta(decimal digits=2) A 20A1H t_NegOC_Sta(decimal digits=2) S 20A2H TrpLog_NegOC_Sta 20A3H I_Alm_NegOC_Sta(decimal digits=2) A 20A4H t_Alm_NegOC_Sta(decimal digits=2) S 20A5H I_InvNegOC_Sta(decimal digits=2) A 20A6H I2_Perm_Sta(decimal digits=2) A 20A7H tmin_InvNegOC_Sta(decimal digits=2) S 20A8H A_Therm_RotBody(decimal digits=2) 20A9H TrpLog_InvNegOC_Sta

(14) Gen LossExc Prot Settings

Address Setting Name Unit 20AAH X1_LossExc_Gen(decimal digits=2) Ω 20ABH X2_LossExc_Gen(decimal digits=2) Ω 20ACH Q_RevQ_LossExc_Gen(decimal digits=2) % 20ADH V_RotUV_LossExc_Gen(decimal digits=2) V 20AEH V_RotNoLoad_LossExc_Gen(decimal digits=2) V 20AFH k_RotUV_LossExc_Gen(decimal digits=2) 20B0H V_BusUV_LossExc_Gen(decimal digits=2) V 20B1H P_UP_LossExc_Gen(decimal digits=2) % 20B2H t_LossExc1_Gen(decimal digits=2) S 20B3H t_LossExc2_Gen(decimal digits=2) S 20B4H t_LossExc3_Gen(decimal digits=1) S 20B5H TrpLog_LossExc1_Gen 20B6H TrpLog_LossExc2_Gen 20B7H TrpLog_LossExc3_Gen



Address Setting Name Unit Bit0:En_Z_LossExc1_Gen Bit1:En_RotUV_LossExc1_Gen Bit2:En_P_LossExc1_Gen Bit3:En_BusUV_LossExc2_Gen Bit4:En_Z_LossExc2_Gen Bit5:En_RotUV_LossExc2_Gen Bit6:En_Z_LossExc3_Gen Bit7:En_RotUV_LossExc3_Gen Bit8:En_Alm_LossExc1_Gen Bit9:Opt_Z_LossExc_Gen Bit10:En_RevQ_LossExc_Gen

20B8H Control Word

Bit11:Opt_UV_LossExc_Gen

(15) Gen OOS Prot Settings

Address Setting Name Unit 20B9H Za_OOS_Gen(decimal digits=2) Ω 20BAH Zb_OOS_Gen(decimal digits=2) Ω 20BBH Zc_OOS_Gen(decimal digits=2) Ω 20BCH φ_Reach_OOS_Gen(decimal digits=2) ° 20BDH φ_Inner_OOS_Gen(decimal digits=2) ° 20BEH n_Slip_Ext_OOS_Gen(integer) 20BFH n_Slip_Int_OOS_Gen(integer) 20C0H Ibrk_TCB(decimal digits=2) A 20C1H TrpLog_OOS_Gen

Bit0:En_Alm_Ext_OOS_Gen Bit1:En_Trp_Ext_OOS_Gen Bit2:En_Alm_Int_OOS_Gen

20C2H Control Word

Bit3:En_Trp_Int_OOS_Gen

(16) Gen Volt Prot Settings

Address Setting Name Unit 20C3H V_OV1_Gen(decimal digits=2) V 20C4H t_OV1_Gen(decimal digits=2) S 20C5H TrpLog_OV1_Gen 20C6H V_OV2_Gen(decimal digits=2) V 20C7H t_OV2_Gen(decimal digits=2) S 20C8H TrpLog_OV2_Gen 20C9H V_UV_Gen(decimal digits=2) V 20CAH t_UV_Gen(decimal digits=2) S



Address Setting Name Unit 20CBH TrpLog_UV_Gen

(17) Gen OvExc Prot Settings

Address Setting Name Unit 20CCH k_OvExc1_Gen(decimal digits=2) 20CDH t_OvExc1_Gen(decimal digits=1) S 20CEH TrpLog_OvExc1_Gen 20CFH k_OvExc2_Gen(decimal digits=2) 20D0H t_OvExc2_Gen(decimal digits=1) S 20D1H TrpLog_OvExc2_Gen 20D2H k_Alm_OvExc_Gen(decimal digits=2) 20D3H t_Alm_OvExc_Gen(decimal digits=1) S 20D4H k0_InvOvExc_Gen(decimal digits=2) 20D5H t0_InvOvExc_Gen(decimal digits=1) S 20D6H k1_InvOvExc_Gen(decimal digits=2) 20D7H t1_InvOvExc_Gen(decimal digits=1) S 20D8H k2_InvOvExc_Gen(decimal digits=2) 20D9H t2_InvOvExc_Gen(decimal digits=1) S 20DAH k3_InvOvExc_Gen(decimal digits=2) 20DBH t3_InvOvExc_Gen(decimal digits=1) S 20DCH k4_InvOvExc_Gen(decimal digits=2) 20DDH t4_InvOvExc_Gen(decimal digits=1) S 20DEH k5_InvOvExc_Gen(decimal digits=2) 20DFH t5_InvOvExc_Gen(decimal digits=1) S 20E0H k6_InvOvExc_Gen(decimal digits=2) 20E1H t6_InvOvExc_Gen(decimal digits=1) S 20E2H k7_InvOvExc_Gen(decimal digits=2) 20E3H t7_InvOvExc_Gen(decimal digits=1) S 20E4H TrpLog_InvOvExc_Gen

(18) Gen Pwr Prot Settings

Address Setting Name Unit 20E5H P_RevP_Gen(decimal digits=2) % 20E6H t_Alm_RevP_Gen(decimal digits=1) S 20E7H t_Trp_RevP_Gen(decimal digits=1) S 20E8H TrpLog_RevP_Gen 20E9H P_UP_Gen(decimal digits=2) % 20EAH t_UP_Gen(decimal digits=2) M 20EBH TrpLog_UP_Gen



Address Setting Name Unit 20ECH P_SeqTrp_RevP_Gen(decimal digits=2) % 20EDH t_SeqTrp_RevP_Gen(decimal digits=2) S 20EEH TrpLog_SeqTrp_RevP_Gen

(19) Gen Freq Prot Settings

Address Setting Name Unit 20EFH f_UF1_Gen(decimal digits=2) Hz 20F0H t_UF1_Gen(decimal digits=2) M 20F1H f_UF2_Gen(decimal digits=2) Hz 20F2H t_UF2_Gen(decimal digits=2) M 20F3H f_UF3_Gen(decimal digits=2) Hz 20F4H t_UF3_Gen(decimal digits=2) S 20F5H f_UF4_Gen(decimal digits=2) Hz 20F6H t_UF4_Gen(decimal digits=2) S 20F7H TrpLog_UF_Gen 20F8H f_OF1_Gen(decimal digits=2) Hz 20F9H t_OF1_Gen(decimal digits=2) M 20FAH f_OF2_Gen(decimal digits=2) Hz 20FBH t_OF2_Gen(decimal digits=2) S 20FCH TrpLog_OF_Gen

Bit0:En_Alm_UF1_Gen Bit1:En_Trp_UF1_Gen Bit2:En_Alm_UF2_Gen Bit3:En_Trp_UF2_Gen Bit4:En_Alm_UF3_Gen Bit5:En_Trp_UF3_Gen Bit6:En_Alm_UF4_Gen Bit7:En_Trp_UF4_Gen Bit8:En_Alm_OF1_Gen Bit9:En_Trp_OF1_Gen Bit10:En_Alm_OF2_Gen Bit11:En_Trp_OF2_Gen

20FDH Control Word

Bit12:En_BO_UC_OvSp_Gen

(20) Gen StShut Prot Settings

Address Setting Name Unit 20FEH f_UF_StShut_Gen(decimal digits=2) Hz 20FFH I_TrDiff_StShut_Gen(decimal digits=2) Ie 2100H I_STDiff_StShut_Gen(decimal digits=2) Ie



Address Setting Name Unit 2101H I_GenDiff_StShut_Gen(decimal digits=2) Ie 2102H I_SPTDiff_StShut_Gen(decimal digits=2) Ie 2103H I_ExcDiff_StShut_Gen(decimal digits=2) Ie 2104H TrpLog_Diff_StShut_Gen 2105H V_StaROV_StShut_Gen(decimal digits=2) V 2106H t_StaROV_StShut_Gen(decimal digits=2) S 2107H TrpLog_StaROV_StShut_Gen

Bit0:En_TrDiff_StShut_Gen Bit1:En_STDiff_StShut_Gen Bit2:En_GenDiff_StShut_Gen Bit3:En_SPTDiff_StShut_Gen Bit4:En_ExcDiff_StShut_Gen Bit5:En_StaROV_StShut_Gen

2108H Control Word

Bit6:En_UF_Ctrl_StShut_Gen

(21) Gen AccEnerg Prot Settings

Address Setting Name Unit 2109H f_UF_AccEnerg_Gen(decimal digits=2) Hz 210AH I_OC_AccEnerg_Gen(decimal digits=2) A 210BH Ibrk_TCB(decimal digits=2) A 210CH t_AccEnerg_Gen(decimal digits=2) S 210DH TrpLog_AccEnerg_Gen 210EH I_NegOC_Flash_TCB(decimal digits=2) A 210FH t_Flash1_TCB(decimal digits=2) S 2110H TrpLog_Flash1_TCB 2111H t_Flash2_TCB(decimal digits=2) S 2112H TrpLog_Flash2_TCB

Bit0:En_UF_Ctrl_AccEnerg_Gen Bit1:En_CB_Ctrl_AccEnerg_Gen

2113H Control Word

Bit2:En_Ibrk_Ctrl_Trp_TCB

(22) Exc Diff Prot Settings

Address Setting Name Unit 2114H I_Pkp_PcntDiff_Exc(decimal digits=2) Ie 2115H I_InstDiff_Exc(decimal digits=2) Ie 2116H Slope1_PcntDiff_Exc(decimal digits=2) 2117H Slope2_PcntDiff_Exc(decimal digits=2) 2118H k_Harm_PcntDiff_Exc(decimal digits=2) 2119H TrpLog_Diff_Exc



Address Setting Name Unit Bit0:En_InstDiff_Exc Bit1:En_PcntDiff_Exc Bit2:Opt_Inrush_Ident_Exc

211AH Control Word

Bit3:Opt_CTS_Blk_PcntDiff_Exc

(23) Exc Bak Prot Settings

Address Setting Name Unit 211BH V_NegOV_VCE_Exc(decimal digits=2) V 211CH Vpp_VCE_Exc(decimal digits=2) V

211DH I_OC1_Exc(decimal digits=2) A 211EH t_OC1_Exc(decimal digits=2) S 211FH TrpLog_OC1_Exc 2120H I_OC2_Exc(decimal digits=2) A 2121H t_OC2_Exc(decimal digits=2) S 2122H TrpLog_OC2_Exc

Bit0:En_VCE_Ctrl_OC1_Exc Bit1:En_VCE_Ctrl_OC2_Exc Bit2:En_Mem_Curr_Exc Bit3:Opt_VTS_Ctrl_OC_Exc Bit4:Opt_AC_Input_S1_Exc

2123H Control Word

Bit5:Opt_AC_Input_S2_Exc

(24) RotWdg OvLd Prot Settings

Address Setting Name Unit 2124H I_OvLd_RotWdg(decimal digits=2) A 2125H t_OvLd_RotWdg(decimal digits=2) S

2126H TrpLog_OvLd_RotWdg 2127H I_Alm_OvLd_RotWdg(decimal digits=2) A 2128H t_Alm_OvLd_RotWdg(decimal digits=2) S 2129H I_InvOvLd_RotWdg(decimal digits=2) A 212AH tmin_InvOvLd_RotWdg(decimal digits=2) S 212BH A_Therm_RotWdg(decimal digits=2) 212CH Ib_InvOvLd_RotWdg(decimal digits=2) A 212DH TrpLog_InvOvLd_RotWdg

Bit0:Opt_AC_Input_RotWdg Bit1:Opt_DC_Input_RotWdg Bit2:Opt_AC_Input_S1_RotWdg

212EH Control Word

Bit3:Opt_AC_Input_S2_RotWdg



(25) ST Diff Prot Settings

Address Setting Name Unit 212FH I_Pkp_PcntDiff_ST(decimal digits=2) Ie 2130H I_InstDiff_ST(decimal digits=2) Ie 2131H Slope1_PcntDiff_ST(decimal digits=2) 2132H Slope2_PcntDiff_ST(decimal digits=2) 2133H k_Harm_PcntDiff_ST(decimal digits=2) 2134H TrpLog_Diff_ST

Bit0:En_InstDiff_ST Bit1:En_PcntDiff_ST Bit2:Opt_Inrush_Ident_ST

2135H Control Word

Bit3:Opt_CTS_Blk_PcntDiff_ST

(26) ST HVS Bak Prot Settings

Address Setting Name Unit 2136H V_NegOV_VCE_HVS_ST(decimal digits=2) V 2137H Vpp_VCE_HVS_ST(decimal digits=2) V 2138H I_OC1_HVS_ST(decimal digits=2) A 2139H t_OC1_HVS_ST(decimal digits=2) S 213AH TrpLog_OC1_HVS_ST 213BH I_OC2_HVS_ST(decimal digits=2) A 213CH t_OC2_HVS_ST(decimal digits=2) S 213DH TrpLog_OC2_HVS_ST 213EH I_Alm_OvLd_HVS_ST(decimal digits=2) A 213FH t_Alm_OvLd_HVS_ST(decimal digits=2) S 2140H I_InitCool1_OvLd_HVS_ST(decimal digits=2) A 2141H t_InitCool1_OvLd_HVS_ST(decimal digits=2) S 2142H I_InitCool2_OvLd_HVS_ST(decimal digits=2) A 2143H t_InitCool2_OvLd_HVS_ST(decimal digits=2) S

Bit0:En_VCE_Ctrl_OC1_HVS_ST Bit1:En_VCE_Ctrl_OC2_HVS_ST Bit2:En_Mem_Curr_HVS_ST Bit3:Opt_VTS_Ctrl_OC_HVS_ST Bit4:En_Alm_OvLd_HVS_ST Bit5:En_InitCool_OvLd_HVS_ST

2144H Control Word

Bit7:En_LVSProt_Blk_OC1_HVS_ST

(27) ST LVS Bak Prot Settings



Address Setting Name Unit 2145H V_NegOV_VCE_LVS_ST(decimal digits=2) V 2146H Vpp_VCE_LVS_ST(decimal digits=2) V 2147H I_OC1_LVS_ST(decimal digits=2) A 2148H t_OC1_LVS_ST(decimal digits=2) S 2149H TrpLog_OC1_LVS_ST 214AH I_OC2_LVS_ST(decimal digits=2) A 214BH t_OC2_LVS_ST(decimal digits=2) S 214CH TrpLog_OC2_LVS_ST 214DH I_ROC1_LVS_ST(decimal digits=2) A 214EH t_ROC1_LVS_ST(decimal digits=2) S 214FH TrpLog_ROC1_LVS_ST 2150H I_ROC2_LVS_ST(decimal digits=2) A 2151H t_ROC2_LVS_ST(decimal digits=2) S 2152H TrpLog_ROC2_LVS_ST 2153H I_OvLd_LVS_ST(decimal digits=2) A 2154H t_OvLd_LVS_ST(decimal digits=2) S 2155H V_ROV_LVS_ST(decimal digits=2) V 2156H t_ROV_LVS_ST(decimal digits=2) S

Bit0:En_VCE_Ctrl_OC1_LVS_ST Bit1:En_VCE_Ctrl_OC2_LVS_ST Bit2:Opt_VTS_Ctrl_OC_LVS_ST Bit3:En_Alm_OvLd_LVS_ST

2157H Control Word

Bit4:En_Alm_ROV_LVS_ST

(28) ST REF Prot Settings

Address Setting Name Unit 2158H I_Alm_REF_ST(decimal digits=2) In 2159H I_Pkp_PcntREF_ST(decimal digits=2) In 215AH I_InstREF_ST(decimal digits=2) In 215BH Slope_PcntREF_ST(decimal digits=2) 215CH TrpLog_REF_ST 215DH Reserved(decimal digits=2) 215EH Reserved(decimal digits=2) 215FH Reserved(decimal digits=2) 2160H Reserved(decimal digits=2) 2161H Reserved(decimal digits=2) 2162H Reserved(decimal digits=2) 2163H Reserved(decimal digits=2) 2164H Reserved(decimal digits=2) 2165H Reserved(decimal digits=2)



Address Setting Name Unit 2166H Reserved(decimal digits=2) 2167H Reserved(decimal digits=2) 2168H Reserved(decimal digits=2) 2169H Reserved(decimal digits=2)

Bit0:En_InstREF_ST 216AH Control Word Bit1:En_PcntREF_ST

(29) MechRly REF Prot Settings

Address Setting Name Unit 216BH t_MechRly1(decimal digits=1) S 216CH TrpLog_MechRly1 216DH t_MechRly2(decimal digits=1) S 216EH TrpLog_MechRly2 216FH t_MechRly3(decimal digits=1) S 2170H TrpLog_MechRly3 2171H t_MechRly4(decimal digits=1) S 2172H TrpLog_MechRly4 2173H Control

Word Bit0:En_Supv_MechRly

(30) PoleDisagr Prot Settings

Address Setting Name Unit 2174H I_OC_PD(decimal digits=2) A 2175H I_NegOC_PD(decimal digits=2) A 2176H I_ROC_PD(decimal digits=2) A 2177H t_PD1(decimal digits=2) S 2178H TrpLog_PD1 2179H t_PD2(decimal digits=2) S 217AH TrpLog_PD2

Bit0:En_NegOC_PD Bit1:En_ROC_PD Bit2:En_ExTrp_Ctrl_PD2

217BH Control Word

Bit3:En_OC_PD2

9.4.5 Diagnostics (Function Code: 08H)

Modbus function 08 provides a series of tests for checking the communication system between the master and slave, or for checking various internal error conditions within the slave.



The function uses a two–byte sub function code field in the query to define the type of test to be performed. The slave echoes both the function code and sub function code in a normal response.

The listing below shows the sub function codes supported by the equipment.

Code Name 00H Return Query Data 01H Restart Comm Option 04H Force Listen Only Mode 0BH Return Bus Message Count 0CH Return Bus Comm. Error Count 0DH Return Bus Exception Error Cnt 0EH Return Slave Message Count 0FH Return Slave No Response Cnt

9.4.6 Exception Responses

Except for broadcast messages, when a master device sends a query to a slave device it expects a normal response. If the slave receives the query without a communication error, but cannot handle it (for example, if the request is to read a non–existent coil or register), the slave will return an exception response informing the master of the nature of the error.

The listing below shows the exception codes supported by the equipment.

Code Description 01H Illegal Function 02H Illegal Data Address 03H Illegal Data Value 07H Negative Acknowledge

9.5 EIA(RS)232 Interface The front communication port is provided by a DB9 female D-type connector located under the small hinged cover on the front panel. It provides RS232 serial data communication and is intended for use with a PC locally to the relay (up to 15m distance). This port supports the courier communication protocol only. Courier is the communication language developed by NR to allow communication with its range of protection relays. The front port is particularly designed for use with relays settings program DBG2000 which is a Windows-based software package.

The pin connections of relay’s DB9 front port are as follows:

Pin No.2 Tx Transmit data Pin No.3 Rx Receive data Pin No.5 common

None of the other pins are connected in the relays. The relays should be connected to the serial port of a PC, usually called as COM1 or COM2. The serial port pin connections, which is DB9 male,



is as below (if in doubt check you PC manual):

Pin No.2 Rx Transmit data Pin No.3 Tx Receive data Pin No.5 common

For successful data communication, the Tx pin on the relays must be connected to the Rx pin on the PC, and Rx pin on the relay must be connected to Tx pin on the PC as shown in Figure 9-3.

Note:

The baud rate for this port is fixed at 9600 bps.

1 3 5

7 986

42

1 3 5

7 986

42

9 pin front communication port

serial communication port ( COM1 or COM2) of local PC

Figure 9-3 Rs232 Faceplate Port Connection

9.6 Communication with printer When communicating locally with a printer using the rear series port, a special connection line is necessary which is provided by manufacture of the equipment.

There are two parameters need to be set in RCS-985A for communication with printer, [Printer_Baud] and [En_AutoPrint], the former decides the communication speed and the later decides the printer’s activating way. Please refer to chapter 7 for details.

9.7 Communication with External GPS pulse Source The clock function (Calendar clock) is used for time-tagging for the following purposes:

---Event recording

---Fault recording

---Present recording

---Self-supervision

When the relays are connected to the GPS clock, all the relay clocks are synchronized with the external time standard. There are two way to adjust the relay clock.



---Time synchronization via RS-485 serial port

---Time synchronization via binary input

Chapter 10 Installation


Chapter 10 Installation 10.1 Receipt of Relays Upon receipt, relays should be examined immediately to ensure no external damage has been sustained in transit. If damage has been sustained, a claim should be made to the transport contractor and NR should be promptly notified. Relays that are supplied unmounted and not intended for immediate installation should be returned to their protective bags and delivery carton. Section 10.3 of this chapter gives more information about the storage of relays.

10.2 Handling of Electronic Equipment A person’s normal movements can easily generate electrostatic potentials of several thousand volts. Discharge of these voltages into semiconductor devices when handling electronic circuits can cause serious damage that, although not always immediately apparent, will reduce the reliability of the circuit. The relay’s electronic circuits are protected from electrostatic discharge when housed in the case. Do not expose them to risk by removing the front panel or printed circuit boards unnecessarily.

Each printed circuit board incorporates the highest practicable protection for its semiconductor devices. However, if it becomes necessary to remove a printed circuit board, the following precautions should be taken to preserve the high reliability and long life for which the relay has been designed and manufactured.

Before removing a printed circuit board, ensure that you are at the same electrostatic potential as the equipment by touching the case.

Handle analog input modules by the front panel, frame or edges of the circuit boards.

Printed circuit boards should only be handled by their edges. Avoid touching the electronic components, printed circuit tracks or connectors.

Do not pass the module to another person without first ensuring you are both at the same electrostatic potential. Shaking hands achieves equipotential.

Place the module on an anti-static surface, or on a conducting surface that is at the same potential as you.

If it is necessary to store or transport printed circuit boards removed from the case, place them individually in electrically conducting anti-static bags.

In the unlikely event that you are making measurements on the internal electronic circuitry of a relay in service, it is preferable that you are earthed to the case with a conductive wrist strap. Wrist straps should have a resistance to ground between 500kΩ to 10MΩ. If a wrist strap is not available you should maintain regular contact with the case to prevent a build-up of electrostatic potential. Instrumentation which may be used for making measurements should also be earthed to the case whenever possible.

More information on safe working procedures for all electronic equipment can be found in BS EN



100015: Part 1:1992. It is strongly recommended that detailed investigations on electronic circuitry or modification work should be carried out in a special handling area such as described in the British Standard document.

10.3 Storage If relays are not to be installed immediately upon receipt, they should be stored in a place free from dust and moisture in their original cartons. Where de-humidifier bags have been included in the packing they should be retained.

To prevent battery drain during transportation and storage a battery isolation strip is fitted during manufacture. With the lower access cover open, presence of the battery isolation strip can be checked by a red tab protruding from the positive polarity side.

Care should be taken on subsequent unpacking that any dust, which has collected on the carton, does not fall inside. In locations of high humidity the carton and packing may become impregnated with moisture and the de-humidifier crystals will lose their efficiency.

Prior to installation, relays should be stored at a temperature of between –25°C to +70°C (-13°F to +158°F).

10.4 Unpacking Care must be taken when unpacking and installing the relays so that none of the parts are damaged and additional components are not accidentally left in the packing or lost. Ensure that any User’s CDROM or technique documentation is NOT discarded – this should accompany the relay to its destination substation.

Note:

With the lower access cover open, the red tab of the battery isolation strip will be seen protruding from the positive (+) side of the battery compartment. Do not remove this strip because it prevents battery drain during transportation and storage and will be removed as part of the commissioning tests. Relays must only be handled by skilled persons.

The site should be well lit to facilitate inspection, clean, dry and reasonably free from dust and excessive vibration.

10.5 Relay Mounting RCS-985A is dispatched either individually or as part of a panel/rack assembly. Individual relays are normally supplied accompanied with this manual showing the dimensions for panel cutouts and whole centers. This information can also be found in the product publication.

10.5.1 Rack Mounting

RCS-985A may be rack mounted using single tier rack frames, as illustrated in Figure 10-1 and Figure 10-2. The frames must have been designed to have dimensions in accordance with IEC60297 and are supplied pre-assembled ready to use. On a standard 483mm rack system this enables combinations of widths of case up to a total equivalent of size 80TE to be mounted side by



side.

Once the tier is complete, the frames are fastened into the racks using mounting angles at each end of the tier.

GR

PE

SC

530

.4

457.

2

190.

5

Figure 10-1 Rack mounting of relays—front face



531.

5

457.

2

190.

5

Figure 10-2 Rack mounting of relays—rear face

Relays can be mechanically grouped into single tier (12U) or multi-tier arrangements by means of the rack frame.

Where the case size summation is less than 80TE on any tier, or space is to be left for installation of future relays, blanking plates may be used. These plates can also be used to mount ancillary components.

10.5.2 Panel mounting

The relays can be flush mounted into panels using M4 self-tapping screws with captive 3mm thick washers.

For applications where relays need to be semi-projection or projection mounted, a range of collars are available. Where several relays are mounted in a single cutout in the panel, it is advised that they are mechanically grouped together horizontally and/or vertically to form rigid assemblies prior to mounting in the panel.



Note:

It is not advised that RCS-985A are fastened using pop rivets as this will not allow the relay to be easily removed from the panel in the future if repair is necessary.

If it is required to mount a relay assembly on a panel complying to IEC 60529 IP51 enclosure protection, it will be necessary to fit a metallic sealing strip between adjoining relays and a sealing ring around the complete assembly.

10.6 RELAY WIRING This section serves as a guide to selecting the appropriate cable and connector type for each terminal on the RCS-985A.

10.6.1 Medium and heavy duty terminal block connections

Heavy duty terminal block: CT and VT circuits. Medium duty: All other terminal blocks.

Loose relays are supplied with sufficient M4 screws for making connections to the rear mounted terminal blocks using ring terminals, with a recommended maximum of two ring terminals per relay terminal.

If required, NR can supply M4 90° crimp ring terminals in three different sizes depending on wire size (see Table 10-1).

Table 10-1 M4 90° crimp ring terminals Part Number Wire Size Insulation Color

ZB9124 901 0.25 -1.65mm2 (22 - 16AWG) Red

ZB9124 900 1.04 -2.63mm2 (16 - 14AWG) Blue

ZB9124 904 2.53 -6.64mm2 (12 - 10AWG) Un-insulated*

*To maintain the terminal block insulation requirements for safety, an insulating sleeve should be fitted over the ring terminal after crimping.

The following minimum wire sizes are recommended:

Current transformers 2.5mm2 Auxiliary Supply, Vx 1.5mm2 EIA(RS)485 Port See separate section Other Circuits 1.0mm2

Due to the limitations of the ring terminal, the maximum wire size that can be used for any of the medium or heavy duty terminals is 6.0mm2 using ring terminals that are not pre-insulated. Where it required to only use pre-insulated ring terminals, the maximum wire size that can be used is reduced to 2.63mm2 per ring terminal. If a larger wire size is required, two wires should be used in parallel, each terminated in a separate ring terminal at the relay.

The wire used for all connections to the medium and heavy duty terminal blocks, except the



EIA(RS)485 port, should have a minimum voltage rating of 300Vrms.

It is recommended that the auxiliary supply wiring should be protected by a 16A high rupture capacity (HRC) fuse of type NIT or TIA. For safety reasons, current transformer circuits must never be fused. Other circuits should be appropriately fused to protect the wire used.

10.6.2 EIA (RS) 485 port

Connections to the EIA (RS) 485 port are made using ring terminals. It is recommended that a 2 core screened cable is used with a maximum total length of 1000m or 200nF total cable capacitance. A typical cable specification would be:

Each core: 16/0.2mm copper conductors，PVC insulated Nominal conductor area: 0.5mm2 per core Screen: Overall braid, PVC sheathed

10.6.3 IRIG-B connections (if applicable)

The IRIG-B input and BNC connector have a characteristic impedance of 50Ω. It is recommended that connections between the IRIG-B equipment and the relay are made using coaxial cable of type RG59LSF with a halogen free, fire retardant sheath.

10.6.4 EIA(RS)232 front port of downloading/monitoring

Short term connections to the EIA(RS)232 port, located at the bottom of face cover, can be made using a screened multi-core communication cable up to 15m long, or a total capacitance of 2500pF. The cable should be terminated at the relay end with a 9-way, metal shelled, D-type male plug. The pin allocations are detailed in section 5.4 about connectors.

10.6.5 Ethernet port (if applicable)

Fiber Optic Port

The relays can have an optional 10 or 100 Mbps Ethernet port. FO connection is recommended for use in permanent connections in a substation environment. The 10Mbit port uses type ST connector and the 100Mbit port uses type SC connector, both compatible with 850nm multi-mode fiber-optic cable.

RJ-45 Metallic Port

The user can connect to either a 10Base-T or a 100Base-TX Ethernet hub; the port will automatically sense which type of hub is connected. Due to possibility of noise and interference on this part, it is recommended that this connection type be used for short-term connections and over short distance. Ideally where the relays and hubs are located in the same cubicle.

The connector for the Ethernet port is a shielded RJ-45. The table shows the signals and pins on the connector.

Table 10-2 Signals on the Ethernet connector Pin Signal Name Signal Definition

1 TXP Transmit (positive)



Pin Signal Name Signal Definition 2 TXN Transmit (negative)

3 RXP Receive (positive)

4 - Not used

5 - Not used

6 RXN Receive (negative)

7 - Not used 8 - Not used

10.6.6 Test port

Short term connections to the download/monitor port, located on the front access cover, can be made using a screened 9-core communication cable up to 4m long. The cable should be terminated at the relay end with a 9-way, metal shelled, D-type male plug and linked as a serial data connection.

10.6.7 Earth connection

Every relay must be connected to the cubicle earth bar using the M4 earth studs in the rear faceplate of the relay case. The minimum recommended wire size is 2.5mm2 and should have a ring terminal at the relay end.

Chapter 11 Commission


Chapter 11 Commission 11.1 Introduction This relay is fully numerical in their design, implementing all protection and non-protection functions in software. The relay employ a high degree of self-checking and in the unlikely event of a failure, will give an alarm. As a result of this, the commissioning test does not need to be as extensive as with non-numeric electronic or electro-mechanical relays.

To commission numerical relays, it is only necessary to verify that the hardware is functioning correctly and the application-specific software settings have been applied to the relay. It is considered unnecessary to test every function of the relay if the settings have been verified by one of the following methods:

-extracting the settings applied to the relay using appropriate setting software (preferred method)

-via the operator interface

Blank commissioning test and setting records are provided at the end of this manual for completion as required.

WARNING!

Before carrying out any work on the equipment, the user should be familiar with the contents of the safety and technical data sections and the ratings on the equipment’s rating label.

11.2 Precautions

WARNING!

Hazardous voltages are present in this electrical equipment during operation. Non- observance of the safety rules can result in severe personal injury or property damage.

Only qualified personnel shall work on and around this equipment after becoming thoroughly familiar with all warnings and safety notices of this manual as well as with the applicable safety regulations.

Particular attention must be drawn to the following:

The earthing screw of the device must be connected solidly to the protective earth conductor before any other electrical connection is made.

Hazardous voltages can be present on all circuits and components connected to the supply voltage or to the measuring and test quantities.

Hazardous voltages can be present in the device even after disconnection of the supply voltage (storage capacitors!).

The limit values stated in the technique data (Chapter 2) must not be exceeded at all, not even



during testing and commissioning.

When testing the device with secondary test equipment, make sure that no other measurement quantities are connected. Take also into consideration that the trip circuits and maybe also close commands to the circuit breakers and other primary switches are disconnected from the device unless expressly stated.

DANGER!

Current transformer secondary circuits must have been short-circuited before the current leads to the device are disconnected.

WARNING!

Primary test may only be carried out by qualified personnel, who are familiar with the commissioning of protection system, the operation of the plant and safety rules and regulations (switching, earthing, etc.)

11.3 Relay commission tools Minimum equipment required

--Multifunctional dynamic current and voltage injection test set with interval timer

--Multimeter with suitable AC current range and AC/DC voltage ranges of 0-200V and 0-250V respectively.

--Continuity tester (if not included in the multimeter)

--Phase angle meter

--Phase rotation meter

Note:

Modern test set may contain many of the above features in one unit.

Optional equipment

--An electronic or brushless insulation tester with a DC output not exceeding 500 V (for insulation resistance test when required);

--A portable PC, with appropriate software (this enables the rear communications port to be tested, if this is to be used, and will also save considerable time during commissioning).

--DBG2000 software.

--EIA(RS)485 to EIA(RS)232 converter (if EIA(RS)485 IEC60870 port is being tested).

-- A printer.

- RCS-900 serials dedicated protection tester TEST or HELP-90.

11.4 Setting Familiarization When commissioning a RCS-985A relay for the first time, sufficient time should be allowed to



become familiar with the method by which the settings are applied. The Chapter 8 contains a detailed description of the menu structure of RCS-985A relays.

With the front cover in place all keys are accessible. All menu cells can be read. LEDs and alarms can be reset. Protection or configuration settings can be changed, or fault and event records cleared. However, menu cells will require the appropriate password to be entered before changes can be made.

Alternatively, if a portable PC is available together with suitable setting software (such as DBG2000), the menu can be viewed a page at a time to display a full column of data and text. This PC software also allows settings to be entered more easily, saved to a file on disk for future reference or printed to produce a setting record. Refer to the PC software user manual for details. If the software is being used for the first time, allow sufficient time to become familiar with its operation.

11.5 Product checks These product checks cover all aspects of the relay which should be checked to ensure that it has not been physically damaged prior to commissioning, is functioning correctly and all input quantity measurements are within the stated tolerances.

If the application-specific settings have been applied to the relay prior to commissioning, it is advisable to make a copy of the settings so as to allow them restoration later. This could be done by extracting the settings from the relay itself via printer or manually creating a setting record.

11.5.1 With the relay de-energized

The RCS-985 serial plant transformer protection is fully numerical and the hardware is continuously monitored. Commissioning tests can be kept to a minimum and need only include hardware tests and conjunctive tests. The function tests are carried out according to user’s correlative regulations.

The following tests are necessary to ensure the normal operation of the equipment before it is first put into use.

− Hardware tests These tests are performed for the following hardware to ensure that there is no hardware defect. Defects of hardware circuits other than the following can be detected by self-monitoring when the DC power is supplied.

− User interfaces test − Binary input circuits and output circuits test − AC input circuits test − Function tests

These tests are performed for the following functions that are fully software-based. Tests of the protection schemes and fault locator require a dynamic test set.

− Measuring elements test − Timers test − Metering and recording test − Conjunctive tests



The tests are performed after the relay is connected with the primary equipment and other external equipment.

− On-load test − Phase sequence check and polarity check.

11.5.1.1 Visual inspection.

After unpacking the product, check for any damage to the relay case. If there is any damage, the internal module might also have been affected, contact the vendor. Following items listed is necessary.

1. Protection panel

Carefully examine the protection panel, protection equipment inside and other parts inside to see that no physical damage has occurred since installation.

The rated information of other auxiliary protections should be checked to ensure it is correct for the particular installation.

2. Panel wiring

Check the conducting wire used in the panel to assure that their cross section meet the requirement.

Carefully examine the wiring to see that they are no connection failure exists.

3. Label

Check all the isolator binary inputs, terminal blocks, indicators, switches and push buttons to make sure that their labels meet the requirements of this project.

4. Equipment plug-in modules

Check each plug-in module of the equipments on the panel to make sure that they are well installed into the equipment without any screw loosened.



Figure 11-1 RCS-985A rear plug-in connector locations(viewed from rear)

5. Earthing cable

Check whether the earthing cable from the panel terminal block is safely screwed to the panel steel sheet.

6. Switch, keypad, isolator binary inputs and push button:

Check whether all the switches, equipment keypad, isolator binary inputs and push buttons work normally and smoothly.

11.5.1.2 Insulation

Insulation resistances tests are only necessary during commission if it is required for them to be done and they have not been performed during installation.

Isolate all wiring from the earth and test the insulation with an electronic or brushless insulation tester at a DC voltage not exceeding 500V, terminals of the same circuits should be temporarily connected together.

The main groups of the relay terminals are:

-Voltage transformer circuits

-Current transformer circuits

-Field voltage output and opto-isolated control inputs



-Relay contacts

-EIA(RS)485 communication port

-Case earth

The insulation resistance should be greater than 100MΩ at 500V. On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected to the relay.

11.5.1.3 External wiring

Check that the external wiring is correct to the relevant relay diagram and scheme diagram. Ensure as far as practical that phasing/phase rotation appears to be as expected.

Check the wiring against the schematic diagram for the installation to ensure compliance with the customer’s normal practice.

11.5.1.4 Auxiliary supply

The relay can be operated from either 110/125Vdc or 220/250Vdc auxiliary supply depending on the relay’s nominal supply rating. The incoming voltage must be within the operating range specified in the following table, before energizing the relay, measure the auxiliary supply to ensure it is within the operating range.

Rated Voltage 110/125VDC 220/250VDC

Variation 88 - 144 VDC 176 - 288 VDC

It should be noted that the relay can withstand an AC ripple of up to 12% of the upper rated voltage on the DC auxiliary supply.

Energize the relay only if the auxiliary supply is within the specified operating ranges.

11.5.2 With the relay energized

The following groups of tests verify that the protection hardware and software is functioning correctly and should be carried out with the auxiliary supply applied to the protection. The current and voltage transformer connections must remain isolated from the protection for these checks. The trip circuit should also remain isolated to prevent accidental operation of the associated circuit breaker.

11.5.2.1 User interface

This test ensures that the LCD, LEDs and keys function correctly. LCD display

Only apply the rated DC voltage and check whether the LCD displays normal operation status report as mentioned former. If there is a failure, for example VT circuit fail because of not applying voltage, the LCD displays failure report. If the LCD displays failure report, press the ECS key for 1 second and the LCD will return to normal operation status report.

LED display Apply the rated DC voltage and check that the "HEALTHY" LED is lighting in green. We need to emphasize that the "HEALTHY" LED is always lighting in operation course except that the equipment find serious problems listed in chapter 4.



Keypad Press key “ESC” or “”and enter the command menu. Do some jobs to ensure that all buttons are in good condition.

11.5.2.2 Watchdog contacts (Equipment being blocked, BSJ)

Using a continuity tester, check the watchdog contacts (equipment being blocked, BSJ) are in the states given in Table 11-1 below.

Table 11-1 Watchdog contact status Contacts

Terminals Relay de-energized Relay energized

4A1-4A3 4A2-4A4 4B4-4B26

Closed Open

11.5.2.3 Date and time

The method of setting will depend on whether accuracy is being maintained via the RS-485 port (from GPS in the substation) on the rear of the protection or via the front panel user interface manually. Turn on the DC power supply of the equipment and check the software version and time through the LCD Manual.

11.5.2.4 Binary input check

This test checks that all the binary inputs on the protection are functioning correctly. The binary inputs should be energized one at a time. Ensuring correct polarity, connect the field supply voltage to the appropriate terminals for the input being tested. There two voltage levels of opto-couple for binary inputs, one is 24V DC and the other is 250/220/125/110V DC. The negative pole of DC 24V and negative pole of DC 250/220/125/110V have been connected with the corresponding negative pole of opto-couplers through the inner rear board in equipment. The positive pole terminals of opto-couplers have been connected to the rear connectors for binary input connecting, and common positive pole has also be connected to the rear connector. Please see the panel diagram carefully and find the right connector terminal numbers of common positive pole of DC 24V and DC 250/220/125/110V.

Note:

The binary inputs may be energized from an external DC auxiliary supply (e.g. the station battery) in some installations. Check that this is not the case before connecting the field voltage otherwise damage to the protection may result. The status of each binary input can be viewed using either



DBG2000 software installed in a portable PC or by checking the front man-machine interface LCD. When each binary input is energized the display will change to indicate the new status of the inputs. Please check binary input both on CPU module and MON module and ensure they are consistent. Please note only the positive pole of opto-coupler for binary inputs are listed in following tables. 1) Main transformer protection contacts (24V opto-couplers) Path: Main Menu -> VALUES-> CPU(MON) BI STATE ->TR PROT EBI

No. Signal name Equipment terminal number

Wiring connector number

CPU status

MON status

1 EBI_Diff_GTU 6B17-6B5 2 EBI_Diff_Tr 6B17-6B1 3 EBI_PPF_Tr 6B17-6B2 4 EBI_EF_Tr 6B17-6B3 5 EBI_REF_Tr 6B17-6B4

2) Generator protection contacts (24V opto-couplers) Path: Main Menu -> VALUES-> CPU(MON) BI STATE ->GEN PROT EBI



CPU status

MON status

1 EBI_Diff_Gen 5B29-5B3 2 EBI_SPTDiff_Gen 5B29-5B26 3 EBI_PPF_Gen 5B29-5B25 4 EBI_IntTurn_Gen 5B29-5B4 5 EBI_ROV_Sta 5B29-5B5 6 EBI_V3rdH_Sta 5B29-5B6 7 EBI_1PEF_RotWdg 5B29-5B7 8 EBI_2PEF_RotWdg 5B29-5B8 9 EBI_OvLd_Sta 5B29-5B9 10 EBI_NegOC_Gen 5B29-5B10 11 EBI_LossExc_Gen 5B29-5B11 12 EBI_OOS_Gen 5B29-5B12 13 EBI_VoltProt_Gen 5B29-5B13 14 EBI_OvExc_Gen 5B29-5B14 15 EBI_PwrProt_Gen 5B29-5B15 16 EBI_FreqProt_Gen 5B29-5B16 17 EBI_AccEnerg_Gen 5B29-5B17 18 EBI_StShut_Gen 5B29-5B18

3) Exciter and stepdown transformer protection contacts (24V opto-couplers)



Path: Main Menu -> VALUES-> CPU(MON) BI STATE ->ET&ST PROT EBI



CPU status

MON status

1 EBI_Diff_Exc 5B29-5B19 2 EBI_Bak_Exc 5B29-5B20 3 EBI_Diff_ST 6B17-6B7 4 EBI_Bak_HVS_ST 6B17-6B8 5 EBI_Bak_LVS_ST 6B17-6B9 6 EBI_REF_ST 6B17-6B10

3) Mechanical protection contacts (220/110V opto-couplers) Path: Main Menu -> VALUES-> CPU(MON) BI STATE ->MECH RLY EBI



CPU status

MON status

1 EBI_Trp_MechRly1 5B29-5B24 2 EBI_Trp_MechRly2 5B29-5B23 3 EBI_Trp_MechRly3 5B29-5B21 4 EBI_Trp_MechRly4 5B29-5B22 5 BI_MechRly 1 5A27-5A20 6 BI_MechRly 2 5A27-5A19 7 BI_MechRly 3 5A27-5A17 8 BI_MechRly 4 5A27-5A18 9 BI_SyncCondenser 6B25-6B20

4) Auxiliary binary inputs (220/110V opto-couplers) Path: Main Menu -> VALUES-> CPU(MON) BI STATE -> AUX BI



CPU status

MON status

1 BI_52b_GCB 5A27-5A22 2 BI_52b_CB_HVS1_Tr 5A27-5A23 3 BI_52b_CB_HVS1_Tr 5A27-5A24 4 BI_Valve_Turbine 5A27-5A26 5 BI_PoleDisagr_CB 5A27-5A25 6 BI_UrgBrake 6B25_6B19 7 BI_Reserved 6B25_6B22 8 BI_PS_Superv 6B25_6B23

4) Binary inputs for power supply supervise (24V opto-couplers) Path: Main Menu -> VALUES-> CPU(MON) BI STATE -> PS SUPERV BI



CPU status

MON status





CPU status

MON status

1 BI_Print 6B17-6B13 2 BI_Pulse_GPS 6B17-6B14 3 BI_ResetTarget 6B17-6B15

11.5.2.5 Binary output check

Check alarm signal contacts When detecting a hardware failure in self-supervise, the relay will block all the output and black the “HEALTY” LED. All the operation element for alarm operates, the “ALARM” LED will illuminate. At the same time, the BJJ contact and other alarm contacts will be closed. According to the below table we can check these contacts.

No Signal name Local signal Remote signal SOE signal Yes or NO 1 BO_FAIL 4A1-4A3 4A2-4A4 4B4-4B26 2 BO_ALM 4A1-4A5 4A2-4A6 4B4-4B28 3 BO_CTS 4A1-4A7 4A2-4A8 4B4-4B6 4 BO_VTS 4A1-4A9 4A2-4A10 4B4-4B8 5 BO_OvLd 4A1-4A11 4A2-4A12 4B4-4B10 6 BO_NegOC 4A1-4A13 4A2-4A14 4B4-4B12 7 BO_OvLd_Exc 4A1-4A15 4A2-4A16 4B4-4B14 8 BO_EF_Sta 4A1-4A17 4A2-4A18 4B4-4B16 9 BO_1PEF_Gen 4A1-4A19 4A2-4A20 4B4-4B18 10 BO_LossExc_Gen 4A1-4A21 4A2-4A22 4B4-4B20 11 BO_OOS_Gen 4A1-4A23 4A2-4A24 4B4-4B22 12 BO_UF_Gen 4A1-4A25 4A2-4A26 4B4-4B24 13 BO_RevPwr_Gen 4A1-4A27 4A2-4A28 4B4-4B29 14 BO_OvExc_Gen 4A1-4A29 4A2-4A30 4B4-4B30

Check tripping signal contacts All the operation element for tripping operates, the “TRIP” LED will illuminate. At the same time, the tripping signal contacts will be closed. According to the below table we can check these contacts.

No Signal name Local signal Remote signal SOE signal Yes or NO

The first group: 1 BO_Diff_Gen 2A1-2A7 2A3-2A9 2A5-2A11 2 BO_EF_Sta 2A1-2A13 2A3-2A15 2A5-2A17 3 BO_OvLd_Sta 2A1-2A19 2A3-2A21 2A5-2A23



No Signal name Local signal Remote signal SOE signal Yes or NO 4 BO_LossExc_Gen 2A1-2A25 2A3-2A27 2A5-2A29 5 BO_LossExc1_Gen 2A1-2B1 2A3-2B3 2A5-2B5 6 BO_OV_Gen 2A1-2B7 2A3-2B9 2A5-2B11 7 BO_RevPwr_Gen 2A1-2B13 2A3-2B15 2A5-2B17 8 BO_StShut_Gen 2A1-2B19 2A3-2B21 2A5-2B23 9 BO_AccEnerg_Gen 2A1-2B25 2A3-2B27 2A5-2B29

The second group: 1 BO_Diff_GTU 2A2-2A8 2A4-2A10 2A6-2A12 2 BO_Diff_Tr 2A2-2A14 2A4-2A16 2A6-2A18 3 BO_PPF_Tr 2A2-2A20 2A4-2A22 2A6-2A24 4 BO_EF_Tr 2A2-2A26 2A4-2A28 2A6-2A30 5 BO_REF_Tr 2A2-2B2 2A4-2B4 2A6-2B6 6 BO_MechRly 2A2-2B8 2A4-2B10 2A6-2B12 7 BO_Diff_Exc 2A2-2B14 2A4-2B16 2A6-2B18

The third group: 1 BO_InerTurn_Gen 3A1-3A7 3A3-3A9 3A5-3A11 2 BO_EF_RotWdg 3A1-3A13 3A3-3A15 3A5-3A17 3 BO_NegOC_Sta 3A1-3A19 3A3-3A21 3A5-3A23 4 BO_OOS_Gen 3A1-3A25 3A3-3A27 3A5-3A29 5 BO_Reserved1 3A1-3B1 3A3-3B3 3A5-3B5 6 BO_OvExc_Gen 3A1-3B7 3A3-3B9 3A5-3B11 7 BO_RevP_Gen 3A1-3B13 3A3-3B15 3A5-3B17 8 BO_PPF_Gen 3A1-3B19 3A3-3B21 3A5-3B23 9 BO_FreqProt_Gen 3A1-3B25 3A3-3B27 3A5-3B29

The fourth group: 1 BO_Diff_ST 3A2-3A8 3A4-3A10 3A6-3A12 2 BO_Bak_HVS_ST 3A2-3A14 3A4-3A16 3A6-3A18 3 BO_Bak_LVS_ST 3A2-3A20 3A4-3A22 3A6-3A24 4 BO_REF_ST 3A2-3A26 3A4-3A28 3A6-3A30 5 BO_Reserved2 3A2-3B2 3A4-3B4 3A6-3B6 6 BO_Reserved3 3A2-3B8 3A4-3B10 3A6-3B12 7 BO_OvLd_Exc 3A2-3B14 3A4-3B16 3A6-3B18

Check tripping output contacts Setting the tripping logic settings refer to chapter 7. The output x will be closed only when the correspond bit [Output x] is set as “1”. According to the below table we can check these contacts.

No Output name Equipment terminal number


Yes or No





Yes or No

1 Trip output 1 1A3-1A5、1A7-1A9 1A11-1A13、1A15-1A17

2 Trip output 2 1A19-1A21、1A23-1A25 1A27-1A29、1B1-1B3

3 Trip output 3 1A2-1A4、1A6-1A8 1A10-1A12、1A14-1A16

4 Trip output 4 1A18-1A20、1A22-1A24

5 Trip output 5 1A26-1A28、1B2-1B4 1B6-1B8、1B10-1B12

6 Trip output 6 1B5-1B7、1B9-1B11 1B13-1B15

7 Trip output 7 1B17-1B19 8 Trip output 8 1B21-1B23 9 Trip output 9 1B25-1B27 10 Trip output 10 1B29-1B30 11 Trip output 11 1B14-1B16、1B18-1B20 12 Trip output 12 1B22-1B24、1B26-1B28 13 Trip output 13 2B24-2B26、2B28-2B30 14 Trip output 14 3B24-3B26、3B28-3B30

Check other output contacts



Yes or No

1 ZBFL-1 4B9-4B11 2 ZBFL-2 4B13-4B15 3 CBFL-1 4B17-4B19 4 CBFL-2 4B21-4B23 5 BY2 2B20-2B22 6 BY3 3B20-3B22 7 BSTY-1 3B1-3B3 8 BSTY-2 3B5-3B7

11.5.2.6 Communications port

This test should only be performed where the protection is to be accessed from a remote location and will vary depending on the communications standard being adopted. It is not the intention of the test to verify the operation of the complete system from the relay to the remote location, just the protection’s rear communications port and any protocol converter



necessary. Courier communications Ensure that the RS-232 wire link the RS-232 port in front of the RCS-985A and the communication baud rate in DBG2000 must be set as “9600”. Check that communications can be established with this protection using the portable PC. Remote communication This test is to check the status of communications between RCS-985A and the engineer’s workstation in SAS(Substation automation system) if it is applicable. Before test, the communication baud rate in RCS-985A must be set as “1200-38400” depends on Substation Automation System, and the protection’s [Comm_Adrr] must be set to a value between 1 and 254. In the menu of “DEBUG”->”COMM STATUS” on the LCD display, “485A”or “485B” indicates the communication status of 485A port or 485B port. If “Receive Data” is “N”, it means the equipment has not received data from external system. If “Valid Frame” is ‘N’, it indicates the setting error of baud rate or protocol while “Valid Address” is “N”, it means the communication address is set wrongly. ”Send Data” is "N” means datagram sent from the equipment is wrong. If all those status are ‘Y’, it means communication is established successfully.

11.5.2.7 AC Current inputs check

This test verifies that the accuracy of current measurement is within the acceptable tolerances. All protections will leave the factory set for operation at a system frequency of 50Hz or 60Hz. All relays will be set for operation at a system frequency of 50Hz. If operation at 60Hz is required then this must be set at menu.

Apply current equal to the current transformer secondary winding rating to each current transformer input of the corresponding rating in turn, see the following table or external connection diagram for appropriate terminal numbers, checking its magnitude using a multimeter/test set readout. The corresponding reading can then be checked in the relays’ menu.

The measurement accuracy of the relay is ±5%. However an additional allowance must be made for the accuracy of the test equipment being used.

Table 11-2 Current linearity and precision check out Displayed on LCD

No. Items Input value Phase A Phase B Phase C

Angle between A

and B

Angle between A

and C In

1 Phase currents at bushing

CT of HVS of main Tr 4In

In 2

Phase currents at side 1 of

HVS of main Tr 4In

3 Phase currents at side 2 of In



Displayed on LCD

No. Items Input value Phase A Phase B Phase C

Angle between A

and B

Angle between A

and C

HVS of main Tr 4In

In 4


HVS of ST 4In

In 5

Phase currents at terminal

of Gen 4In

In 6

Phase currents at NP of

Gen 4In

In 7

Phase currents at HVS of

ST 4In

In 8 Phase currents at LVS of ST 4In

In 9


Exc 4In

In 10


Exc 4In

In ******************* 11

Zero sequence transverse

current of Gen 4In *******************

In ******************* 12 Zero sequence current of Tr 4In *******************

In ******************* 13

Gap Zero sequence current

of Tr 4In *******************

Note:

To avoid damage the equipment, we can’t inject a high value current (such as 4In or more) to the equipment for long time, we suggest that the time in high current condition should not over 3 second every time. The measurement accuracy of the protection is ± 5%. However, an additional allowance must be made for the accuracy of the test equipment being used.

11.5.2.8 AC Voltage inputs check

This test only needs to be performed on models with voltage transformer inputs as it verifies that the accuracy of voltage measurement is within the acceptable tolerances. Apply rated voltage to voltage transformer input, checking its magnitude using a multimeter/test set readout. The corresponding reading can then be checked in the relays menu.

The measurement accuracy of the relay is ±5%. However an additional allowance must be made for the accuracy of the test equipment being used.



Table 11-3 Voltage linearity and precision check out Displayed in LCD

No. Items Input

value PhA PhB PhC Angle

between A and B

Angle between A

and C

58V 1

Terminal TV1 of

generator 20V

58V 2

Terminal TV2 of

generator 20V

58V 3 HVS TV of transformer

20V

58V 4

HVS TV of stepdown

transformer 20V

100V

5

zero sequence voltage

at terminal TV2 of

generator 20V

100V

6


at terminal TV2 of

generator 20V

100V 7


at NP of generator 20V

100V 8


of transformer 20V

100V

9


at LVS of stepdown

transformer 20V

Note:

The measurement accuracy of the protection is ±5%. However, an additional allowance must be made for the accuracy of the test equipment being used.

11.5.3 Setting Testing

The setting checks ensure that the entire application-specific relay, for the particular installation, has been correctly applied to the relay.

Note:

The trip circuit should remain isolated during these checks to prevent accidental operation of the associated circuit breaker.

If the application-specific settings are not available, ignore sections 11.5.3.

Apply application-specific settings

There are two methods of applying the settings to the relay:

Transferring them from a pre-prepared setting file to the relay using a portable PC running the



appropriate software via the relay’s RS232 port, located on the front plate of the relay. This method is preferred for transferring function settings as it is much faster and there is less margin for error.

Enter them manually via the relay’s operator interface.

Demonstrate correct relay operation

Tests mentioned above have already demonstrated that the relay is within calibration, thus the purpose of these tests is as follows:

− To determine that the primary protection functions, such as generator differential protection, overcurrent protection and so on, can trip according to the correct application settings.

− To verify correct assignment of the trip contacts, by monitoring the response to a selection of fault injections.

11.5.4 Rear communications port EIA(RS) 485

This test should only be performed where the relay is to be accessed from a remote location and will vary depending on the communications standard being adopted.

It is not the intension of the test to verify the operation of the complete system from the relay to the remote location, just the relay’s rear communications port and any protocol converter necessary.

Connect a portable PC to the relay via a EIA(RS) 485-232 converter. Ensure that the relay address and the baud rate settings in the application software are set the same as those in relay.

If the relay has the optional fiber optic communications port, then an fiber optic-RS232 converter shall be applied.

11.5.5 On-load checks

The objectives of the on-load checks are to:

-Confirm the external wiring to the current and voltage inputs is correct.

-Check the polarity of the current transformers at each side is consistent.

Remove all test leads, temporary shorting leads, etc. and replace any external wiring that has been removed to allow testing.

If it has been necessary to disconnect any of the external wiring from the relay in order to perform any the foregoing tests. It should be ensured that all connections are replaced in accordance with the relevant external connection or scheme diagram.

Voltage connections

Using a multimeter measure the voltage generator secondary voltages to ensure they are correctly rated. Check that the system phase rotation is correct using a phase rotation meter.

Comparing the values of the secondary phase voltages with the relay’s measured values, which can be found in the menu.

Current connections

Measure the current transformer secondary values for each input using a multimeter connected in series with the corresponding current input. (It is preferable to use a tong-test ammeter instead)



Check that the current transformer polarities are correct by measuring the phase angle between the current and voltage either against a phase meter already installed on site and known to be correct or by determining the direction of power flow by contacting the networks control center (NCC).

Compare the values of the secondary phase currents and phase angle with the relay’s measured values, which can be found in menu.

11.5.6 Final check

The tests are now complete.

Remove all test or temporary shorting leads, etc. If it has been necessary to disconnect any of the external wiring from the relay in order to perform the wiring verification tests, it should be ensured that all connections (wiring, fuses and links) are replaced in accordance with the relevant external connection or scheme diagram.

Ensure that all event records, fault records, disturbance records, alarms and LEDs have been reset before leaving the relay.

11.6 Use of assistant test software DBG-2000 11.6.1 Function summary of DBG-2000 communication software

DBG-2000 configuration and testing program (user version) is developed for the user to configure, test and maintain RCS-985A generator protection equipment on site. It comprises four parts: sampled value display, settings reading and modification, report process and test. These four parts correspond to 4 files RCS-985A_status, RCS-985A_set, RCS-985A_rpt and RCS-985A_tst respectively and are described hereinafter. We have to say that the four configuration file is relevant with special version of protection program. That is, when the protection program is upgrade, the above mentioned four configuration files must upgrade at the same time, otherwise it may bring confusion of settings to the equipment at the time of setting.

Connect RS-232 communication port of the computer and that of RCS-985A protection equipment by a cable with DB-9 connectors on both ends. Run the program DBG-2000. If the connection is correct, the screen will show “RCS-985A connected”, see Figure 11.6.1. Even if the computer is off line, this picture will be still shown but the words about connection will disappear.

Figure 11-2 Display of connection status of DBG2000 with RCS-985A



11.6.2 Connection way of protection equipment and personal computer

A 9-pin RS232C serial port is located on the relay’s front panel for communication with personal computer. All that is required to use this interface is a personal computer running the DBG-2000 software provided with the equipment. Cabling for the RS232 port is shown in the following figure for 9 pin connectors.

Figure 11-3 Definition of RS-232 wiring cable

11.6.3 Configuration of PC and the software before use

11.6.3.1 PC configuration

Set the PC com port’s baud rate which is connected with front series port of RCS-985A as 9600bps.

11.6.3.2 Software configuration

There are 3 bars on top of the screen, from top to bottom: title bar, menu bar and tool bar, see Figure 11-4.

Figure 11-4 Title bar, menu bar and tool bar

First, click the first button of tool bar parameter, dialog box of communication parameters is

displayed, see Figure 11-5. Only the parameter of [COM port] shall be configured as the port of

computer which is actually connected with the equipment, all other parameters shall be configured

as the same as displayed in Figure 11-5.



Figure 11-5 Dialog box of communication Parameters

11.6.4 Operation instruction of the software

Here is only brief description of usage. Please refer to dedicated manual of DBG2000 for detail.

11.6.4.1 Protection parameters setting

Offline protection parameters setting—A convenient function of the software

The function is used for offline parameter setting. First, input setting parameters and saves it in PC, then connects PC with the protection equipment, executive “DOWNLOAD” command, and the settings saved in PC will be transferred to the protection equipment, so most part of the setting operation can be finished in office instead of in substation.

Here is the procedure to input settings offline. Before connect PC with RCS-985A, run the software of DBG2000，click on “setting” icon, a popup dialog box will appear which asks user whether or not to set parameter offline, click “yes” and input “985Axxx” (xxx represents program version, point ignored) to confirm the relay type and version of the protection program, then parameter setting interface will appear. The settings displayed first are default settings, user can replace them with application-specific settings. After modification, save the settings into a file. When PC is connected with the protection equipment, open the setting file and transfer setting to protection.

Online setting by DBG-2000

When PC is connecting with RCS-985A, run DBG-2000, the PC screen will display “RCS-985Axxx connected”, click on “SETTING” icon, then parameter setting interface will appear, the settings uploaded from RCS-985A will be displayed, user can modify them to application-specific settings.



11.6.4.2 Status

Click button, user can observe real time sampled data and binary inputs status.

11.6.4.3 Report

Click button, entering report view part of the program, choose a report in the table, and click

“report record”, save report data according to following clue on instruction. The data can be used in the auxiliary analyze software to show us the fault course of power system and the logic calculation course of RCS-985A again.

11.6.4.4 SIG RESET

Click button, all magnetic latched output relays and signal relays will be reset.

11.6.4.5 Trip test (if available)

Click button, entering trip test part of the program, click contacts to change the status of

relays displayed, a same operation command to breaker circuit will be issued. This function is used to test breaker circuit without apply electric quantities to the protection equipment.

Chapter 12 Maintenance


Chapter 12 Maintenance 12.1 Maintenance period It is recommended that products supplied by NR receive periodic monitoring after installation. In view of the critical nature of protective relays and their infrequent operation, it is desirable to confirm that they are operating correctly at regular intervals.

NR protective relays are designed for a life in excess of 10 years.

RCS series relays are self-supervising and so require less maintenance than earlier designs of relay. Most problems will result in an alarm so that remedial action can be taken. However, some periodic tests should be done to ensure that the relay is functioning correctly and the external wiring is intact.

12.2 Maintenance checks Although some functionality checks can be performed from a remote location by utilizing the communications ability of the relays, these are predominantly restricted to checking that the relay is measuring the applied currents and voltages accurately. Therefore it is recommended that maintenance checks are performed locally (i.e. at the substation itself).

Before carrying out any work on the equipment, the user should be familiar with the contents of the Safety and technique Data sections and the ratings on the equipment’s rating label.

12.2.1 Alarms

The alarm status LED should first be checked to identify if any alarm conditions exist. If so, try to find the cause to the alarm and eliminate it and clear the alarms to extinguish the LED.

12.2.2 Binary Inputs

The opto-isolated inputs can be checked to ensure that the relay responds to their energization.

12.2.3 Binary output

The output relays can be checked to ensure that they operate by repeating the commissioning test.

12.2.4 Analog inputs

If the power system is energized, the values measured by the relay can be compared with known system values to check that they are in the approximate range that is expected. If they are, then the analog/digital conversion and calculations are being performed correctly by the relay.

Alternatively, the values measured by the relay can be checked against known values injected into the relay via the test block, if fitted, or injected directly into the relay terminals. Suitable test methods can be found in relevant manuals. These tests will prove the calibration accuracy is being maintained.

12.3 Method of Repair If the relay should develop a fault whilst in service, depending on the nature of the fault, the watchdog contacts will change state and an alarm condition will be flagged. Due to the extensive



use of surface-mount components faulty PCBs should be replaced, as it is not possible to perform repairs on damaged circuits. Thus either the complete relay or just the faulty PCB, identified by the in-built diagnostic software, can be replaced. Advice about identifying the faulty PCB can be found in section 12.3.2.

The preferred method is to replace the complete relay as it ensures that the internal circuitry is protected against electrostatic discharge and physical damage at all times and overcomes the possibility of incompatibility between replacement PCBs.

Replacing PCBs can reduce transport costs but requires clean, dry conditions on site and higher skills from the person performing the repair. However, if the repair is not performed by an approved service center, the warranty will be invalidated.

Before carrying out any work on the equipment, the user should be familiar with the contents of the Safety and technique Data sections and the ratings on the equipment’s rating label. This should ensure that no damage is caused by incorrect handling of the electronic components.

12.3.1 Replacing the complete relay

The case and rear terminal blocks have been designed to facilitate removal of the complete relay should replacement or repair become necessary without having to disconnect the scheme wiring.

Before working at the rear of the relay, isolate all voltage and current supplies to the relay.

Note:

The RCS serials relays have integral current transformer shorting switches which will close when the connecting terminal is removed.

Disconnect the relay earth, IRIG-B and fiber optic connections, as appropriate, from the rear of the relay.

Note:

The use of a magnetic bladed screwdriver is recommended to minimize the risk of the screws being left in the terminal block or lost.

Without exerting excessive force or damaging the scheme wiring, pull the terminal blocks away from their internal connectors.

Remove the screws used to fasten the relay to the panel, rack, etc. These are the screws with the larger diameter heads on front of the faceplate of the relay.

Withdraw the relay carefully from the panel, rack, etc. because it will be heavy due to the internal transformers.

To reinstall the repaired or replacement relay, follow the above instructions in reverse, ensuring that each terminal block is relocated in the correct position and the case earth, and fiber optic connections are replaced.

Once reinstallation is complete the relay should be re-commissioned using the instructions in sections 11 of this manual.

12.3.2 Replacing a PCB

Replacing printed circuit boards and other internal components of protective relays must be



undertaken only by Service Centers approved by NARI RELAYS. Failure to obtain the authorization of NR After Sales Engineers prior to commencing work may invalidate the product warranty.

Before replacing a PCB the auxiliary supply must be removed, and wait 5s for capacitors to discharge. It is also strongly recommended that the voltage and current transformer connections and trip circuit are isolated.

The relay, being modular in design, allows for the withdrawal and insertion of modules. Modules must only be replaced with like modules in their original factory configured slots.

Figure 12-1 RCS-985A Module Withdrawal/Insertion

NR Support teams are available world-wide, and it is strongly recommended that any repairs be entrusted to those trained personnel. For this reason, details on product disassembly and re-assembly are not included here.

12.4 Changing the relay battery Each relay has a battery to maintain status data and the correct time when the auxiliary supply voltage fails. The data maintained includes event, fault and disturbance records.

This battery will periodically need changing. If the battery-backed facilities are not required to be maintained during an interruption of the auxiliary supply, the steps below can be followed to remove the battery.

Before carrying out any work on the equipment, the user should be familiar with the contents of the safety and technique data sections and the ratings on the equipment’s rating label.

12.4.1 Instructions for replacing the battery

Withdraw the CPU board from RCS-985A.

Gently extract the battery from its socket. If necessary, use a small, insulated screwdriver to prize the battery free.

Ensure that the metal terminals in the battery socket are free from corrosion, grease and dust.

The replacement battery should be removed from its packaging and placed into the battery holder, taking care to ensure that the polarity markings on the battery agree with those adjacent to the



socket as shown as below.

Figure 12-2 Battery replacement

Note:

Ensure that the battery is securely held in its socket and that the battery terminals are making good contact with the metal terminals of the socket.

Insert the CPU module into RCS-985A.

12.4.2 Battery disposal

The battery that has been removed should be disposed of in accordance with the disposal procedure for Lithium batteries in the country in which the relay is installed.

12.5 Cleaning Before cleaning the equipment ensure that all AC and DC supplies, current transformer and voltage transformer connections are isolated to prevent any chance of an electric shock whilst cleaning.

The equipment may be cleaned using a lint-free cloth moistened with clean water. The use of detergents, solvents or abrasive cleaners is not recommended as they may damage the relay’s surface and leave a conductive residue.

Chapter 13 Ordering Form


Chapter 13 Ordering Form 13.1 Loose equipment Essential information should be provided when user orders loose equipment, such as:

Equipment type;

Amount of equipment to be ordered;

AC rated current and rated voltage input;

DC power source supply rated voltage;

To be simplified, user can provide such information by finishing the following table and send it to manufacture.

Table 13.1.1 Ordering information of RCS-985A

NR Ordering form

RCS-985A

Item RCS-985A * * * * * * * Protective Functions Standard Configuration

Communication Port

EIA-232 and 2 x EIA-485 A

EIA-232 and 2 x Optical converter B

EIA-232 and 2 x Ethernet*

Rated parameters of AC input module

57.7V/Phase; 1 Amp Phase; 50 Hz 1 57.7V/Phase; 1 Amp Phase; 60 Hz 2 57.7V/Phase ; 5 Amp Phase; 50 Hz 3 57.7V/Phase ; 5 Amp Phase; 60 Hz 4 63.5V/Phase; 1 Amp Phase; 50 Hz 5 63.5V Phase; 1 Amp Phase; 60 Hz 6 63.5V Phase ; 5 Amp Phase; 50 Hz 7 63.5V Phase ; 5 Amp Phase; 60 Hz

8 Auxiliary Voltage rating 110/125 Vdc

1

Chapter 13 Ordering Form


220/250 Vdc 2

Binary input power source supply

External 24Vdc 1 External 48Vdc* External 110/125Vdc 3 External 220/250Vdc

4

Communication medium Shielded twisted pair wires T Optical Fiber

O

Communication Protocol

IEC 60870-5-103 S MODBUS M IEC 61850*

E

Terminal Type

Jointing Terminal C Screw terminal Block

S

13.2 Panel installed If user orders panels too, following information in addition to what is mentioned in table 13.1.1 should be provided. Manufacture should be informed as early as possible if special requirement is included. The general information includes but not all:

Amount and type of the panels;

Dimension of the panel (standard dimension is 800mm(W)*600mm(D)*2200mm(H));

Color of panel (Inter Grey, Apple green and light camel grey are recommended colors).

Chapter 14 Firmware and service manual version history



Software Version Hardware

Suffix Version CRC

Original Date of Issue

Description of Changes

Technical Documentation

3.12 Jun 2007 Original Issue RCS-985A Generator transformer unit protection manual

1 2

3

4

Chapter 15 ANNEX


Chapter 15 ANNEX 15.1 Appendix A: Settings Sheet 15.1.1 Equipment parameters

No. Symbol Range Step Default 1 Setting_Group 0～1 1 0 2 Equip_ID 6 characters maximum FDJ001 3 Comm_Addr 0～255 1 1 4 COM1_Baud 1.2/2.4/4.8 / 9.6 /14.4/ 19.2 / 38.4 kbit/s 19.2 kbit/s 5 COM2_Baud 1.2/2.4/4.8 / 9.6 /14.4/ 19.2 / 38.4 kbit/s 19.2 kbit/s 6 Printer_Baud 1.2/2.4/4.8 / 9.6 /19.2 kbit/s 9.6k bit/s 7 Protocol 0000-FFFF 0041

logic setting “1” - enable, “0” - disable 8 En_Auto_Print 0/1 0 9 En_Net_Print 0/1 0 10 En_Remote_Cfg 0/1 0 11 GPS_Pulse 0/1 0

15.1.2 Logic settings of configuring functions

No. Symbol Range Default 1 En_Diff_GTU 0/1 0

2 En_Diff_Tr 0/1 0

3 En_PPF_Tr 0/1 0

4 En_EF_Tr 0/1 0

5 En_OvExc_Tr 0/1 0

6 En_Diff_Gen 0/1 0

7 En_SPTDiff_Gen 0/1 0

8 En_IntTurn_Gen 0/1 0

9 En_PPF_Gen 0/1 0

10 En_EF_Sta 0/1 0

11 En_EF_RotWdg 0/1 0

12 En_OvLd_Sta 0/1 0

13 En_NegOC_Sta 0/1 0

14 En_LossExc_Gen 0/1 0

15 En_OOS_Gen 0/1 0

16 En_VoltProt_Gen 0/1 0

17 En_OvExc_Gen 0/1 0

Chapter 15 ANNEX


No. Symbol Range Default 18 En_PwrProt_Gen 0/1 0

19 En_FreqProt_Gen 0/1 0

20 En_StShut_Gen 0/1 0

21 En_AccEnerg_Gen 0/1 0

22 En_Diff_Exc 0/1 0

23 En_Bak_Exc 0/1 0

24 En_OvLd_RotWdg 0/1 0

25 En_Diff_ST 0/1 0

26 En_Bak_HVS_ST 0/1 0

27 En_Bak_LVS_ST 0/1 0

28 En_REF_ST 0/1 0

29 En_MechRly 0/1 0

30 En_PoleDisagr_CB 0/1 0

31 En_VTComp_Term_Gen 0/1 0

32 Reserved(＃) 0/1 0

33 En_TestMode(＃) 0/1 0

15.1.3 Transformer system parameters

No. Symbol Range Step Default 1 Sn_Tr 0-6000 MVA 0.1 MVA 370

2 U1n_HVS_Tr 0-600 kV 0.01 kV 220

3 U1n_LVS_Tr 0-600 kV 0.01 kV 20

4 U1n_VT_HVS_Tr 0-600 kV 0.01 kV 127.02

5 U2n_VT_HVS_Tr 57.74-110 V 0.01 V 57.74

6 U2n_DeltVT_HVS_Tr 33.33-330 V 0.01 V 57.74

7 I1n_CT_HVS1_Tr 0-60000 A 1A 1200

8 I2n_CT_HVS1_Tr 1, 5 A 1A 1

9 I1n_CT_HVS2_Tr 0-60000 A 1A 1200

10 I2n_CT_HVS2_Tr 1, 5 A 1 A 1

11 I1n_CT_HVS_Tr 0-60000 1 A 1200

12 I2n_CT_HVS_Tr 1, 5A 1 A 1

13 I1n_CT_LVS_Tr 0-60000A 1 A 12000

14 I2n_CT_LVS_Tr 1,5A 1 A 1

15 I1n_CT_NP_Tr 0-60000A 1 A 600

16 I2n_CT_NP_Tr 1,5A 1 A 1

17 I1n_CT_Gap_Tr 0-60000A 1 A 200

18 I2n_CT_Gap_Tr 1,5A 1 A 1


Chapter 15 ANNEX


No. Symbol Range Step Default 19 Yd11_Conn_Tr 0/1 1 1

20 Yyd11_Conn_Tr 0/1 1 0

21 Opt_GCB 0/1 1 0

15.1.4 Generator system parameters

No. Symbol Range Step Default 1 fn_Gen 50/60 Hz 50 2 Pn_Gen 0-6000.0 MW 0.1 MW 300 3 PF_Gen 0.00-1.00 0.01 0.85 4 U1n_Gen 0-600.00 kV 0.01 kV 20 5 U1n_VT_Term_Gen 0-600.00 kV 0.01 V 11.55 6 U2n_VT_Term_Gen 57.74-110.00 V 0.01 V 57.74 7 U2n_DeltVT_Term_Gen 33.33-110.00 V 0.01 V 33.33 8 U1n_VT_NP_Gen 0-600.00 kV 0.01 kV 11.55 9 U2n_VT_NP_Gen 0-300.00 V 0.01 V 57.74 10 I1n_CT_Term_Gen 0-60000 A 1 A 12000 11 I2n_CT_Term_Gen 1A/5A 1 A 5 12 k_SP1_Gen 0-100.00 % 0.01 % 50 13 k_SP2_Gen 0-100.00 % 0.01 % 50 14 I1n_CT_SP1_Gen 0-60000 A 1 A 12000 15 I2n_CT_SP1_Gen 1A/5A 1 A 5 16 I1n_CT_SP2_Gen 0-60000 A 1 A 12000 17 I2n_CT_SP2_Gen 1A/5A 1 A 5 18 I1n_CT_TrvDiff_Gen 0-60000 A 1 A 600 19 I2n_CT_TrvDiff_Gen 1A,5A 1 A 5 20 I1n_RotWdg 0-60000 A 1 A 1000 21 U2n_Shunt_RotWdg 0-75.00 mV 0.01 mV 75 22 U1n_Exc 0-600 V 0.01 V 200

15.1.5 Stepdown transformer system parameters

No. Symbol Range Step Default 1 Sn_ST 0-100 MVA 0.01 MVA 30

2 U1n_HVS_ST 0-600 kV 0.01 kV 20

3 U1n_LVS_ST 0-600 kV 0.01 kV 6.3

4 U1n_VT_LVS_ST 0-600 kV 0.01 kV 6.3

5 U2n_VT_LVS_ST 57.74-110 V 0.01 V 3.46

6 U2n_DeltVT_LVS_ST 33.33-110 V 0.01 V 57.74

Chapter 15 ANNEX


No. Symbol Range Step Default 7 I1n_CT2_HVS_ST 0-60000 A 1 A 12000

8 I2n_CT2_HVS_ST 1,5 A 1 A 1

9 I1n_CT1_HVS_ST 0-60000 A 1 A 1000

10 I2n_CT1_HVS_ST 1,5 A 1 A 1

11 I1n_CT_LVS_ST 0-60000 A 1 A 3000

12 I2n_CT_LVS_ST 1,5 A 1 A 1

13 I1n_CT_NP_LVS_ST 0-60000 A 1 A 3000

14 I2n_CT_NP_LVS_ST 1,5 A 1 A 1

Logic setting “1” - enable, “0” – disable 15 Yyy12_Conn_ST 0/1 0

16 Ddd12_Conn_ST 0/1 1


18 Ydd11_Conn_ST 0/1 0


15.1.6 System parameters of excitation transformer or exciter

No. Symbol Range Step Default 1 fn_Exciter 50,100, 150Hz 1Hz 50 2 Sn_Exc 0-100.00 MVA 0.01 MVA 0.5 3 U1n_S1_Exc 0-600.00 kV 0.01 kV 20 4 U1n_S2_Exc 0-600.00 kV 0.01 kV 6.3 5 U1n_VT_Exc 0-600.00 kV 0.01 kV 3.46 6 U2n_VT_Exc 57.74-110 V 0.01 V 57.74 7 U2n_DeltVT_Exc 33.33-110 V 0.01 V 33.33 8 I1n_CT_S1_Exc 0-60000 A 1 A 20 9 I2n_CT_S1_Exc 1A,5A 1 A 5 10 I1n_CT_S2_Exc 0-60000 A 1 A 60 11 I2n_CT_S2_Exc 1A,5A 1 A 5

Logic setting “1” - enable, “0” – disable 12 Opt_Exc 0, 1 0 13 Yy12_Conn_ET 0, 1 0 14 Dd12_Conn_ET 0, 1 0 15 Dy11_Conn_ET 0, 1 0 16 Yd11_Conn_ET 0, 1 1 17 Dy1_Conn_ET 0, 1 0

Chapter 15 ANNEX


15.1.7 Implicit configuration settings

No. Symbol Range Default 1 Cfg_CT_Diff_GTU(＃) 0000-FFFF 000E 2 Cfg_CT_Diff_Tr(＃) 0000-FFFF 001B 3 Cfg_CT_Diff_Exc(＃) 0000-FFFF 0001 4 Opt_Polar_CT(＃) 0000-FFFF 1FFF 5 Cfg_CT_Bak_Tr(＃) 0000-FFFF 0002 6 Cfg_CT_PwrProt_Gen(＃) 0000-FFFF 0001 7 GTU, 2W_ST(＃) 0/1 0 8 3/2Bus, GTU, 2W_ST(＃) 0/1 0 9 GTU, 3W_ST(＃) 0/1 1 10 3/2Bus, GTU, 3W_ST(＃) 0/1 0 11 Tr, Gen, 2W_ST(＃) 0/1 0 12 3/2Bus, Tr, Gen, 2W_ST(＃) 0/1 0 13 Tr, Gen, 3W_ST(＃) 0/1 0 14 3/2Bus, Tr, Gen, 3W_ST(＃) 0/1 0 15 Gen_Only(＃) 0/1 0 16 Opt_WaveRec_MON(＃) Pickup/Trip Pickup 17 Opt_Debug_MON(＃) DSP2/DSP1 DSP2 18 Opt_Dur_WaveRec_MON(＃) 4S/8S 4S 19 En_Displ_Pickup(＃) Yes/No No

15.1.8 Settings of differential protection of generato-transformer unit

No. Symbol Range Step Default 1 I_Pkp_PcntDiff_GTU 0.10–1.50 (Ie) 0.01 (Ie) 0.3

2 I_InstDiff_ GTU 2.00–14.00 (Ie) 0.01 (Ie) 6



5 k_Harm_PcntDiff_GTU 0.10-0.35 0.01 0.15

6 TrpLog_Diff_ GTU 0000–FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 7 En_InstDiff_ GTU 0, 1 1 8 En_PcntDiff_ GTU 0, 1 1 9 Opt_Inrush_Ident_ GTU 0, 1 1 10 Opt_CTS_Blk_PcntDiff_ GTU 0, 1 1

15.1.9 Settings of differential protection of main transformer

No. Symbol Range Step Default

Chapter 15 ANNEX


No. Symbol Range Step Default 1 I_Pkp_PcntDiff_Tr 0.10–1.50 (Ie) 0.01 (Ie) 0.3

2 I_InstDiff_ Tr 2.00–14.00 (Ie) 0.01 (Ie) 6



5 k_Harm_PcntDiff_Tr 0.10-0.35 0.01 0.15

6 TrpLog_Diff_ Tr 0000–FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 7 En_InstDiff_ Tr 0, 1 1 8 En_PcntDiff_ Tr 0, 1 1 9 En_DPFC_Diff_Tr 0, 1 1 10 Opt_Inrush_Ident_ Tr 0, 1 1 11 Opt_CTS_Blk_PcntDiff_Tr 0, 1 1

15.1.10 Settings of phase to phase fault protection of main transformer

No. Symbol Range Step Default 1. V_NegOV_VCE_Tr 1.00 V– 20.00 V 0.01 V 4 2. Vpp_VCE_Tr 2.00V-100.00V 0.01 V 60 3. I_OC1_Tr 0.10 A – 100.00 A 0.01 A 15 4. t_OC11_Tr 0.00 s – 10.00 s 0.01 s 1 5. TrpLog_OC11_Tr 0000-FFFF 1 000F 6. t_OC12_Tr 0.00 s – 10.00 s 0.01 s 1.5 7. TrpLog_OC12_Tr 0000-FFFF 1 00F1 8. I_OC2_Tr 0.10 A – 100.00 A 0.01 A 10 9. t_OC21_Tr 0.00 s – 10.00 s 0.01 s 2 10. TrpLog_OC21_Tr 0000-FFFF 1 0F01 11. t_OC22_Tr 0.00 s – 10.00 s 0.01 s 2.2 12. TrpLog_OC22_Tr 0000-FFFF 1 7001 13. Z1_Fwd_Tr 0.00 – 100.00 Ohm 0.01Ohm 20 14. Z1_Rev_Tr 0.00 – 100.00 Ohm 0.01Ohm 20 15. t_Z11_Tr 0.00 – 10.00 s 0.01 s 1 16. TrpLog_Z11_Tr 0000-FFFF 1 0FFF 17. t_Z12_Tr 0.00 – 10.00 s 0.01 s 1 18. TrpLog_Z12_Tr 0000-FFFF 1 0FFF 19. Z2_Fwd_Tr 0.00 – 100.00 Ohm 0.01Ohm 20 20. Z2_Rev_Tr 0.00 – 100.00 Ohm 0.01Ohm 20 21. t_Z21_Tr 0.00 – 10.00 s 0.01 s 1 22. TrpLog_Z21_Tr 0000-FFFF 1 0FFF 23. I_Alm_OvLd_Tr 0.10 – 100.00 A 0.01 A 6

Chapter 15 ANNEX


No. Symbol Range Step Default 24. t_Alm_OvLd_Tr 0.00 – 10.00 s 0.01 s 8 25. I_InitCool1_OvLd_Tr 0.10 – 100.00 A 0.01 A 5.5 26. t_InitCool1_OvLd_Tr 0.00 – 10.00 s 0.01 s 9 27. I_InitCool2_OvLd_Tr 0.10 – 100.00 A 0.01 A 5.5 28. t_InitCool2_OvLd_Tr 0.00 – 10.00 s 0.01 s 9




31. En_LVS.VCE_Ctrl_OC_Tr 0/1 1

32. En_Mem_Curr_Tr 0/1 0

33. Opt_VTS_Ctrl_OC_Tr 0/1 1

34. En_OvLd_Tr 0/1 1

35. En_InitCool_OvLd_Tr 0/1 1

15.1.11 Settings of earth fault protection of main transformer

No. Symbol Range Step Default 1. V_ROV_VCE_Tr 2.00 –100.00V 0.01V 10 2. I_ROC1_Tr 0.10 –100.00A 0.01A 10 3. t_ROC11_Tr 0.00–10.00s 0.01s 1 4. TrpLog_ROC11_Tr 0000-FFFF 1 0021 5. t_ROC12_Tr 0.00–10.00s 0.01s 1.5 6. TrpLog_ROC12_Tr 0000-FFFF 1 0003 7. I_ROC2_Tr 0.10–100.00A 0.01A 10 8. t_ROC21_Tr 0.00– 10.00s 0.01 s 2 9. TrpLog_ROC21_Tr 0000-FFFF 1 0003 10. t_ROC22_Tr 0.00– 10.00s 0.01s 2.5 11. TrpLog_ROC22_Tr 0000-FFFF 1 001F 12. I_ROC3_Tr 0.10–100.00A 0.01A 10 13. t_ROC31_Tr 0.00– 10.00s 0.01 s 2 14. TrpLog_ROC31_Tr 0000-FFFF 1 0003 15. t_ROC32_Tr 0.00– 10.00s 0.01s 2.5 16. TrpLog_ROC32_Tr 0000-FFFF 1 001F 17. V_ROV_Gap_Tr 2.00 – 200.00 V 0.01 V 150 18. t_ROV1_Gap_Tr 0.00 – 10.00s 0.01s 0.5 19. TrpLog_ROV1_Gap_Tr 0000-FFFF 1 0003 20. t_ROV2_Gap_Tr 0.00 – 10.00s 0.01s 1 21. TrpLog_ROV2_Gap_Tr 0000 – FFFF 1 001F

Chapter 15 ANNEX


No. Symbol Range Step Default 22. I_Alm_REF_Tr 0.10 – 10.00 In 0.01 In 0.1 23. I_Pkp_PcntREF_Tr 0.10 – 10.00 In 0.01 In 0.3 24. I_InstREF_Tr 2.00 – 50.00 In 0.01 In 6 25. Slope_PcntREF_Tr 0.30 – 0.70 0.01 0.3 26. TrpLog_REF_Tr 0000-FFFF 1 7FFF 27. V_Alm_ROV_LVS_Tr 10.00 – 100.00V 0.01 V 100 28. t_Alm_ROV_LVS_Tr 0.00 – 10.00s 0.01s 0.5

logic setting “1” - enable, “0” – disable 29. En_VCE.ROV_Ctrl_ROC1_Tr 0/1 0

30. En_VCE.ROV_Ctrl_ROC2_Tr 0/1 0



33. En_Alm_ROV_LVS_Tr 0/1 0

34. En_BI_Ctrl_ROC_Gap_Tr 0/1 0

35. En_InstREF_Tr 0/1 1

36. En_PcntREF_Tr 0/1 1

15.1.12 Settings of over excitation protection of main transformer

No. Symbol Range Step Default 1. k_OvExc1_Tr 1.00 – 2.00 0.01 1.4 2. t_OvExc1_Tr 0.00 – 3000.00 s 0.01s 1 3. TrpLog_OvExc1_Tr 0000 – FFFF 1 000F 4. K_OvExc2_Tr 1.00 – 2.00 0.01 1.2 5. t_OvExc2_Tr 0.00 – 3000.00 s 0.01s 20 6. TrpLog_OvExc2_Tr 0000 – FFFF 1 0F01 7. k_Alm_OvExc_Tr 1.00 – 2.00 0.01 1.1 8. t_Alm_OvExc_Tr 0.00 – 3000.00 s 0.01s 10 9. k0_InvOvExc_Tr 1.00 – 2.00 0.01 1.5 10. t0_InvOvExc_Tr 0.00 – 3000.00 s 0.01s 1 11. k1_InvOvExc_Tr 1.00 – 2.00 0.01 1.45 12. t1_InvOvExc_Tr 0.00 – 3000.00 s 0.01s 2 13. k2_InvOvExc_Tr 1.00 – 2.00 0.01 1.4 14. t2_InvOvExc_Tr 0.00 – 3000.00 s 0.01s 5 15. k3_InvOvExc_Tr 1.00 – 2.00 0.01 1.3 16. t3_InvOvExc_Tr 0.00 – 3000.00 s 0.01s 15 17. k4_InvOvExc_Tr 1.00 – 2.00 0.01 1.25 18. t4_InvOvExc_Tr 0.00 – 3000.00 s 0.01s 30

Chapter 15 ANNEX


19. k5_InvOvExc_Tr 1.00 – 2.00 0.01 1.2 20. t5_InvOvExc_Tr 0.00 – 3000.00 s 0.01s 100 21. k6_InvOvExc_Tr 1.00 – 2.00 0.01 1.15 22. t6_InvOvExc_Tr 0.00 – 3000.00 s 0.01s 300 23. k7_InvOvExc_Tr 1.00 – 2.00 0.01 1.1 24. t7_InvOvExc_Tr 0.00 – 3000.00 s 0.01s 1000 25. TrpLog_InvOvExc_Tr 0000 – FFFF 1 7FFF

15.1.13 Settings of differential protection of generator

No. Symbol Range Step Default 1 I_Pkp_PcntDiff_Gen 0.10–1.50 (Ie) 0.01 (Ie) 0.1

2 I_InstDiff_Gen 2.00–14.00 (Ie) 0.01 (Ie) 6



5 TrpLog_Diff_Gen 0000–FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 6 En_InstDiff_Gen 0, 1 1 7 En_PcntDiff_Gen 0, 1 1 8 En_DPFC_Diff_Gen 0, 1 1 9 Opt_CTS_Blk_PcntDiff_Gen 0, 1 1

15.1.14 Settings of splitting-phase transverse differential protection of generator

No. Symbol Range Step Default 1. I_Pkp_PcntSPTDiff_Gen 0.10 – 1.50 (Ie) 0.01 (Ie) 0.1 2. I_InstSPTDiff_Gen 2.00 – 14.00 (Ie) 0.01 (Ie) 6 3. Slope1_PcntSPTDiff_Gen 0.00 -- 0.50 0.01 0.05 4. Slope2_PcntSPTDiff_Gen 0.30 – 0.80 0.01 0.5 5. TrpLog_SPTDiff_Gen 0000 -- FFFF 1 1FFF

Logic setting “1” - enable, “0” – disable 6. En_InstSPTDiff_Gen 0，1 1 7. En_PcntSPTDiff_Gen 0，1 1 8. Opt_CTS_Blk_PcntSPTDiff_Gen 0，1 1

15.1.15 Settings of turn-to-turn fault protection of generator

No. Symbol Range Step Default 1 I_SensTrvDiff_Gen 0.10 – 50.00 A 0.01 A 2.0 2 I_UnsensTrvDiff_Gen 0.10 – 50.00 A 0.01 A 10

Chapter 15 ANNEX


3 t_TrvDiff_Gen 0.00 – 10.00 S 0.01 S 0.2 4 V_SensROV_Longl_Gen 1 – 10.00 V 0.01 V 1 5 V_UnsensROV_Longl_Gen 2 – 20.00 V 0.01 V 6 6 t_ROV_Longl_Gen 0.10 – 10.00 S 0.01 S 0.1 7 TrpLog_IntTurn_Gen 0000 - FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 8 En_SensTrvDiff_Gen 0，1 1 9 En_UnsensTrvDiff_Gen 0，1 1 10 En_SensROV_Longl_Gen 0，1 0 11 En_UnsensROV_Longl_Gen 0，1 0 12 En_DPFC_IntTurn_Gen 0，1 0

15.1.16 Settings of phase to phase fault backup protection of generator

No. Symbol Range Step Default 1 V_NegOV_VCE_Gen 1.00 – 20.00 V 0.01 V 4 2 Vpp_VCE_Gen 10.00 –100.00 V 0.01 V 60 3 I_OC1_Gen 0.10 –100.00 A 0.01 A 20 4 t_OC1_Gen 0.00 – 10.00 S 0.01 S 1 5 TrpLog_OC1_Gen 0000 - FFFF 1 000F 6 I_OC2_Gen 0.10 –100.00 A 0.01 A 17 7 t_OC2_Gen 0.00 – 10.00 S 0.01 S 2 8 TrpLog_OC2_Gen 0000 - FFFF 1 0F01 9 Z1_Fwd_Gen 0.00 –100.00 Ω 0.01 Ω 20 10 Z1_Rev_Gen 0.00 –100.00 Ω 0.01 Ω 20 11 t_Z1_Gen 0.00 – 10.00 S 0.01 S 1 12 TrpLog_Z1_Gen 0000 - FFFF 1 0FFF 13 Z2_Fwd_Gen 0.00 –100.00 Ω 0.01 Ω 20 14 Z2_Rev_Gen 0.00 –100.00 Ω 0.01 Ω 20 15 t_Z2_Gen 0.00 – 10.00 S 0.01 S 1 16 TrpLog_Z2_Gen 0000 - FFFF 1 0FFF

Logic setting “1” - enable, “0” – disable 17 En_VCE_Ctrl_OC1_Gen 0，1 1 18 En_VCE_Ctrl_OC2_Gen 0，1 1 19 En_HVS.VCE_Ctrl_OC_Gen 0，1 0 20 Opt_VTS_Ctrl_OC_Gen 0，1 1 21 Opt_ExcMode_Gen 0，1 1 22 En_BO_OC2_Gen 0，1 1

15.1.17 Settings of earth fault protection of stator windings

No. Symbol Range Step Default 1 V_SensROV_Sta 0.10 – 50.00 V 0.01 V 2.0

Chapter 15 ANNEX


2 V_UnsensROV_Sta 0.10 – 50.00 V 0.01 V 10 3 t_ROV_Sta 0.00 – 10.00 S 0.01 S 2 4 k_V3rdHRatio_PreSync_Sta 0.50 – 10.00 0.01 1 5 k_V3rdHRatio_PostSync_Sta 0.50 – 10.00 0.01 1 6 k_V3rdHDiff_Sta 0.10 – 2.00 0.01 1 7 t_V3rdH_Sta 0.00 – 10.00S 0.01 S 3 8 TrpLog_EF_Sta 0000 – FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 9 En_Alm_ROV_Sta 0，1 1 10 En_Trp_ROV_Sta 0，1 1 11 En_Alm_V3rdHRatio_Sta 0，1 1 12 En_Alm_V3rdHDiff_Sta 0，1 1 13 En_Trp_V3rdHRatio_Sta 0，1 0 14 En_Trp_UnsensRov_Sta 0，1 1

15.1.18 Settings of earth fault protection of rotor

No. Symbol Range Step Default 1 R_Sens_1PEF_RotWdg 0.10 –100.00 kΩ 0.01 kΩ 20 2 R_1PEF_RotWdg 0.10 –100.00 kΩ 0.01 kΩ 20 3 t_1PEF_RotWdg 0.00 – 10.00 S 0.01 S 1 4 V2ndH_VCE_2PEF_RotWdg 0.10 – 10.00 V 0.01 V 2 5 t_2PEF_RotWdg 0.00 - 10.00 S 0.01 S 1 6 TrpLog_EF_RotWdg 0000 – FFFF 1 0FFF

Logic setting “1” - enable, “0” – disable 7 En_Alm_Sens_1PEF_RotWdg 0，1 1 8 En_Alm_1PEF_RotWdg 0，1 1 9 En_Trp_1PEF_RotWdg 0，1 1 10 En_2PEF_RotWdg 0，1 1 11 En_VCE_2PEF_RotWdg 0，1 0

15.1.19 Settings of thermal overload protection of stator

No. Symbol Range Step Default 1 I_OvLd_Sta 0.10 – 50.00 A 0.01 A 10 2 t_OvLd_Sta 0.00 – 10.00 S 0.01 S 1 3 TrpLog_OvLd_Sta 0000 – FFFF 1 000F 4 I_Alm_OvLd_Sta 0.10 – 50.00 A 0.01 A 7 5 t_Alm_OvLd_Sta 0.00 – 10.00 S 0.01 S 2 6 I_InvOvLd_Sta 0.10 – 100.00 A 0.01 A 6 7 tmin_InvOvLd_Sta 0.10 – 10.00 S 0.01 S 1 8 A_Therm_Sta 1.00 –100.00 0.01 40 9 Kb_Therm_Sta 0.00 – 10.00 0.01 1

Chapter 15 ANNEX


10 TrpLog_InvOvLd_Sta 0000 – FFFF 1 7FFF

15.1.20 Settings of negative sequence overload protection of stator

No. Symbol Range Step Default 1 I_NegOC_Sta 0.10 – 20.00 A 0.01 A 10 2 t_NegOC_Sta 0.00 – 10.00 S 0.01 S 1 3 TrpLog_NegOC_Sta 0000 - FFFF 1 000F 4 I_Alm_NegOC_Sta 0.10 – 20.00 A 0.01 A 1.0 5 t_Alm_NegOC_Sta 0.00 – 10.00 S 0.01 S 2 6 I_InvNegOC_Sta 0.05 – 5.00 A 0.01 A 0.5 7 I2 _Perm_Sta 0.05 – 5.00 A 0.01 A 0.4 8 tmin_InvNegOC_Sta 0.00 – 10.00 S 0.01 S 1 9 A_Therm_RotBody 1 – 100.00 0.01 40 10 TrpLog_InvNegOC_Sta 0000 - FFFF 1 7FFF

15.1.21 Settings of Loss-of-Excitation protection of generator

No. Symbol Range Step Default 1 X1_LossExc_Gen 0.00 -100.00 Ω 0.01 Ω 5 2 X2_LossExc_Gen 0.00 -100.00 Ω 0.01 Ω 20 3 Q_RevQ_LossExc_Gen 0.01 – 50.00 % 0.01 % 10 4 V_RotUV_LossExc_Gen 1.0 – 500.00 V 0.01 V 30 5 V_RotNoLoad_LossExc_Gen 1.0 – 500.00 V 0.01 V 50 6 k_RotUV_LossExc_Gen 0.10 – 10.00 (pu) 0.01 (pu) 2 7 V_BusUV_LossExc_Gen 10.00 – 100.00 V 0.01 V 85 8 P_UP_LossExc_Gen 10 – 100.00 % 0.01 % 50.0 9 t_LossExc1_Gen 0.10 – 10.00 S 0.01 S 0.5 10 t_LossExc2_Gen 0.10 – 10.00 S 0.01 S 1.0 11 t_LossExc3_Gen 0.10 – 3000.00 S 0.01 S 3.0 12 TrpLog_LossExc1_Gen 0000 - FFFF 1 7FFF 13 TrpLog_LossExc2_Gen 0000 - FFFF 1 7FFF 14 TrpLog_LossExc3_Gen 0000 - FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 15 En_Z_LossExc1_Gen 0，1 1 16 En_RotUV_LossExc1_Gen 0，1 1 17 En_P_LossExc1_Gen 0，1 0 18 En_BusUV_LossExc2_Gen 0，1 1 19 En_Z_LossExc2_Gen 0，1 1 20 En_RotUV_LossExc2_Gen 0，1 1 21 En_Z_LossExc3_Gen 0，1 1 22 En_RotUV_LossExc3_Gen 0，1 1 23 En_Alm_LossExc1_Gen 0，1 0

Chapter 15 ANNEX


No. Symbol Range Step Default 24 Opt_Z_LossExc_Gen 0，1 1 25 En_RevQ_LossExc_Gen 0，1 0 26 Opt_UV_LossExc_Gen 0，1 0

15.1.22 Settings of out-of-step protection of generator

No. Symbol Range Step Default 1 Za_OOS_Gen 0.00 –100.00 Ω 0.01 Ω 10 2 Zb_OOS_Gen 0.00 –100.00 Ω 0.01 Ω 5 3 Zc_OOS_Gen 0.00 –100.00 Ω 0.01 Ω 5 4 φ_Reach_OOS_Gen 60.00 – 90.00 ° 0.1 ° 85 5 φ_Inner_OOS_Gen 60.00 –150.00 ° 0.1 ° 120 6 n_Slip_Ext_OOS_Gen 1-1000 1 5 7 n_Slip_Int_OOS_Gen 1-1000 1 2 8 Ibrk_TCB 1.00 – 100.00 A 0.01 A 10 9 TrpLog_OOS_Gen 0000 - FFFF 0.01 1FFF

Logic setting “1” - enable, “0” – disable 10 En_Alm_Ext_OOS_Gen 0，1 1 11 En_Trp_Ext_OOS_Gen 0，1 1 12 En_Alm_Int_OOS_Gen 0，1 1 13 En_Trp_Int_OOS_Gen 0，1 1

15.1.23 Settings of voltage protection

No. Symbol Range Step Default 1 V_OV1_Gen 10.0 –170.00 V 0.01V 150 2 t_OV1_Gen 0.10 – 10.00 S 0.01S 0.3 3 TrpLog_OV1_Gen 0000 – FFFF 1 7FFF 4 V_OV2_Gen 10.0 –170.00 V 0.01V 130 5 t_OV2_Gen 0.10 – 10.00 S 0.01S 0.5 6 TrpLog_OV2_Gen 0000 – FFFF 1 7FFF 7 V_UV_Gen 10.0 –100.00 V 0.01V 80 8 t_UV_Gen 0.10 – 10.00 S 0.01S 1.5 9 TrpLog_UV_Gen 0000 – FFFF 1 7FFF

15.1.24 Settings of overexcitation protection of generator

No. Symbol Range Step Default 1 k_OvExc1_Gen 1.00 – 2.00 0.01 1.4 2 t_OvExc1_Gen 0.1 – 3000.0 S 0.1 S 1 3 TrpLog_OvExc1_Gen 0000 - FFFF 1 000F 4 k_OvExc2_Gen 0.10 – 2.00 0.01 1.2

Chapter 15 ANNEX


No. Symbol Range Step Default 5 t_OvExc2_Gen 0.1 – 3000.0 S 0.1 S 20 6 TrpLog_OvExc2_Gen 0000 - FFFF 1 0F01 7 k_Alm_OvExc_Gen 1.00 – 2.00 0.01 1.1 8 t_Alm_OvExc_Gen 0.1 – 10.00 S 0.1 S 10 9 k0_InvOvExc_Gen 1.00 – 2.00 0.01 1.5 10 t0_InvOvExc_Gen 1.0 – 3000.0 S 0.1 S 1 11 k1_InvOvExc_Gen 1.00 – 2.00 0.01 1.45 12 t1_InvOvExc_Gen 1.0 – 3000.0 S 0.1 S 2 13 k2_InvOvExc_Gen 1.00 – 2.00 0.01 1.4 14 t2_InvOvExc_Gen 1.0 – 3000.0 S 0.1 S 5 15 k3_InvOvExc_Gen 1.00 – 2.00 0.01 1.3 16 t3_InvOvExc_Gen 1.0 – 3000.0 S 0.1 S 15 17 k4_InvOvExc_Gen 1.00 – 2.00 0.01 1.25 18 t4_InvOvExc_Gen 1.0 – 3000.0 S 0.1 S 30 19 k5_InvOvExc_Gen 1.00 – 2.00 0.01 1.2 20 t5_InvOvExc_Gen 1.0 – 3000.0 S 0.1 S 100 21 k6_InvOvExc_Gen 1.00 – 2.00 0.01 1.15 22 t6_InvOvExc_Gen 1.0 – 3000.0 S 0.1 S 300 23 k7_InvOvExc_Gen 1.00 – 2.00 0.01 1.1 24 t7_InvOvExc_Gen 1.0 – 3000.0 S 0.1 S 1000 25 TrpLog_InvOvExc_Gen 0000 - FFFF 1 7FFF

15.1.25 Settings of power protection of generator

No. Symbol Range Step Default 1 P_RevP_Gen 0.50 – 10.00 % 0.01% 2 2 t_Alm_RevP_Gen 0.10 – 25.00 S 0.1 S 10 3 t_Trp_RevP_Gen 0.10 – 600.0 S 0.1 S 10 4 TrpLog_RevP_Gen 0000 – FFFF 1 7FFF 5 P_UP_Gen 1.00 – 200.00 % 0.01 % 20 6 t_UP_Gen 0.00 – 300.00 M 0.01 M 10 7 TrpLog_UP_Gen 0000 – FFFF 1 7FFF 8 P_SeqTrp_RevP_Gen 0.50 – 10.00 % 0.01 % 2 9 t_SeqTrp_RevP_Gen 0.10 – 10.00 S 0.01 S 1 10 TrpLog_SeqTrp_RevP_Gen 0000 – FFFF 1 7FFF

15.1.26 Settings of underfrequency and overfrequency protection of generator

No. Symbol Range Step Default 1 f_UF1_Gen 45.00 – 51.00 Hz 0.01 Hz 48.5 2 t_UF1_Gen 0.00 –300.00 min 0.01min 10 3 f_UF2_Gen 45.00 – 51.00 Hz 0.01 Hz 48

Chapter 15 ANNEX


No. Symbol Range Step Default 4 t_UF2_Gen 0.00 –300.00 min 0.01min 10 5 f_UF3_Gen 45.00 – 51.00 Hz 0.01 Hz 47.5 6 t_UF3_Gen 0.00 –100.00 min 0.01 min 10 7 f_UF4_Gen 45.00 – 51.00 Hz 0.01 Hz 46 8 t_UF4_Gen 0.00 –100.00 min 0.01 min 10 9 TrpLog_UF_Gen 0000 - FFFF 1 7FFF 10 f_OF1_Gen 50.00 – 60.00 Hz 0.01 Hz 51.5 11 t_OF1_Gen 0.10 –100.00 min 0.01min 10 12 f_OF2_Gen 50.00 – 60.00 Hz 0.01 Hz 55 13 t_OF2_Gen 0.10 –100.00 S 0.01 S 10 14 TrpLog_OF_Gen 0000 - FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 15 En_Alm_UF1_Gen 0，1 1 16 En_Trp_UF1_Gen 0，1 0 17 En_Alm_UF2_Gen 0，1 1 18 En_Trp_UF2_Gen 0，1 0 19 En_Alm_UF3_Gen 0，1 1 20 En_Trp_UF3_Gen 0，1 0 21 En_Alm_UF4_Gen 0，1 1 22 En_Trp_UF4_Gen 0，1 0 23 En_Alm_OF1_Gen 0，1 1 24 En_Trp_OF1_Gen 0，1 0 25 En_Alm_OF2_Gen 0，1 1 26 En_Trp_OF2_Gen 0，1 1 27 En_BO_UC_OvSp_Gen 0，1 0

15.1.27 Settings of startup and shutdown protection of generator

No. Symbol Range Step Default 1 f_UF_StShut_Gen 40.0 – 50.0Hz 0.01 Hz 45 2 I_TrDiff_StShut_Gen 0.1 - 14.0 (Ie) 0.01 (Ie) 1 3 I_STDiff_StShut_Gen 0.1 - 14.0 (Ie) 0.01 (Ie) 1 4 I_GenDiff_StShut_Gen 0.1 - 14.0 (Ie) 0.01 (Ie) 1 5 I_SPTDiff_StShut_Gen 0.1 - 14.0 (Ie) 0.01 (Ie) 1 6 I_ExcDiff_StShut_Gen 0.1 - 14.0 (Ie) 0.01 (Ie) 1 7 TrpLog_Diff_StShut_Gen 0000 - FFFF 1 7FFF 8 V_StaROV_StShut_Gen 5 – 25.0 V 0.01 V 10 9 t_StaROV_StShut_Gen 0.10 – 10.0 S 0.01 S 10 10 TrpLog_StaROV_StShut_Gen 0000 - FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 11 En_TrDiff_StShut_Gen 0，1 1 12 En_STDiff_StShut_Gen 0，1 0

Chapter 15 ANNEX


13 En_GenDiff_StShut_Gen 0，1 1 14 En_SPTDiff_StShut_Gen 0，1 0 15 En_ExcDiff_StShut_Gen 0，1 0 16 En_StaROV_StShut_Gen 0，1 1 17 En_UF_Ctrl_StShut_Gen 0，1 1

15.1.28 Settings of accidental energization protection of generator

No. Symbol Range Step Default 1 f_UF_AccEnerg_Gen 40 – 50.00 Hz 0.01 Hz 45 2 I_OC_AccEnerg_Gen 0.10 - 100.00 A 0.01 A 3 3 Ibrk_TCB 1.00 – 100.00 A 0.01 A 10 4 t_AccEnerg_Gen 0.0 – 1.00 S 0.01 A 0.1 5 TrpLog_AccEnerg_Gen 0000- FFFF 0.01 A 7FFF 6 I_NegOC_Flash_TCB 0.1 – 20.0 A 0.01 A 3 7 t_Flash1_TCB 0.1 - 1.0 S 0.01 A 3 8 TrpLog_Flash1_TCB 0000 – FFFF 0.01 A 7FFF 9 t_Flash2_TCB 0.1 - 1.0 S 0.01 A 3 10 TrpLog_Flash2_TCB 0000 – FFFF 0.01 A 7FFF

Logic setting “1” - enable, “0” – disable 11 En_UF_Ctrl_AccEnerg_Gen 0，1 1 12 En_CB_Ctrl_AccEnerg_Gen 0，1 1 13 En_Ibrk_Ctrl_Trp_TCB 0，1 0

15.1.29 Settings of differential protection of excitation transformer or exciter

No. Symbol Range Step Default 1 I_Pkp_PcntDiff_Exc 0.10 –1.50 (Ie) 0.01 (Ie) 0.3 2 I_InstDiff_Exc 2.0 – 14.0 (Ie) 0.01 (Ie) 6 3 Slope1_PcntDiff_Exc 0.00 – 0.50 0.01 0.1 4 Slope2_PcntDiff_Exc 0.50 – 0.80 0.01 0.7 5 k_Harm_PcntDiff_Exc 0.10 – 0.35 0.01 0.15 6 TrpLog_Diff_Exc 0000 – FFFF 1 7FFF

Logic setting “1” – enable, “0” – disable 7 En_InstDiff_Exc 0，1 1 8 En_PcntDiff_Exc 0，1 1 9 Opt_Inrush_Ident_Exc 0，1 1 10 Opt_CTS_Blk_PcntDiff_Exc 0，1 1

15.1.30 Settings of backup protection of excitation transformer or exciter

No. Symbol Range Step Default 1 V_NegOV_VCE_Exc 1.00 – 20.00 V 0.01 V 4

Chapter 15 ANNEX


2 Vpp_VCE_Exc 2.00 – 100.00 V 0.01 V 60 3 I_OC1_Exc 0.10 – 100.00 A 0.01 A 20 4 t_OC1_Exc 0.00 – 10.00 S 0.01 S 1 5 TrpLog_OC1_Exc 0000 – FFFF 1 0081 6 I_OC2_Exc 0.10 – 100.00 A 0.01 A 20 7 t_OC2_Exc 0.00 – 25.00 S 0.01 S 1.5 8 TrpLog_OC2_Exc 0000 – FFFF 1 0081

Logic setting “1” – enable, “0” – disable 9 En_VCE_Ctrl_OC1_Exc 0，1 1 10 En_VCE_Ctrl_OC2_Exc 0，1 1 11 En_Mem_Curr_Exc 0，1 0 12 Opt_VTS_Ctrl_OC_Exc 0，1 1 13 Opt_AC_Input_S1_Exc 0，1 0 14 Opt_AC_Input_S2_Exc 0，1 0

15.1.31 Settings of overload protection of excitation

No. Symbol Range Step Default 1 I_OvLd_RotWdg 0.10 –100.00 A（kA） 0.01A（kA） 10 2 t_OvLd_RotWdg 0.00 – 25.00 S 0.01S 1 3 TrpLog_OvLd_RotWdg 0000 – FFFF 1 000F 4 I_Alm_OvLd_RotWdg 0.10 –100.00 A（kA） 0.01A（kA） 7 5 t_Alm_OvLd_RotWdg 0.10 – 25.00 S 0.01S 2 6 I_InvOvLd_RotWdg 0.10 – 50.00 A（kA） 0.01A（kA） 6 7 tmin_InvOvLd_RotWdg 0.10 – 10.00 S 0.01S 1 8 A_Therm_RotWdg 1.00 – 100.00 0.01 40 9 Ib_InvOvLd_RotWdg 0.1 – 50.00A（kA） 0.01A（kA） 1 10 TrpLog_InvOvLd_RotWdg 0000 – FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 11 Opt_AC_Input_RotWdg 0，1 1 12 Opt_DC_Input_RotWdg 0，1 0 13 Opt_AC_Input_S1_RotWdg 0，1 0 14 Opt_AC_Input_S2_RotWdg 0，1 0

15.1.32 Settings of differential protection of stepdown transformer

No. Symbol Range Step Default 1 I_Pkp_PcntDiff_ST 0.10 –1.50 (Ie) 0.01 (Ie) 0.3 2 I_InstDiff_ST 2.0 – 14.0 (Ie) 0.01 (Ie) 6 3 Slope1_PcntDiff_ST 0.00 – 0.50 0.01 0.1 4 Slope2_PcntDiff_ST 0.50 – 0.80 0.01 0.7 5 k_Harm_PcntDiff_ST 0.10 – 0.35 0.01 0.15 6 TrpLog_Diff_ST 0000 – FFFF 1 7FFF

Chapter 15 ANNEX


No. Symbol Range Step Default Logic setting “1” – enable, “0” – disable

7 En_InstDiff_ST 0，1 1 8 En_PcntDiff_ST 0，1 1 9 Opt_Inrush_Ident_ST 0，1 1 10 Opt_CTS_Blk_PcntDiff_ST 0，1 1

15.1.33 Settings of backup protection at HVS of stepdown transformer

No. Symbol Range Step Default 1 V_NegOV_VCE_HVS_ST 1.00 – 20.00 V 0.01 V 4 2 Vpp_VCE_ HVS_ST 2.00 – 100.00 V 0.01 V 60 3 I_OC1_HVS_ST 0.10 – 100.00 A 0.01 A 20 4 t_OC1_HVS_ST 0.00 – 10.00 S 0.01 S 1 5 TrpLog_OC1_HVS_ST 0000 – FFFF 1 0021 6 I_OC2_HVS_ST 0.10 – 100.00 A 0.01 A 17 7 t_OC2_HVS_ST 0.00 – 10.00 S 0.01 S 2 8 TrpLog_OC2_HVS_ST 0000 – FFFF 1 0003 9 I_Alm_OvLd_HVS_ST 0.10 – 50.00 A 0.01 A 6 10 t_Alm_OvLd_HVS_ST 0.00 – 10.00 S 0.01 S 8 11 I_InitCool1_OvLd_HVS_ST 0.10 – 50.00 A 0.01 A 5.5 12 t_InitCool1_OvLd_HVS_ST 0.00 – 10.00 S 0.01 S 9 13 I_InitCool2_OvLd_HVS_ST 0.10 – 50.00 A 0.01 A 5.5 14 t_InitCool2_OvLd_HVS_ST 0.00 – 10.00 S 0.01 S 9

Logic setting “1” – enable, “0” – disable 15 En_VCE_Ctrl_OC1_HVS_ST 0，1 1 16 En_VCE_Ctrl_OC2_HVS_ST 0，1 1 17 En_Mem_Curr_HVS_ST 0，1 0 18 Opt_VTS_Ctrl_OC_HVS_ST 0，1 1 19 En_Alm_OvLd_HVS_ST 0，1 1 20 En_InitCool_OvLd_HVS_ST 0，1 1 21 En_LVSProt_Blk_OC1_HVS_ST 0，1 0

15.1.34 Settings of backup protection at LVS of stepdown transformer

No. Symbol Range Step Default 1 V_NegOV_VCE_LVS_ST 1.00 – 20.00 V 0.01 V 4 2 Vpp_VCE_LVS_ST 2.00 – 100.00 V 0.01 V 60 3 I_OC1_LVS_ST 0.10 – 100.00 A 0.01 A 20 4 t_OC1_LVS_ST 0.00 – 10.00 S 0.01 S 1 5 TrpLog_OC1_LVS_ST 0000 – FFFF 1 0021 6 I_OC2_LVS_ST 0.10 – 100.00 A 0.01 A 17 7 t_OC2_LVS_ST 0.00 – 10.00 S 0.01 S 2

Chapter 15 ANNEX


8 TrpLog_OC2_LVS_ST 0000 – FFFF 1 0003 9 I_ROC1_LVS_ST 0.10 – 100.00 A 0.01 A 20 10 t_ROC1_LVS_ST 0.00 – 10.00 S 0.01 S 1 11 TrpLog_ROC1_LVS_ST 0000 – FFFF 1 0021 12 I_ROC2_LVS_ST 0.10 – 100.00 A 0.01 A 17 13 t_ROC2_LVS_ST 0.00 – 10.00 S 0.01 S 2 14 TrpLog_ROC2_LVS_ST 0000 – FFFF 1 0003 15 I_OvLd_LVS_ST 0.10 – 100.00 A 0.01 A 15 16 t_OvLd_LVS_ST 0.00 – 10.00 S 0.01 S 2 17 V_ROV_LVS_ST 0.10 – 100.00 V 0.01 V 15 18 t_ROV_LVS_ST 0.00 – 10.00 S 0.01 S 2

Logic setting “1” – enable, “0” – disable 19 En_VCE_Ctrl_OC1_LVS_ST 0，1 1 20 En_VCE_Ctrl_OC2_LVS_ST 0，1 1 21 Opt_VTS_Ctrl_OC_LVS_ST 0，1 1 22 En_Alm_OvLd_LVS_ST 0，1 0 23 En_Alm_ROV_LVS_ST 0，1 0

15.1.35 Settings of restrict earth fault protection of stepdown transformer

No. Symbol Range Step Default 1 I_Alm_REF_ST 0.10 –10.00 In 0.01In 0.1 2 I_Pkp_PcntREF_ST 0.10 –10.00 In 0.01In 0.3 3 I_InstREF_ST 2.00 –50.00 In 0.01In 6 4 Slope_PcntREF_ST 0.30 – 0.70 0.01 0.3 5 TrpLog_REF_ST 0000 – FFFF 1 7FFF

Logic setting “1” - enable, “0” – disable 6 En_InstREF_ST 0，1 1 7 En_PcntREF_ST 0，1 0

15.1.36 Settings of mechnical protection

No. Symbol Range Step Default 1 t_MechRly1 0.00 – 6000.0 S 0.1S 1 2 TrpLog_MechRly1 0000 - FFFF 1 0011 3 t_MechRly2 0.00 – 6000.0 S 0.1S 1 4 TrpLog_MechRly2 0000 - FFFF 1 0011 5 t_MechRly3 0.00 – 6000.0 S 0.1S 1 6 TrpLog_MechRly3 0000 - FFFF 1 0011 7 t_MechRly4 0.00 – 6000.0 S 0.1S 1 8 TrpLog_MechRly4 0000 - FFFF 1 0011

Logic setting “1” - enable, “0” – disable 9 En_Supv_MechRly 0，1 1

Chapter 15 ANNEX


15.1.37 Settings of pole disagreement protection of circuit breaker

No Symbol Range Step Default 1 I_OC_PD 0.10 – 20.00 A 0.01A 1 2 I_NegOC_PD 0.10 – 20.00 A 0.01A 1 3 I_ROC_PD 0.10 – 20.00 A 0.01A 3 4 T_PD1 0.00 –10.00 s 0.01s 0.5 5 TrpLog_PD1 0000 – FFFF 1 000F 6 t_PD2 0.00 –10.00 s 0.01s 1 7 TrpLog_PD2 0000 – FFFF 1 00FF


8 En_NegOC_PD 0/1 1

9 En_ROC_PD 0/1 1

10 En_ExTrp_Ctrl_PD2 0/1 1

11 En_OC_PD2 0/1 0

15.1.38 Calculated parameters of primary rated current

NO. Symbol Range Note 1 I1b_SnTr_CT_HVS_Tr 0-60000 A 2 I1b_SnTr_CT_LVS_Tr 0-60000 A 3 I1b_SnGen_CT_Gen 0-60000 A 4 I1b_SnGen_CT_SP1_Gen 0-60000 A 5 I1b_SnGen_CT_SP2_Gen 0-60000 A 6 I1b_SnST_CT_HVS_ST 0-60000 A 7 I1b_SnST_CT_LVS_ST 0-60000 A 8 I1b_SnST_CT_Br2_ST 0-60000 A 9 I1b_SnExc_CT_S1_Exc 0-60000 A 10 I1b_SnExc_CT_S2_Exc 0-60000 A

15.1.39 Calculated parameters of secondary rated current

NO. Symbol Range Note 1 I2b_SnTr_CT_HVS1_Tr 0-600 A 2 I2b_SnTr_CT_HVS2_Tr 0-600 A 3 I2b_SnTr_CT_LVS_Tr 0-600 A 4 I2b_SnTr_CT_HVS_ST 0-600 A 5 I2b_SnTr_CT_HVS_GTU 0-600 A 6 I2b_SnTr_CT_LVS_GTU 0-600 A 7 I2b_SnTr_CT_ST_GTU 0-600 A

Chapter 15 ANNEX


8 I2b_SnGen_CT_Term_Gen 0-600 A 9 I2b_SnGen_CT_SP1_Gen 0-600 A 10 I2b_SnGen_CT_SP2_Gen 0-600 A 11 I2b_SnST_CT2_HVS_ST 0-600 A 12 I2b_SnST_CT1_HVS_ST 0-600 A 13 I2b_SnST_CT_LVS_ST 0-600 A 14 I2b_SnST_CT_Br2_ST 0-600 A 15 I2b_SnExc_CT_S1_Exc 0-600 A 16 I2b_SnExc_CT_S2_Exc 0-600 A

15.1.40 Calculated parameters of secondary rated voltage

NO. Symbol Range Note 1 U2b_VT_HVS_Tr 0-600 V 2 U2b_DeltVT_HVS_Tr 0-600 V 3 U2b_VT_Term_Gen 0-600 V 4 U2b_DeltVT_Term_Gen 0-600 V 5 U2b_NP_Gen 0-600 V 6 k_DeltVT_Gen 0-600 V 7 U2b_VT_LVS_ST 0-600 V 8 U2b_DeltVT_LVS_ST 0-600 V 9 U2b_VT_Br2_ST 0-600 V 10 U2b_DeltVT_Br2_ST 0-600 V 11 U2b_VT_Exc 0-600 V 12 U2b_DeltVT_LVS_Tr 0-600 V

15.1.41 Calculated parameters of differential coefficient

NO. Symbol Range Note 1 k_TrHVS1_Diff_Tr 0-60 2 k_TrHVS2_Diff_Tr 0-60 3 k_TrLVS_Diff_Tr 0-60 4 k_ST_Diff_Tr 0-60 5 k_TrHVS_Diff_GTU 0-60 6 k_NP_Diff_GTU 0-60 7 k_ST_Diff_GTU 0-60 8 k_Term_Diff_Gen 0-60 9 k_SP1_Diff_Gen 0-60 10 k_SP2_Diff_Gen 0-60 11 k_HVS_Diff_ST 0-60 12 k_LVS_Diff_ST 0-60 13 k_Br2_Diff_ST 0-60 14 k_S1_Diff_Exc 0-60

Chapter 15 ANNEX


15 k_S2_Diff_Exc 0-60 16 k_NP_REF_Tr 0-60 17 k_REF_Tr 0-60 18 k_NP_REF_ST 0-60 19 k_REF_ST 0-60

15.2 Appendix B: DBG2000 for RCS-985 (User Version) 15.2.1 General

DBG2000 Configuration and testing program (user version) is developed for the user to configure, test and maintain RCS-985 series protection equipment on site. It comprises four parts: sampled value display, settings reading and modification, report process and trip test. For RCS-985B, these four parts correspond to 4 files 985B3YD_status, 985B3YD _set, 985B3YD_rpt and 985B3YD_tst respectively and are described hereinafter (X represents the special type the protection program, for example, RCS-985B3YD, here, x represent B3YD).

Connect RS-232 communication port of the computer and that mounted on left side of front panel of RCS- 985 protection equipment by a cable with DB-9 connectors on both ends. Run the program DBG2000. If the connection is correct, the screen will display “RCS-985B3YD connected”, see Figure 15-1 . Even if the computer is off line, this picture will be still displayed but the words about connection will disappear.

Figure 15-1 RCS-985 being connected

There are 3 bars on top of the screen, from top to bottom: title bar, menu bar and tool bar, see Figure 15-2.

Figure 15-2 Title bar, menu bar and tool bar

First, click the first button of tool bar parameter, dialog box of communication parameters is

displayed, see Figure 15-3. Only the parameter of “COM port” shall be configured as the number of port of computer that is actually connected with the equipment, other parameters shall be configured as the same as displayed values in figure.

The title bar shows only title of the program and needs no explanation. Menu bar and tool bar are described as follows:

Chapter 15 ANNEX


15.2.2 Menu bar

There are five menus in the menu bar: File, Execute, View, Set and Help. Click button of each menu, items will be pulled down, see Figure 15-4. The gray items are used not for the user version but others.

1) File

There is only one item in pull-down menu File, i.e., Exit. Click Exit(X), the program will be exited.

2) Execute

There are three items in pull-down menu Execute: Setting(E), Download(D) and Trip_Test(T).

Click Setting(E), entering settings reading and modification part of the program, please refer to section 15.2.3 for details.

Item Download(D) is not used for this program but others.

Click Trip_Test(T), entering trip test part of the program, please refer to section 15.2.5 for details.

3) View

There are five items in pull-down menu View: Toolbar(T), Status(S), Report(L), Status(Z) and Message(M).

Item Toolbar specifies whether the tool bar shall be displayed. When the tool bar is displayed, a symbol “√” is put before “Toolbar (T)”. If this item is clicked then, the tool bar will be hidden and the symbol “√” will disappear.

Figure 15-3 Dialog box of communication Parameters

Figure 15-4 Submenu of menu bar

Item Status(S) specifies whether status bar in the bottom of the picture shall be displayed.

Click Report(L), entering Report treatment part of the program, please refer to section 15.2.4 for details.

Click Status(Z), entering Sampled value display part of the program, see section 15.2.2 for details

Chapter 15 ANNEX


Click Message(M), data flow between DBG2000 program and the protection equipment will be displayed. This is used not for the user version but development version of the program.

4) Set

There are five items in pull-down menu Set: Switch_CPU_MON(P), Parameter(C), Back_color(B), Font-Color(F) and Font(O).

If there is a symbol “√” before item Switch_CPU_MON(P), that means data acquired by module CPU are displayed currently, see Figure 15-1. If the item Switch_CPU_MON(P) is clicked then, the data displayed will be changed to those acquired by module MON, see Figure 15-5. Meanwhile, symbol “√” will disappear.

Figure 15-5 Switching on data acquired by module MON

Function of item Parameter(C) is the same as the first button of tool bar parameter. Click this item, dialog box of communication parameters will be displayed, see Figure 15-3.

Click Back_Color(B), dialog box of background color is displayed. The user can select preferred color for background displayed.

Click Font_Color(F), dialog box of font color is displayed. The user can select preferred color for font displaying.

Click Font(O), dialog box of name, style and size of the font is displayed. The user can select the preferred ones for font displaying.

5) Help

There are three items in pull-down menu Help: Help(H), Version(N) and About Dbg2000.

Click Help(H), commands used for the program will be displayed. It is not necessary for the user to use these commands, and no further information about them is presented here.

Chapter 15 ANNEX


Click Version(N), historical record about time and description of updating of this program is displayed.

Click About Dbg2000, developer of this program and copyright declaration will be displayed.

15.2.3 Tool bar

There are 23 buttons in the tool bar, in which 16 buttons are enabled. They are depicted in sequence from left to right as follows:

1) Parameter

Function of this button is the same as that of item Parameter(C) of menu Set of the menu bar. Click this button, dialog box of communication parameters will be displayed, see Figure 15-3.

2) Data parameter

Click this button, other parameters will be displayed. They are data start address, data block size, single data block number, report data number, etc, 11 items in total. These parameters are configured already in the coefficient y and needs no further Configuration on site.

3) Device type

Click this button, a small dialog box “please enter device type” is displayed. Type of the protection equipment shall be entered. In the RCS-985 case, the device type is 985B3YD. This is used mainly for the user to make configuration in off line condition.

4) Setting

Function of this button is the same as item Setting(E) of menu Execute of menu bar. Click this button, i.e. entering settings reading and modification part of the program; Please refer to section 15.2.3 for details.

5) Status

Function of this button is the same as item Status(Z) of menu View of menu bar. Click this button, entering Sampled value display part of the program; Please refer to section 15.2.2 for details.

6) Report

Function of this button is the same as item Report(L) of menu View of menu bar. Click this button, entering Report view part of the program; Please refer to section 15.2.2 for details.

7) Trip test

Click this button, entering trip test part of the program; Please refer to section 15.2.2 for details.

Chapter 15 ANNEX


8) Switch to command

When several dialog boxes are displayed, and the operator wants to enter Command mode but not close dialog box, this button can be used to switch on Command and hide dialog boxes. However, it is not needed for the user on site generally.

9) Download program

This button is used not for this program but others.

10) CPU<–>MON

Function of this button is the same as item Switch_CPU_MON(P) of menu Set of menu bar. Click this button, data displayed will be changed between those acquired by module CPU and module MON one after another.

11) Set font

Function of this button is the same as item Font(O) of menu Set of menu bar.

12) Set font color

Function of this button is the same as item Font_Color(F) of menu Set of menu bar.

13) Set background color

Function of this button is the same as item Back_Color(B) of menu Set of menu bar.

Six buttons on right hand of are all gray. They are used not for this

version but others of this program.

14) SIG RESET

Click this button, all activated output relays and signal relays will be reset.

15) Synchronize time

This function is not used for the program of RCS-985.

16) Help

Function of this button is the same as item Help(H) of menu Help of menu bar.

Besides, some shortcut keys on keyboard of the computer have same functions with items of menu of menu bar or buttons of tool bar:

Chapter 15 ANNEX


F1 — same as item Help(H) of menu Help and button Help of tool bar;

F2 — same as item Parameter(C) of menu Set and button Parameter of tool bar;

F3 — same as item Switch_CPU_MON(P) of menu Set and button CPU<->MON of tool bar;

F4 — same as item Setting(E) of menu Execute and button Setting of tool bar;

F5 — same as item Status(S) of menu View and button Status of tool bar;

F6 — same as item Report(L) of menu View and button Report of tool bar.

15.2.3.1 Sampled Value Displaying

Click item Status(S) of menu View or button Status of tool bar, real time sampled analog

values will be displayed.

Click label , Figure 15-6 a) and b) will be displayed. They can be exchanged

to each other by clicking two arrows on left hand of the bottom or pull down box

on right hand of the bottom “Virtual_binary

input/Others_Binary_Input”.

Page 1 shows enabling (“1”) and disabling (“0”) of functions:

Figure 15-6 Binary input status（page 1, module CPU）

Chapter 15 ANNEX



Page 2 shows mechanical protection inputs as well as others binary input status where “1” is “yes” and “0” is “no”.


Page 3 shows pickup of protective elements where “1” is “activated” and “0” is “inactivated”.

Figure 15-6 a) and b) are pictures of value of module CPU, and can be changed to value of module MON by CPU-MON choose item at the right hand of bottom of this page.

Chapter 15 ANNEX


Figure 15-9 Example1 of phase angle displaying

Figure 15-10 Example2 of phase angle displaying

Pull down box at right hand of the bottom is gray. That means these values exist only in module MON and cannot be read from module CPU.

15.2.3.2 Settings Reading and Modification

This part is used for reading and modification of settings of the equipment. Click item Setting(E) of

menu Execute or the fourth button Setting of tool bar, settings will be displayed. For example,

Figure 15-9 shows the parameters of the equipment.

Click label in picture of Setting(E), parameters of the equipment will be displayed as shown in Figure 15-9.

Chapter 15 ANNEX


Figure 15-11 Parameter of the equipment

In the same way, user can click other labels in picture of Setting(E) to read and modification all the settings of the equipment.

There are 7 buttons in bottom of every picture of the part Settings reading and modification. From left to right, they are: PRINT, DEFAULT, UPLOAD, DOWNLOAD, READ, SAVE and CLOSE and depicted as follows:

NO. Button Function

1. PRINT Print settings displayed in current picture.

2. DEFAULT Read and display default settings of RCS-985 from file of DBG2000.

3. UPLOAD Read and display actual settings of RCS-985 connected with the PC.

4. DOWNLOAD Send current settings displayed on PC to RCS-985 connected.

5. READ Read settings from a file saved in computer.

6. SAVE Save current settings displayed in the computer as a file.

7. CLOSE Close current dialog box.

If default settings are displayed and button UPLOAD is pressed, default settings displayed will be replaced by actual settings of the protection equipment, in which, the settings different from default settings will be displayed in red. Vice versa, if actual settings are displayed and button DEFAULT is pressed, actual settings displayed will be replaced by default settings of the protection equipment, in which, the settings different from actual settings will be displayed in red.

Chapter 15 ANNEX


15.2.4 Report

There are 3 kinds of reports in this program: tripping report, self-diagnose report and change of status report. The tripping report is displayed first.

15.2.4.1 Tripping report

Click item Report(L) of menu View, or click the sixth button of tool bar, tripping report will be

displayed for a moment. It is the report of operation of protection relays, including number of the report, time of pickup of protection, time interval from pickup to operation, name of the operating protection element and the faulty phase, see Figure 15-12.

Figure 15-12 Tripping report

In order to save time for displaying, report of the latest 3 tripping is displayed firstly. Click the fifth button REFRESH of eight buttons in the bottom of the picture, complete tripping report will be displayed after a longer delay.

If oscillogram record of a fault tripping is needed, the record item shall be clicked first, color of this item will be changed to light blue, click the fourth button RECORD at the bottom, then DBG2000 starts to read oscillogram data from the protection equipment.

Oscillogram data is massive and more time is needed to read it. A dialog block of saving the data displayed as a file will be displayed when data reading is completed. If these data are saved in a file and then oscillogram recorded can be displayed by oscillogram analysis program Drawing.exe or Wave.exe developed by our Company. The oscillogram can be analyzed also if needed.

The sixth button SAVE at the bottom is used for saving the report as a file in the computer. The seventh button PRINT is used to print the report. All reports of this program can be saved as file or printed in this way. The eighth button CLOSE is used to close the picture displayed.

15.2.4.2 Diagnose report

After click the second button FAIL at bottom of Figure 15-13, self-diagnose report will be displayed for a moment. It is the report of hardware failures, overload, cooling system initiating or other

Chapter 15 ANNEX


abnormal events detected by the equipment.

Figure 15-13 Diagnose report

The records are stored in cyclic non-volatile memory and up to 32 events can be recorded.

15.2.4.3 Change of status report

After click the third button SW CHG at the bottom of Figure 15-13, change of status input report will be displayed for a moment. It is the report of binary input, starting status of the equipment, including serial number of record, time of the change and brief description about the change.

The records are stored in cyclic non-volatile memory and up to 32 events can be recorded.

15.2.5 Trip Tests

The Trip tests comprise two items: protection tripping test and communication with the host computer test.

Object of the tripping test is to check activation of the tripping or signal output relays of the equipment during the test not by applying voltages and currents on the equipment but by operation of the program.

Object of the communication with the host computer test is to check correctness of the message sent from the equipment during the test not by applying voltages and currents on the equipment but by operation of the program.

15.2.5.1 Protection tripping test (only for special type of equipment)

First, parameter [Test_Trip_Option] shall be set as enabled, if available.

Then, click item Trip_Test(T) in menu Execute, or click the seventh button of tool bar Trip

test, picture of protection tripping test will be displayed as shown in Figure 15-14.

There is only one item in the picture, i.e., Test_Differential_Trip, differential protection tripping test, click the test button , related output relays will operate, and correspondent signals will be sent. Correctness of these operations can be checked and this button changes to

Chapter 15 ANNEX


then.

Click the red reset button again, all of the operated relays will dropout, test status will be resumed and the reset button will return to .

Figure 15-14 Protection tripping test

15.2.5.2 Communication with the host computer test

First, the parameters of [Test_Trip_Option] and [Test_Comm_Option] (if available) shall be set as enabled.

Click label in Figure 15-15, picture of communication with the host computer will be

displayed as shown in Figure 15-15.

Figure 15-15 Communication with host computer test (page 1)

Click test button of any item, relevant activation of this item will be recorded in the report.

Chapter 15 ANNEX


The report will be sent to the host computer, and correctness of the communication can be checked then.

Generator-Transformer Unit Protection Instruction Manual(EN_YJBH2011.0091.1101)

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Transcript of Generator-Transformer Unit Protection Instruction Manual(EN_YJBH2011.0091.1101)