February 2008 Exams - Nano · Web viewHow many address lines are necessary to address two...

Microprocessors

Q 1.Fill in the blanks: (1 marks x 10) 1. A Microprocessor only understands ________.

2. The microprocessor is constructed on a single __________ circuit

3. A ____________semiconductor memory have both Read and Write capabilities.

4. Accumulator stores the _______________.

5. Interrupts are used in _________________.

6. __________ converts an Assembly language program into Binary Code.

7. Nand and ____________are universal gates.

8. ALU stands for ____________________.

9. 8085 is a _________ bit microprocessor.

10. Instruction CLA is used to __________ Accumulator.

11. A flip flop stores only __________________bit of data.

12. An 8 bit register is a combination of 8___________.

13. IC=____+ EC.

14. Address Bus is a ____ -directional Bus.

15. The address bus in 8085 microprocessor has _______________address lines.

16. A register is a string of devices that ______________ data.

17. The program must be coded in ________ before it goes into computer.

18. Memory devices provide a mean of ___________ binary numbers.

19. The binary no 1010 equals _____in decimal.

20. The decimal number 39 equals____________ in binary.

21. ______ is an instruction used to end an assembly language program.

22. ___________ status flag is used to show the sign of the result.

23. 8085 requires __________ supply to work.

24. Serial In Data pin is used to get serial data from serial _________.

25. _________ command is used to jump if the result is not Zero.

1. MACHINE CODES2. INTEGRATED3. RAM4. RESULT5. MICROPROCESSOR6. ASSEMBLER7. NOR8. AIRTHMETIC & LOGIC UNIT9. 8-BIT10. CLEAR11. ONE12. 8 STORAGE LOCATIONS13. FC

14. UNI15. 1616. STORES17. BINARY LANGUAGE18. STORING19. 1020. 10011121. HLT22. Sign23. +5v24. Input devices25. JNZ

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Q 2.True or false (1 marks x 10)

1. The base of octal number system is 16.

2. A microcontroller has CPU, RAM & ROM on a single chip.

3. A 16:1 multiplexer IC has 16 inputs, one output and four control signals.

4. The base of octal number system is 2.

5. If both the inputs are 1 in case of OR gate then the output is 0.

6. A Latch is a memory element.

7. 8085 Microprocessor contains six 8-bit GPR’s.

8. Base of Hex decimal no. System is 16.

9. 8085 is a 16–bit general-purpose microprocessor.

10. Register B & D can be used to form a B-D register pair.

11. HLT instruction is used to start an Assembly language program.

12. A register pair can be used to store 16-bit Data.

13. Parity is a status flag used in 8085.

14. Two’s complement of 110101 is 001011

15. Accumulator is used to store 8-bit data.

16. RAM is read only memory.

17. MVI is a data transfer group instruction.

18. In 8085 we have 32-bit address bus.

19. SIM instruction is 1 byte instruction.

20. Instruction register is used to store instruction before decoding.

21. The base of a binary number is 2.

22. A latch is a type of flip flop without a clock pulse.

23. Cache memory increases the speed of processing.

24. An 8085 is a microprocessor that has RAM and ROM available on the chip itself.

25. 8051 is a 16- bit microcontroller.

1. FALSE2. TRUE3. TRUE4. FALSE5. FALSE

6. TRUE7. TRUE8. TRUE9. FALSE10. FALSE

11. FALSE12. TRUE13. TRUE14. TRUE15. TRUE

16. FALSE17. TRUE18. FALSE19. TRUE20. TRUE

21. TRUE22. TRUE23. TRUE24. FALSE25. FALSE

Q 3.Multiple Choice Questions (1 marks x 10)

1. One Byte is equal toA. 1 bit C. 8 bitsB. 2 bits D. 4 bits

2. The binary equivalent of decimal number 175 isA. 111101012 C. 101011112

B. 111000102 D. 101010102

3. The gate in which if both the inputs are same output is 0 and if both are different output is 1 is anA. OR gate C. NOT gateB. XOR gate D. AND gate

4. In microprocessors PC stands forA. Program Counter C. Post counter

B. Pre Counter D. Personal computer

5. SRAM stands for2 of 2

A. Static RAM C. Slow RAMB. Small RAM D. Single RAM

6. A memory chip has 16 address and 8 data lines then the no. of locations on which 8 bit data can be stored isA. 216 C. 162

B. 28 D. 82

7. TTL isA. Totem Transistor Logic C. Transistor transistor logic B. Transistor Diode Logic D. Transistor Telephone Logic

8. Which of the following is not a interrupt of 8085 microprocessorA. TRAP C. RST 7.5B. RST 9.5 D. RST 5.5

9. AND gate output is given byA. A+B C. A.BB. A/B D. A-B

10. A.B.C.D. output can be achieved with the help ofA. AND C. NAND B. NOR D. All

11. A half adder is used to A. Add 2 binary digits & to produce a carry. B. Add three binary digits.

C. Both A and BD. None

12. A full adder performs addition onA. Two bits C. Four bitsB. Three bits D. None

13. The number system with BASE two is known as?A. Binary no. system C. Hexa no. systemB. Octal no. system D. Decimal no system

14. The full form of RTL isA. Resistor transistor logic C. Resistor transformer logicB. Both are true D. None

15. The parity of the binary number 110011A. Even C. OddB. Float D. None

16. A CPU does not contain A. Main Storage C. Arithmetic unitB. Special purpose registers D. None of these

17. A single binary digit is called A. Byte C. bitB. Logic D. data

18. In Microprocessor architecture, flag indicatesA. Data condition C. Status of the result of the arithmetic operationB. Logic condition D. Status of the PC.

19. Data bus in 8086 is A. 8 bit C. 16 bit B. 24 bit D. 32 bit

20. One nibble is equal toA. 1 bit C. 8 bitsB. 2 bits D.4 bits

21. An encoder converts decimal numbers into

A. Hexadecimal C. OctalB. Binary D. Gray code

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22. Which of the following is not a characteristics of logic familiesA. Fan out C. Power dissipationB. Propagation delay D. Reactance

23. 8086 microprocessor hasA. 16 address and 8 data lines C. 8 address and 16 data lines B. 20 address and 16 data lines D. 16 address and 20 data lines

24. Stack isA. FIFOB. FOFI

C. LIFOD. LILO

25. HLT instruction is used toA. StartB. Stop

C. No operationD. None of above

26. Which of this is not a Register in 8085A. AB. B

C. HD. G

27. Which is not a busA. AddressB. Logic

C. DataD. Control

28. Local frequency of 8085A. 3MHZB. 10MHZ

C. 2GHZD. 2.6GHZ

29. Which of these is a hardware interrupt signalA. RSTB. RST 6.5

C. INTAD. INT 6.5

30. GROUP OF WIRES ARE CALLEDA. PATHB. DATA

C. BUSD. SIGNAL

31. 8085 IS A ____BIT MICROPROCESSORA. 4B. 8

C. 12D. 16

32. OP CODE ISA. OPERATOR CODEB. OPERATION CODING

C. OPERATION CODED. OPRAND CODE

33. THERE ARE__________FLAGS IN 8085A. 5B. 10

C. 2D. NONE

34. WHICH OF THESE IS/ARE ADRESSING MODES OF 8085A. DIRECTB. INDIRECT

C. NONE OF THESED. BOTH A,B

35. _________ IS NON MASKABLE INTRRUPT IN 8085

A. RST 7.5B. TRAP

C. RST 6.5D. RST 5.5

36. SIZE OF ADDRESS BUS IN 8085A. 16-BITB. 20-BIT

C. 22-BITD. 24-BIT

37. HOW MANY PINS ARE THERE IN 8085A. 20B. 30

C. 40D. 50

38. WHICH OF THESE IS NOT AN AIRTHMETIC INSTRUCTION

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A. ADD BB. SUB B

C. AND BD. NONE OF THESE

39. WHICH OF THESE IS NOT AN LOGICAL INSTRUCTIONA. XOR BB. ORA B

C. INR BD. AND B

40. TO COMPLEMENT CONTENTS OF ACCUMULTOR THE COMMAND ISA. CMAB. CLA

C. RARD. RAL

41. TO STORE RESULT OF ACCUMULTOR IN MEMORY THE INSTRUCTION ISA. LDA <addr>B. STA <addr>

C. MOV A,MD. MVI A 05H

42. TO ROTATE ACCUMULTOR LEFT THROUGH CARRY THE COMMAND ISA. RRCB. RAL

C. RARD. RLC

43. COMMAND TO ROTATE ACCUMULTOR RIGHT WITHOUT CARRY ISA. RRCB. RAL

C. RARD. RLC

44. PIN NO.40 IN 8085 IS LABELED ASA. VCC

B. INTAC. INTRD. VSS

45. PIN NO. 1 OF 8085 ISA. S0

B. S1

C. X1

D. X2

46. Adressing modes supported by 8085 are A. DirectB. Indirect

C. ImplicitD. All of Above.

47. Instructions of 8085 Microprocessor can be A. Data TransferB. Logical

C. Both A & B.D. None of Above.

48. Data Bus of 8085 Microprocessor is pin no.A. 12 to 19B. 4 & 5

C. 21 To 28D. 12 to 28

49. To perform a write operation 8085 microprocessor sets the write signal toA. High B. Low

C. Both A & B.D. None of above.

50. Microprocessor 8085 containsA. General Purpose RegisterB. ALU

C. Timing & controlD. All of above.

CCBAAACB

CDABAAAA

CCCDBDBC

BDBABCBC

ADBACCCA

BBAACDCA

BD

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Microprocessor System (Bsc-4) 6/44

Section-1[5 Marks Questions]

Q1. What is the microprocessor?Ans. The microprocessor is one of the main component of digital computer. It acts as a brain of the computer. It is used to perform operation and control other devices attached to the computer. 8085 is a Microprocessor developed by Intel. It is a one-address microprocessor. 3 MHz is the maximum clock frequency for 8085.

Q2. Define Register.Ans. Registers are collection of flip-flops located with in the CPU, used to the store instructions, data and intermediated results. These register stores small amount of data but are very fast than storage systems. One register may store 8-bit, 16-bit data, generally. The size of register and number of register in a CPU depends on the Architecture of CPU and may very with the CPU. Registers are generally designated by capital letters to denote the function of Register. For e.g. MAR designates memory address Register.

Q3. What are the various registers in 8085? Ans. Accumulator register, Temporary register, Instruction register, Stack Pointer, Program Counter, general purpose registers (B, C, D, E, H, L) are 8-bit registers but program counter and stack pointer are the 16 bit registers.

Q4. Calculate the address lines required for an 8K-byte(1024x8=8192 register) memory chip.Ans. Number of address line x=log 8192/log2= 13 address lines

Q5. How many memory locations can be addressed by a microprocessor with 14 address lines?Ans. The microprocessor with its 14 address line is capable of addressing 214= 16384 memory location.

Q6. What is Stack and stack pointer?Ans. LIFO (Last In First Out) stack is used in 8085.In this type of Stack the last stored information can be retrieved first. Stack pointer is a special purpose 16-bit register in the Microprocessor, which holds the address of the top of the stack.

Q7. What is Tri-state logic? Ans. Three Logic Levels are used and they are High, Low, High impedance state. The high and low are normal logic levels & high impedance state is electrical open circuit conditions. Tri-state logic has a third line called enable line.

Q8. In what way interrupts are classified in 8085? Ans. In 8085 the interrupts are classified as Hardware and Software interrupts. There are 12 interrupts in 8085.

Hardware interrupt: - TRAP, RST7.5, RST6.5, RST5.5, and INTR. Software interrupts. RST0, RST1, RST2, RST3, RST4, RST5, RST6, RST7.

Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.Ph. 0175-2205100,2215100


Q9. Why crystal is a preferred clock source? Which Pins are used to connect 8085 with crystal?Ans. Because of high stability, large Q (Quality Factor) & the frequency that doesn’t drift with aging. Crystal is used as a clock source most of the times.

X1 & X2, pin no.1 & pin no. 2 respectively are used to connect intel 8085 microprocessor with Crystal which is an external clock generator.

Q10.What is data-bus and address-bus?Ans. A group of lines used to transfer bits between the microprocessor and other component of the computer. Data bus is used to transfer data and address bus is used to transfer address.

Q11. What is register array?Ans. This area of the microprocessor consists of various registers identified by letters such as B, C, D, E, H and L. these registers are primarily used to store data temporarily during the execution of a program and are accessible to the user through instructions.

Q12.What is control unit?Ans. The control unit provides the necessary timing and control signals to all the operations in the microprocessor. It controls the flow of the data between the microprocessor and memory and peripherals.

Q13.What is system bus? Why is the data bus bi-directional?Ans. The system bus is a communication path between the microprocessor and peripherals. It is nothing but a group of wires to carry bits

Data Bus transfers data between the microprocessor and the memory And I/O attached to the system. So data is transfer in both directions from microprocessor to memory

and I/O devices. That is reason data bus is bi-directional.

Q14. Define instruction and program.Ans. An instruction is a command given to the computer to perform a specified operation on given data. The set of instruction is called program.

Q15. Define opcode and operand. Ans. Each instruction consists of following two parts:

Op-code: Op-code is the operation code. Op-code specifies the operation to be performed on the operands. For e.g. addition, subtraction, multiplication, logical and, logical or etc. For Example:MOV A,B (Opcode of MOV A,B is 78.)ADI 35H (Opcode of ADI is C6.)

Operand: Operand is that part of the instruction on which operation is to be performed. Each instruction has one or more operands. For Example: MOV A,B ( In this instruction A & B are operands.)ADI 35H (In this instruction 35H is operand.)

Q16. Write different types of instruction of Intel 8085 according to size.Ans. According to the word size the Intel 8085 instructions are classified into the following three types:

a) 1- bye instruction.b) 2- bye instruction.c) 3- bye instruction.



Q17. Define instruction cycle and Machine cycle?Ans. The instruction cycle consists of necessary steps that a CPU performs to fetch an instruction and to execute it. The total time required to execute an instruction is given by: IC=FC+EC.

The fetch cycle is of fixed duration. Whereas the execute operation is of Variable duration. Machine cycle is defined as the time required to complete one operation of accessing memory, I/O. or acknowledging an external request. This cycle may consist of three to six T-states.

Q18. Explain different types of flags used in 8085.Ans.The Intel 8085 microprocessor contains five flip-flops to serve as status flags. The flip-flops are set or reset according to the conditions, which arise during an arithmetic or logical operation. The five status flags of Intel 8085 are:

(i) Carry Flag (CS) (ii) Parity Flag (P)(iii) Auxiliary Carry Flag (AC)(iv) Zero Flag (Z)(v) Sign Flag (S)

Q19. Explain PSW.Ans. The five bits indicates the five flip-flops and three bits are undefined. The combination of these 8-bits is called PSW (program status word).

Q20. What do you mean by timing Diagram?Ans. The necessary steps which are carried out in a machine cycle can be represented graphically. Such a graphical representation is called timing diagram.following is an example of timing diagram: -

Q21. What does it mean by embedded system?Ans. An embedded system is a special-purpose system in which the computer is completely encapsulated by or dedicated to the device or system it controls. Unlike a general-purpose computer, such as a personal computer, an embedded system performs one or a few pre-defined tasks, usually with very specific requirements. Since the system is dedicated to specific tasks, design engineers can optimize it, reducing the size and cost of the product. Embedded systems are often mass-produced, benefiting from economies of scale.Q22. List the four externally initiated operations in 8085.Ans. The 8085 can respond to four externally initiated operations: Reset, Interrupt, Ready, and Hold.

1. Reset: - On receiving this signal microprocessor reset the Program Counter to zero and resets the Interrupt Enable and HLDA flip-flops.



2. Interrupt: - Through Interrupt signals by which an external device can get attention of the microprocessor.

3. Ready: - This Signal indicates that the memory or peripheral is ready to send or receive data. When a Device is ready this signal is set to high by the device.

4. Hold: - This signal is used by another Master for requesting the use of Address and Data Buses. CPU upon receiving the Hold request will relinquish the control of buses.

Q23. Define Zero Flag.Ans. The zero status flag Z is set to 1, if the result of an arithmetic or logical operation is 0,if the result is not zero, the flag is set to 0.

Q24. Explain TRAP & RST 7.5 interrupt.Ans. TRAP has highest priority and cannot be masked or disabled. A rising-edge pulse will cause a jump to location 0024H.

RST 7.5 Its priority is less then TRAP, So it has 2nd no priority and can be masked or disabled. Rising-edge pulse will cause a jump to location 7.5 * 8 = 003CH.This interrupt is latched internally and must be reset before it can be used again.

Q25. What is the memory word size required in an 8085 system?Ans. Memory is a group of registers, arranged in a sequence, to store bits. The 8085 MPU requires an 8-bit wide memory word and use the 16-bit address to select a register called memory location.

Q26.What is the function of the WR & RD signals on the memory chip?Ans. Both Signals are control signals. WR signal is used to indicate a data write operation into a memory chip or output device. The RD signal is used to to indicate a data read data operation from a memory chip or input device.

Q27. What is the purpose of Immediate Addressing mode?Ans. In immediate addressing mode the operand is specified within the instruction itself. Example:MVI B, 05H (Move 05H into register B Immediately. The opcode is 06,05).ADI 34 (Add 34H immediately in the Accumulator. The opcode is C6,34).

Q28. If the Intel 8085 microprocessor adds 89H and 79H specify the content of accumulator and status of S, Z and CY flags.Ans. The binary code of 89H=10001001

79H=01111001By adding we get the result = 100000010So the content of accumulator is 00000010=02HSo the content of S flag=0So the content of Z flag=0So the content of CY flag=1

Q29. The following instructions subtract two unsigned numbers in Intel 8085. Specify the content of accumulator and status of S and CY flags.

MVI A, F8HSUI 69H

Ans. The binary code of F8H=11111000 69H=01101001

By subtracting we get the result = 10001111So the content of accumulator is 10001111=8FHSo the content of S flag=0 CY flag=0



Q30. Write the instruction to load 2050H in the register pair BC. Increment the number using instruction INX B and illustrate whether the INX B instruction is equivalent to the instruction INR B and INR C.Ans. LXI B, 2050H with this 2050 is loaded into BC register.

When we use INX B. the result is 2051.And when we use INX B and INX C the result is 2151.

Q31. Write basic types of instructions in Instruction Set of 8085.Ans. 8085 instruction set consists of the following instructions:

1. Data Movement Instructions. 2. Arithmetic Instructions - add, subtract, increment and decrement. 3. Logic - AND, OR, XOR and rotate. 4. Control Transfer - conditional, unconditional, call subroutine, return from subroutine and restarts. 5. Input/Output Instructions. Other - setting/clearing flag bits, enabling/disabling interrupts, stack operations, etc

Q32. What is an interrupt? Write different types of interrupts.Ans. Interrupt is a process where an external device can get the attention of the microprocessor.

Interrupts can be classified into two types:•Maskable Interrupts (Can be delayed or Rejected)•Non-Maskable Interrupts (Can not be delayed or Rejected)

Q33. What are ARITHMETIC instructions?Ans. The arithmetic instructions usually include addition, subtraction, division, multiplication, incrementing, and decrementing although division & multiplication were not available in most early CPU’s. There are two flags used with arithmetic that tell the program what was the outcome of an instruction. One is the Carry (C) flag. The other is the Zero (Z) flag.

Q34. What are LOGICAL instructions.Ans. In microprocessors there are other mathematical instructions called logical instructions. These are OR , AND, XOR, ROTATE, COMPLEMENT and CLEAR. These commands are usually not concerned with the value of the data they work with, but, instead, the value, or state, of each bit in the data

Q35. Explain Compliment & Clear operation.Ans. Compliment (CMA)Complimenting a number results in the opposite state of all the 1's and 0's. Take the number 1111b. Complimenting results in 0000b.

Clear(CLA):- This instruction clears, or zero's out the accumulator. This is the same as moving a 0 into the accumulator. This also clears the C flag and sets the Z flag

Q36. What is BRANCHING instructions?Ans. There are also program flow commands. These are branches or jumps. They have several different names reflecting the way they do the jump or on what condition causes the jump, like an overflow or under flow, or the results being zero or not zero. But all stop the normal sequential execution of the program, and jump to another location,

Q37. W.A.P. to place 05 in register B.Ans. Memory Machine Mnemonics OperandsAddress Codes



2000 06,05 MVI B,05H2002 76 HLT

Q38. W.A.P. to place 05 in register A then moves it to B.Ans. Memory Machine Mnemonics OperandsAddress Codes2000 3E,05 MVI A,05H2002 47 MOV B,A2003 76 HLT

Q39. W.A.P. to Load the content of memory location FC50H directly to the accumulator, then transfer it to register B.Ans. Memory Machine Mnemonics OperandsAddress Codes2000 3A,50,FC LDA FC502003 47 MOV B,A2004 76 HLT

Q40. W.A.P. to Shift an 8-bit number by one bit.Ans. Memory Machine Mnemonics OperandsAddress Codes2000 3A,01,25 LDA 2501 H2003 87 ADD A2004 32,02,25 STA 2502 H2007 76 HLT

Q41. Addition of 2 8-bits number, sum 8-bits.Ans. Memory Machine Mnemonics OperandsAddress Codes2000 21,01,5 LXI H,2501 H2003 7E MOV A,M2004 23 INX H2005 86 ADD M2006 32,03,25 STA 2503 H2009 76 HLT

Q42. Subtraction of 2 8-bits numbers.Ans. Memory Machine Mnemonics OperandsAddress Codes2000 21,01,5 LXI H,2501 H2003 7E MOV A,M2004 23 INX H2005 96 SUB M2006 23 INX H2007 77 MOV M,A2008 76 HLT

Q43. W.A.P. to Load the content of memory location FC50H to register C.Ans. Memory Machine Mnemonics OperandsAddress Codes2000 21,50,FC LXI H,FC50



2003 4E MOV C,M2004 76 HLT

Q44. W.A.P. to Load the content of memory location FC50H directly to the accumulator, then transfer it to register B.Ans. Memory Machine Mnemonics OperandsAddress Codes2000 3A,50,FC LDA FC502003 47 MOV B,A2004 76 HLT

Q45. W.A.P. to 05 in accumulator. Increment it by one and then store the result in memory location FC50H.Ans. Memory Machine Mnemonics OperandsAddress Codes2000 3E,05 MVI A,052002 3C MOV A2003 32,50,FC STA FC50H2006 76 HLT

Q46. Differentiate control bus, data bus and address bus.Ans. Difference between control bus, data bus and address bus:

Control Bus: Control Bus is used to send the control information. The information like whether to read or to write data on to the memory or I/O device.

Data Bus: Data bus is used to transfer the actual data from I/O device to memory or from memory to any I/O device.

Address Bus: Address Bus contains the address of the memory or I/O device where to read or to write the data.

Q47. State practical uses of the six general-purpose registersAns. The use of six general purpose registers is:1. These registers are used to store the memory address where to send or to receive the data.2. These registers are used to one of the two operands, which are required during the execution of any arithmetic or logical instruction.3. These registers are used to store the intermediate results of any arithmetic or logical instruction.

Q48. Explain the purpose of the Accumulator?Ans. Purpose of Accumulator: When any arithmetic or logical instruction is executed, one of the operand is always stored in the accumulator. After the execution of logical or arithmetic instruction result is also stored in accumulator.

Q49. What is the need of an addressing mode?Ans. Computers use addressing mode techniques for the purpose of accommodating one or both of the following provisions:1. To give programming versatility to the user by providing such facilities as pointers to memory, counters for loop control, indexing of data, and program relocation.2. To reduce the number of bits in the addressing field of the instruction.

Q50. What is the difference between machine language and assembly language?Ans. Assembly Language: In assembly language, the user employs symbols for the operation part, the address part, and other parts of the instruction code. Each symbolic instruction can be translated into one



binary coded instruction. This translation is done by a special program called an assembler. Assembly language program is not machine dependent. The execution time required for assembly language program is more as compared to machine language. Machine Language: In machine language program is written in the form of 0’s and 1’s. Machine language program executes fast as compared to assembly language program. Machine language program is machine dependent i.e. program written for one machine will not run on another machine. Debugging is difficult in machine language program.Q51. Define Register.Ans. Registers are collection of flip-flops located with in the CPU, used to the store instructions, data and intermediated results. These register stores small amount of data but are very fast than storage systems. One register may store 8-bit, 16-bit data, generally. The size of register and number of register in a CPU depends on the Architecture of CPU and may very with the CPU. Registers are generally designated by capital letters to denote the function of Register. For e.g. MAR designates memory address Register.

Q52. What does CPU do after detecting an interrupt signal?Ans. An interrupt indicates that an event requires the processor’s attention has occurred causing that processing to suspend and save its current activity, then branch to an interrupt service routine.

Q53. Define machine language.Ans. The low level language, which consists of binary, codes and is directly understood by computer. The instructions of machine language are also called binary codes. This is machine dependent language and programmers for this language had complete knowledge of hardware program written for one machine may not execute on other machine.Q54. Explain Reduced Instruction Set Computer(RISC) in Detail.Ans. RISC (Reduced Instruction Set computer): - When computers use few instructions with simple constructs, so that they can be executed much faster with in the CPU without having to use memory as often. This type of computer is classified as a reduced instruction set computer or RISC. In this, RISC architecture attempt to reduce execution time by simplifying the instruction set of computer. Following are the characteristics of the RISC processor:

1. Relatively few instructions are used.2. Fewer addressing modes are used.3. Memory access is limited to load & store the instructions.4. All operations done within register of CPU.5. Fixed length, easily decodable instruction format is used.6. Single cycle instruction execution is preferred.7. Hardware rather than microprogrammed control is used.8. Also, large no of registers in processor unit.9. Use instruction Pipeline.10. Uses compiler for efficient translation of high-level language into machine language program.

Q55. Explain Complex Instruction Set Computer (CISC) in detail.Ans. Complex Instruction Set Computer (CISC): - To increase compilation speed & improve overall computer performance. We use complex instruction set computer. It also incorporates variable length instruction format. So more number of instructions & addressing modes are incorporated into computer. To have above functions to be performed CISC processor uses:

1. Large no of instructions-typically from 100 to 250 instructions.2. Uses also rarely used instructions3. More number of addressing modes typically from 5 to 20 different modes.4. Uses variable length instruction formats.5. Uses instructions that manipulate operands in memory.



Section- 3[10 Marks Questions]

Q1. Explain the 8085 microprocessor in detail.Ans.The microprocessor itself is usually a single integrated circuit (IC). Intel 8085 is an 8bit, NMOS Microprocessor. Its 40-pin I.C package fabricated on a single LSI chip. The Intel 8085 uses a single +5v D.C supply for its operation. Its clock speed is about 3 MHz. The clock cycle is of 320ns. It has 16 address and 8 data lines

8085 microprocessor has following specifications Single + 5V Supply

Introduced on March 19768-bit microprocessor6500 TransistorsOn Chip Clock Generator (with External Crystal or RC Network) On Chip System Controller; Advanced Cycle Status Information Available for Large System Control 4 Vectored Interrupts (One is Non Mask able) Serial In/Serial Out Port Decimal, Binary, and Double Precision Arithmetic Direct Addressing Capability to 64K bytes of memory

Q2. Explain different type of buses in 8085 microprocessorANS:

Buses simply know as group of wires. There are three buses associated with the memory subsystem. One is the address bus, the second is the data bus, and the third is the control bus. Busses transport data and address everywhere. All three are connected to the memory subsystem. In the 8085 CPU, the address bus is 16 bits wide. It acts to select one of the unique 216

(64K) memory locations. The control bus determines whether this will be a read or a write. In the case of an instruction fetch, the control bus is set up for a read operation. Data is read or written through the data bus, which is 8 bits wide. This is why all registers and memory are 8 bits wide, it's the width of the data bus on the 8085 CPU. A bus is just a group of connections that all share a common function. Instead of speaking of each bit or connection in the address separately, for example, all 16 are taken together and referred to simply as the address bus. The same is true for the control and data buses. Address bus is unidirectional but data bus is bi directional



Q3. Draw the block diagram of 8085 microprocessor.Ans.

Q4. Calculate the number of chips needed to design 8k-byte memory if the memory chip size is 1024x1.Ans. The chip 1024x1 has 1024 registers and each register can store 1 bit with one data line. We need 8 data line for byte size memory there for 8 chips are required for 1k-byte memory. For 8k-byte memory, we will need 64 chips. We can arrive at the same answer by dividing 8K-byte by 1kx1 as follows:

8192x8%1024x1=64

Q5. Explain the different type of registers used in 8085Ans.Registers Used In Intel 8085:

Intel 8085 microprocessor has the following registers:(I) One 8-bit accumulator (ACC) i.e. Register A(ii) Six 8-bit general-purpose registers. These are B, C, D, E, H and L(iii) One 16-bit stack pointer, SP(iv) One 16-bit program counter, PC(v) Instruction register(vi) Temporary register



Accumulator (ACC) The accumulator is an 8-bit register associated with the ALU. The register 'A' in the 8085 is an accumulator. It is used to hold one of the operands of an arithmetic or logical operation. It serves as one input to the ALU. The other operand for an arithmetic or logical operation may be stored either in the memory or in one of the general-purpose registers. The final result of an arithmetic or logical operation is placed in the accumulator.

General-Purpose Registers. The 8085 microprocessor contains six 8-bit general-purpose registers. They are: B, C, D, E, H and L register. To hold 16-bit data a combination of two 8-bit registers can be employed. The combination of two 8-bit registers is known as a register-pair. The valid register pairs in the 8085 are: B-C, D-E and H-L. The programmer cannot form a register-pair by selecting any two registers of his choice.

Program Counter (PC) It is a 16-bit special-purpose register. It is used to hold the memory address of the next instruction to be executed. It keeps the track of memory addresses of the instructions in a program while they are being executed. The microprocessor increments the content of the program counter during the execution of an instruction so that it points to the address of the next instruction in the program at the end of the execution of an instruction.

Stack Pointer (SP). It is a 16-bit special function register. The stack is a sequence of memory locations set aside by a programmer to store/retrieve the contents of accumulator, flags, program counter and general-purpose registers during the execution of a program. Any portion of the memory can be used as stack. Since the stack works on LIFO (last-in-first-out)

Instruction Register. The instruction register holds the opcode (operation code or instruction code) of the instruction, which is being decoded and executed,

Temporary Register. It is an 8-bit register associated with the ALU. It holds data during an arithmetic/logical operation. It is used by the microprocessor. It is not accessible to programmer.The Intel 8085 microprocessor contains five flip-flops to serve as status flags. The flip-flops are set or reset according to the conditions, which arise during an arithmetic or logical operation. The five status flags of Intel 8085 are:(I) Carry Flag (CS) (ii) Parity Flag (P)(iii) Auxiliary Carry Flag (AC)(iv) Zero Flag (Z)(v) Sign Flag (S)

Q6. What is accumulator? Why it’s important in 8085?Ans. The accumulator is an 8-bit register associated with the ALU. The register 'A' in the 8085 is an accumulator. It is used to hold one of the operands of an arithmetic or logical operation. It serves as one input to the ALU. The other operand for an arithmetic or logical operation may be stored either in the memory or in one of the general-purpose registers. The final result of an arithmetic or logical operation is placed in the accumulator

Q7. What is stack pointer? Explain in detailsAns: Stack Pointer (SP) is a 16-bit special function register. The stack is a sequence of memory locations set aside by a programmer to store/retrieve the contents of accumulator, flags, program counter and general-purpose registers during the execution of a program. Any portion of the memory can be used as stack. Since the stack works on LIFO (last-in-first-out)



Q8. Explain the pin configuration of 8085 microprocessor.Ans:

PIN DESCRIPTIONThe following describes the function of each pin:A8 -A15 (Output)Address Bus: The most significant 8 bits of the memory address or the 8 bits of the I/0 address.AD0-AD7 (Input/Output)Multiplexed Address/Data Bus; Lower 8 bits of the memory address (or I/0 address) appear on the bus during the first clock cycle of a machine state. It then becomes the data bus during the second and third clock cycles.ALE (Output)Address Latch Enable: It occurs during the first clock cycle of a machine state and enables the address to get latched into the onchip latch of peripherals. The falling edge of ALE is set to guarantee setup and hold times for the address information. ALE can also be used to strobe the status information. SO, S1 (Output)These are status signals sent by the microprocessor to distinguish the various TYPES of operations. Explain the table below

S1S2 Operations

0 0 HALT

0 1 WRITE

1 0 READ

1 1 FETCH



S1 can be used as an advanced R/W status.RD (Output 3state)READ; indicates the selected memory or 1/0 device is to be read and that the Data Bus is available for the data transfer. WR (Output 3state)WRITE; indicates the data on the Data Bus is to be written into the selected memory or 1/0 location.READY (Input)If Ready is high during a read or write cycle, it indicates that the memory or peripheral is ready to send or receive data. If Ready is low, the CPU will wait for Ready to go high before completing the read or write cycle.HOLD (Input)HOLD; indicates that another Master is requesting the use of the Address and Data Buses. The CPU, upon receiving the Hold request, CPU will relinquishes the control of buses as soon as the completion of the current machine cycle. Internal processing can continue. The processor can regain the buses only after the Hold is removed. HLDA (Output)HOLD ACKNOWLEDGE; indicates that the CPU has received the Hold request and that it will relinquish the buses in the next clock cycle. HLDA goes low after the Hold request is removed. The CPU takes the buses one half-clock cycle after HLDA goes low.INTR (Input)INTERRUPT REQUEST; is used as a general purpose interrupt. It is sampled only during the next to the last clock cycle of the instruction. If it is active, the Program Counter (PC) will be inhibited from incrementing and an INTA will be issued. During this cycle a RESTART or CALL instruction can be inserted to jump to the interrupt service routine. The INTR is enabled and disabled by software. It is disabled by Reset and immediately after an interrupt is accepted.INTA (Output)INTERRUPT ACKNOWLEDGE; It is be used to activate the 8259 Interrupt chip or some other interrupt port.RST 5.5RST 6.5 - (Inputs)RST 7.5RESTART INTERRUPTS; These three inputs have the same timing as INTR except they cause an internal RESTART to be automatically inserted.RST 7.5 ~~ Highest PriorityRST 6.5RST 5.5 Lowest PriorityThe priority of these interrupts is ordered as shown above. These interrupts have a higher priority than the INTR. TRAP (Input)Trap interrupt is a nonmaskable restart interrupt. It is recognized at the same time as INTR. It is unaffected by any mask or Interrupt Enable. It has the highest priority of any interrupt.RESET IN (Input)Reset sets the Program Counter to zero and resets the Interrupt Enable and HLDA flip-flops. None of the other flags or registers (except the instruction register) are affected. The CPU is held in the reset condition as long as Reset is applied.RESET OUT (Output)Indicates CPU is being reset. Can be used as a system RESET. The signal is synchronized to the processor clock.X1, X2 (Input)



Crystal or R/C network connections to set the internal clock generator X1 can also be an external clock input instead of a crystal. The input frequency is divided by 2 to give the internal operating frequency.CLK (Output)Clock Output for use as a system clock when a crystal or R/ C network is used as an input to the CPU. The period of CLK is twice the X1, X2 input period.IO/M (Output)IO/M indicates whether the Read/Write is to memory or l/O register during Hold and Halt modes.SID (Input)Serial input data line the data on this line is loaded into accumulator bit 7 whenever a RIM instruction is executed.SOD (output)Serial output data line. The output SOD is set or reset as specified by the SIM instruction.Vcc+5 volt supply.VssGround Reference

Q9. What is the program counter? Why it is used in 8085 microprocessor?Ans. Program Counter (PC) it is a 16-bit special-purpose register. It is used to hold the memory address of the next instruction to be executed. It keeps the track of memory addresses of the instructions in a program while they are being executed. The microprocessor increments the content of the program counter during the execution of an instruction so that it points to the address of the next instruction in the program at the end of the execution of an instruction.

Q10. Explain the general-purpose register in 8085Ans. The 8085 microprocessor contains six 8-bit general-purpose registers. They are: B, C, D, E, H and L register. To hold 16-bit data a combination of two 8-bit registers can be employed. The combination of two 8-bit registers is known as a register-pair. The valid register pairs in the 8085 are: B-C, D-E and H-L. The programmer cannot form a register-pair by selecting any two registers of his choice.

Q11. What is the difference between instruction register and temporary register?Ans. Instruction Register. The instruction register holds the opcode (operation code or instruction code) of the instruction, which is being decoded and executed,Temporary Register. It is an 8-bit register associated with the ALU. It holds data during an arithmetic/logical operation. It is used by the microprocessor. It is not accessible to programmer Q12. What is PWS (program status word)?Ans.

In above fig, five bits indicates five status flags and three bits are undefined. The combination of these 8-bits is called program status word. PSW and accumulator are treated as a 16-bit unit for stack operation.

Q13 What are the functions of ALE, IO/M, and SID signals in 8085 microprocessor? Ans: ALE (OUTPUT)



Address Latch Enable: It occurs during the first clock cycle of a machine state and enables the address to get latched into the onchip latch of peripherals. The falling edge of ALE is set to guarantee setup and hold times for the address information. ALE can also be used to strobe the status information. IO/M (Output)IO/M indicates whether the Read/Write is to memory or l/O Register during Hold and Halt modes.SID (Input)Serial input data line the data on this line is loaded into accumulator bit 7 whenever a RIM instruction is executed.

Q14 Discuss the functions of ALU 8085ANS. ALU (Arithmetic Logic Unit) is the area of the microprocessor where various computing functions are performed on data. The ALU unit performs such as arithmetic operations as addition and subtraction, and such logic operations as AND, OR and exclusive OR. Q15 What is the difference between microcontroller, microcomputers and microprocessorAns. Microprocessor: It is a semiconductor device (integrated circuit) manufactured by using LSI techniques. It includes the ALU, register arrays, and control circuits on a single chip. The term CPU is also synonymous with microprocessor.Micro controller: It is a device that includes microprocessor, memory and I/O signal lines on a single ship, fabricated using VLSI technology.Microcomputer: A computer that is designed using a microprocessor as its CPU. It include microprocessor, memory and I/O (input /output)

Q16. Specify the function of the address bus the direction of the information flow on the address bus. Ans. Address Bus provides a memory address to the system memory and I/O address to the system I/O devices. The address bus is a group of 16 lines generally identified as A0 to A15. The address bus is unidirectional: bits flow in one direction, form microprocessor to peripheral devises.

Q17. How many address lines are necessary to address two megabytes (2048K) of memory?Ans. Each address line can assume only two logic stated (0 and 1), therefore we need to find the power of 2 that will give us 2048K combinations. The problem can be restated as followsFind x where 2x = 2048K. By taking log on both side Log 2x =log (2048x1024) xlog2 =log2097152x= log2097152/log2= 21 There is need of 21-address line to access the two-megabyte memory



Q18. Specify the four control signals commonly use by the 8085 MPU.Ans.Above fig shows four different control signals generated by combining the signals RD, WR and IO/M. the signal IO/M goes low for the memory operation. This signal is ANDed with RD and WR. When both input signals go low, the output of the gates go low and generate MEMR (memory read) and MEMW (memory write) control signals. When the IO/M signal goes high, it indicates the peripheral I/O operation.

1. Memory read: reads the data (or instructions) form memory2. Memory write: writes data (or instructions) form memory 3. I/O read: accepts data from input devices.4. I/O write: sends data to output devicesQ19. List the four operations commonly performed by microprocessor. Ans. Microprocessor performs primarily four type of operation Memory read: reads the data (or instructions) form memoryMemory write: writes data (or instructions) from memory I/O read: accepts data from input devices.I/O write: sends data to output devices.

Q20. Why are the program counter and the stack pointer 16-bit registers?Ans. Address line of 8085 microprocessor is 16-bit, so address is also 16-bit. Program counter (it stores the address of next instruction to be executed) and stack pointer (its used as memory pointer for the stack memory) by its definition it deals directly with address line. So to hold the 16-bit address it is 16-bit registers.

Q21. What are the limitations of 8085 microprocessor?Ans. The 8085 microprocessor can qualify as an MPU (micro processing unit), but with the following two limitations. The low order address bus of the 8085 microprocessor is, multiplexed (time-shared) with data bus. The bused need to be demultiplexed. Appropriate control signals need to be generated to interface memory and I/O with the 8085. (Intel has some specialized memory and I/O devices that do not required such control signals)

Q22. Explain the different type of instructions used in 8085 according to size.Ans. Instruction Word Size: According to the word size the Intel 8085 instructions are classified into the following three types:(1) 1-byte instruction(2) 2-byte instruction(3) 3-byte instructionOne-Byte Instruction: - All one-byte instructions contain information regarding operands in the opcode itself.Examples of one-byte instructions are:

ADD B: Add the content of register B to the content of the accumulator. RAL: Rotate the content of the accumulator left by one bit.Two-Byte Instruction: - In a two-byte instruction the 1st byte of the instruction is its opcode and the 2nd byte is either data or address. A two-byte instruction is stored in two consecutive memory locations. Examples are:



MVI B, 05: Move 05 to register B.IN 01: Read data at port B.

Three-Byte Instruction: - In a three-byte instruction the 1st byte of the instruction is its opcode and the 2nd and 3rd bytes are either 16-bit date or 16-bit address. Examples are:

LXI H, 2400H: Load H-L pair with2400H.LDA2500H: Get the content of memory location 2500H into accumulator.

Q23. What are Different types of instruction used in Intel 8085 according to operation?Ans. An instruction is a command given to the computer to perform a specified operation on given data. The instruction set of a microprocessor is the collection of the instructions that the microprocessor is designed to execute. The instructions described in this chapter are of INTEL 8085. These instructions are of Intel Corporation. They cannot be used by other microprocessor manufacturers. The programmer can write a program in assembly language using these instructions.

These instructions have been classified into the following groups:1. Data Transfer Group2. Arithmetic Group3. Logical Group4. Branch Control Group5. I/O and Machine Control Group.

1. Data Transfer Group: Instructions, which are used to transfer data from one register to another register, from memory to register or register to memory, come under this group. Examples are: MOV, MVI, LXI, LDA, STA etc2. Arithmetic Group: The instructions of this group perform arithmetic operations such as addition, subtraction, increment or decrement of the content of a register or memory. Examples are: ADD, SUB, INK, and DAD etc.3. Logical Group: The instructions under this group perform logical operation such as AND, OR, compare, rotate etc. Examples are: ANA, XRA, ORA, CMP, and RAL etc.4. Branch Control Group: This group includes the instructions for conditional and unconditional jump, subroutine call and return, and restart. Examples are: JMP, JC, JZ, CALL, CZ, RST etc.5. I/O and Machine Control Group: This group includes the instructions for input/output ports, stack and machine control. Examples are: IN, OUT. PUSH, POP, HLT etc.

Q24. Explain the Different ADDRESSING MODES of intel-8085: Ans. There are various techniques to specify data for instructions. These techniques are called address-ing modes. Intel 8085 uses the following addressing modes:

1. Direct addressing.2. Register addressing.3. Register indirect addressing.4. Immediate addressing.

1. Direct Addressing: - In this mode of addressing the address of the operand (data) is given in the instruction itself. Example:

STA 2400 H (Store the content of the accumulator in the memory location 2400 H. 32,00,24In this instruction 2400H is the memory address where data is to be stored).

2. Register Addressing: -In register addressing mode the operand is in one of the general-purpose registers. The opcode specifies the address of the register(s) in addition to the operation to be performed. Examples:



MOV A, B (Move the content of register B to register A.) ADD B (Add the content of register B to the content of register A). 3. Register Indirect Addressing: - In this mode of addressing the address of the operand is specified by a register pair. Example: LXI H, 2500 H MOV A, M 4. Immediate Addressing: - In immediate addressing mode the operand is specified within the instruction itself, example: MVI A, 05 (Move 05 in register A. 3R, 05 is the code for this instruction).5. Implicit Addressing: - There are certain instructions, which operate on the content of the accumulator. Such instructions do not require the address of the operand. Examples are:

CMA, RAL, and RAR etc.

Q25. Explain the Flags Used In Intel-8085?Ans. The Intel 8085 microprocessor contains five flip-flops to serve as status flags. The flip-flops are set or reset according to the conditions, which arise during an arithmetic or logical operation. The five status flags of Intel 8085 are:

(1) Carry Flag (CS) (2) Parity Flag (P)(3) Auxiliary Carry Flag (AC)(4) Zero Flag (Z)(5) Sign Flag (S)

1. Carry Flag (CS): After the execution of an arithmetic instruction if a carry is produced, the carry flag CS is set to 1, otherwise it is 0. The any flag is set or reset in case of addition as well as subtraction. After the addition of two 8-bit numbers, if the sum is larger than 8 bits, a carry is produced; and the carry flag is set to 1. In case of subtraction, if borrow occurs, the case flag is set to 1. The carry flag holds carry out of the most significant bit resulting from the execution of an arith-metic operation.2. Parity Flag (P): The parity status flag P is set to 1, if the result of an arithmetic or logical opera-tion contains even number of is. It is reset i.e. It is 0, if the result contains odd number of is.3. Auxiliary Carry Flag (AC): The auxiliary carry flag AC holds carry out of the bit number 3 to the bit number 4 resulting from the execution of an arithmetic operation.4. Zero Flag (Z): The zero status flag Z is set to 1, if the result of an arithmetic or logical operation is 0- if the result is not zero, the flag is set to 0.5. Sign Flag (S): The sign flag S is set to 1, if the result of an arithmetic or logical operation is negative. If the result is positive, the sign flag is set to 0.

Q26. Write various techniques to specify data for instruction.Ans. The various techniques to specify data for instruction are.

1. 8-bit or 16-bit data may directly given in the instruction.2. The address of the memory location, IO port or IO device, where data is present may beautiful given in the instruction.3. In some instruction only one register is specified. The content of the register is one of the operand and other operand is in the accumulator.4. Some instructions specify two registers. The content of the registers are the required data.5. In some instruction data is implied.



Q27. Draw Timing Diagram For opcode fetch Operation Ans.

Q28. Draw Timing Diagram For Memory Read Operation Ans.



Q29. Draw for memory writes operation. Ans.

Q30. Draw Timing Diagram For IO Read Operation Ans.



Q31. Draw for IO writes operation. Ans.

Q32. Discuss instruction cycle, machine cycle and T- state.Ans. Instruction cycle is defined, as the time required completing the execution of an instruction. The 8085-instruction cycle consists of one to six machine cycle or one to six operations.



Machine cycle is defined, as the time required completing one operation of accessing memory, I/O. or acknowledging an external request. This cycle may consist of three to six T-states.T-state: T-state is defined as one subdivision of the operation performed in one clock period. These subdivisions are internal states synchronized with the system clock, and each T-state is precisely equal to one clock period. The terms T-state and clock period are often used synonymously.

Q33. What are different type of interrupt in 8085 Ans. In the 8085, as with any CPU that has interrupt capability, there is a method by which the interrupt gets serviced in a timely manner. When the interrupt occurs, and the current instruction that is being processed is finished, the address of the next instruction to be executed is pushed onto the Stack. Then a jump is made to a dedicated location where the ISR is located. Some interrupts have their own vector, or unique location where it's service routine starts. These are hard coded into the 8085 and can't be changed (see below). TRAP - has highest priority and cannot be masked or disabled. A rising-edge pulse will cause a jump to location 0024H.RST 7.5- 2nd priority and can be masked or disabled. Rising-edge pulse will cause a jump to location 7.5 * 8 = 003CH. This interrupt is latched internally and must be reset before it can be used again.RST 6.5 – 3rd priority and can be masked or disabled. A high logic level will cause a jump to location 6.5 * 8 = 0034H.RST 5.5 – 4th priority and can be masked or disabled. A high logic level will cause a jump to location 5.5 * 8 = 002CH.INTR – 5th priority and can be masked or disabled. A high logic level will cause a jump to specific location as follows:When the interrupt request (intr) is made, the CPU first completes its current execution. Provided no other interrupts are pending, the CPU will take the inta pin low thereby acknowledging the interrupt. It is up to the hardware device that first triggered the interrupt, to now place an 8-bit number on the data bus, as the CPU will then read whatever number it finds on that data bus and do the following: multiply it by 8 and jump to the resulting address location. Since the 8-bit data bus can hold any number from 00 – ffh (0 – 255) then this interrupt can actually jump you to any area of memory between 0*8 and 255*8 i.e.: 0000 and 07ffh (a 2k space). N.b: this interrupt does not save the pc on the stack, like all other hardware and software interrupts!

Q34. Write important Symbols and Abbreviations used in Intel 8085 instructions. Ans.

Sr No Symbol/Abbreviations Meaning1 addr 16-bit address of memory location2 data 8-bit data3 data 16 16-bit data4 r,1,r2 One of the register 5 A,B,C,D,E,H,L 8-bit register6 A Accumulator7 H-L Register pair H-L8 B-C Register pair B-C9 D-E Register pair D-E10 PSW Program Status Word11 M Memory whose address is in H-L pair12 H Represents that num or add is in hexadecimal13 Rp One of the register pair



14 PC 16-bit program counter15 CS Carry status

Q35. Specify the register content and flag status(S, Z, CY) after instruction ORA A is executed in Intel 8085.

MVI A, A9HMVI B, 57HADD BORA A

Ans. A=0B=57S=0Z=1

CY=1



Q36. What is Assembly Language?Ans. Inside the 8085, instructions are really stored as binary numbers, not a very good way to look at them and extremely difficult to decipher. An assembler is a program that allows you to write instructions in, more or less, English form, much more easily read and understood, and then converted or assembled into hex numbers and finally into binary numbers. The program is written with a text editor (NOTEPAD or similar), saved as an ASM file, and then assembled by the assembler (TASM or MASM or similar) program. The final result is an OBJ file you download to the 8085. Here is an example of the problem of adding 2 plus 2: mvi A,2 ; move 2 into the A registermvi B,2 ; move 2 into the B registeradd B ;add reg. B to reg. A, store result in reg. A The first line moves a 2 into register A. The second moves a 2 into register B. This is all the data we need for the program. The third line adds the accumulator with register B and stores the result back into the accumulator, destroying the 2 that was originally in it. The accumulator has a 4 in it now and B still has a 2 in it. In the program above all text after the ‘;’ are treated as comments, and not executed. This is a very important habit to acquire.

Q37. What are the instructions used in 8085 of Data Transfer Group. Ans.MOV n, rs (Move data; Move the content of the one register to another).MOV r, M. (Move the content of memory to register).MOV M, r. (Move the content of register to memory).MVI r, data. (Move immediate data to register).MVI M, data. (Move immediate data to memory).LXI rp, data 16. (Load register pair immediate).LDA addr. (Load Accumulator direct).STA addr. (Store accumulator direct).LHLD addr. (Load H-L pair direct).SHLD addr. (Store H-L pair direct)LDAX rp. (LOAD accumulator indirect)STAX rp. (Store accumulator indirect)XCHG. (Exchange the contents of H-L with D-E pair)Q38. What are the instructions used in 8085 of Arithmetic Group?Ans.ADD r. (Add register to accumulator)ADD M. (Add memory to accumulator)ADC r. (Add register with carry to accumulator.)ADC M. (Add memory with carry to accumulator)ADI data. (Add immediate data to accumulator)ACI data. (Add with carry immediate data to accumulator)DAD rp. (Add register paid to H-L pair)SUB r. (Subtract register from accumulator)SUB M. (Subtract memory from accumulator).SBB r. (Subtract register from accumulator with borrow).SBB M. (Subtract memory from accumulator with borrow).SUI data. (Subtract immediate data from accumulator)SBI data. (Subtract immediate data from accumulator with borrow). INR r. (Increment register content)DCR r. (Decrement register content)



DCR M. (Decrement memory content)INX rp. (increment register pair)DCX rp (Decrement register pair)DAA. (Decimal adjust accumulator)

Q39. What are the instructions used in 8085 of Logical Group ?Ans.The instructions of this group perform AND, OR, EXCLUSIVE-OR operations; compare, rotate or take complement of data in register or memory.ANA r. (AND register with accumulator)ANA M. (AND memory with accumulator)ANI data. (AND immediate data with accumulator)ORA r. (OR register with accumulator)ORA M. (OR memory with accumulator)ORI data. (OR immediate data with accumulator)XRA r. (EXCLUSIVE - OR register with accumulator)XRA M. (EXCLUSIVE - OR memory with accumulator)RRC. (Rotate accumulator right)RAL. (Rotate accumulator left through carry)RAR. (Rotate accumulator right through carry)

Q40. What are the instructions used in 8085 of Branch Group?Ans.

JMP addr (label). (Unconditional Jump: jump to the instruction specified by the address). Conditional Jump addr (label). JZ addr (label). (Jump if the result is zero)JNZ addr (label). Jump if the result is not zero)JC addr (label). (Jump if there is a carry)JNC addr (label). (Jump if there is no carry)JP addr (label). (Jump if the result is plus)JM addr (label). (Jump if the result is minus)JPO addr (label). (Jump if odd parity)

Q41. What are the instructions used in 8085 of Stack, I/O And Machine Control Group?Ans.

IN port-address. (Input to accumulator from I/O port)OUT port-address. (Output from accumulator to I/O port)PUSH rp. (Push the content of register pair to stack) POP rp. (Pop the content of register pair, which was saved, from the stack)POP PSW. (Pop Processor Status Word)HLT (Halt)XTHL. (Exchange stack-top with H-L)SPHL (Move the contents of H-L pair to stack pointer)

Q42. Explain the Types of Signals Used in Memory Chip.Ans. Input and output signals common to most memory chips. Fig shows different signal categories found in memory chips.



Q43. Explain the Data Transfer Instructions used in 8085.Ans.Opcode Operand DescriptionCopy from source to destinationMOV Rd, Rs This instruction copies the contents of the source register into the destination registerThe contents of Rd, M the source register are not altered. If one of the operands is a memory location, its location is specified by the contents of the HL registers.Example: MOV B, C or MOV B, MMove immediate 8-bitMVI Rd, data The 8-bit data is stored in the destination register orM, data memory. If the operand is a memory location, its location isspecified by the contents of the HL registers.Example: MVI B, 57H or MVI M, 57HLoad accumulatorLDA 16-bit address The contents of a memory location, specified by a16-bit address in the operand, are copied to the accumulator.The contents of the source are not altered.Example: LDA 2034HLoad accumulator indirectLDAX B/D Reg. pair The contents of the designated register pair point to a memorylocation. This instruction copies the contents of that memorylocation into the accumulator. The contents of either theregister pair or the memory location are not altered.Example: LDAX BLoad register pair immediateLXI Reg. pair, 16-bit data The instruction loads 16-bit data in the register pairdesignated in the operand.Example: LXI H, 2034H or LXI H, XYZLoad H and L registers directLHLD 16-bit address The instruction copies the contents of the memory location


MEMORY

CHIP

AddressData

Other control input/output

Power supply

Read

Write

Output disables

Chip enable/Select


pointed out by the 16-bit address into register L and copiesthe contents of the next memory location into register H. Thecontents of source memory locations are not altered.Example: LHLD 2040H

Q44. Addition of 2 8-bits number, sum 16-bits.Ans.

Memory Machine Mnemonics OperandsAddress Codes

2000 21,01,5 LXI H,2501 H2003 0E,00 MVI C,002005 7E MOV A,M2006 23 INX H2007 86 ADD M2008 D2,0C,20 JNC AHEAD200B 0C INR C200C AHEAD 32,03,25 STA 2503 H200F 79 MOV A,C2010 32,04,25 STA 2504 H2013 76 HLT

Q45. Addition of 2 16-bits number, sum 16-bits.Ans.


2000 2A,01,25 LHLD 2501 H2003 EB XCHG2004 2A,03,25 LHLD 2503 H2007 0E,00 MVI C,002009 19 DAD D200A D2,0E,20 JNC AHEAD200D 0C INR C200E AHEAD 22,03,25 SHLD 2505 H2011 79 MOV A,C2012 32,04,25 STA 2507 H2015 76 HLT

Q46. Find one’s complement of an 8-bit number.Ans.


2000 3A,01,25 LDA 2501 H2003 2F CMA2004 32,02,25 STA 2502H2007 76 HLT

Q47. Find one’s complement of an 16-bit number.Ans.

Memory Machine Mnemonics Operands



Address Codes

2000 21,01,25 LXI H, 2501 H2003 2F MOV

2004 7E CMA2005 32,03,25 STA 2502H2008 23 INX H2009 7E MOV A, M200A 2F CMA200B 32,04,25 STA 2504200E 76 HLT

Q48. Find Two’s complement of an 8-bit number.Ans.


2000 3A,01,25 LDA 2501 H2003 2F CMA2004 3C INR A2005 32,02,25 STA 2502H2008 76 HLT

Q49. Find Two’s complement of an 16-bit number.Ans.


2000 21,01,25 LXI H, 2501 H2003 06,00 MVI B,00

2005 7E MOV A, M2006 2F CMA2007 C6, 01 ADI 012009 32,03,25 STA 2503 H200C D2, 10, 20 JNC GO200F 04 INR B2010 GO 23 INX H2011 7E MOV A, M2012 2F CMA2013 80 ADD B2014 32,04,25 STA 2504H2017 76 HLT

Q50. Shift an 8-bit number by two bit.Ans.

Memory Machine Mnemonics OperandsAddress Codes2000 3A,01,25 LDA 2501 H2003 87 ADD A

2004 87 ADD A2005 32,02,25 STA 2502 H



2007 76 HLT

Q51. Shift an 16-bit number by one bit.Ans.

Memory Machine Mnemonics OperandsAddress Codes2000 2A, 01, 25 LDA 2501 H2003 29 DAD H

2004 22, 03, 25 SHLD 2503 H2007 76 HLT

Q52. Shift an 8-bit number by two bit.Ans.

Memory Machine Mnemonics OperandsAddress Codes2000 2A, 01, 25 LDA 2501 H2003 29 DAD A

2004 29 DAD A2005 22,03,25 STA 2502 H

2007 76 HLT

Q53. To find larger of two numbers.Ans.

Memory Machine Mnemonics OperandsAddress Codes2000 21, 01, 25 LXI H, 2501 H2003 7E MOV A, M

2004 23 INX H2005 BE CMP M

2006 D2, 0A, 20 JNC GO2009 7E MOV A, M200A GO 32,03,25 STA 2503 H200D 76 HLT

Q54. To find Smaller of two numbers.Ans.

Memory Machine Mnemonics OperandsAddress Codes2000 21, 01, 25 LXI H, 2501 H2003 7E MOV A, M

2004 23 INX H2005 BE CMP M

2006 D2, 0A, 20 JC GO2009 7E MOV A, M200A GO 32,03,25 STA 2503 H200D 76 HLT

Q55. Find the largest number from an array.Ans.



Memory Machine Mnemonics OperandsAddress Codes2000 21, 00, 25 LXI H, 2500 H2003 4E MOV C, M

2004 23 INX H2005 7E MOV A, M

2006 0D DCR C2007 LOOP 23 INX H2008 BE CMP M2009 D2, 0D, 20 JNC GO200C 7E MOV A, M200D GO 0D DCR C200E C2, 07, 20 JNZ LOOP2011 32, 50, 24 STA 2405 H2014 76 HLT

Q56. Find the smallest number from an array.Ans.


2004 23 INX H2005 7E MOV A, M

2006 0D DCR C2007 LOOP 23 INX H2008 BE CMP M2009 D2, 0D, 20 JC GO200C 7E MOV A, M200D GO 0D DCR C200E C2, 07, 20 JNZ LOOP2011 32, 50, 24 STA 2405 H2014 76 HLT

Q57. Find the sum of series of 8-bit numbers, sum is 8-bit.Ans.


2004 3E, 00 MVI A, 002006 23 INX H

2007 86 ADD M2008 0D DCR C2009 C2, 06, 24 JNZ GO200C 32, 50, 24 STA 2450 H200F 76 HLT

Q58. Find multiplication of 2 8-bits numbers , product is 16-bit.Ans.



Memory Machine Mnemonics OperandsAddress Codes2000 2A, 00, 25 LHLD 2501 H2003 EB XCHG

2004 3A, 03, 25 LDA 2503 H2007 21,00,00 LXI H, 0000

200A 0E,08 MVI C, 08200C LOOP 29 DAD H

200D 17 RAL200E D2, 0C, 20 JNC GO2011 19 DAD D

2012 GO 0D DCR C2013 C2, 0C, 20 JNZ LOOP

2016 22,04,25 SHLD 25042019 76 HLT

Q59. Write division of two 8 bit number using assembly language of Intel 8085.Ans. Memory Machine Mnemonics Operands CommentsAddress Codes

2000 21,50,41 LXI H,4150 2003 46 MOV B,M Get dividend in RegisterB2004 0E,00 MVI C,00 Clear RegisterC as quotient2006 23 INX H2007 7E MOV A,M Get the divisor in RegisterA 2008 NEXT B8

CMP B Compare RegisterA with B2009 DA,17,20 JC LOOP Jump on carry, to loop2012 90 SUB B Subtract Registor A from B2013 0C INR C Increment content of Reg C2014 C3,08,20 JMP NEXT Jump to next2017 LOOP 32,52,41 STA 4152 Store the remainder2020 79 MOV A,C2021 32,53,41 STA 4153 Store the quotient2024 76 HLT

Q60. Write a program in assembly language to find square of a Number.Ans. Memory Machine Mnemonics Operands CommentsAddress Codes

2000 21,00,62 LXI H, 6200H Initialize lookup table pointer2003 11,00,61 LXI D, 6100H Initialize source memory pointer2006 01,00,70 LXI B, 7000H Initialize destination memory pointer2009 BACK: 1A LDAX D Get the number2010 6F MOV L, A A point to the square2011 7E MOV A, M Get the square2012 02 STAX B Store the result in memory location2013 13 INX D Increment source memory pointer2014 77 INX B Increment destination memory pointer2015 79 MOV A, C2016 FE,05 CPI 05H Check for last number2018 C2,09,20 JNZ BACK If not repeat



2021 76 HLT Terminate program Execution

Note: - This program will Find the square of the given numbers from memory location 6100H and store the result at memory location 7000H.

Instructions of 8085 with opcode and size in bytes: -Sr. No. Mnemonics Operand Opcode Bytes

1 ACI Data CE 22 ADC A 8F 13 ADC B 88 14 ADC C 89 15 ADC D 8A 16 ADC E 8B 17 ADC H 8C 18 ADC L 8D 19 ADC M 8E 110 ADD A 87 111 ADD B 80 112 ADD C 81 113 ADD D 82 114 ADD E 83 115 ADD H 84 116 ADD L 85 117 ADD M 86 118 ADI Data C6 219 ANA A A7 120 ANA B A0 121 ANA C A1 122 ANA D A2 123 ANA E A3 124 ANA H A4 125 ANA L A5 126 ANA M A6 127 ANI Data E6 228 CALL Label CD 329 CC Label DC 330 CM Label FC 3



31 CMA 2F 132 CMC 3F 133 CMP A BF 134 CMP B B8 135 CMP C B9 136 CMP D BA 137 CMP E BB 138 CMP H BC 139 CMP L BD 140 CMP M BD 141 CNC Label D4 342 CNZ Label C4 343 CP Label F4 344 CPE Label EC 345 CPI Data FE 246 CPO Label E4 347 CZ Label CC 348 DAA 27 149 DAD B 09 150 DAD D 19 151 DAD H 29 152 DAD SP 39 153 DCR A 3D 154 DCR B 05 155 DCR C 0D 156 DCR D 15 157 DCR E 1D 158 DCR H 25 159 DCR L 2D 160 DCR M 35 161 DCX B 0B 162 DCX D 1B 163 DCX H 2B 164 DCX SP 3B 165 DI F3 166 EI FB 167 HLT 76 168 IN Port-address DB 269 INR A 3C 170 INR B 04 171 INR C 0C 172 INR D 14 173 INR E 1C 1



74 INR H 24 175 INR L 2C 176 INR M 34 177 INX B 3 178 INX D 13 179 INX H 23 180 INX SP 33 181 JC Label DA 382 JM Label FA 383 JMP Label C3 384 JNC Label D2 385 JNZ Label C2 386 JP Label F2 387 JPE Label EA 388 JPO Label E2 389 JZ Label CA 390 LDA Address 3A 391 LDAX B 0A 192 LDAX D 1A 193 LHLD Address 2A 394 LXI B 01 395 LXI D 11 396 LXI H 21 397 LXI SP 31 398 MOV A, A 7F 199 MOV A, B 78 1100 MOV A, C 79 1101 MOV A, D 7A 1102 MOV A, E 7B 1103 MOV A, H 7C 1104 MOV A, L 7D 1105 MOV A, M 7E 1106 MOV B, A 47 1107 MOV B, B 40 1108 MOV B, C 41 1109 MOV B, D 42 1110 MOV B, E 43 1111 MOV B, H 44 1112 MOV B, L 45 1113 MOV B, M 46 1114 MOV C, A 4F 1115 MOV C, B 48 1116 MOV C, C 49 1



117 MOV C, D 4A 1118 MOV C, E 4B 1119 MOV C, H 4C 1120 MOV C, L 4D 1121 MOV C, M 4E 1122 MOV D, A 57 1123 MOV D, B 50 1124 MOV D, C 51 1125 MOV D, D 52 1126 MOV D, E 53 1127 MOV D, H 54 1128 MOV D, L 55 1129 MOV D, M 56 1130 MOV E, A 5F 1131 MOV E, B 58 1132 MOV E, C 59 1133 MOV E, D 5A 1134 MOV E, E 5B 1135 MOV E, H 5C 1136 MOV E, L 5D 1137 MOV E, M 5E 1138 MOV H, A 67 1139 MOV H, B 60 1140 MOV H, C 61 1141 MOV H, D 62 1142 MOV H, E 63 1143 MOV H, H 64 1144 MOV H, L 65 1145 MOV H, M 66 1146 MOV L, A 6F 1147 MOV L, B 68 1148 MOV L, C 69 1149 MOV L, D 6A 1150 MOV L, E 6B 1151 MOV L, H 6C 1152 MOV L, L 6D 1153 MOV L, M 6E 1154 MOV M, A 77 1155 MOV M, B 70 1156 MOV M, C 71 1157 MOV M, D 72 1158 MOV M, E 73 1159 MOV M, H 74 1



160 MOV M, L 75 1161 MVI A, Data 3E 2162 MVI B, Data 06 2163 MVI C, Data 0E 2164 MVI D, Data 16 2165 MVI E, Data 1E 2166 MVI H, Data 26 2167 MVI L, Data 2E 2168 MVI M, Data 36 2169 NOP 00 1170 ORA A B7 1171 ORA B B0 1172 ORA C B1 1173 ORA D B2 1174 ORA E B3 1175 ORA H B4 1176 ORA L B5 1177 ORA M B6 1178 ORI Data F6 2179 OUT Port-Address D3 2180 PCHL E9 1181 POP B C1 1182 POP D D1 1183 POP H E1 1184 POP PSW F1 1185 PUSH B C5 1186 PUSH D D5 1187 PUSH H E5 1188 PUSH PSW F5 1189 RAL 17 1190 RAR 1F 1191 RC D8 1192 RET C9 1193 RIM 20 1194 RLC 07 1195 RM F8 1196 RNC D0 1197 RNZ C0 1198 RP F0 1199 RPE E8 1200 RPO E0 1201 RRC 0F 1202 RST 0 C7 1



203 RST 1 CF 1204 RST 2 D7 1205 RST 3 DF 1206 RST 4 E7 1207 RST 5 EF 1208 RST 6 F7 1209 RST 7 FF 1210 RZ C8 1211 SBB A 9F 1212 SBB B 98 1213 SBB C 99 1214 SBB D 9A 1215 SBB E 9B 1216 SBB H 9C 1217 SBB L 9D 1218 SBB M 9E 1219 SBI Data DE 2220 SHLD Address 22 3221 SIM 30 1222 SPHL F9 1223 STA Address 32 3224 STAX B 02 1225 STAX D 12 1226 STC 37 1227 SUB A 97 1228 SUB B 90 1229 SUB C 91 1230 SUB D 92 1231 SUB E 93 1232 SUB H 94 1233 SUB L 95 1234 SUB M 96 1235 SUI Data D6 2236 XCHG EB 1237 XRA A AF 1238 XRA B A8 1239 XRA C A9 1240 XRA D AA 1241 XRA E AB 1242 XRA H AC 1243 XRA L AD 1244 XRA M AE 1245 XRI Data EE 2



246 XTHL E3 1


February 2008 Exams - Nano · Web viewHow many address lines are necessary to address two...

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