Extreme scale Demonstrators EsD

Jean-Pierre Panziera, Bull

Barcelona – Sept. 22, 2016

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User support

collaboration

Academic & industry

International partnerships

Blades

SMP

Interconnect

Environment

Applications

Installation

Operations

Common labs

Users group Hardware

Software

Co-design

from hardware and software to services and collaboration

engineering HW SW services

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A unique End to End offering

SC suite

Visualization

Cloud

Big Data Collaboration

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CURIE - 2011 1st PRACE Petascale system 2 PFlops

OCCIGEN 2015 DLC technology 2.1 PFlops

TAURUS 2013-2014 1st Bull Petascale system in Germany 1 PFlops

DKRZ 2014-2016 DLC technology 3 PFlops

CARTESIUS 2013-2014 1st Bull Petascale system in NL DLC technology - 1.3 PFlops

HELIOS 2011-2014 ITER Community 1.7 PFlops

BEAUFIX PROLIX 2013-2016 5 Pflops

SANTOS DUMONT 2015 Largest supercomputer in Lat America 1 PFlops

COBALT 2015-2016 1,4 Pflops

TERA 1000 2015 exascale-class 2,6 Pflops; 1 Eflops (2020)

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Proven know-how for large production systems

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▶ Research as in exploration

▶ Proof-of-Concept with little NRE & small deployment

▶ No direct commercial product

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Bull participation in EU Research projects e.g. Mont-Blanc 1,2,3; Sage … (FP7, H2020)

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▶ Bull ambition is to deliver Exascale solutions

▶ EsD initiative is a wonderful way to prepare and validate Exascale systems

▶ Collaborate with European HPC/HPDA community; in particular with Users/Developers; Reinforce the co-design efforts

▶ EsD as a prolongation of Research projects

– moving interesting concepts towards commercial applications

– validating this new concepts at scale

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1) What is your motivation for potentially assuming the role of a system integrator in one of the Esd projects ?

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System architect …

Development of own subsystem(s) or subcomponent(s)

Integration of entire system including third party subsystems & components

System Test and EsD-release

Maintenance & support

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2) What are the responsibilities and scopes you wish to cover ?

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▶ Analysis, target definition Users/Developers have a good understand of their science domain and the underlying structure/algorithms But need to analyze applications at system architecture level

▶ suggested 18-24 months for phase A is compatible with electronic board design, mechanical integration and manufacturing of EsD However might not cover for preliminary analysis Tight (really tight) for ASIC development

▶ IP protection is a key concern

– possible with complementary technologies

– difficult when domains of interest overlap

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3) What is your view on how best to implement the object of „integrate technology researched and prototyped in pevious FETHPC projects“? (analysis-process, estimated time and resources required, IP-aspects, etc.)

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▶ EsD is a co-design project requires close collaboration with Users/Developers and Hosting datacenter

▶ EsD is an industrial project system integrator must be the leader for Phase A

▶ and strong collaboration through Phase B

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4) What is your view on the governance – structure of an EsD project, what are your fundamental requirements?

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document “The Extreme-Scale Demonstrators concept: Current State of Definition” indicates:

120M€ / 2-4projects = 30-60M€ / EsD

▶ Phase A

– NRE (30-50%) NRE cost is ~independent of EsD system size NRE suggested budget limiting project scope to board / mechanical integration Tight integration of components CPUs, memory, interconnect, storage has the most potential, but requires higher NRE

– EsD system parts cost (50-70%) scalable medium size system with above caveat

▶ Phase B (~15% on top of phase A)

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5) Any thoughts about required budgets and funding mechanisms?

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6) Any „no go“ aspects ?

▶ Not at this stage

▶ Nevertheless

– Interested in architectures that have a good market potential

– A clear framework for the IP must be set in advance

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