Electrical performance of a silicon micro-strip super-module...

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Electrical performance of a silicon micro-strip super-module prototype for the High-Luminosity LHC collider A. Clark c,* , G. Barbier c , F. Cadoux c , M. Endo d , Y. Favre c , D. Ferrere c , S. Gonzalez-Sevilla c , K. Hanagaki d , K. Hara b , G. Iacobucci c , Y. Ikegami a , T. Koriki a , D. La Marra c , M. Pohl c , Y. Takubo a , S. Terada a , Y. Unno a , M. Weber c a KEK, High Energy Accelerator Research Organization, Oho 1-1, Tsukuba, Ibaraki 305-0801, Japan b University of Tsukuba, School of Pure and Applied Sciences, 1-1-1 Tennodai, Tsukuba, Ibaraki 305-8571, Japan c DPNC, University of Geneva, CH 1211 Geneva 4, Switzerland d University of Osaka, Kaneyama-cho 1-1, Toyonaka-shi, Osaka-fu 560-0043, Japan Abstract Following the Phase II upgrade of the CERN Large Hadron Collider (LHC) foreseen in 2022, the High Luminosity LHC (HL-LHC) is expected to deliver a peak luminosity in excess of 5 × 10 34 cm -2 s -1 and an integrated luminosity of 3000 fb -1 until 2030. The ATLAS Collaboration plans to replace the existing Inner Tracking Detector by a new tracker, with readout electronics as well as silicon pixel and strip sensor technology capable of maintaining the excellent tracking performance of the existing tracker in the severe radiation and high collision rate environment of the HL-LHC. The promising super-module integration concept extends the proven design of the existing silicon strip tracker to the HL-LHC, with double-sided stereo silicon micro-strip modules assembled into a low mass local support structure. The Super-Module R&D program is described, with reference to HL-LHC requirements, and key prototype results summarized. Keywords: HL-LHC, ATLAS Upgrade, Silicon, Strip Module, Super-Module. 1. Introduction 1 During machine shutdowns in 2013-4, 2017-8 and 2022-23, 2 the Large Hadron Collider will be upgraded in steps to operate 3 at a centre-of-mass collision energy s = 14 TeV and from 4 2022 peak luminosities exceeding 5 × 10 34 cm -2 s -1 , with a 25 5 nsec. bunch spacing and on average 140 inelastic collisions 6 per bunch crossing [1]. In the period until 2030, the ATLAS 7 experiment is expected to collect data for an integrated lumi- 8 nosity of 3000 fb -1 . 9 The channel occupancy from the large track multiplicity ex- 10 pected per bunch crossing as well as the integrated radiation 11 damage to the front-end electronics and sensors from the colli- 12 sion products, is beyond the performance capability of the exist- 13 ing Inner Tracking Detector [2]. From 2022, ATLAS will install 14 a new Inner Tracking Detector (ITK), with increased channel 15 granularity and improved radiation hardness, to maintain or im- 16 prove the track reconstruction eciency and precision, as well 17 as the b-tagging performance. 18 Figure 1 shows a bench-mark layout for the ITK. The silicon- 19 based tracker foresees at least 4 inner layers of 50 × 250 μm 2 20 silicon pixels at inner radii followed by 5 double-sided stereo 21 silicon strip layers, 3 with strips 80 × 2400 μm 2 and 2 with strips 22 80 × 9600 μm 2 at radii up to 100 cm. This is complemented by 23 6 pixel and 5 double-sided strip disks in each forward region. 24 The layout ensures a 9-hit coverage in the psuedo-rapidity range 25 * Corresponding author Email address: [email protected] (A. Clark) |η|≤ 2.5. Detailed simulation studies including complex event 26 signatures and high luminosity machine conditions are ongo- 27 ing, to characterize and to identify weaknesses of this bench- 28 mark layout. 29 Figure 1: Bench-mark layout for the ATLAS Inner Tracker Up- grade. 30 Separate R&D projects address the development of radia- 31 tion hard front-end readout integrated circuits (IC) in 130 nm. 32 CMOS technology [3], and radiation tolerant silicon sensors 33 [4], independent of the layout or the thermo-mechanical and 34 readout architectures used. The Super-Module integration R&D 35 project [5] extends the demonstrated merits of the existing tracker 36 to the HL-LHC (mechanical and thermal stability, true stereo 37 space-point reconstruction, overlaps to mitigate ambiguities of 38 weak alignment modes amongst others) while addressing some 39 design short-comings. A major aim is to optimise the material 40 budget for both the pixel and strip detectors in the presence of 41 Preprint submitted to Nuclear Instruments and Methods A January 28, 2012

Transcript of Electrical performance of a silicon micro-strip super-module...

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Electrical performance of a silicon micro-strip super-module prototype for theHigh-Luminosity LHC collider

A. Clarkc,∗, G. Barbierc, F. Cadouxc, M. Endod, Y. Favrec, D. Ferrerec, S. Gonzalez-Sevillac, K. Hanagakid, K. Harab,G. Iacobuccic, Y. Ikegamia, T. Korikia, D. La Marrac, M. Pohlc, Y. Takuboa, S. Teradaa, Y. Unnoa, M. Weberc

aKEK, High Energy Accelerator Research Organization, Oho 1-1, Tsukuba, Ibaraki 305-0801, JapanbUniversity of Tsukuba, School of Pure and Applied Sciences, 1-1-1 Tennodai, Tsukuba, Ibaraki 305-8571, Japan

cDPNC, University of Geneva, CH 1211 Geneva 4, SwitzerlanddUniversity of Osaka, Kaneyama-cho 1-1, Toyonaka-shi, Osaka-fu 560-0043, Japan

Abstract

Following the Phase II upgrade of the CERN Large Hadron Collider (LHC) foreseen in 2022, the High Luminosity LHC (HL-LHC)is expected to deliver a peak luminosity in excess of 5 × 1034 cm−2s−1 and an integrated luminosity of 3000 fb−1 until 2030. TheATLAS Collaboration plans to replace the existing Inner Tracking Detector by a new tracker, with readout electronics as well assilicon pixel and strip sensor technology capable of maintaining the excellent tracking performance of the existing tracker in thesevere radiation and high collision rate environment of the HL-LHC. The promising super-module integration concept extends theproven design of the existing silicon strip tracker to the HL-LHC, with double-sided stereo silicon micro-strip modules assembledinto a low mass local support structure. The Super-Module R&D program is described, with reference to HL-LHC requirements,and key prototype results summarized.

Keywords: HL-LHC, ATLAS Upgrade, Silicon, Strip Module, Super-Module.

1. Introduction1

During machine shutdowns in 2013-4, 2017-8 and 2022-23,2

the Large Hadron Collider will be upgraded in steps to operate3

at a centre-of-mass collision energy√

s = 14 TeV and from4

2022 peak luminosities exceeding 5 × 1034 cm−2s−1, with a 255

nsec. bunch spacing and on average ∼140 inelastic collisions6

per bunch crossing [1]. In the period until 2030, the ATLAS7

experiment is expected to collect data for an integrated lumi-8

nosity of 3000 fb−1.9

The channel occupancy from the large track multiplicity ex-10

pected per bunch crossing as well as the integrated radiation11

damage to the front-end electronics and sensors from the colli-12

sion products, is beyond the performance capability of the exist-13

ing Inner Tracking Detector [2]. From 2022, ATLAS will install14

a new Inner Tracking Detector (ITK), with increased channel15

granularity and improved radiation hardness, to maintain or im-16

prove the track reconstruction efficiency and precision, as well17

as the b-tagging performance.18

Figure 1 shows a bench-mark layout for the ITK. The silicon-19

based tracker foresees at least 4 inner layers of 50 × 250 µm220

silicon pixels at inner radii followed by 5 double-sided stereo21

silicon strip layers, 3 with strips 80×2400 µm2 and 2 with strips22

80×9600 µm2 at radii up to ∼100 cm. This is complemented by23

6 pixel and 5 double-sided strip disks in each forward region.24

The layout ensures a 9-hit coverage in the psuedo-rapidity range25

∗Corresponding authorEmail address: [email protected] (A. Clark)

|η| ≤ 2.5. Detailed simulation studies including complex event26

signatures and high luminosity machine conditions are ongo-27

ing, to characterize and to identify weaknesses of this bench-28

mark layout.29

31 March 2011 5 Nigel Hessey, Nikhef Oxford Upgrade Week, Phase­II plenary

Utopia Layout

Details available in the <parameter book>

Figure 1: Bench-mark layout for the ATLAS Inner Tracker Up-grade.

30

Separate R&D projects address the development of radia-31

tion hard front-end readout integrated circuits (IC) in 130 nm.32

CMOS technology [3], and radiation tolerant silicon sensors33

[4], independent of the layout or the thermo-mechanical and34

readout architectures used. The Super-Module integration R&D35

project [5] extends the demonstrated merits of the existing tracker36

to the HL-LHC (mechanical and thermal stability, true stereo37

space-point reconstruction, overlaps to mitigate ambiguities of38

weak alignment modes amongst others) while addressing some39

design short-comings. A major aim is to optimise the material40

budget for both the pixel and strip detectors in the presence of41

Preprint submitted to Nuclear Instruments and Methods A January 28, 2012

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vastly increased detector granularity. This dictates substantial42

material reductions for the services and power distribution, as43

well as an optimal service routing.44

This paper describes the super-module concept for the strip45

detector, where individual short-strip (SS) or long-strip (LS)46

double-sided stereo modules are attached to a light, stable carbon-47

carbon local support that is inserted into the overall tracker sup-48

port structure. The local support holds at least 12 modules de-49

pending on the layout, and allows full sensor hermiticity in φ50

and z. The concept has additional advantages of proven accu-51

racy and stability, extreme modularity for each of the assembly52

items (stucture, coolimg, modules etc.) allowing efficient qual-53

ity assurance and repairability, and parallelism of procurement54

and construction. In this paper the major components and pro-55

totype results are summarized, and future R&D requirements56

are outlined. More detailed accounts of the module and super-57

module electrical performance, the service structure and the58

data acquisition are given at this conference [6, 8] . An alterna-59

tive concept where an carbon-based foam core with integrated60

cooling pipes, and with service buses and single-sided modules61

glued to each side of the stave, is also described at this confer-62

ence [9].63

2. Double-sided silicon strip modules64

The basic individual prototype SS module is a symmetric65

double-sided module of Fig. 2 [6, 7]. Two 96 × 96 mm2 n-66

on-p silicon micro-strip sensors are glued to a central Ther-67

mal Pyrolitical Graphite (TPG) base-board, four bridged hy-68

brids (each holding two columns of ten 128-channel readout69

ABCN25 ICs) are located as pairs on both sides of the mod-70

ule and four aluminum nitride (AlN) facings are located at each71

end of the base-board. The sensors are divided into four seg-72

ments, two with axial and two with stereo strips inclined by73

40 mrad. The strip-length in each segment is ∼ 2.4 cm and74

the strip-pitch is 74.5 µm. The total number of strips per seg-75

ment is 1280. The TPG base-board provides mechanical sta-76

bility and ensures good thermal contact for heat dissipation to77

cooling blocks (Section 3). The LS module is of identical de-78

sign, but with less channels.79

HybridsAlN facing

Washers

Silicon sensor

ABCN FE chips

Generated by Foxit PDF Creator © Foxit Softwarehttp://www.foxitsoftware.com For evaluation only.

Figure 2: Components of the double-sided short strip module.

80

The 128-channel ABCN25 front-end readout IC [3] is fab-81

ricated in IBM CMOS6 technology. A new 256-channel IC82

(ABCN-13) and a new hybrid controller IC (HCC) are under83

design in 130 nm technology. Planned evolutions of the sensor,84

hybrid and module designs towards a possible ATLAS imple-85

mentation are considered in Section 486

The advantages of this module design include:87

a) The two sensors are mounted back-to-back allowing accu-88

rate space point reconstruction with a relative sensor align-89

ment at the 1 µm level. The modules are then centred and90

aligned precisely on a local structure.91

b) The hybrid and sensor thermal paths are independent and92

the use of low thermal expansion materials with good ther-93

mal conductivity minimises deformations during tempera-94

ture cycling. Detailed finite element calculations indicate a95

maximum longitudinal deviation of only 1.4 µm for a tem-96

perature change between room temperature and −35◦C. For97

a local support loaded with cooling tubes and cooling blocks98

as in Section 3, the sensor temperatures on the existing mod-99

ule prototype can be maintained with a temperature differ-100

ence of 11 − 13◦C for CO2 cooling at −35◦C . FEA calcula-101

tions indicate an addition temperature increase of 3◦C if the102

hybrid is directly glued to the sensors.103

c) The modules are optimized for easy handling during proto-104

typing and quality assurance (QA) studies, this being impor-105

tant for large-scale production.106

A total of 6 double sided modules have been constructed107

and additional modules are under industrialization in Japan.108

The electrical performance is described in more detail in Ref. [6].109

The noise level of individual modules using the ABCN25 IC is110

excellent, with good uniformity and a noise value of between111

564 and 590 e− ENC, as measured at 250 V bias and with a 1 fC112

input charge. The performance of the modules has been tested113

to be stable for bias voltages of beyond 500 V. Proton irradia-114

tion tests were also made at −10◦C on a single-sensor module115

at the CERN PS irradiation facility [10]. The fluence recorded116

varied between 3 × 1014 neqcm−2 and 1.4 × 1015 neqcm−2. De-117

spite a leakage current increase of 5-6 orders of magnitude, the118

noise increase was small. Two single sided modules (sensor +119

hybrid) of the stave concept have since been irradiated to an120

even larger dose, with similarly satisfactory results [9].121

3. Prototype Super Module Design Features122

The benchmark super-module concept for the strip detec-123

tor foresees double-sided SS or LS modules attached to a light,124

stable carbon-carbon local support that is end-inserted into an125

overall support structure. Depending on the final ITK layout,126

the local support will hold at least 12 modules. Details of the127

super-module will evolve prior to production (Section 4), but128

it is crucial to verify the concept mechanically, thermally and129

electrically. This section summarizes prototype super-module130

studies that aim to demonstrate the suitability of super-modules131

for the ITK at the HL-LHC.132

2

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The super-module design allows significant advantages over133

more integrated concepts, during prototyping, construction, in-134

tegration and commissioning. Figure 3 shows a schematic of135

the super-module prototype layout. Modules are attached to a136

light but stiff carbon fibre support, consisting of a thin tube sup-137

porting cross beams. On each side of the support, high conduc-138

tivity cooling blocks provide mechanical attachments for the139

modules and a thermal path to cooling tubes connected with140

high conductivity grease to minimize thermal stress. On one141

side of the support, also in thermal contact to the cooling, a142

multilayer cable bus transfers signals from each module to a143

super-module controller (SMB).144

a) All components of the super-module support; the cooling,145

the service bus, the SMC, are decoupled from the module146

design and can be separately tested and assembled. Proto-147

typing is also simplified.148

b) The mechanical connection of modules is precise and repro-149

ducible, and minimizes thermal deformations. It allows for150

module overlap in z to provide full hermiticity if chosen.151

c) The cable bus and cooling pipes are thermo-mechanically152

disconnected from the modules, minimizing stress. The choice153

of connector (or wire bonding) can be made at a late stage.154

d) Although only 0.18 X 0 averaged over the active area, the155

local support is stiff and designed to be end-insertable and156

to lock into position without stress, greatly simplifying com-157

missioning.158

e) Parallelism of the procurement, construction and QA steps159

is natural and well matched to the infrastructure of univer-160

sity departments.161

f) Full repair and rework is straight forward up to the commis-162

siong step following integration.163

g) Handling is safe.164

165

Figure 4 shows an eight-module mechanical prototype. Us-166

ing an aluminium prototype, the end insertion principle and 3-167

point locking mechanism has been fully validated. Key com-168

ponents such as the support cross-beams have been fabricated169

in carbon fibre 1 and qualified. The assembly is stiff; load and170

distortion measurements are ongoing to compare with FEA cal-171

culations prior to a design iteration and the results are very en-172

couraging.173

174

Cooling plates for the prototype have so far been prototyped175

in aluminium. FEA studies, cross-checked using measurements176

of the thermal conductivity, indicate a temperature difference177

between the cooling pipe and module sensors for the final de-178

sign of 11 − 13◦C. A key issue is the high thermal conductivity179

and the radiation hard grease joint between the cooling tubes180

and the cooling blocks. The most promising grease identified181

is a non-silicon zinc oxide loaded grease, Electrolube HTCP 2,182

as used for the ATLAS Insertable B-Layer (IBL) [11]. Samples183

have been irradiated to fluences of 1.2×1016 neqcm−2}, 10 times184

1Composite Design, ch. de la Volice 11, CH 1023 Crissier2Electrolube France, 13 rue Vladimir Jankelevitch, F-77184 Emerainville

Cooling  pipe    Cover  

Modules  (TPG,  Si,  Hybrid,…)  

Central  tube  –  joints  in  plas3c  

End  inser:on    guiding  pipes  

Cooling  Plates  x6  (prototyped  in      aluminum)  

Cross  beam  (or  «  wings  »)  

Figure 3: Schematic of the existing supermodule prototypeshowing the main components after assembly.

Figure 4: Photograph of mechanical super-module prototypewith an aluminium frame replacing a carbon fibre support cylin-der. The modules and cooling plates are mounted onto theCRFP wings.

that expected for the strip detector. Even at those fluences, mea-185

3

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surements of the Young Modulus and the thermal conductivity186

are within the required specifications.187

A separate 8-module electrical prototype super module has188

been constructed from aluminium, and loaded so far with four189

modules, as well as first-generation cable buses and prototype190

hybrid controller (BCC) boards. In this prototype, shown in191

Fig.5, the high-voltage distribution is individual, but the digi-192

tal voltage is provided using prototype DC-DC converters [12].193

The analog voltage for the front-end chips is provided from194

the digital voltage using on-chip linear voltage regulators. The195

stave and super module R&D projects have used the same data196

acquisition, and have collaborated closely on the electrical mea-197

surements. The electrical super module components as well198

as first prototype results are discussed in detail by Gonzalez199

[6]. The noise is uniform across all 4 modules, and less than200

∼ 600 e− ENC, see Fig.5 (lower) . This is 10 − 15 e− higher201

than for individual modules and work is ongoing to understand202

extraneous noise sources in this setup. These results will be203

confirmed using DC-DC and possibly serial powering options,204

with 8 double-sided modules installed.205

206

Figure 5: (upper) Photograph of electrical super-module proto-type with the 4 double-sided modules read via a cable bus tothe SMC card. The DC-DC converters are also visible. (lower)Average measured noise in the vertical axis (e− ENC) for eachhybrid of the 4 modules .

4. Design Evolution of the Super Module207

Using prototype n-on-p silicon strip sensors, and the pro-208

totype ABCN-25 front-end IC, the Super-Module R&D project209

is close to demonstrating the advantages of using double-sided210

modules with a light carbon fibre end-insertable support, for the211

ATLAS ITK. In this Section, the expected evolution of the con-212

cept towards a pre-production prototype during 2013 and 2014213

is briefly summarized.214

a) Independently of the supermodule, there is a design evolu-215

tion of the silicon sensor, and the development of the 256-216

channel ABCN-13 IC and a Hybrid Control Chip (HCC) in217

130 nm CMOS technology. All three items will be available218

in early 2013. The double-sided hybrid and module design219

will evolve to match these items, as shown in Fig. 6 to be220

compared with Fig. 2, with attention to optimizing the ma-221

terial budget.222

b) Subject to functionality of the above components, at least223

12 double-sided modules (depending on the layout at that224

time) of the new pre-production design will be fabricated225

and tested before and after irradiation. At the same time at226

least 12 non-electrical thermal modules (depending on the227

layout at that time) will be fabricated.228

c) Several second-generation local support structures will be229

fabricated, together with their services. A schematic of the230

expected changes is shown is Fig. 7. One structure will231

be loaded with non-electrical modules for extended thermal232

studies. A second structure will be used for integration stud-233

ies. At least one structure will be fully loaded with qualified234

double-sided modules for extended electrical and mechani-235

cal tests (see below).236

Power  Card  

Cooling  plates  and  tubes  

Flexible  pigtail  with  connector  and  s7ffener   HCC  

CC  +  hybrid  flex  “U”  bridge  

S7ffener  linking  the  2  sides  possibly  free  from  

the  local  support  

HCC  

Input  Filtering  

GND  AC  coupling  with  HVret  

1  

Figure 6: Schematic showing the module design evolution, in-cluding the 256-channel ABCN-13 front-end and HCC hybridcontroller IC’s, as well as the power distribution hybrid for DC-DC or serial powering.

The above studies are essential but are technical develop-237

ments of the existing prototypes. No special difficulties are an-238

ticipated. However, two issues require further R&D.239

a) The most important open issue is the optimization both elec-240

trically and mechanically of the cable bus, together with241

a choice of DC-DC or serial power options for the digital242

low-voltage distribution, and the study of mutiplexing for243

the high-voltage distribution. This is expected to involve244

several cable bus design iterations. An enormous advantage245

of the super-module option is that this development can be246

factorised from other pre-production prototyping, and the247

decisions on powering made relatively late.248

4

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Cooling'In'

Super.Module'Design'Evolu5on'

Service'bus'

TTC,$Data$&$DCS$$

PS$cable$

SMB'

Module$#1$ Module$#2$ Module$#8$

HV$cable$

DCDC

$

Extrapolated'version'with'ABCN130'&'HCC'

DCDC

$

DCDC

$

DCDC

$

DCDC

$

DCDC

$

BCC$board$ BCC$board$ BCC$board$

Cooling'In'

Cooling'In'

Service'bus'

TTC,$Data$&$DCS$fibers$

PS$cable$

DCS,$Interlock$

Cooling'In'

Opto$

SMC$

SMC'Hybrid'

Cooling'Out'

HV$cable$

Module$#1$ Module$#2$ Module$#12$

GBT$SCA$ PS'

HCC' HCC'

PS'

HCC' HCC'

PS'

HCC' HCC'

1'D.#Ferrère,#AUW#Nov.2011##

Figure 7: Evolution of the local support and super-module de-signs. The most important evolutions concern the low-massand very compact service bus, and the SMC super-module con-troller at the end of each local support.

b) The second important design issue is to minimize the total249

material budget per layer ( all items, including the modules,250

the local support, the mechanical and electrical services, and251

the global support structure), averaged over the active area,252

while maintaining the mechanical stability required for the253

support structure . The current estimate is between 0.022254

X0 and 0.024 X0 depending on the detailed design choices255

made.256

5. Conclusions257

The Super-Module R&D prototype program is working to-258

wards a silicon micro-strip tracker satisfying the HL-LHC elec-259

trical, mechanical, thermal and robustness requirements. The260

feasibility of constructing double-sided micro-strip modules sup-261

ported on light but very stable carbon-fibre supports is close to262

being established.263

Using silicon micro-strip sensors, and the ABCN-25 front-264

end readout IC from parallel R&D projects, the noise perfor-265

mance of double-sided modules has been consistently measured266

to be less than ∼ 600 e− ENC, using prototype DC-DC convert-267

ers. A support structure prototype has so far demonstrated ex-268

cellent thermo-mechanical behaviour. The extreme modularity269

of the design simplifies the development, construction, integra-270

tion and commissioning steps of the planned silicon micro-strip271

tracker.272

A realistic ”pre-production” design has started, taking into273

account expected evolutions of the sensor and front-end IC de-274

sign. The main outstanding issue is the optimization of the ca-275

ble bus and power distribution for the supermodule, taking into276

account the material budget, electrical integrity and long-term277

operational robustness.278

6. Acknowledgements279

The authors acknowledge the support of the funding author-280

ities of the collaborating institutes, including the Japan Grant-281

in-Aid for Scientific Research (A) [Grant 20244038], Japan Pri-282

ority Area [Grant 20025007] and the Swiss National Science283

Foundation and the Canton of Geneva.284

References285

[1] L. Rossi, LHC Upgrade Plans: Options and Strategy, CERN-ATS-2011-286

257.287

[2] ATLAS Collaboration, G. Aad et al., The ATLAS Experiment at the CERN288

Large Hadron Collider, Jinst 3 S08004 (2008).289

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ATLAS Inner Detector Upgrade, Proceedings of Topical Workshop on291

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ATL-UPGRADE-PUB-2011-002 (2011).309

[8] Y. Takubo et al., Development of SiTCP Based DAQ System of Double-310

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[9] S. Diez, Silicon strip staves and petals for the ATLAS Upgrade tracker of312

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[10] M. Glaser et al., New Irradiation zones at the CERN-PS, Nucl. Instr. and314

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