EEL 4310 Digital Integrated Circuits - University of Florida · 2012-08-21 · EEL 4310 Digital...
Transcript of EEL 4310 Digital Integrated Circuits - University of Florida · 2012-08-21 · EEL 4310 Digital...
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
EEL 4310 Digital Integrated Circuits Fall 2012
T 10:40-11:30 (4) R 10:40-12:35 (4-5) LAR 310
Rizwan Bashirullah
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Practical Information q Instructor
§ Rizwan Bashirullah § Office: 527 NEB, § E-mail: [email protected] § Tel: (352) 392-0622, Fax: (352) 392-8381 § Office Hours: T-11:30am-12:35pm § http://www.icr.ece.ufl.edu/teaching/EEL4310-F12/
F12-4310.htm q TA/Grader
§ TBD § E-mail: TBD
q Admin § Laurie Edvardsson, 567 NEB § (352) 846-3039, [email protected]
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Class Material q Required Textbooks
§ CMOS Digital Integrated Circuits, Analysis and Design, 3rd Edition, S-M. Kang and Y. Leblebici, ISBN number: 0-07-246053-9
§ In addition, handouts developed by instructor may be downloaded from class www site
q Recommended Textbook § Physical Design of CMOS Integrated Circuits Using L-Edit, J.
P. Uyemura, ISBN number: 0-534-94326-8 § Jan. M. Rabaey, A. Chandrakasan, and B. Nikolic, “Digital
Integrated Circuits, A Design Perspective,” 2nd Edition, Prentice Hall, ISDN 0-13-090996-3-2003
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Class Material q Computer/Software required
§ Student evaluation versions may be downloaded from links on class www site
– PSPICE or LTSPiace circuit simulation software (student evaluation version)
– L-Edit Pro layout software (student evaluation version) – Workstations with CADENCE Design system.
q Journal/Conference References § Journal of Solid State Circuits (JSSC), TVLSI, CAS-I and II § ISSCC, VLSI Symposium, CICC, ISCAS
q Web Links § IEEE Explorer
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Pre-requisites and Co-requisites q Solid-state electronics
§ EEE3396 Solid State Electronics
q Circuits § EEE3304C Electronic Circuits I § EEE3701C Digital Logic and Computer Systems
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Course Objectives q To develop a basic understanding of CMOS
integrated circuits q To provide an overview of micro-electronic fabrication q To develop proficiency in analysis, design and
implementation of Digital CMOS circuits
§ This course focuses on analysis and design of modern digital circuits. Transistors are introduced and described from a digital point of view, and the performance of various circuits is derived and estimated. CMOS digital circuits will be introduced and analyzed. Students will analyze and design digital circuits using L_EDIT and PSPICE.
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Course Topics q MOS device physics, substrate bias effects, scaling,
and SPICE models (6) q MOS capacitances (1) q CMOS fabrication, process flow, and design rules (4) q Static CMOS inverter (3) q CMOS inverter dynamic response (6) q Load capacitance estimation (1) q Short channel effects on CMOS inverter (2) q Static CMOS combinational logic (7) q Ratioed logic and pass transistor logic (4) q Dynamic logic, sequential logic, and memory circuits
(5)
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Grading Policy q Homework: 20% (7) q Projects: 20% (3) q Midterms: 30% (2) q Final: 30% (1)
q Grading Scale § Note: Curves may be used if
necessary
90 -100 = A 87 - 90 = A- 83 - 87 = B+ 80 - 83 = B 77 - 80 = B- 73 - 77 = C+ 70 - 73 = C 67 - 70 = C- 63 - 67 = D+ 60 - 63 = D 57 - 60 = D- < 57 = E
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Academic Honesty q All students admitted to the University of Florida have signed a
statement of academic honesty committing themselves to be honest in all academic work and understanding that failure to comply with this commitment will result in disciplinary action.
q This statement is a reminder to uphold your obligation as a
student at the University of Florida and to be honest in all work submitted and exams taken in this class and all others.
q Students requesting classroom accommodation must first register with the Dean of Students Office. The Dean of Students Office will provide documentation to the student who must then provide documentation to the instructor when requesting accommodation.
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Expectations q Basic understanding of MOS device q CMOS processing flow q Electrical vs. physical shapes q Hierarchical design q CMOS inverter q Dynamic behavior of CMOS gates q CMOS Logic, Timing issues, Memory q Tradeoffs (noise, area, power, speed)
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
The First Computer, from this…
The BabbageDifference Engine(1832)25,000 partscost: £17,470
“Digital Integrated Circuits,” 2nd Ed. © 2003 Prentice Hall/Pearson
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
ENIAC - The first electronic computer (1946)
“Digital Integrated Circuits,” 2nd Ed. © 2003 Prentice Hall/Pearson
(Electronic Numerical Integrator and Computer)
Developed by the US Army ballistics, weather prediction, atomic-energy calculations, cosmic-ray studies, thermal ignition, random-number studies, wind-tunnel design.
-17 000 vacuum tubes -weighed 30 tons -1000 square feet of floor, -130 or 140 kilowatts -clock speed was about 100 kHz.
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
The Transistor Revolution
First transistor Bell Labs, 1948
“Digital Integrated Circuits,” 2nd Ed. © 2003 Prentice Hall/Pearson
Point contact transistor John Bardeen, Walter Brattain and William Shockley discovered the transistor effect and developed the first device in December 1947 Layers of material, bipolar silicon, PNP transistors (Note the paper clips used to make connections) This is not an integrated circuit…
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
The First Integrated Circuits Bipolar logic 1960’s
ECL 3-input Gate Motorola 1966
“Digital Integrated Circuits,” 2nd Ed. © 2003 Prentice Hall/Pearson
Breakthrough with the planar process (starting from a silicon wafer, you can fabricate several transistors at a time)
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Intel 4004 Micro-Processor 1971 4004 Intel’s first uP 1000 transistors 1 MHz operation
“Digital Integrated Circuits,” 2nd Ed. © 2003 Prentice Hall/Pearson
Every single transistor was hand drawn Picture is in NY Museum of Art 4-bits Inst and data words The idea of putting a complete computer First MOS memory, 4kbits (huge step) This really starts the IC revolution
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Intel Pentium (IV) microprocessor
“Digital Integrated Circuits,” 2nd Ed. © 2003 Prentice Hall/Pearson
2001 42 million transistors 180nm 1.5GHz
-5-10% by hand -Standard cells, design has been automated -The only way possible to handle design complexity
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Tukwila Quad-core Itanium Processor
FEB 2010 Tech node: 65nm core logic — 430 million. System interface — 157 million L3 cache — 1,420 million I/O logic — 39 million Chip total — 2.046 billion Die size is 21.5×32.5 mm or 698.75 mm²
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Transistor Counts
1,000,000
100,000
10,000
1,000
10
100
1 1975 1980 1985 1990 1995 2000 2005 2010
8086 80286
i386 i486
Pentium® Pentium® Pro
K 1 Billion Transistors
Source: Intel
Projected
Pentium® II Pentium® III
Courtesy, Intel “Digital Integrated Circuits,” 2nd Ed. © 2003 Prentice Hall/Pearson
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Moore’s Law 161514131211109876543210
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
LOG 2
OF
THE
NUMB
ER O
FCO
MPON
ENTS
PER
INTE
GRAT
ED F
UNCT
ION
Electronics, April 19, 1965.
“Digital Integrated Circuits,” 2nd Ed. © 2003 Prentice Hall/Pearson
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Moore’s Law
In 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months. He made a prediction that semiconductor technology will double its effectiveness every 18 months
“Digital Integrated Circuits,” 2nd Ed. © 2003 Prentice Hall/Pearson
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Evolution in Complexity
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Moore’s law in Microprocessors
4004 8008 8080
8085 8086 286
386 486 Pentium® proc
P6
0.001
0.01
0.1
1
10
100
1000
1970 1980 1990 2000 2010 Year
Tran
sist
ors
(MT)
2X growth in 1.96 years!
Transistors on Lead Microprocessors double every 2 years
Courtesy, Intel
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Die Size Growth
4004 8008
8080 8085
8086 286 386
486 Pentium ® proc P6
1
10
100
1970 1980 1990 2000 2010 Year
Die
siz
e (m
m)
~7% growth per year ~2X growth in 10 years
Die size grows by 14% to satisfy Moore’s Law
Courtesy, Intel
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Frequency
P6 Pentium ® proc
486 386 286 8086 8085
8080 8008 4004 0.1
1
10
100
1000
10000
1970 1980 1990 2000 2010 Year
Freq
uenc
y (M
hz)
Lead Microprocessors frequency doubles every 2 years
Doubles every 2 years
Courtesy, Intel
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Power Dissipation P6
Pentium ® proc
486 386
286 8086
8085 8080 8008
4004
0.1
1
10
100
1971 1974 1978 1985 1992 2000 Year
Pow
er (W
atts
)
Lead Microprocessors power continues to increase
Courtesy, Intel
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Power will be a major problem 5KW
18KW
1.5KW 500W
4004 8008 8080 8085
8086 286
386 486
Pentium® proc
0.1
1
10
100
1000
10000
100000
1971 1974 1978 1985 1992 2000 2004 2008 Year
Pow
er (W
atts
)
Power delivery and dissipation will be prohibitive
Courtesy, Intel
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Power density
4004 8008 8080
8085
8086
286 386 486
Pentium® proc P6
1
10
100
1000
10000
1970 1980 1990 2000 2010 Year
Pow
er D
ensi
ty (W
/cm
2)
Hot Plate
Nuclear Reactor
Rocket Nozzle
Power density too high to keep junctions at low temp
Courtesy, Intel
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Review
q Brief history of integrated circuits q Moore’s Law q IC trends
§ Transistor density doubles 18-24 mo § Frequency doubles every 2 years § Die size increases 14% every 2 years § Power dissipation…
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Cost of Integrated Circuits
q NRE (non-recurrent engineering) costs § design time and effort, mask generation § one-time cost factor
q Recurrent costs § silicon processing, packaging, test § proportional to volume § proportional to chip area
“Digital Integrated Circuits,” 2nd Ed. © 2003 Prentice Hall/Pearson
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Productivity Trends
1
10
100
1,000
10,000
100,000
1,000,000
10,000,000
2003
1981
1983
1985
1987
1989
1991
1993
1995
1997
1999
2001
2005
2007
2009
10
100
1,000
10,000
100,000
1,000,000
10,000,000
100,000,000 Logic Tr./Chip Tr./Staff Month.
x x x x
x x
x 21%/Yr. compound
Productivity growth rate
x
58%/Yr. compounded Complexity growth rate
10,000
1,000
100
10
1
0.1
0.01
0.001
Logi
c Tr
ansi
stor
per
Chi
p (M
)
0.01
0.1
1
10
100
1,000
10,000
100,000
Prod
uctiv
ity
(K) T
rans
./Sta
ff - M
o.
Source: Sematech
Complexity outpaces design productivity
Com
plex
ity
Courtesy, ITRS Roadmap
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Die Cost
Single die
Wafer
From http://www.amd.com
Going up to 12” (30cm)
“Digital Integrated Circuits,” 2nd Ed. © 2003 Prentice Hall/Pearson
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Cost per Transistor
0.0000001
0.000001
0.00001
0.0001
0.001
0.01
0.1 1
1982 1985 1988 1991 1994 1997 2000 2003 2006 2009 2012
cost: ¢-per-transistor
Fabrication capital cost per transistor (Moore’s law)
“Digital Integrated Circuits,” 2nd Ed. © 2003 Prentice Hall/Pearson
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EEL 4310 (Sec 1580) Fall 2012 Bashirullah
IC design and levels of abstraction q Specification
§ What the system is supposed to do q Architecture
§ High level of design. Any changes has large potential impact on performance
q Logic § Gates, flip-flops, connectivity
q Circuit § Transistor circuits to realize logic elements
q Device § Behavior of individual circuit elements
q Layout § Geometry used to define and connect circuit elements
q Process § Steps used to define circuit elements
EEL 4310 (Sec 1580) Fall 2012 Bashirullah
Summary q Digital integrated circuits have come a long
way and still have quite some potential left for the coming decades
q Some interesting challenges ahead § Getting a basic understanding and perspective on
the challenges and potential solutions is the purpose of this course
§ But first, start with basics – MOS transistors and operation – Process flow – CMOS gates (static and dynamic behavior) – Complex gates (design hierarchy) – Sequential logic, timing, memory