Cypress May2013 PSoC4

www.cypress.com Document No. 001-79953 Rev. *A 1

AN79953

Getting Started with PSoC 4

Author: Ronny Liu Associated Project: Yes

Associated Part Family: PSoC 4100/4200 Software Version: PSoC

Creator 2.2 SP1

Related Application Notes: click here

If you have a question, or need help with this application note, contact the author at [email protected].

AN79953 briefly introduces you to PSoC 4, an ARM

Cortex-M0 based programmable system-on-chip. In this

application note you will learn about the PSoC 4 architecture and how the ARM-based MCU subsystem works closely

with PSoC's programmable digital and analog fabric. You will learn how to leverage Cypress's powerful design tools to

start your first demo project, utilizing PSoC 4's hardware and software programmability.

Contents

Introduction ....................................................................... 1 PSoC 4 Feature Set .......................................................... 2

ARM Cortex-M0 and Memory ....................................... 2 Customizable Digital Peripherals .................................. 2 Intelligent Analog Integration ........................................ 3 Low Leakage and Mode Transition .............................. 4 System-Wide Resources .............................................. 5

PSoC Development Tools ................................................. 6 Software ....................................................................... 6 PSoC Development Kits ............................................... 7

My First PSoC 4 Design .................................................... 8 About The Design ......................................................... 8 Part 1 Create the Design ........................................... 8 Part 2 Program the Device ...................................... 12

Summary ......................................................................... 13 Related Application Notes ............................................... 13 Appendix ......................................................................... 14

PSoC Developer Resources ....................................... 14 More Details ............................................................... 14 Advanced Level .......................................................... 15

Worldwide Sales and Design Support ............................. 17

Introduction

PSoC is a true programmable embedded system-on-

chip, integrating configurable analog and digital peripheral functions, memory, and a microcontroller on a single chip. The PSoC family offers PSoC 1, PSoC 3, PSoC 4, and PSoC 5LP series of products.

PSoC contains an MCU but it does more. A typical MCU contains a processing core (such as 8051 or ARM) with a set of peripheral functions, the CPU within the MCU, which is the heart of the device. The CPU manages everything from setup to data movement to timing; without the CPU, the MCU is not an MCU.

PSoC is quite different. As shown in Figure 1, the CPU, analog, digital, and I/O are equally important resources. The heart of PSoC is not the CPU, but the systems interconnect and programmability. That being said, PSoC is a superset of a generic MCU. You can program PSoC to emulate an MCU, but you cannot program an MCU to emulate PSoC.

This application note introduces you to PSoC 4, an ARM Cortex-M0 based PSoC family. Here, you will learn about PSoC 4 and what it can do for you and your projects. You will also learn about PSoC Creator, a powerful IDE development tool for PSoC 3, PSoC 4, and PSoC 5LP.



PSoC 4 Feature Set

As shown in Figure 1, PSoC 4 has a large set of features, which include a CPU and memory subsystem, digital subsystem, analog subsystem, and system resources. The following subsections give brief descriptions of the feature set. For more information, refer to the PSoC 4 family device datasheet, technical reference manual (TRM), and application notes listed in the section Related Application Notes on page 13.

Figure 1. PSoC 4200 Architecture

PSoC 4200

32-bit

AHB-Lite

CPU Subsystem

SRAM

Up to 4 kB

SRAM Controller

ROM

4 kB

ROM Controller

FLASH

Up to 32 kB

Read Accelerator

Deep SleepHibernate

Active/Sleep

SWD

NVIC, IRQMX

Cortex

M0

48 MHzFAST MUL

System Interconnect (Single Layer AHB)

IO Subsystem

36x GPIOs

IOS

S G

PIO

(5

x p

ort

s)

Peripherals

System Resources

Power

Clock

WDTILO

Reset

Clock Control

DFT LogicTest

IMO

DFT Analog

Sleep Control

PWRSYSREFPOR LVD

NVLatches

BOD

WIC

Reset ControlXRES

Peripheral Interconnect (MMIO)PCLK

4x T

CP

WM

LC

D

2x S

CB

-I2

C/S

PI/U

AR

T

2x L

P C

om

para

tor

Capsense

Port Interface & Digital System Interconnect (DSI)

Programmable

Digital

x4

...UDB

Power Modes

CTBmSMX

SAR ADC

(12-bit)

x1

Programmable

Analog

x12x OpAmp

High Speed I/O Matrix

UDB

ARM Cortex-M0 and Memory

The PSoC 4 family has a 32-bit ARM Cortex-M0 as its processor, which uses 16-bit instruction set and a subset of the Thumb-2 instruction set. This enables fully compatible binary upward migration of the code to higher performance processors, such as Cortex-M3. The Cortex-M0 can run at up to 48 MHz, and provides 43 DMIPS performance.

The implementation of Cortex-M0 in PSoC 4 includes a hardware multiplier, which can do a 32-bit multiplication in a single cycle. The wakeup interrupt controller (WIC), that comes with an ARM-standard nested vectored interrupt controller (NVIC), enables 32 interrupt inputs.

To make the best use of system resources, PSoC 4 has embedded 4 KB of SRAM and as much as 32 KB of flash. A flash accelerator, which is tightly coupled to the CPU, can deliver 85% of single-cycle SRAM access performance, on average.

Customizable Digital Peripherals

PSoC 4 provides a rich set of digital peripherals. It delivers four universal digital blocks (UDB), two combined serial communication blocks (SCB), and four programmable timer, counter, and PWM blocks (TCPWM). All of these blocks are configurable; you can easily customize these blocks to meet different project needs.

PLD-based UDBs

The UDBs enable flexible implementation of multiple digital functions such as timers, counters, PWMs, serial communication functions, and other digital logic. These functions are available as easy-to-use PSoC Creator components; see PSoC Development Tools for more information.

Figure 2. UDB and Datapath

As shown in Figure 2, each UDB has two 12C4 PLDs, and each PLD has 12 inputs, 8 product terms, and 4 macrocell outputs. The PLDs take inputs from the routing channel and from registered or combinational sum-of-products logic to implement state machines, control for datapath operations, conditioning inputs, and driving outputs. You do not have to master any hardware description language (HDL) for using UDBs; Cypresss development tool can generate the binary for you from a schematic.

The datapath contains an 8-bit single-cycle ALU, with associated compare and condition generation circuits. It also includes a small RAM-based control store, which can dynamically select the operation to perform in a given cycle. You can implement a variety of functions, such as timer, counter, PWM, PRS, and CRC, with the datapath.

In addition to the PLD and datapath, there are the clock and reset control block and the status and control registers, which provide a way for CPU firmware to interact and synchronize with UDB operation.

There are as many as 4 UDBs in PSoC 4. All of these UDBs are connected through an intelligent digital signal interconnect (DSI) system. PLDs and datapaths can be chained to neighboring UDBs to create higher precision functions.



Configurable Serial Communication Block (SCB)

PSoC 4 has two serial communication blocks (SCB). By simply changing the configuration, an SCB can be used as a SPI, UART, or I2C. Note that configuration can happen on the fly. For example, in a design, SCB is configured as UART for bootloader; after firmware update through UART, the same interface can be configured to I2C without chip reset.

The SCB in PSoC 4 supports comprehensive serial communication protocols. Some of the features are:

Standard SPI master and slave functionality with Motorola, Texas Instruments, and National Semiconductor protocols

Standard UART functionality with SmartCard reader, local interconnect network, and IrDA protocols

Standard I2C master and slave functionality

SPI and I2C EZ mode, which allows operation without CPU intervention

Low-power (deep-sleep) mode of operation for SPI and I2C protocols (using external clock)

Refer to the technical reference manual for a complete description of each protocol.

Programmable TCPWM Block

There are four TCPWM blocks in PSoC 4, each implementing a 16-bit timer, counter, and pulse width modulation functionality using dedicated counters and corresponding logic circuits. Each TCPWM provides a pair of complementary outputs; under dead time (DT) mode, you can apply a dead band period to generate two PWM pulse with no overlapping outputs, as illustrated in Figure 3.

Figure 3. PWM Dead Time Insertion

Besides implementation of generic timer, counter, and PWM functionalities, there is a capture register to record the count value at the time of an event (which may be an I/O event), a period register to either stop or auto-reload the counter when its count reaches period registers, and a compare register to generate compare value signals that are used as PWM duty cycle outputs.

The TCPWM also has a Kill input to force outputs to a predetermined state. For example, you can use this signal in a motor control system to shut off FETs immediately for overcurrent protection, with no delay for software intervention.

Intelligent Analog Integration

The analog system includes a precision reference block, which provides precision voltage and current references. PSoC 4 also has a Continuous Time Block mini (CTBm) block, a fast 12-bit successive approximation register analog-to-digital convertor (SAR ADC), a CapSense block, an on-chip temperature sensor, and an LCD direct drive. The following sections introduce some of these blocks.

Continuous Time Block mini (CTBm)

Continuous Time Block mini (CTBm) provides continuous time functionality. It includes a switch matrix, two identical operational amplifiers (OpAmps), which can also be configured as comparators or followers, one charge pump inside each opamp, and a digital interface. Figure 4 shows the architecture of one OpAmp.

Figure 4. Operational Amplifier in CTBm

10X

1X

P1.0

AMUXBUSA

P1.6

P1.1

sarbus0

P1.2

OPAMP 0Ctbm_comp0_out

Switch: CTBm Regsiter control Switch: CTBm Regsiter + SARADC register+ DSI control

SW1

SARADC with Hardware Sequencer

PSoC 4 has one successive approximation register analog-to-digital convertor (SAR ADC). Its core is a 12-bit ADC which can achieve up to 1 Msps sample rate when running at 18 MHz.



Figure 5. SAR ADC Architecture

SARADC

VPLUS

VMINUS

SARMUX

&TempSequencer

Configure

registers

SARSEQ

SARREF

P2.0

- P

2.7

AHB, DSI

Vrefs Ref-bypassCTBm,

AMUXBUS

Data

Control

As shown in Figure 5, preceding the SARADC is the SARMUX, which can route external pins and internal signals (analog bus, temperature sensor out, CTBm, and others) to the eight internal channels of SARADC. The SARREF block provides multiple reference selections.

The sequencer controller SARSEQ is used to control the SARMUX and SARADC to do an automatic scan on all enabled channels without CPU intervention and for pre-processing, such as averaging the output data.

There are a total of eight individually configurable channels and one injection channel in this architecture. Each channel supports configurable resolution and single-ended / differential measurement options. The results are double-buffered and can be pre-processed by SARSEQ. A scan can be trigged by a variety of methods: firmware, timer, pin, or UDB. This gives you flexibility for your design.

Low Power Comparator

PSoC 4 devices have two low-power comparators. These comparators are placed in the hibernate power domain, allowing fast analog signal comparison in all system power modes except the stop mode. This block is highly configurable you can change the power mode or speed, select to enable hysteresis to deal with a noisy environment, and customize the offset trim value.

In a power-sensitive design, when the device goes into hibernate mode, you can use the low-power comparator to monitor inputs and generate an output that can be read by the CPU, as an interrupt or wakeup source.

Comprehensive CapSense Block

PSoC 4 devices have a capacitive touch-sensing feature called CapSense. This feature allows you to use the capacitive properties of your fingers to activate buttons, sliders, touch pads, and proximity sensors.

The underlying principle of CapSense is the measurement of capacitance between a plate (the sensor) and its environment. CapSense in PSoC 4 uses delta-sigma operation for increased signal-to-noise ratio (SNR >5:1). Shield electrode support is available for proximity sensing and waterproofing. All GPIO pins can be used for sensing or shielding. A pseudo random sequence (PRS) clock source comes with the CapSense module, for improved electro-magnetic interference (EMI) performance.

LCD Direct Driver

The PSoC 4 LCD segment driver uses different PWM drive modes (1/2

nd bias, 1/3

rd bias, digital correlation) to

generate either Type A or Type B drive waveforms (Type A waveforms take a single frame to maintain zero average voltage across each pixel, whereas Type B waveforms take two frames). This makes it useful even in low-power mode (for example, deep-sleep mode).

The PSoC 4 LCD driver supports four commons; any GPIO can be configured as a common or a segment.

Low Leakage and Mode Transition

PSoC 4 provides the industrys widest range of power supply, allowing full analog and digital operation from 1.71 V to 5.5 V. This low leakage device family also supports five power modes, including worlds best non-retention stop mode that consumes current down to 20 nA. See Table 1 for the power modes and transition conditions.

Table 1. Power Modes

Power Mode Description Wakeup Sources Wakeup Action

Active Primary mode of operation, all peripherals are available (programmable) N/A N/A

Sleep CPU enters sleep mode, SRAM is in retention, all peripherals are available (programmable)

Any Interrupt Interrupt

Deep-Sleep

All internal supplies are driven from a deep-sleep regulator. IMO and high speed peripherals are off. Only the low frequency (32 kHz) clock is available. Interrupts from low speed, asynchronous, or low-power analog peripherals can cause a wakeup.

Port Interrupt, low-power comparator, SCB, Watchdog timer

Interrupt

Hibernate Only SRAM and some registers are retained, most internal supplies are off. Wakeup is possible from a pin interrupt or a low-power comparator.

Port interrupt, low-power comparator

Reset

Stop All internal supplies are off. Only GPIO states are retained. Wakeup is possible from XRES or WAKEUP (P0.7) pins only.

XRES, WAKEUP Pin (P0.7)

Reset



System-Wide Resources

System wide resources include many generic features, such as watchdog timer, reset system, and more. There are also many deliberately designed features inside the power system, I/O system, clocking system, and device security system.

Power Supply and Moni toring

PSoC 4 has the industry widest operating range from a single 1.71 V to 5.5 V supply, and there are different internal regulators to support the various power modes. These include active digital regulator, quiet regulator, deep-sleep regulator, and hibernate regulator.

A remarkable feature in the block is its voltage monitoring capability. Different voltage detections include power-on reset (POR), brown-out detection (BOD), and low-voltage detection (LVD). POR circuits provide a reset pulse during the initial power ramp. BOD protects the operating / retaining logic from possibly unsafe conditions by applying reset to the device. And LVD circuit monitors external supply voltage and accurately detects depletion of the energy source.

Note that all these detection are logged in a specific register, which can help you analyze the system.

Clocking System

PSoC 4 provides two internal clock sources, a 3 to

48-MHz internal main oscillator (IMO) with 2% accuracy, and a 32-kHz internal low-speed oscillator (ILO) with 60% accuracy. PSoC Creator provides an ILO trim component

which you can use to improve ILO accuracy to 10% during run time. A 0 to 48-MHz external clock (EXTCLK) can be supplied through I/O pin (P0.6).

There are 4 peripheral clock dividers, each containing three chainable 16-bit dividers. The output can generate 16 clock sources through a multiplexer. This design makes the clocking system highly programmable, to fit most designs. See Figure 6 for the block diagram.

Figure 6. Clocking System

Device Securi ty

PSoC 4 provides a number of options for protection from unauthorized access or copying. Each row of flash has a single protection bit; these bits are stored in a supervisory flash row.

To achieve a higher security level, the debug interface can be disabled in firmware. If disabled, the only way to re-enable it is to erase the entire device, clear flash protection, and reprogram the device with new firmware that enables debugging.

Additionally, all device interfaces can be permanently disabled for applications concerned about phishing attacks due to a maliciously reprogrammed device or attempts to defeat security by starting and interrupting flash programming sequences. Note that permanently disabling interfaces makes it impossible for failure analysis, even by Cypress, so it is not recommended in most applications.

I /O System

The input/output (I/O) system provides an interface between the CPU core and peripheral components to the outside world. The flexibility of PSoC devices and the capability of its I/O to route some signals to any pin simplifies circuit design and board layout. Through an intelligent routing system, most digital blocks (except SCB), LCD, and CapSense can route its signal to any GPIO pin. Other analog blocks can also utilize this routing capability through two analog buses.

Each GPIO can be individually configured into one of eight drive modes listed in Table 2. Each GPIO pin can be individually configured to have fast or slow output slew rate and can support CMOS and LVTTL voltage level. All above control are individually programmable.

Table 2. GPIO Drive Modes

Fig. Drive Mode Data = 1 Data = 0

0 High-Impedance Analog High Z High Z

1 High-Impedance Digital High Z High Z

2 Resistive Pull-up Res 1 (5k) Strong 0

3 Resistive Pull-down Strong 1 Res 0 (5k)

4 Open Drain, Drives Low High Z Strong 0

5 Open Drain, Drives High Strong 1 High Z

6 Strong Drive Strong 1 Strong 0

7 Resistive Pull-up and Pull-down

Res 1 (5k) Res 0 (5k)



PSoC Development Tools

Software

Cypress supports PSoC 3, 4, and 5LP family products with PSoC Creator, an innovative and powerful software development IDE combined with a revolutionary graphical design editor to form a uniquely powerful hardware and software co-design environment. You can get this software at www.cypress.com/go/creator.

The following sections summarize the major PSoC Creator design concepts.

Workspace / Project A project contains multiple items that represent your design, such as schematics, design-wide resources, source code, and hex files. A project is always part of a workspace. A workspace is the top-level container within PSoC Creator; it contains one or more projects that you can open, close, and save together.

Component / Instance A component is a collection of files that define a specific function in the PSoC device. These files include such as symbol, schematic, source code, and documentation.

Examples of components include timer, counter, and multiplexer; there is a rich set of predefined, tested, and qualified components available in the Component Catalog, as Figure 7 shows. Using these components, you can quickly implement complex designs in PSoC, in both hardware and software. You can also create your own custom components, in a structured, hierarchical fashion.

A component instance is a component that has been selected from the Component Catalog and used in a design. You can have multiple copies or instances of a component in a design, as long as the selected device can support it.

Figure 7. PSoC Creator Component Catalog



Design Entry Tools PSoC Creator design entry tools enable you to create a design using abstract symbols and focus on the system rather than the low-level device details.

The text editor, or code editor, allows you to view and edit code source files.

You can always start your design by writing firmware as is done with other MCUs. However, PSoC Creator provides a more convenient graphic design environment. You can start from a hardware schematic and let PSoC Creator automatically generate most of the low-level peripheral control code. The Schematic Editor allows you to create and edit schematics for your designs, as Figure 8 shows.

The Design-Wide Resources (DWR) page provides a single location to manage all the resources in your design pins, clocks, interrupts, and more to ease your design further.

Figure 8. PSoC Creator Design Entry, Schematic Page

Build / Program / Debug When you create a project, PSoC Creator selects the tool chain (code generator, compiler, assembler, and linker) with which to build the output. PSoC Creator also enables you to program your project into a target device, and supports several programming and debug devices such as the CY8CKIT-002 MiniProg3. Finally, PSoC Creator includes a full-featured debugger interface, as shown in Figure 9.

Figure 9. Debug in PSoC Creator

PSoC Development Kits

Cypress offers several PSoC development kits, to serve a variety of devices and applications. The most general-purpose kit is the CY8CKIT-001 PSoC Development Kit, to which you can add modules to support PSoC 1, PSoC 3, PSoC 5LP, or PSoC 4 devices.

The PSoC 4 Pioneer Kit (CY8CKIT-042) is designed to support PSoC 4200, which provides you with an ultra low-cost solution to evaluate PSoC 4.



My First PSoC 4 Design

This section shows you the step-by-step process of building a real design for PSoC 4, using PSoC Creator. By taking this guided approach you will gain an introductory understanding of PSoC Creator, while you are getting a first-time look at PSoC 4 and the programmable system-on-chip concept. You will also understand how PSoC can do much more than a traditional MCU.

About The Design

This design simply blinks a full-color LED. As shown in Figure 10, a full-color LED is actually an encapsulation of three single-color LEDs, which are Red LED, Green LED, and Blue LED, separately. By changing the drive currents applied to each LED, you can change the overall color of the full-color LED according to color blending theory.

Figure 10. Driving Full-color LED with PWMs

In this design, PSoC 4 drives one of the three LEDs with constant duty cycle PWM output, and drives a second LED with a changing duty cycle PWM output. Therefore, the full-color LED changes color when it is powered up.

Part 1 Create the Design

This section takes you step-by-step on a guided tour of the design process. It starts with creating an empty project and guides you through hardware and firmware design entry. Note that this section can be skipped if you simply wish to try the project without going through the details.

1. First, install PSoC Creator 2.2 SP1 (or above) on your PC.

2. Start PSoC Creator, and from the File menu select New Project, as Figure 11 shows.

Figure 11. Select File New Project

3. Choose the project template Empty PSoC 4 (CY8C42*) Design, and give the project a name, such as My_First_Project, as shown in Figure 12. Choose

an appropriate directory for your new project. Click OK, and a project folder is generated with a baseline

set of files.

Figure 12. Create a New Empty PSoC 4 Project



4. In the Workspace Explorer window, click on the file TopDesign.cysch, which is the project schematic.

Then drag one PWM component from the Component Catalog onto the worksheet, as shown in Figure 13.

Figure 13. Drag Components to Schematic

5. Double-click the PWM component on the schematic, to change the component properties, as Figure 14 shows. In this example, change the name of this PWM to PWM_1, and select PWM mode.

Figure 14 Configure PWM

Click the PWM tab and configure the PWM properties, as shown in Figure 15. In this example, disable interrupt and all input signals, set the period value to 254 and the compare value to 127. This generates a 50% duty cycle PWM. Save the settings by clicking Apply and OK.

Figure 15. Properties of PWM_1

6. Now connect the PWM to a clock source and an output pin. Drag a Clock and Digital Output Pin onto the schematic worksheet.

7. Configure the Digital Output Pin, change its name to LED_1, and leave other settings default, as Figure 16 shows.

Figure 16. Configure Digital Output Pin



8. Configure the Clock for 100 Hz, and leave all other settings at their default values, as shown in Figure 17.

Figure 17. Configure Clock

9. Select the wire tool, as Figure 18 shows (or press 'w' as a shortcut).

Figure 18. Select the Wire Tool

Then wire the components together, as shown in Figure 19:

Figure 19. Wire the Components

10. Now write some code to blink an LED. Select Build My_First_Project from the Build menu. Notice in the

Workspace Explorer window that PSoC Creator automatically generates source code files for the PWM, Clock, and Digital Output Pin, as shown in Figure 20. These files implement all PWM, Clock, and Digital Output Pin related APIs. Refer to the component datasheet for a full description of the APIs for each component.

In this example, use two of those API functions to initialize PWM. Open main.c from Workspace Explorer and add the following code to the main() function:

void main()

{

/* Initialize PWM */

PWM_1_Start ();

PWM_1_TriggerCommand (

PWM_1_MASK, PWM_1_CMD_START);

for (;;)

{

/* Place your application code

here. */

}

}

Figure 20. Workspace Explorer



11. You are now almost done except for physical pin selection. First select the PSoC 4 device you want to use click menu Project Device Selector and select the device, as shown in Figure 21.

Figure 21. Device Selector

Refer to Figure 20, and open My_First_Project.cydwr (Design Wide Resource file) from Workspace Explorer click the Pins tab and a graphic for the selected device is displayed. Select the pin you want to use (P0[2] for this example), as shown in Figure 22.

Figure 22. Assign Physical Pin

12. You can now build this project. Click menu Build Generate Application. If there are no errors, PSoC

Creator generates several project output files. You can now go directly to set up your hardware to test the project.

Or, continue to expand the project to blink the second LED.

13. For generating a PWM with a changing duty cycle, use two PWMs, each having 50% duty cycle, but with slightly different period values. The idea is to apply XOR logic to these two PWMs; the output is still a PWM, but with a changing duty cycle.

Drag two PWMs, an XOR gate, and a Digital Output Pin from the Component Catalog onto the schematic worksheet.

14. Change the name of the Digital Output Pin to LED_2. Do the other configurations as shown in Step 7.

15. Change the name of PWMs to PWM_2 and PWM_3 separately. Configure other settings for PWM_2 exactly like Step 5. For PWM_3, the only difference is that you set the period value to 256 and set the compare value to 128.

16. Wire the components together as shown in Figure 23.

Figure 23. Final Schematic View

17. Click on My_First_Project.cydwr from the Workspace Explorer, select the Pins tab, and associate the schematic pins with the desired physical pins, as shown in Figure 24.

Figure 24. Associate the Pins



18. Now add code to your main.c to start the other PWMs. The resultant code is:

void main()

{

/* Initialize PWMs */

PWM_1_Start ();



PWM_2_Start ();



PWM_3_Start ();



for(;;)

{

/* Place your application code

here. */

}

}

19. Finally, rebuild the project as previously shown in Step 10. If you have a Cypress Pioneer Kit (CY8CKIT-042), you can run this project without any change.

Part 2 Program the Device

This section shows how to program your device with PSoC Programmer, which can also be activated through PSoC Creator.

If you are evaluating projects on Cypress Pioneer Kit (CY8CKIT-042), you only need to connect the board to your computer using the USB cable.

If you are developing on your own hardware, the following information will require you to apply a hardware debugger, for example, a Cypress MiniProg 3.

1. From the PSoC Creator Debug menu, select Select Debug Target, as shown in Figure 25.

Figure 25. Select Debug Target

2. A Select Debug Target dialog box is displayed. Click Port Acquire, as Figure 26 shows. Click OK to close

the dialog box.

Figure 26. Configure the Target

3. From the Debug menu, select Program to program

the development board with the project built in Part 1 Create the Design, as shown in Figure 27. The programming status is displayed in the PSoC Creator status bar (lower-left corner of the window), as Figure 28 shows.

Figure 27. Program the Target

Figure 28. Programming Status

4. When programming is complete, the PSoC on the kit board is automatically reset and the CPU firmware is executed.



Summary

This application note has given you a brief overview of the PSoC 4 and its development environment. The most important concept to be gained from this application note is that PSoC is more than an MCU. With PSoC, you can look beyond the processor-centered nature of an MCU, and start focusing on design problems at a system level, all within a single chip.

To learn more about PSoC 4, review the numerous PSoC Developer Resources listed in the Appendix section.

Related Application Notes

AN75320 - Getting Started with PSoC 1

AN54181 - Getting Started with PSoC 3

AN77759 - Getting Started with PSoC 5LP

AN85951 - PSoC 4 CapSense Design Guide

About the Author

Name: Ronny Liu

Title: Applications Engineer

Background: MSEE, Chinese Academy of Science

Contact: [email protected]



Appendix

PSoC Developer Resources

Many resources are available for PSoC developers, including datasheets, reference manuals, videos, application notes, and much more. The following sections list useful information for users with different purposes getting started, looking for more information, or performing an intensive learning of PSoC 4.

Gett ing Star ted

In addition to this application note, Table 3 lists other resources for those who are new to PSoC.

Table 3. Resources for Getting Started

Resource Location

PSoC 4 home page www.cypress.com Products Programmable System-on-Chip PSoC

4

Quick Start Guide PSoC Creator menu Help Documentation Quick Start Guide

Introduction Video www.cypress.com Support Videos & Technical Training

Quick Start Guide PSoC Creator includes a large collection of documentation and examples including the Quick Start Guide, as Figure 29 shows.

Figure 29. Quick Start Guide

More Details

If you want to learn more about PSoC 4, or start building a project, Table 4 lists additional resources with more information.

Table 4. Resources with More Details

Resource Location

Device Datasheet

www.cypress.com Support Documentation Datasheets

Device Errata www.cypress.com Support Documentation Errata

PSoC Creator General Help

PSoC Creator menu Help Topics

PSoC Creator Component Datasheets

www.cypress.com Support Documentation Component Datasheets

PSoC Creator System Reference Guide

PSoC Creator menu Help Documentation System Reference System Reference Guide

Application Notes

www.cypress.com Support Application Notes Programmable System-on-Chip

Knowledge Base www.cypress.com Support Knowledge Base Programmable System-on-Chip

Development Kits

www.cypress.com Support Development Kits/Boards Programmable System-on-Chip

Training www.cypress.com/go/training

Device Datasheet The device datasheet provides a summary of the features, pinouts, device-level specifications, and fixed-function peripheral electrical specifications.

Device Errata Provides details on device deviations from the device datasheet.

PSoC Creator Help Topics PSoC Creator incorporates help topics that can be useful when exploring PSoC Creator.

PSoC Creator Component Datasheets Each PSoC Creator component released by Cypress includes a component datasheet. Component datasheets provide all of the information needed to select and use a component, including functional description, API documentation, and electrical specifications. Component datasheets are available from the Component Catalog, from a components configuration dialog, and online.



PSoC Creator System Reference Guide Describes functions supplied by Cypress to provide better access to device resources such as clock, flash, and low-power modes. The functions are not part of any component but may be used by components.

General Training There is a large amount of comprehensive documentation, code examples, and video on the Cypress web site available to help you get started.

Advanced Level

Although out of the scope of this application note, the documentation listed in Table 5 is available for advanced developers.

Table 5. Resources for Advanced Developers

Resource Location

Device Technical Reference Manual, Registers

www.cypress.com Support Documentation Technical Reference Manuals

PSoC Creator Component Author Guide

PSoC Creator menu Help Documentation Component Author Guide

Technical Reference Manual (TRM) Describes in detail all peripheral functions, with register-level descriptions. The documentation is divided into two parts: the Architecture TRM and the Register TRM.

PSoC Creator Component Author Guide (CAG) Provides information on how to create your own custom components.



Document History

Document Title: Getting Started with PSoC 4 AN79953

Document Number: 001-79953

Revision ECN Orig. of Change

Submission Date Description of Change

** 3881879 RLIU 1/24/2013 New Application Note

*A 3968932 RLIU 4/11/2013 Demo project changed to leverage Pioneer kit.

Added architecture introduction.



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Cypress Semiconductor Corporation, 2013. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. This Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement.

Cypress May2013 PSoC4

Documents

Transcript of Cypress May2013 PSoC4