CSET 4650 Field Programmable Logic Devices Dan Solarek Logic Implementation Using Programmable ROMs.
9
CSET 4650 CSET 4650 Field Programmable Logic Devices Field Programmable Logic Devices Dan Solarek Dan Solarek Logic Logic Implementation Implementation Using Programmable ROMs Using Programmable ROMs
-
Upload
emery-hoover -
Category
Documents
-
view
216 -
download
0
Transcript of CSET 4650 Field Programmable Logic Devices Dan Solarek Logic Implementation Using Programmable ROMs.
CSET 4650 CSET 4650 Field Programmable Logic DevicesField Programmable Logic Devices
Dan SolarekDan SolarekDan SolarekDan Solarek
Logic ImplementationLogic ImplementationUsing Programmable ROMsUsing Programmable ROMs
2
Programmable Read Only MemoryProgrammable Read Only Memory
A ROM is a memory device A ROM is a memory device that holds a fixed, addressable that holds a fixed, addressable data setdata set
A PROM may be programmed A PROM may be programmed by the designerby the designer
PROM
UV erasable
3
Programmable Read Only MemoryProgrammable Read Only Memory
Typical uses include:Typical uses include:Code convertersCode converters
Character generatorsCharacter generators
Data storage tablesData storage tables
Program storesProgram stores
Loaded with tabular data – Loaded with tabular data – not Boolean equationsnot Boolean equations
e.g., a truth table
4
Conceptual PROM ArchitectureConceptual PROM Architecture
32x8 PROM32x8 PROM5-to-32 5-to-32 decoderdecoder
8 OR gates 8 OR gates with 32 inputswith 32 inputs
32x8 internal 32x8 internal programmable programmable connectionsconnections
programmable OR connections
output word (8-bits)
k = 5 2k = 32
5
Conceptual PROM ArchitectureConceptual PROM Architecture
A PROM has a fixed AND array (that A PROM has a fixed AND array (that decodes the memory address) followed by decodes the memory address) followed by a programmable OR array (outputs)a programmable OR array (outputs)For each of a given set of input For each of a given set of input combinations (address), it generates a combinations (address), it generates a multi-bit value which has been multi-bit value which has been programmed into the deviceprogrammed into the device
6
Using PROMs as PLDsUsing PROMs as PLDs
The output functions need to be expressed The output functions need to be expressed in canonical minterm form for PROM in canonical minterm form for PROM implementationimplementation
every input variable appears in each product every input variable appears in each product term in its true or inverted formterm in its true or inverted form
Each minterm is used to represent an Each minterm is used to represent an address address Each address generates a multi-bit outputEach address generates a multi-bit output
7
Realistic PROM ArchitectureRealistic PROM Architecture
A PROM has a fixed AND A PROM has a fixed AND array and a programmable array and a programmable OR arrayOR array
Remember, we are only Remember, we are only programming the programming the CONNECTIONS to the OR CONNECTIONS to the OR gatesgates
AND gate connections are AND gate connections are all possible combinationsall possible combinations
decoder logic
8
Simplified PROM ArchitectureSimplified PROM Architecture
Inputs A and BInputs A and Btrue and invertedtrue and inverted
Outputs Y and ZOutputs Y and Ze.g., two functionse.g., two functions
Programmable Programmable connections to OR connections to OR gatesgates
0 0
0 1
1 0
1 1
9
Example 7-11 from SandigeExample 7-11 from Sandige
Binary to hex character Binary to hex character generatorgenerator
Using a seven-segment Using a seven-segment display device and the display device and the character scheme at rightcharacter scheme at right
OA
OC
OD
OE
OB
OF
OG
