Control of Three-phase Bidirectional Current Source...

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2015.2503352, IEEETransactions on Power Electronics

Control of Three-phase Bidirectional CurrentSource Converter to Inject Balanced

Three-phase Currents under Unbalanced GridVoltage Condition

Vishal Vekhande, Student Member, IEEE, Kanakesh V. K. and Baylon G. Fernandes, Member, IEEE

Abstract—A single-stage, bidirectional, current source con-verter (CSC) topology to interface a DC microgrid with anAC grid is reported in the literature. In this topology, undera balanced grid voltage condition, the DC-link inductor currentcan be regulated over a wide range—from zero to rated value—while the AC-side current has low harmonic distortion. However,unbalanced grid voltages result in second harmonic pulsationin the current and power on the DC-side of the converter. Inaddition, the AC-side currents will be unbalanced due to thepresence of a negative sequence component. This would result inundesired tripping of the converter if one of the phase currentsexceeded its rated value. Various control loop structures for theoperation of voltage source converter under unbalanced gridvoltage conditions are reported in the literature. However, useof similar control loop structures for CSC may lead to unstableoperation. Therefore, a control scheme to inject balanced three-phase currents into the AC grid under an unbalanced grid voltagecondition is proposed in this paper. The stability of the proposedcontrol scheme is studied using a small-signal model of theconverter. Performance of the proposed control scheme is studiedusing MATLAB\Simulink, and is experimentally validated.

Index Terms—Bidirectional, Current source converter, DC-AC,Stability, Unbalanced grid

I. INTRODUCTION

The voltage source converter (VSC) is a converter topologythat is commonly used to interface a DC microgrid with autility AC grid that has a bidirectional power flow capability.However, reliability of this converter is low due to the presenceof a large electrolytic capacitor across the DC-link [1]–[6]. Film capacitor based VSC has lower energy density,higher cost and/or employ additional active ripple reductioncircuits [5], [6]. Further, VSC requires an additional DC-DCboost converter to interface a low-voltage DC microgrid withan AC grid [7], [8]. In contrast, a conventional current sourceinverter (CSI) does not require any electrolytic capacitor forenergy storage, and an additional DC-DC converter for DC-side voltage boosting. Therefore, CSI exhibits higher reliabilityand power density than the VSC + DC-DC boost converter

This work was partially supported by the Ministry of New and RenewableEnergy, Government of India under the project “National Centre for Photo-voltaic Research and Education.”

Vishal Vekhande, Kanakesh V. K. and B. G. Fernandes are withthe Department of Electrical Engineering, Indian Institute of Technol-ogy Bombay, Powai, Mumbai-400076, India (phone: 91-22-25767428; fax:91-22-25723707; e-mail: [email protected]; [email protected];[email protected]).

Fig. 1. Bidirectional current source converter.

topology, with comparable efficiency [8]–[11]. However, nei-ther the DC-link inductor current of the CSI nor the DCmicrogrid bus voltage can be reversed. Therefore, this inverterhas a unidirectional power flow capability. In [12], it isproposed to connect an additional DC-DC converter on theDC microgrid side to allow a reversal of the DC-link inductorcurrent. These multiple conversion stages reduce the overallefficiency and reliability of the system.

A single-stage, current source converter (CSC) topologyshown in Fig. 1 is proposed for battery charging/ discharging,and DC motor drive application in [13]. In [14], the use of thisconverter topology as an interface between the DC microgridand the utility AC grid is suggested. In this converter, powerflow can be reversed from the AC grid to the DC microgridby reversing the DC-link inductor current. Further, this DC-link inductor current can be regulated over a wide range—from zero to rated value—while the AC-side current has lowharmonic distortion.

The presence of single-phase loads, and unsymmetricalfaults cause unbalance in grid voltages at the distribution level.These unbalanced grid voltages result in a second harmonicpulsation in the power, voltage and current on the DC-sideof the converter [15]–[22], [24]. This pulsation in the current



Fig. 2. Limiting voltage profile at the point of common coupling [28].

results in a fundamental frequency negative sequence and thirdharmonic positive sequence currents on the AC-side [15], [18],[21], [26]. The converter current will be unbalanced due tothe presence of this negative sequence component. Under suchcondition, the converter would trip if one of the phase currentsexceeded the rated value. This may cause system instabilityand cascaded failure of the power system if the generation orload on the DC-side is significantly high [27]. Therefore, therecent grid codes have made it mandatory that the converterstays operational if the grid voltage is above the limits shownin Fig. 2 [24], [28], [29].

The operation of VSC under unbalanced grid voltagecondition is well reported in the literature [16]–[24], [30],[31]. The control strategies reported in [16]–[20], [30], [31]are based on the dual-frame controller: one controller in thepositive and the other in the negatively rotating synchronousreference frames. A controller based on the direct powercontrol (DPC) technique is reported in [21]–[23], whereindecomposition of positive and negative sequence componentsis not required. In these schemes, the control target is eitherto maintain the active power constant or balance the gridcurrents. In [24], it is proposed to inject zero sequence currentinto the grid, using a four-leg inverter. This offers increasedcontrol flexibility under unbalanced grid voltage condition.In all the above schemes, the undesired second harmonicpulsation in the control variables is eliminated using eithera low-pass/notch filter, or suitably designing the proportional-integral (PI) regulator [16], [17], [32]. Moreover, the modu-lation index is calculated by dividing the dq-axis referencevoltage magnitudes by actual DC-link voltage vDC [17], [20].In case of CSC, similar control loop structures may lead tounstable operation, as explained in this paper.

Although, the low-voltage-ride-through capability of CSCsunder balanced grid voltage sags is well discussed in the litera-ture [27], [29], [33]–[37], the control of CSC under unbalancedgrid voltage conditions has not received much attention fromresearchers [32]. Control of CSC with a CL filter at the output,is a dual of VSC with an LC filter [38], [39]. However,CSC has lower phase margin as compared to VSC [39].

This margin further reduces due to the low-pass and notchfilters, used to eliminate the second harmonic pulsation in thecontrol variables [16]. Therefore, stability of the control loopstructure should be carefully examined when CSC is controlledusing the similar control loop structures discussed above forVSC. In [15], it is proposed to generate unbalanced switchingpattern under unbalanced grid voltage condition for a cur-rent source rectifier (CSR) application. In [40], positive andnegative sequence modulation indices with appropriate phaseangles are generated for a CSC interfacing a superconductingmagnetic energy storage system with an unbalanced grid. Inthese schemes, the active power is maintained constant, whichresults in unbalanced grid currents. Two control strategies areproposed in [32] for a CSI that interfaces renewable energysources to the grid. The first control strategy aims at injectingbalanced three-phase currents to the grid, while either active orreactive powers are maintained constant in the second controlstrategy. The control loop structure to regulate the oscillatoryDC-link current and its stability are not discussed in [32].

In this paper, a control strategy is proposed to injectbalanced three-phase currents into the utility AC grid underunbalanced grid voltage conditions. However, injection ofbalanced AC currents into unbalanced grid voltages introducesa 100 Hz oscillation in an instantaneous active power. As aresult, it is impossible to make the DC-link inductor currentconstant. Therefore, the DC-link inductor current is controlledaround an average value. Further, it is proposed to eliminatethe negative sequence current component from the grid currentby introducing a second harmonic oscillation in the modulationindex. The desired amplitude and phase of this oscillation arederived using PI regulators, such that the negative sequenced and q axes current components observed in the negativelyrotating synchronous reference frame are regulated to zero.Further, a small-signal model of the CSC is developed. Thestability of the proposed control loop is studied using thismodel of the converter.

The key contributions of this paper are

• A control strategy is proposed for CSC to inject balancedthree-phase currents into the utility AC grid under unbal-anced grid voltage conditions. Though a control strategyis proposed in [32] for a CSI to inject balanced three-phase currents into the unbalanced grid, the control loopstructure to regulate the oscillatory DC-link current is notshown. Owing to the inherent lower phase margin of CSCcompared to VSC [39], and the delays introduced by thefilters in the control loop [16], the careful evaluation ofthe stability of this closed loop controller is important.For the same reasons, it is not possible to control the CSCusing the similar control loop structures that of VSC.

• In the proposed control strategy the negative sequencecurrent component is eliminated from the grid current.

• The effectiveness of the proposed control scheme is testedbased on the percentage unbalance in the grid currents,grid current THD, peak-to-peak ripple in the DC-linkcurrent, current stress and voltage stress on the devicesat various unbalance levels in the grid voltages.

• A small-signal model of the CSC is developed. It is



TABLE ICONVERTER SWITCHING STATES: INVERTER MODE OF OPERATION

Switching state Switches iac ibc icci1i S1, S6 +iDC 0 −iDC

i2i S2, S6 0 +iDC −iDC

i3i S2, S4 −iDC +iDC 0i4i S3, S4 −iDC 0 +iDC

i5i S3, S5 0 −iDC +iDC

i6i S1, S5 +iDC −iDC 0i0ai S1, S4 0 0 0i0bi S2, S5 0 0 0i0ci S3, S6 0 0 0

Fig. 3. CSI and 3SW-CSR space vectors.

useful to evaluate the stability of the conventional andthe proposed control loops.

This paper is organized as follows: The operation of thethree-phase bidirectional CSC topology is explained in Sec-tion II. A basic control strategy that does not provide anycompensation during unbalanced grid voltage conditions isexplained in Section III. In Section IV, the possible controlloop structures are evaluated under unbalanced grid voltageconditions using a small-signal model of the converter. Thecontrol scheme proposed for the injection of balanced three-phase grid currents is explained in Section V. The performanceof the control schemes is studied using MATLAB\Simulink,and is experimentally validated in Sections VI and VII, re-spectively. Finally, the conclusions of the paper are given inSection VIII.

II. THREE-PHASE BIDIRECTIONAL CURRENT SOURCECONVERTER

The three-phase, bidirectional current source convertertopology is shown in Fig. 1. This converter is a combinationof a three-phase CSI, and a three-phase, three-switch currentsource rectifier (3SW-CSR) [13], [14], [41]. It has two broadmodes of operation, namely, inverter and rectifier.

Inverter mode: Switches S1 to S6 constitute the three-phaseCSI. These switches provide the forward path for the DC-linkinductor current iDC . Switches S1, S2 and S3 are known asupper group switches, while S4, S5 and S6 are known as the

TABLE IICONVERTER SWITCHING STATES: RECTIFIER MODE OF OPERATION

Switching state Switches iac ibc icci1r Sc, Sa −iDC 0 +iDC

i2r Sc, Sb 0 −iDC +iDC

i3r Sa, Sb +iDC −iDC 0i4r Sa, Sc +iDC 0 −iDC

i5r Sb, Sc 0 +iDC −iDC

i6r Sb, Sa −iDC +iDC 0i0ar Sa 0 0 0i0br Sb 0 0 0i0cr Sc 0 0 0

lower group switches. At any instant, one switch from theupper group and one switch from the lower group conductin order to avoid the open circuit of the DC-link inductorLDC . Current iDC is controlled using the current space vectormodulation (SVM) technique [42]–[44]. There are nine validswitching states, as given in Table I. The space vector diagramis shown in Fig. 3. Switching states i0ai, i0bi and i0ci are shoot-through states, and switching states i1i to i6i are poweringstates.

Rectifier mode: Switches Sa to Sc constitute the 3SW-CSR. These switches provide the reverse path for iDC . At anyinstant, at least one switch conducts. Current iDC is controlledusing the SVM technique [41], [45]. There are nine validswitching states, as given in Table II and shown in Fig. 3. Thesingle switch conduction states i0ar, i0br and i0cr provide afreewheeling path for iDC . Switching states i1r to i6r are thepowering states.

III. CONTROL STRATEGY

Fig. 4 shows the block diagram of the control strategyto regulate the DC-link inductor current. The phase angleinformation of the AC grid voltage is obtained using a three-phase phase lock loop (PLL). Depending on the directionand magnitude of the desired active power flow, the DC-linkcurrent reference i∗DC is generated by an external controller(not shown in the block diagram.) The error between i∗DC

and the sensed inductor current iDC is processed by the PIregulator. The output of the PI regulator is the d-axis referencecurrent i∗d of the converter. The external controller also setsthe q-axis reference current value i∗q based on the desiredreactive power flow. The current references i∗d and i∗q arethen transformed from a synchronous to a stationary referenceframe. Magnitude and angular position of the reference currentspace vector |i∗| and γ respectively, are calculated using thestationary frame reference currents i∗α and i∗β . Further, themodulation index m is calculated by dividing the referencecurrent space vector magnitude |i∗| by the actual DC-linkcurrent iDC , as shown in Fig. 4.

The modulation index m and the angular position γ are fedto the converter SVM block. This block computes the activetime periods of the switching states, and generates the gatesignals. The inverter section is activated if the reference DC-link current i∗DC is positive, and gate pulses for switches S1 toS6 are generated. In this case, the gate pulses of switches Sa

to Sc are disabled. The rectifier section, which generates gatepulses for switches Sa to Sc is activated if i∗DC is negative. In



Fig. 4. Block diagram of the control scheme to regulate the DC-link inductor current.

this case, gate pulses of switches S1 to S6 are disabled. Thiseliminates the need for a multi-step commutation process [46],[47].

Unlike that in VSC, in this converter, the maximum valueof the reactive power that can be supplied depends on theamount of the active power exchanged with the grid [14], [48].Further, the 3SW-CSR can have a maximum displacementangle of ±30o only [46], [49]. Owing to this restricted reactivepower transfer capability, only a unity power factor operationis considered in further sections.

IV. CONTROL OF THE CONVERTER UNDER UNBALANCEDGRID VOLTAGE CONDITIONS

In this section, possible control loop structures are evaluatedunder unbalanced grid voltage conditions. Detailed derivationsof the small-signal models used in this section are given inAppendixes.

A. No compensation during unbalanced grid voltage condi-tions

The control strategy presented in Section III, does notprovide any compensation during unbalanced grid voltageconditions. Therefore, the converter draws/injects pulsatingactive and reactive powers from/to the grid. The instantaneousactive power p (reactive power q) can be represented as asummation of a constant value Po (Qo) and two orthogonal,second harmonic oscillating signals having peak values Pc andPs (Qc and Qs) [16], [22]–[25] as:

p = Po + Pc cos(2ωt) + Ps sin(2ωt) (1)

andq = Qo +Qc cos(2ωt) +Qs sin(2ωt) (2)

In this case, although the average value of iDC is the sameas its reference value, it has a second harmonic pulsation,proportional to the pulsation in the active power. Hence, itcan also be represented as a summation of a constant valueIDC and two orthogonal, second harmonic oscillating signalshaving peak values Idcc and Idcs as,

iDC = IDC + Idcc cos(2ωt) + Idcs sin(2ωt) (3)

Fig. 5 shows the nature of various control loop signals undersuch operating condition. The presence of second harmonic

pulsation in e, i∗d and |i∗| can be observed. Therefore, |i∗|can also be represented as a summation of a constant valueI∗ and two orthogonal, second harmonic oscillating signalshaving peak values I∗c and I∗s as,

|i∗| = I∗ + I∗c cos(2ωt) + I∗s sin(2ωt). (4)

The equation for a grid current space vector can be written as,

ig = m iDC ej(ωt+ϕ) (5)

where ϕ is the power factor angle and m is,

m =|i∗|iDC

. (6)

Using (3), (4) and (6) in (5) gives,

ig =

[I∗ + I∗c cos(2ωt) + I∗s sin(2ωt)

IDC + Idcc cos(2ωt) + Idcs sin(2ωt)

]× [IDC + Idcc cos(2ωt) + Idcs sin(2ωt)] ej(ωt+ϕ). (7)

After simplification, the grid current space vector can beexpressed as,

ig = I∗ ej(ωt+ϕ) +I∗c2

[e−j(ωt−ϕ) + ej(3ωt+ϕ)

]−I∗s

2

[e−j(ωt−ϕ+π

2 ) + ej(3ωt+ϕ+π2 )]. (8)

The following components are present in the above equation:

• Fundamental frequency positive sequence• Fundamental frequency negative sequence• Third harmonic positive sequence.

The fundamental frequency negative sequence componentcauses unbalance in the grid currents. The third harmonicpositive sequence component contributes to increase in theTHD.

In addition, the stability of the control scheme shown inFig. 5 is studied using the small-signal model of the converter.The detailed analysis is given in Appendix A. Figs. 6(a) and(b) show the root loci of the closed-loop transfer function ofthe controller for the inverter and rectifier modes of operation,respectively. It can be observed that this control scheme isstable when the proportional gain KP>0.6, and KP>0, forthe inverter and rectifier modes of operation, respectively.



Fig. 5. Nature of various control loop signals under an unbalanced grid voltage condition.

(a)

(b)

Fig. 6. Root loci of the closed-loop transfer function of the controller for thecontrol scheme without unbalanced grid voltage compensation for (a) Inverterand (b) Rectifier modes of operation.

B. Modified control scheme to inject balanced three-phasegrid currents

It can be concluded from the above discussion that the un-controlled second harmonic oscillation in the reference currentspace vector |i∗| leads to a fundamental frequency negativesequence and third harmonic positive sequence componentsin the grid currents. This second harmonic oscillation in |i∗|is due to the oscillations in various control loop signals thatare caused by the oscillating DC-link current iDC . Theseoscillations in the control loop signals can be eliminated byfiltering the iDC signal using a 100 Hz notch filter, as shownin Fig. 7. With this modification, (4) changes to,

|i∗| = I∗. (9)


ig =

[I∗

IDC + Idcc cos(2ωt) + Idcs sin(2ωt)

]× [IDC + Idcc cos(2ωt) + Idcs sin(2ωt)] ej(ωt+ϕ). (10)

Further simplification gives,

ig = I∗ ej(ωt+ϕ). (11)

It can be concluded from the above equation that the gridcurrents are perfectly balanced, and free from harmonic com-ponents.

Further, the stability of the modified control scheme shownin Fig. 7 is studied using the small-signal model of theconverter. The detailed analysis is given in Appendix B.Figs. 8(a) and (b) show the root loci of the closed-loop transferfunction of the controller for the inverter and rectifier modes ofoperation, respectively. During the inverter mode of operation,at least one pole exists on the right hand side (RHS) of theimaginary axis for any finite value of KP . Therefore, themodified control scheme is unstable in the inverter mode ofoperation, while it is stable for the rectifier mode of operation.

From the discussions in the Subsections IV-A and IV-B, thefollowing points can be noted:

• The control scheme without unbalance compensationresults in unbalanced grid currents under unbalanced gridvoltage conditions. The operation is stable during inverterand rectifier modes of operation.

• The modified control scheme produces balanced currentsunder unbalanced grid voltage conditions. However, it isunstable in the inverter mode of operation.

• In both the control schemes, the output of the PI regulatoris the reference d-axis current i∗d. The modulation indexm is calculated by dividing the reference current spacevector magnitude |i∗| by the actual DC-link current iDC .The difference between these two control schemes is thepresence of a 100 Hz notch filter in the feedback loop inthe case of the modified control scheme.

• Therefore, it can be concluded that the operation becomesunstable because of the notch filter when the

(1

iDC

)term

is used to generate the modulation index.

This limitation is addressed in the following control scheme.



Fig. 7. Block diagram of the modified control scheme to inject balanced three-phase grid currents under unbalanced grid voltage conditions.

(a)

(b)

Fig. 8. Root loci of the closed-loop transfer function of the controller forthe modified control scheme to inject balanced three-phase grid currents for(a) Inverter and (b) Rectifier modes of operation.

V. PROPOSED CONTROL SCHEME TO INJECT BALANCEDTHREE-PHASE GRID CURRENTS

In the control schemes explained in previous sections, theoutput of the PI regulator is the reference d-axis current i∗d.Instead, if it is the reference modulation index, then the

(1

iDC

)term in the control loop can be avoided. The resulting blockdiagram is shown in Fig. 9. The error between i∗DC and thefiltered DC-link current IDC is processed by the PI regulatorPI1. The output of PI1 is the d-axis modulation index m∗

d.The q-axis modulation index m∗

q is set to zero to achieve theunity power factor operation. The modulation index M and

the angular position of the modulation signal γ are calculatedusing the stationary frame modulation indices m∗

α and m∗β . In

the proposed scheme, although the current iDC has a secondharmonic pulsation under unbalanced grid voltage conditions,the control loop signals e, m∗

d and M are constant due tothe presence of a 100 Hz notch filter in the feedback loop.However, the modulation index m should pulsate to producebalanced three-phase currents. The mathematical expressionfor such a pulsating m is developed in Subsection V-A.

A. Mathematical expression for the modulation index m

In (10), the first term represents the modulation index m.Therefore,

m =I∗

IDC + Idcc cos(2ωt) + Idcs sin(2ωt). (12)

In the modified control scheme, the instantaneous value of mis calculated by solving the equation above by using instan-taneous numerical values of its numerator and denominatorterms. However, it is also possible to find the mathematicalexpression for m. It is derived as follows.

Using the power series theorem, (12) can be written as,

m = I∗{ 1

IDC− [Idcc cos(2ωt) + Idcs sin(2ωt)]

I2DC

+[Idcc cos(2ωt) + Idcs sin(2ωt)]

2

I3DC

− [Idcc cos(2ωt) + Idcs sin(2ωt)]3

I4DC

+ . . .}. (13)

After rearranging the terms, m can be expressed as,

m = M +Mc cos(2ωt) +Ms sin(2ωt)

+Mc4 cos(4ωt) +Ms4 sin(4ωt) + . . . (14)

where,

M = I∗[

1

IDC+

I2dcc2 I3DC

+I2dcs2 I3DC

],

Mc = I∗[− IdccI2DC

− 3

4

I3dccI4DC

− 3

4

Idcc I2dcsI4DC

+ . . .

],

Ms = I∗[− IdcsI2DC

− 3

4

I3dcsI4DC

− 3

4

I2dcc IdcsI4DC

+ . . .

],



Fig. 9. Block diagram of the proposed control scheme to inject balanced three-phase grid currents under unbalanced grid voltage conditions.

Mc4 = I∗[

I2dcc2 I3DC

− I2dcs2 I3DC

+ . . .

],

Ms4 = I∗[Idcc IdcsI3DC

+ . . .

].

The complete derivation process is given in Appendix D.From (14), it can be concluded that the modulation index

m should have higher order harmonic terms in addition toa constant value M , to compensate for the second orderoscillation in iDC . Such a modulation index will producebalanced grid currents. The coefficients Mc4 and Ms4 arevery small, because their expression contains the product oftwo AC terms in the numerator and the third power term ofthe average DC-link current in the denominator. Therefore,neglecting these terms, the expression for the modulation indexm can be written as,

m = M +Mc cos(2ωt) +Ms sin(2ωt) (15)

The negative sequence components can be eliminated fromthe grid currents if the modulation index follows the patternrepresented by (15). In this equation, the value of M isdetermined using the control loop structure explained earlier,and shown in Fig. 9. The necessary condition for Mc and Ms

to eliminate the negative sequence components is derived inSubsection V-B.

B. Necessary condition for Mc and Ms to eliminate thenegative sequence components from grid currents


ig = [M +Mc cos(2ωt) +Ms sin(2ωt)]

×[IDC + Idcc cos(2ωt) + Idcs sin(2ωt)] ej(ωt+ϕ). (16)

After simplification and rearranging the terms, the expressionfor the grid current space vector can be written as,

ig =

[M IDC +

Mc Idcc2

+Ms Idcs

2

]ej(ωt+ϕ)

+

[M Idcc

2+

Mc IDC

2

]e−j(ωt−ϕ)

−[M Idcs

2+

Ms IDC

2

]e−j(ωt−ϕ+π

2 )

+

[M Idcc

2+

Mc IDC

2

]ej(3ωt+ϕ)

−[M Idcs

2+

Ms IDC

2

]ej(3ωt+ϕ+π

2 )

+Mc Idcc

4

[e−j(3ωt−ϕ) + ej(5ωt+ϕ)

]−Mc Idcs

4

[e−j(3ωt−ϕ+π

2 ) + ej(5ωt+ϕ+π2 )]

−Ms Idcs4


]−Ms Idcc

4

[e−j(3ωt−ϕ+π

2 ) + ej(5ωt+ϕ+π2 )]. (17)

The complete derivation process is given in Appendix E. Thefollowing components are present in the above equation:

• Fundamental frequency positive sequence• Fundamental frequency negative sequence• Third harmonic positive sequence• Third harmonic negative sequence• Fifth harmonic positive sequence.

The fundamental frequency negative sequence components canbe eliminated from the grid currents if,

Mc = −M IdccIDC

and Ms = −M IdcsIDC

. (18)



Using (18) in (17) gives,

ig =

[M IDC − M I2dcc

2 IDC− M I2dcs

2 IDC

]ej(ωt+ϕ)

−M I2dcc4 IDC


]+M Idcc Idcs

4 IDC

[e−j(3ωt−ϕ+π

2 ) + ej(5ωt+ϕ+π2 )]

+M I2dcs4 IDC


]+M Idcs Idcc

4 IDC

[e−j(3ωt−ϕ+π

2 ) + ej(5ωt+ϕ+π2 )]. (19)

Interestingly, by comparing (17) and (19), it can be noted thatin addition to the fundamental frequency negative sequencecomponents, the third harmonic positive sequence componentsalso get eliminated from the grid currents when Mc andMs satisfy the conditions given in (18). However, a smallpercentage of the third harmonic negative sequence and fifthharmonic positive sequence components would be present inthe grid currents.

C. Closed-loop control of negative sequence currents

The required values of Mc and Ms to eliminate the negativesequence components from the grid currents can be calculatedusing (18). It is also possible to generate these values usingclosed-loop controllers that regulate the dq-axes fundamentalfrequency negative sequence currents i−d and i−q to zero.For this, it is necessary to find the correlation between thequantities Mc, Ms, i−d and i−q . It is derived as follows.

Equation (17) represents the grid currents in the stationaryreference frame. The expression for the grid current spacevector in the negatively rotating synchronous reference framecan be written, by multiplying (17) with ej(ωt), as,

ig|n =

[M IDC +

Mc Idcc2

+Ms Idcs

2

]ej(2ωt+ϕ)

+

[M Idcc

2+

Mc IDC

2

]ej(ϕ)

−[M Idcs

2+

Ms IDC

2

]ej(ϕ−

π2 )

+

[M Idcc

2+

Mc IDC

2

]ej(4ωt+ϕ)

−[M Idcs

2+

Ms IDC

2

]ej(4ωt+ϕ+π

2 )

+Mc Idcc

4


]−Mc Idcs

4

[e−j(4ωt−ϕ+π

2 ) + ej(6ωt+ϕ+π2 )]

−Ms Idcs4


]−Ms Idcc

4

[e−j(4ωt−ϕ+π

2 ) + ej(6ωt+ϕ+π2 )]. (20)

In the above equation, the second and the third terms corre-spond to the dq-axes fundamental frequency negative sequencecurrents. Therefore, these negative sequence currents can be

Fig. 10. Root locus of the closed-loop transfer function of the controller usingthe proposed control scheme to inject balanced three-phase grid currents forinverter and rectifier modes.

expressed as,

i−d =

[M Idcc

2+

Mc IDC

2

]cosϕ

−[M Idcs

2+

Ms IDC

2

]cos

(ϕ− π

2

)(21)

and

i−q =

[M Idcc

2+

Mc IDC

2

]sinϕ

−[M Idcs

2+

Ms IDC

2

]sin

(ϕ− π

2

). (22)

In the above two equations, it can be observed that at unitypower factor operation, the term Mc influences the magnitudeof i−d , and the term Ms affects the magnitude of i−q only.Therefore, the second harmonic oscillation required in order toobtain balanced grid currents, can be introduced in the modu-lation index m using two orthogonal signals [Mc cos(2ωt)] and[Ms sin(2ωt)], as shown in Fig. 9. The value of the amplitudeMc is obtained using the PI regulator PI2 that regulates the d-axis negative sequence current i−d to zero. Similarly, amplitudeMs is generated by PI3 that regulates i−q to zero.

The stability of the proposed control scheme is studied usingthe small-signal model of the converter. A detailed analysis isgiven in Appendix C. Identical closed-loop transfer functionsare obtained for the inverter and rectifier modes of operation.The root locus of the closed-loop transfer function of thecontroller for the inverter and rectifier modes of operation isshown in Fig. 10. It can be observed that this control schemehas stable operation for the condition 0<KP<∞.

Further, stability of the control loops used to regulate thenegative sequence currents i−d and i−q is also studied. Adetailed analysis is given in Appendix F. Both the controllershave identical root loci as shown in Fig. 11. It can be observedthat these controllers have stable operation for the condition0<KP<0.1.

VI. SIMULATION RESULTS

A 10 kVA converter interfacing a 415 V, 50 Hz, 3-phaseAC grid with a 300 V DC microgrid is simulated usingMATLAB\Simulink. The simulation parameters are given



Fig. 11. Root locus of the closed-loop transfer function of the controllerused to regulate the negative sequence currents i−

dand i−q .

TABLE IIISIMULATION PARAMETERS

Rated power 10 kVADC microgrid voltage, vBUS 300 VGrid line voltage, Vg 415 VDC inductor, LDC 5 mHFilter inductor, Lf 3 mHFilter capacitor, Cf 30 µFSwitching frequency 15 kHz

in Table III. Here, the DC microgrid bus voltage vBUS isemulated using a DC source.

A. No compensation during unbalanced grid voltage condi-tions

The performance of the control strategy presented in SectionIII, and shown in Fig. 4 is studied under the balanced gridvoltage condition, first. The current reference i∗q is set equalto zero. Figs. 12(a) and (b) show the variation of iDC for theramp changes in its reference value, in inverter and rectifiermodes of operation, respectively. For these modes of operation,the grid phase voltage and current are shown in Figs. 12(c)and (d). It can be seen that the system is capable of operatingat a high power factor in both the modes.

However, this control strategy can regulate the DC-linkcurrent only. Under an unbalanced grid voltage condition,though the average value of the DC-link current is maintained,it has a second harmonic oscillation as seen in Figs. 13(b)and (c). If the modulation index is generated using the controlblock diagram that is shown in Fig. 4, the grid currents will beunbalanced, as seen in Figs. 13(d) and (e). The grid currentshave a negative sequence component. In addition, a thirdharmonic component is also present, as observed in Figs. 13(f)and (g).

B. Proposed control scheme to inject balanced three-phasegrid currents

The performance of the proposed control scheme, explainedin Section V, is tested for 15% unbalance in grid voltages. Itcan be seen from Figs. 14(b) and (c) that the DC-link currenthas second harmonic pulsation. In spite of this pulsation,balanced three-phase grid currents are obtained. This can be

observed in Figs. 14(d) and (e). Figs. 14(f) and (g) showthe harmonic spectrum of phase-a grid current iag for theinverter and rectifier modes of operation, respectively. It canbe seen that the percentage magnitude of the third harmoniccomponent has reduced significantly compared to that inFigs. 13(f) and (g). However, a small percentage of third andfifth harmonic components are present. These observations arein accordance with the equation (19).

The recent grid codes have made it mandatory that theconverter stays operational for few cycles, even though one ofthe phase voltages has reduced to 0%, as shown in Fig. 2 [28].This corresponds to 100% unbalance in the grid voltages. Theeffectiveness of the proposed control scheme is also tested atvarious unbalance levels in the grid voltages. The percent-age unbalance in grid voltages and currents are calculatedusing [50],

% unbalance =

max voltage (or current)deviation from the averagephase voltage (or current)

average phase voltage(or current)

.100. (23)

The percentage unbalance in three-phase grid currents isplotted against the percentage unbalance in three-phase gridvoltages in Figs. 15(a) and (b) for the inverter and rectifiermodes, respectively. It can be observed that there is a signifi-cant reduction in percentage unbalance in grid currents whenthe proposed control scheme is activated. Further, THD of thegrid currents also improves, as observed in Figs. 15(c) and (d).This is due to the reduction in the third harmonic component.It is interesting to note that although the DC-link currenthas a second harmonic pulsation, its peak-to-peak amplitudereduces when the proposed control scheme is used. As aresult, the current stress on the devices reduces approximatelyby 12% and 18%, as observed in Figs. 15(g) and (h), forinverter and rectifier modes of operation, respectively. Thisfeature can also be observed by comparing Figs. 13(b) and(c) with Figs. 14(b) and (c). The voltage stress on the devicesreduces monotonically as the percentage unbalance in the gridvoltages increases, when no compensation is provided. On theother hand, this stress on the devices remains almost constant(approximately 3% variation) as observed in Figs. 15(i) and(j), when the proposed control scheme is used.

VII. EXPERIMENTAL RESULTS

In order to validate the simulation results, a laboratoryprototype of the bidirectional current-fed converter is designedand fabricated. The parameters of the experimental setup aregiven in Table IV. Unbalance in the grid voltages is set at 15%.Here, the DC microgrid bus voltage vBUS is emulated using aDC source, while the desired unbalance in the grid voltages isset by reducing the phase-a voltage using an autotransformer.

Fig. 16 shows the experimental results for the inverter modeof operation. It can be seen from Fig. 16(a) that the gridcurrents are unbalanced if there is no compensation during theunbalanced grid voltage condition. The resultant unbalance inthe grid currents is 7%. The grid currents have a significant



(a) (b)

(c) (d)

Fig. 12. Simulation results:- Actual and reference DC-link currents for (a) Inverter (b) Rectifier modes of operation; Grid phase voltage and current for (c)Inverter (d) Rectifier modes of operation under a balanced grid voltage condition.

TABLE IVEXPERIMENTAL SETUP PARAMETERS

Rated power 1 kVADC microgrid voltage, vBUS 105 VGrid line voltage, Vg 125 VDC inductor, LDC 5 mHFilter inductor, Lf 3 mHFilter capacitor, Cf 30 µFSwitching frequency 4.5 kHz

percentage of third and fifth harmonic currents. Therefore, itsTHD is higher, as seen in Fig. 16(c). Balanced grid currentsare obtained using the proposed control scheme, as observedin Fig. 16(b). In this case, unbalance in the grid currents is lessthan 1%. It can be seen in Fig. 16(d) that there is a significantreduction in the third harmonic current component when theproposed control scheme is activated.

Similar results are obtained for the rectifier mode of oper-ation, and they are shown in Fig. 17. The unbalance in thegrid currents is 6%, and the THD is poor, as observed inFigs. 17(a) and (c), respectively, when no compensation isprovided. The grid current unbalance reduces to 2% when theproposed control scheme is activated, as seen in Fig. 17(b).Further, the current THD improves due to the reduction inthird harmonic current component, as observed in Fig. 17(d).

VIII. CONCLUSION

A three-phase bidirectional converter based on a currentsource topology to interface a DC microgrid with the main AC

grid is suggested. Under unbalanced grid voltage conditions,the DC-link current has a second harmonic pulsation. Inaddition, the AC-side currents are unbalanced due to thepresence of a negative sequence component. This might resultin undesired tripping of the converter. Balanced three-phasecurrents can be injected into the unbalanced grid voltagesusing a modified control scheme. However, it is found thatthe modified control scheme becomes unstable in the invertermode of operation because of the notch filter and the

(1

iDC

)term that is used to generate the modulation index. Therefore,a control scheme is proposed where the

(1

iDC

)term in

the control loop is avoided. The stability of the proposedcontrol scheme is analyzed using a small-signal model of theconverter. The performance of the proposed control schemeis studied using MATLAB\Simulink, and is experimentallyvalidated.

APPENDIX ASTABILITY ANALYSIS OF THE CLOSED-LOOP CONTROLLER

USING THE CONTROL SCHEME WITHOUT UNBALANCECOMPENSATION

From Fig. 1, the differential equation for DC-side of theconverter can be written as,

vBUS − LDCdiDC

dt− vDC = 0. (24)

The averaged equation can be written as,

⟨vBUS(t)⟩Ts − LDCd⟨iDC(t)⟩Ts

dt− ⟨vDC(t)⟩Ts = 0. (25)



(a)

(b) (c)

(d) (e)

(f) (g)

Fig. 13. Simulation results:- (a) Unbalanced three-phase grid voltages; DC-link current for (b) Inverter and (c) Rectifier modes of operation; Three-phasegrid currents for (d) Inverter and (e) Rectifier modes of operation; Harmonic spectrum of iag for (f) Inverter and (g) Rectifier modes of operation.



(a)

(b) (c)

(d) (e)

(f) (g)

Fig. 14. Simulation results for the proposed control scheme:- (a) Unbalanced three-phase grid voltages; DC-link current for (b) Inverter and (c) Rectifiermodes of operation; Three-phase grid currents for (d) Inverter and (e) Rectifier modes of operation; Harmonic spectrum of iag for (f) Inverter and (g) Rectifiermodes of operation.



(a) (b)

(c) (d)

(e) (f)

(g) (h)

(i) (j)Fig. 15. Simulation results:- Improvements with the proposed control scheme: Three-phase grid current unbalance (a) Inverter mode (b) Rectifier mode; Gridcurrent THD (c) Inverter mode (d) Rectifier mode; Peak-to-peak ripple in DC-link current (e) Inverter mode (f) Rectifier mode; Current stress on devices (g)Inverter mode (h) Rectifier mode; Voltage stress on devices (i) Inverter mode (j) Rectifier mode.



(a) (b)

(c) (d)

Fig. 16. Experimental results:- Inverter mode of operation: (a) Without compensation (b) With proposed control scheme; Grid voltages vag , vbg and vcg (100V/div), grid currents iag , ibg and icg (5 A/div), DC-link current iDC (10 A/div); Time scale: 10 ms/div (c) Harmonic spectrum of iag without compensation(d) Harmonic spectrum of iag with proposed control scheme.

(a) (b)

(c) (d)

Fig. 17. Experimental results:- Rectifier mode of operation: (a) Without compensation (b) With proposed control scheme; Grid voltages vag , vbg andvcg (100 V/div), grid currents iag , ibg and icg (5 A/div), DC-link current iDC (10 A/div); Time scale: 10 ms/div (c) Harmonic spectrum of iag withoutcompensation (d) Harmonic spectrum of iag with proposed control scheme.



The power balance equation between converter DC and ACsides can be written as,

⟨vDC(t)⟩Ts⟨iDC(t)⟩Ts =3

2⟨vd(t)⟩Ts⟨id(t)⟩Ts

+3

2⟨vq(t)⟩Ts⟨iq(t)⟩Ts. (26)

Therefore,

⟨vDC(t)⟩Ts =3

2⟨vd(t)⟩Ts

⟨id(t)⟩Ts

⟨iDC(t)⟩Ts

+3

2⟨vq(t)⟩Ts

⟨iq(t)⟩Ts

⟨iDC(t)⟩Ts. (27)



dt

−3

2⟨vd(t)⟩Ts

⟨id(t)⟩Ts

⟨iDC(t)⟩Ts− 3

2⟨vq(t)⟩Ts

⟨iq(t)⟩Ts

⟨iDC(t)⟩Ts= 0. (28)

After applying small perturbation, (28) becomes,

VBUS + vBUS(t)− LDCdIDC

dt− LDC

diDC(t)

dt

−3

2[Vd + vd(t)]

[Id + id(t)

IDC + iDC(t)

]

−3

2[Vq + vq(t)]

[Iq + iq(t)

IDC + iDC(t)

]= 0. (29)

Rearranging the terms gives,


dt− LDC

diDC(t)

dt

−3

2[Vd + vd(t)]

IdIDC

1 + id(t)Id

1 + iDC(t)IDC

−3

2[Vq + vq(t)]

IqIDC

1 +iq(t)Iq

1 + iDC(t)IDC

= 0. (30)

Using power series theorem, and neglecting higher orderterms, 1

1 + iDC(t)IDC

=

[1− iDC(t)

IDC

]. (31)



dt− LDC

diDC(t)

dt

−3

2[Vd + vd(t)]

IdIDC

[1 +

id(t)

Id

][1− iDC(t)

IDC

]

−3

2[Vq + vq(t)]

IqIDC

[1 +

iq(t)

Iq

][1− iDC(t)

IDC

]= 0. (32)

After simplification, DC (steady state) terms add up to zero.Neglecting the product terms of two AC terms, a linearized

small-signal equation is obtained as,

vBUS(t)− LDCdiDC(t)

dt

+3

2

Vd IdI2DC

iDC(t)−3

2

Vd

IDCid(t)−

3

2

IdIDC

vd(t)

+3

2

Vq IqI2DC

iDC(t)−3

2

Vq

IDCiq(t)−

3

2

IqIDC

vq(t) = 0. (33)

The AC equation is,

vBUS(s)− s LDC iDC(s)

+3

2

Vd IdI2DC

iDC(s)−3

2

Vd

IDCid(s)−

3

2

IdIDC

vd(s)

+3

2

Vq IqI2DC

iDC(s)−3

2

Vq

IDCiq(s)−

3

2

IqIDC

vq(s) = 0. (34)

The converter transfer function iDC(s)

id(s)is obtained using (34)

as,

Gc(s) =iDC(s)

id(s)=

32

Vd

IDC[−s LDC + 3

2Vd IdI2DC

+ 32

Vq IqI2DC

] . (35)

Transfer function of the PI regulator is,

GPI(s) =KP (s+

KI

KP)

s. (36)

The stability of the control block diagram shown in Fig. 5 isanalyzed by plotting root loci for the loop transfer function,

Gc(s) ·GPI(s) (37)

and using the converter parameters given in Table III. Here,Vd=240

√2=339 V, Vq=0 V, Iq=0 A. Further, IDC=33.33

A, Id=19.7 A, KP =-1 and KI=-0.1 for inverter mode ofoperation. For rectifier mode of operation, IDC=-33.33 A, Id=-19.7 A, KP =1 and KI=0.1. The root loci for these two modesare shown in Fig. 6.

APPENDIX BSTABILITY ANALYSIS OF THE CLOSED-LOOP CONTROLLER

USING THE MODIFIED CONTROL SCHEME

Stability of the closed-loop controller shown in Fig. 7 isanalyzed by plotting root loci of the loop transfer function,

Gc(s) ·GPI(s) ·Gf (s) (38)

where, Gc(s) and GPI(s) are given by (35) and (36) respec-tively, and Gf (s) is the notch filter transfer function,

Gf (s) =s2 + ω2

s2 + 2ζωs+ ω2. (39)

Here, the cut-off frequency ω=628.3 rad/sec, and the dampingcoefficient ζ=0.707. The root loci for inverter and rectifiermodes are shown in Fig. 8.



APPENDIX CSTABILITY ANALYSIS OF THE CLOSED-LOOP CONTROLLER

USING THE PROPOSED CONTROL SCHEME

Equation (27) can also be written as,

⟨vDC(t)⟩Ts =3

2⟨vd(t)⟩Ts⟨md(t)⟩Ts

+3

2⟨vq(t)⟩Ts⟨mq(t)⟩Ts. (40)



dt

−3

2⟨vd(t)⟩Ts⟨md(t)⟩Ts −

3

2⟨vq(t)⟩Ts⟨mq(t)⟩Ts = 0. (41)



dt− LDC

diDC(t)

dt

−3

2[Vd + vd(t)] [Md + md(t)]

−3

2[Vq + vq(t)] [Mq + mq(t)] = 0. (42)

After simplification, DC (steady state) terms add up to zero.Neglecting the product terms of two AC terms, a linearizedsmall-signal equation is obtained as,

vBUS(t)− LDCdiDC(t)

dt− 3

2Vd md(t)

−3

2vd(t)Md −

3

2Vq mq(t)−

3

2vq(t)Mq = 0. (43)

The AC equation is,

vBUS(s)− sLDC iDC(s)−3

2Vd md(s)

−3

2vd(s)Md −

3

2Vq mq(s)−

3

2vq(s)Mq = 0.

(44)

The converter transfer function iDC(s)

md(s)is obtained using (44)

as,

Gc(s) =iDC(s)

md(s)=

−32 Vd

sLDC. (45)

Stability of the closed-loop controller is analyzed by plottingroot locus of the loop transfer function,

Gc(s) ·GPI(s) ·Gf (s) (46)

where, GPI(s) and Gf (s) are given by (36) and (39) respec-tively, and Vd=339 V, KP =-1, KI=-0.1, ω=628.3 rad/sec andζ=0.707.

It should be noted that the converter transfer function rep-resented by (45) depends on d-axis voltage only, unlike (35).Therefore, it has identical root loci for inverter and rectifiermodes of operation. The root locus is shown in Fig. 10.

APPENDIX DMATHEMATICAL EXPRESSION FOR THE MODULATION

INDEX m

After expanding the higher power terms in (13),

m = I∗{ 1


I2DC

+

[I2dcc cos

2(2ωt) + I2dcs sin2(2ωt)

+ 2 Idcc Idcs cos(2ωt) sin(2ωt)

]I3DC

−

I3dcc cos3(2ωt) + I3dcs sin

3(2ωt)+ 3 I2dcc Idcs cos

2(2ωt) sin(2ωt)+ 3 Idcc I2dcs cos(2ωt) sin2(2ωt)

I4DC

+ . . .}. (47)

Simplification using the trigonometric identities gives,

m = I∗{ 1


I2DC

+

[I2dcc

2 +I2dcc

2 cos(4ωt) +I2dcs

2

− I2dcs

2 cos(4ωt) + Idcc Idcs sin(4ωt)

]I3DC

−

3I3

dcc

4 cos(2ωt) +3I2

dcc Idcs4 sin(2ωt)

+I3dcc

4 cos(6ωt) +3I2

dcc Idcs4 sin(6ωt)

+3Idcc I2

dcs

4 cos(2ωt) +3I3

dcs

4 sin(2ωt)

−3Idcc I2dcs

4 cos(6ωt)− I3dcs

4 sin(6ωt)

I4DC

+ . . .}. (48)

After rearranging the terms, m can be expressed as in (14).

APPENDIX ENECESSARY CONDITION FOR Mc AND Ms TO ELIMINATE

THE NEGATIVE SEQUENCE COMPONENTS FROM GRIDCURRENTS

After simplification, and using the trigonometric identities,(16) can be written as,

ig = [M IDC +M Idcc cos(2ωt) +M Idcs sin(2ωt)

+Mc IDC cos(2ωt) +Mc Idcc

2+

Mc Idcc2

cos(4ωt)

+Mc Idcs

2sin(4ωt) +Ms IDC sin(2ωt)

+Ms Idcc

2sin(4ωt) +

Ms Idcs2

− Ms Idcs2

cos(4ωt)]×[ cos(ωt+ ϕ) + j sin(ωt+ ϕ)]. (49)

After simplifying and applying the trigonometric identities,

ig = M IDC cos(ωt+ ϕ) + jM IDC sin(ωt+ ϕ)

+M Idcc

2cos(ωt− ϕ) +

M Idcc2

cos(3ωt+ ϕ)

+jM Idcc

2sin(3ωt+ ϕ)− j

M Idcc2

sin(ωt− ϕ)

+M Idcs

2sin(3ωt+ ϕ) +

M Idcs2

sin(ωt− ϕ) +

. . . equation continued on next page



+jM Idcs

2cos(ωt− ϕ)− j

M Idcs2

cos(3ωt+ ϕ)

+Mc IDC

2cos(ωt− ϕ) +

Mc IDC

2cos(3ωt+ ϕ)

+jMc IDC

2sin(3ωt+ ϕ)− j

Mc IDC

2sin(ωt− ϕ)

+Mc Idcc

2cos(ωt+ ϕ) + j

Mc Idcc2

sin(ωt+ ϕ)

+Mc Idcc

4cos(3ωt− ϕ) +

Mc Idcc4

cos(5ωt+ ϕ)

+jMc Idcc

4sin(5ωt+ ϕ)− j

Mc Idcc4

sin(3ωt− ϕ)

+Mc Idcs

4sin(5ωt+ ϕ) +

Mc Idcs4

sin(3ωt− ϕ)

+jMc Idcs

4cos(3ωt− ϕ)− j

Mc Idcs4

cos(5ωt+ ϕ)

+Ms IDC

2sin(3ωt+ ϕ) +

Ms IDC

2sin(ωt− ϕ)

+jMs IDC

2cos(ωt− ϕ)− j

Ms IDC

2cos(3ωt+ ϕ)

+Ms Idcc

4sin(5ωt+ ϕ) +

Ms Idcc4

sin(3ωt− ϕ)

+jMs Idcc

4cos(3ωt− ϕ)− j

Ms Idcc4

cos(5ωt+ ϕ)

+Ms Idcs

2cos(ωt+ ϕ) + j

Ms Idcs2

sin(ωt+ ϕ)

−Ms Idcs4

cos(3ωt− ϕ)− Ms Idcs4

cos(5ωt+ ϕ)

−jMs Idcs

4sin(5ωt+ ϕ) + j

Ms Idcs4

sin(3ωt− ϕ). (50)

After rearranging the terms, the expression for the grid currentspace vector can be written as (17).

APPENDIX FSTABILITY OF THE NEGATIVE SEQUENCE CURRENTS (i−d

AND i−q ) REGULATING LOOPS

Under unbalanced grid voltage condition the power balanceequation between converter DC and AC sides can be writtenusing dq-axis positive and negative sequence components ofthe grid voltage and grid current as [16], [22]–[25],

vDC iDC =3

2[v+d i

+d + v+q i

+q + v−d i

−d + v−q i

−q ]

+3

2[v+d i

−d + v+q i

−q + v−d i

+d + v−q i

+q ] cos (2ωt)

+3

2[v+d i

−q − v+q i

−d + v−q i

+d − v−d i

+q ] sin (2ωt). (51)

This is a periodically time-varying system. Hence, the av-eraged equation can be written by time-averaging over afundamental period as [51], [52],

⟨vDC(t)⟩Tf ⟨iDC(t)⟩Tf =3

2⟨v+d (t)⟩Tf ⟨i+d (t)⟩Tf

+3

2⟨v+q (t)⟩Tf ⟨i+q (t)⟩Tf

+3

2⟨v−d (t)⟩Tf ⟨i−d (t)⟩Tf

+3

2⟨v−q (t)⟩Tf ⟨i−q (t)⟩Tf . (52)

Therefore,

⟨vDC(t)⟩Tf =3

2⟨v+d (t)⟩Tf ⟨md(t)⟩Tf

+3

2⟨v+q (t)⟩Tf ⟨mq(t)⟩Tf

+3

2⟨v−d (t)⟩Tf ⟨mc(t)⟩Tf

+3

2⟨v−q (t)⟩Tf ⟨ms(t)⟩Tf . (53)

Equation (52) can also be written as,

⟨iDC(t)⟩Tf =⟨i+d (t)⟩Tf

⟨md(t)⟩Tf+

⟨i+q (t)⟩Tf

⟨mq(t)⟩Tf

+⟨i−d (t)⟩Tf

⟨mc(t)⟩Tf+

⟨i−q (t)⟩Tf

⟨ms(t)⟩Tf. (54)

Using (53) and (54) in (25) gives,

⟨vBUS(t)⟩Tf − LDCd

dt

⟨i+d(t)⟩Tf

⟨md(t)⟩Tf+

⟨i+q (t)⟩Tf

⟨mq(t)⟩Tf

+⟨i−

d(t)⟩Tf

⟨mc(t)⟩Tf+

⟨i−q (t)⟩Tf

⟨ms(t)⟩Tf

−3

2

⟨v+d (t)⟩Tf ⟨md(t)⟩Tf

+⟨v+q (t)⟩Tf ⟨mq(t)⟩Tf

+⟨v−d (t)⟩Tf ⟨mc(t)⟩Tf

+⟨v−q (t)⟩Tf ⟨ms(t)⟩Tf

= 0. (55)


VBUS + vBUS(t)

−LDCd

dt

I+d+i+

d(t)

Md+md(t)+

I+q +i+q (t)

Mq+mq(t)

+I−d+i−

d(t)

Mc+mc(t)+

I−q +i−q (t)

Ms+ms(t)

−3

2

[V +

d + v+d (t)][Md + md(t)]+[V +

q + v+q (t)][Mq + mq(t)]+[V −

d + v−d (t)][Mc + mc(t)]+[V −

q + v−q (t)][Ms + ms(t)]

= 0. (56)

Rearranging the terms, and using the power series theorem,(56) can be written as,

VBUS + vBUS(t)

−LDCd

dt

I+d

Md

[1 +

i+d(t)

I+d

] [1− md(t)

Md

]+

I+q

Mq

[1 +

i+q (t)

I+q

] [1− mq(t)

Mq

]+

I−d

Mc

[1 +

i−d(t)

I−d

] [1− mc(t)

Mc

]+

I−q

Ms

[1 +

i−q (t)

I−q

] [1− ms(t)

Ms

]

−3

2

[V +

d + v+d (t)][Md + md(t)]+[V +

q + v+q (t)][Mq + mq(t)]+[V −

d + v−d (t)][Mc + mc(t)]+[V −

q + v−q (t)][Ms + ms(t)]

= 0. (57)

After simplification, DC (steady state) terms add up to zero.Neglecting the product terms of two AC terms, a linearized



small-signal equation is obtained as,

vBUS(t) + LDC

I+d

M2d

dmd(t)dt − 1

Md

di+d(t)

dt

+I+q

M2q

dmq(t)dt − 1

Mq

di+q (t)

dt

+I−d

M2c

dmc(t)dt − 1

Mc

di−d(t)

dt

+I−q

M2s

dms(t)dt − 1

Ms

di−q (t)

dt

−3

2

V +d md(t) +Mdv

+d (t)

+V +q mq(t) +Mq v

+q (t)

+V −d mc(t) +Mcv

−d (t)

+V −q ms(t) +Msv

−q (t)

= 0. (58)

The AC equation is,

vBUS(s) + sLDC

I+d

M2d

md(s)− 1Md

i+d (s)

+I+q

M2qmq(s)− 1

Mqi+q (s)

+I−d

M2cmc(s)− 1

Mci−d (s)

+I−q

M2sms(s)− 1

Msi−q (s)

−3

2

V +d md(s) +Mdv

+d (s)

+V +q mq(s) +Mq v

+q (s)

+V −d mc(s) +Mcv

−d (s)

+V −q ms(s) +Msv

−q (s)

= 0. (59)

The converter transfer function i−d(s)

mc(s)is obtained using (59)

as,

Gcd(s) =i−d (s)

mc(s)=

s 2LDCI−d − 3V −

d M2c

s 2LDCMc. (60)

Whereas, the converter transfer functioni−q (s)

ms(s)is obtained

using (59) as,

Gcq(s) =i−q (s)

ms(s)=

s 2LDCI−q − 3V −

q M2s

s 2LDCMs. (61)

The fundamental frequency positive sequence, fundamen-tal frequency negative sequence, third harmonic positive se-quence, third harmonic negative sequence and fifth harmonicpositive sequence current components present in the gridcurrents will appear as 100 Hz, DC, 200 Hz, 100 Hz and300 Hz in a negatively rotating synchronous reference framerespectively. These pulsating current components are filteredusing notch filters Gf1(s), Gf2(s) and Gf3(s) which hastransfer function similar to (39). The stability of the negativesequence current regulating loops is analyzed by plotting rootloci for the loop transfer functions,

Gcd(s) ·Gf1(s) ·Gf2(s) ·Gf3(s) ·GPI(s) (62)

and

Gcq(s) ·Gf1(s) ·Gf2(s) ·Gf3(s) ·GPI(s). (63)

Here, V −d = −105 V, V −

q =−105 V, I−d =I−q =0, Mc = −0.22and Ms=0.22. Further, KP = −1 and KI = −0.1 for (62) (i−dregulating loop). KP =1 and KI=0.1 for (63) (i−q regulatingloop). The root locus for these to control loops is shown inFig. 11.

REFERENCES

[1] A. Lahyani, P. Venet, G. Grellet and P. J. Viverge, “Failure prediction ofelectrolytic capacitors during operation of a switchmode power supply,”IEEE Trans. Power Electron., vol. 13, no. 6, pp. 11991207, Nov. 1998.

[2] J. M. Galvez and M. Ordonez, “Swinging Bus Operation of Inverters forFuel Cell Applications With Small DC-Link Capacitance,” IEEE Trans.Power Electron., vol. 30, no. 2, pp. 1064-1075, Feb. 2015.

[3] W. Huai, M. Ke and F. Blaabjerg, “Design for reliability of powerelectronic systems,” in Proc. IEEE Ind. Electron. Soc. Conf. (IECON),2012, pp. 33-44.

[4] E. Wolfgang, “Examples for failures in power electronics systems,”presented at ECPE Tutorial on Reliability of Power Electronic Systems,Nuremberg, Germany, Apr. 2007.

[5] W. Huai and F. Blaabjerg, “Reliability of capacitors for DC-Linkapplications in power electronic converters-an overview,” IEEE Trans.Ind. Appl., vol.50, no.5, pp. 3569-3578, Sep.-Oct. 2014.

[6] D. Winterborne, M. Mingyao, W. Haimeng, V. Pickert, J. Widmer, P.Barrass and L. Shah, “Capacitors for high temperature DC link applica-tions in automotive traction drives: current technology and limitations,”in Proc. IEEE European Power Electron. and Applicat. Conf. (EPE),2013, pp. 1-7.

[7] A. Sannino, G. Postiglione and M. H. J. Bollen, “Feasibility of a dcnetwork for commercial facilities,” IEEE Trans. Ind. Appl., vol. 39, no.5, pp. 1499-1507, Sep. 2003.

[8] B. Mirafzal, M. Saghaleini and A. Kaviani, “An svpwm-based switchingpattern for stand-alone and grid-connected three-phase single-stage boostinverters,” IEEE Trans. Power Electron., vol. 26, no. 4, pp. 1102-1111,Apr. 2011.

[9] P. P. Dash and M. Kazerani, “Dynamic modeling and performanceanalysis of a grid-connected current-source inverter-based photovoltaicsystem,” IEEE Trans. Sustain. Energy, vol. 2, no. 4, pp. 443450, Oct.2011.

[10] B. Sahan, S. V. Arajo, C. Nding and P. Zacharias, “Comparativeevaluation of three-phase current source inverters for grid interfacingof distributed and renewable energy systems,” IEEE Trans. PowerElectron., vol. 26, no. 8, pp. 23042318, Aug. 2011.

[11] Y. Chen and K. Smedley, “Three-phase boost-type grid-connected in-verter,” IEEE Trans. Power Electron., vol. 23, no. 5, pp. 23012309, Sep.2008.

[12] J. F. Zhao, J. G. Jiang and X. W. Yang, “AC-DC-DC isolated converterwith bidirectional power flow capability,” Power Electronics, IET, vol.3, no. 4, pp. 472-479, Jul. 2010.

[13] T. C. Green, M. H. Taha, N. A. Rahim and B. W. Williams, “Three-phasestep-down reversible AC-DC power converter,” IEEE Trans. PowerElectron., vol. 12, no. 2, pp. 319-324, Mar. 1997.

[14] V. Vekhande and B. G. Fernandes, “Bidirectional current-fed converterfor integration of DC micro-grid with AC grid,” in Proc. Annu. IEEEIndia Conf. (INDICON), 2011, pp. 1-5.

[15] P. N. Enjeti and S. A. Choudhury, “A new control strategy to improve theperformance of a PWM AC to DC converter under unbalanced operatingconditions,” IEEE Trans. Power Electron., vol. 8, no. 4, pp. 493-500,Oct. 1993.

[16] Y. Suh, Y. Go and D. Rho, “A comparative study on control algorithm foractive front-end rectifier of large motor drives under unbalanced input,”IEEE Trans. Ind. Appl., vol. 47, no. 3, pp. 1419-1431, Jun. 2011.

[17] A. Yazdani and R. Iravani, “A unified dynamic model and control forthe voltage-sourced converter under unbalanced grid conditions,” IEEETrans. Power Del., vol. 21, no. 3, pp. 1620-1629, Jul. 2006.

[18] G. Xiaoqiang, L. Wenzhao, Z. Xue, S. Xiaofeng, L. Zhigang and J. M.Guerrero, “Flexible control strategy for grid-connected inverter underunbalanced grid faults without PLL,” IEEE Trans. Power Electron., vol.30, no. 4, pp. 1773-1778, Apr. 2015.

[19] L. Yiqi, L. Ningning, F. Yu, W. Jianze and J. Yanchao, “Stationary-frame-based generalized control diagram for PWM AC-DC front-endconverters with unbalanced grid voltage in renewable energy systems,”in Proc. Appl. Power Electron. Conf. (APEC), 2015, pp. 678-683.

[20] J. A. Suul, A. Luna, P. Rodriguez and T. Undeland, “Virtual-flux-basedvoltage-sensor-less power control for unbalanced grid conditions,” IEEETrans. Power Electron., vol. 27, no. 9, pp. 4071-4087, Sep. 2012.

[21] Z. Yongchang and Q. Changqi, “Direct power control of a pulse widthmodulation rectifier using space vector modulation under unbalancedgrid voltages,” IEEE Trans. Power Electron., vol. 30, no. 10, pp. 5892-5901, Oct. 2015.

[22] Z. Yongchang and Q. Changqi, “Table-based direct power control forthree-phase AC/DC converters under unbalanced grid voltages,” IEEETrans. Power Electron., vol. 30, no. 12, pp. 7090-7099, Dec. 2015.



[23] H. Nian, P. Cheng and Z. Q. Zhu, “Coordinated direct power control ofDFIG system without phase locked loop under unbalanced grid voltageconditions,” IEEE Trans. Power Electron., to be published.

[24] K. Ma, W. Chen, M. Liserre and F. Blaabjerg, “Power controllabilityof a three-phase converter with an unbalanced AC source,” IEEE Trans.Power Electron., vol. 30, no. 3, pp. 1591-1604, Mar. 2015.

[25] M. Zhu, L. Hang, G. Li and X. Jiang, “Protected control method forpower conversion interface under unbalanced operating conditions inAC/DC hybrid distributed grid,” IEEE Trans. Energy Convers., to bepublished.

[26] V. Vekhande, B. B. Pimple and B. G. Fernandes, “Modulation of indirectmatrix converter under unbalanced source voltage condition,” in Proc.IEEE Energy Conversion Congr. and Exposition (ECCE), 2011, pp. 225-229.

[27] J. Dai, D. Xu, B. Wu and N. Zargari, “Unified dc-link current control forlow-voltage ride-through in current-source-converter-based wind energyconversion systems,” IEEE Trans. Power Electron., vol. 26, no. 1, pp.288-297, Jan. 2011.

[28] M. Tsili and S. Papathanassiou,“A review of grid code technical require-ments for wind farms,” Renewable Power Generation, IET, vol. 3, no.3, pp. 308332, Sep. 2009.

[29] M. Popat, W. Bin and N. R. Zargari, “Fault ride-through capabilityof cascaded current-source converter-based offshore wind farm,” IEEETrans. Sustain. Energy, vol. 4, no. 2, pp. 314-323, Apr. 2013.

[30] J. Miret, M. Castilla, A. Camacho, L. G. Vicuna, and J. Matas, “Controlscheme for photovoltaic three-phase inverters to minimize peak currentsduring unbalanced grid-voltage sags,” IEEE Trans. Power Electron., vol.27, no. 10, pp. 4262-4271, Oct. 2012.

[31] F. A. Magueed and J. Svensson, “Control of VSC connected to the gridthrough LCL filter to achieve balanced currents,” in Proc. IEEE Ind.Applicat. Conf., 2005, pp. 572-578.

[32] Z. Wang, S. Fan, Z. Zou, Y. Huang and M. Cheng, “Control strategies ofcurrent-source inverters for distributed generation under unbalanced gridconditions,” in Proc. IEEE Energy Conversion Congr. and Exposition(ECCE), 2012, pp. 4671-4675.

[33] A. Moghadasi and A. Islam, “Enhancing LVRT capability of FSIG windturbine using current source UPQC based on resistive SFCL,” in Proc.IEEE Transmission and Distribution Conf. and Exposition, 2014, pp.1-5.

[34] L. Giuntini, M. Crespan, I. Furlan and S. Colombi, “Robust controlof current source rectifier for UPS applications,” in Proc. IEEE Int.Exhibition and Conf. for Power Electron., Intell. Motion, RenewableEnergy and Energy Manage., 2014, pp. 1-7.

[35] P. E. Melin, J. R. Espinoza, L. A. Moran, J. R. Rodriguez, V. M.Cardenas, C. R. Baier and J. A. Munoz, “Analysis, design and control ofa unified power-quality conditioner based on a current-source topology,”IEEE Trans. Power Del., vol. 27, no. 4, pp. 1727-1736, Oct. 2012.

[36] I. Abdelsalam, G. P. Adam, D. Holliday and B. W. Williams, “Modifiedback-to-back current source converter and its application to wind energyconversion systems,” Power Electron., IET, vol. 8, no. 1, pp. 103-111,Jan. 2015.

[37] C. Photong, C. Klumpner and P. Wheeler, “A current source inverterwith series connected AC capacitors for photovoltaic application withgrid fault ride through capability,” in Proc. IEEE Ind. Electron. Soc.Conf. (IECON), 2009, pp. 390-396.

[38] X. Wang, Y. Li, F. Blaabjerg and P. C. Loh, “Virtual-impedance-basedcontrol for voltage-source and current-source converters,” IEEE Trans.Power Electron., vol. 30, no. 12, pp. 7019-7037, Dec. 2015.

[39] P. C. Loh and D. G. Holmes, “Analysis of multiloop control strategies forLC/CL/LCL-filtered voltage-source and current source inverters,” IEEETrans. Ind. Appl., vol. 41, no. 2, pp. 644-654, Mar. 2005.

[40] H. C. Tay and M. F. Conlon, “Development of an unbalanced switchingscheme for a current source inverter,” Generation, Transmission andDistribution, IET, vol. 147, no. 1, pp. 23-30, Jan. 2000.

[41] T. Nussbaumer, M. Baumann and J. W. Kolar, “Comprehensive designof a three-phase three-switch buck-type PWM rectifier,” IEEE Trans.Power Electron., vol. 22, no. 2, pp. 551-562, Mar. 2007.

[42] B. Sahan, A. N. Vergara, N. Henze, A. Engler and P. Zacharias, “Asingle-stage PV module integrated converter based on a low-powercurrent-source inverter,” IEEE Trans. Ind. Electron., vol. 55, no. 7, pp.2602-2609, Jul. 2008.

[43] M. Salo and H. Tuusa, “A vector-controlled PWM current-source-inverter-fed induction motor drive with a new stator current controlmethod,” IEEE Trans. Ind. Electron., vol. 52, no. 2, pp. 523-531, Apr.2005.

[44] D. N. Zmood and D. G. Holmes, “Improved voltage regulation forcurrent-source inverters,” IEEE Trans. Ind. Appl., vol. 37, no. 4, pp.1028-1036, Aug. 2001.

[45] M. Salo, “A three-switch current-source PWM rectifier with active filterfunction,” in Proc. IEEE Power Electron. Specialist Conf. (PESC), 2005,pp. 2230-2236.

[46] J. W. Kolar, F. Schafmeister, S. D. Round and H. Ertl, “Novel three-phase AC-AC sparse matrix converters,” IEEE Trans. Power Electron.,vol. 22, no. 5, pp. 1649-1661, Sep. 2007.

[47] J. W. Kolar, T. Friedli, F. Krismer and S. D. Round, “The essence ofthree-phase AC/AC converter systems,” in Proc. IEEE Power Electron.and Motion Control Conf. (EPE-PEMC), 2008, pp. 27-42.

[48] M. C. Chandorkar, D. M. Divan and R. H. Lasseter, “Control techniquesfor multiple current source GTO converters,” IEEE Trans. Ind. Appl., vol.31, no. 1, pp. 134-140, Jan. 1995.

[49] W. Lixiang, T. A. Lipo and H. Chan, “Matrix converter topologies withreduced number of switches,” in Proc. IEEE Power Electron. SpecialistConf. (PESC), vol. 1, 2002, pp. 57-63.

[50] P. Pillay and M. Manyage, “Definitions of voltage unbalance,” IEEEPower Eng. Rev., vol. 21, no. 5, pp. 49-51, May 2001.

[51] M. E. Moursi, K. Goweily and E. A. Badran, “Enhanced fault ridethrough performance of self-excited induction generator-based wind parkduring unbalanced grid operation,” IET Power Electron., vol. 6, no. 8,pp. 1683-1695, Sep. 2013.

[52] H. K. Khalil, “Perturbation theory and averaging,” in Nonlinear Systems,2nd Ed., Upper Saddle River, NJ: Prentice Hall, 1996, ch. 8, sec. 8.3,pp. 330-339.

Vishal Vekhande (S’12) received the B.E. degreein Electrical Engineering from Mumbai University,Mumbai, India, in 2005. From 2005 to 2007, heworked with Siemens Ltd., India, as an ExecutiveEngineer. Currently, he is pursuing M.Tech.+Ph.D.Dual degree at Indian Institute of Technology Bom-bay, Mumbai, India.

His research interests include power electronicconverter topologies for integration of renewableenergy sources with AC and DC grids.

Kanakesh V. K. received the M.Tech. Degree inelectrical engineering from the Indian Institute ofTechnology Bombay, Mumbai, India, in 2014. In2014, he joined National University of Singapore,where he is currently working as a Research Engi-neer, and is involved in the development of bidirec-tional cascaded DC-AC converter for UPS applica-tion.

His research interests include power electronicinterfaces for utility system and high-frequency-linkpower conversion.

B. G. Fernandes (M’06) received the B.Tech. de-gree from Mysore University, Mysore, India, in1984, the M.Tech. degree from the Indian Instituteof Technology Kharagpur, India, in 1989, and thePh.D. degree from the Indian Institute of TechnologyBombay, India, in 1993.

He then joined the Department of Electrical En-gineering, Indian Institute of Technology Kanpur,India, as an Assistant Professor. In 1997, he joinedDepartment of Electrical Engineering, Indian Insti-tute of Technology Bombay, where he is currently a

Professor. His current research interests are high performance ac drives, mo-tors for electric vehicles, and power electronic interfaces for non-conventionalenergy sources.

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