Computing Two-Pattern Test Cubes for Transition

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IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 21, NO. 3, MARCH 2013 475 Computing Two-Pattern Test Cubes for Transition Path Delay Faults Irith Pomeranz, Fellow, IEEE Abstract—Considering full-scan circuits, incompletely-specied tests, or test cubes, are used for test data compression. When con- sidering path delay faults, certain specied input values in a test cube are needed only for determining the lengths of the paths asso- ciated with detected faults. Path delay faults, and therefore, small delay defects, would still be detected if such values are unspeci- ed. The goal of this paper is to explore the possibility of increasing the number of unspecied input values in a test set for path delay faults by unspecifying such values in order to make the test set more amenable to test data compression. Experimental results in- dicate that signicant numbers of such values exist. The proposed procedure unspecies them gradually to obtain a series of test sets with increasing numbers of unspecied values and decreasing path lengths. Experimental results also indicate that lling the unspeci- ed values randomly (as with some test data compression methods) recovers some or all of the path lengths associated with detected path delay faults. The procedure uses a matching of the sets of de- tected faults for the comparison of path lengths. Index Terms—Full-scan circuits, path delay faults, test cubes, transition faults, two-pattern tests. I. INTRODUCTION T EST DATA compression methods for full-scan circuits use incompletely-specied tests, or test cubes, to accom- modate the constraints of test data decompression logic on the tests applicable to the circuit [1]–[4]. An incompletely-speci- ed test is obtained if test generation for a target fault stops as soon as the fault is detected. However, even in this case, due to the order by which inputs are considered during test generation, a test may contain specied values that are not necessary for the detection of the fault. Due to this possibility, dynamic test compaction procedures include processes that increase the num- bers of unspecied values in a test without losing the detection of target faults [5], [6]. Dynamic test compaction procedures use the unspecied values for detecting additional faults by the same test. However, the specication of additional values can be done under the constraints of a test data compression method. The procedures described in [7] and [8] start from a completely- specied test set and unspecify as many input values as possible without reducing the number of detected target faults. The un- specied values can then be used for test data compression. In the procedures described in [5]–[8], the decision to un- specify an input value in a test is made based on its effect on Manuscript received July 19, 2011; revised December 14, 2011; accepted February 16, 2012. Date of publication March 22, 2012; date of current ver- sion February 20, 2013. The author is with the School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907 USA (e-mail: [email protected]. edu). Digital Object Identier 10.1109/TVLSI.2012.2188727 the fault coverage. If the fault coverage is reduced, the input retains its specied value. Otherwise, it is unspecied. This ap- proach, where unspecifying input values is guided by the fault coverage, is applicable to any fault model (stuck-at faults are considered in [5]–[8]). When considering path delay faults for the detection of small delay defects, in addition to the fault coverage, another param- eter of a test set is related to the lengths of the paths associated with detected path delay faults. In this case, certain specied input values may be needed only for determining the lengths of the paths associated with detected faults. If such input values are unspecied, one or more path delay faults would still be de- tected for every originally detected fault. Therefore, small delay defects would continue to be detected. However, the detected faults would be associated with shorter paths. The goal of this paper is to explore the possibility of unspecifying input values that affect the lengths of the paths associated with detected path delay faults, thus making a test set for path delay faults more amenable to test data compression. The terminology used in this paper with respect to path delay faults is the following. A small delay defect has an extra delay that is smaller than the clock period. Path delay faults model the case where the accumulation of small delay defects along a path causes the delay of the path to exceed the clock period. A full path starts from an input and ends at an output of the combina- tional logic of the circuit. A subpath starts from an internal line or an input, and ends at an internal line or an output. A path can be a full path or a subpath. The importance of subpaths to the discussion of path delay faults results from the fact that the per- centage of detectable path delay faults can be low [9]–[13]. To allow small delay defects to be detected even when path delay faults are not detected, path delay faults that are associated with full paths as well as path delay faults that are associated with subpaths are considered in [14]–[16]. To dene the conditions under which a path delay fault asso- ciated with a subpath is considered to be detected, the transition path delay fault model is used in [16]. A test for a transition path delay fault requires the detection of a transition fault on every line along the path associated with the fault. Tests for transition path delay faults are a special type of strong non-robust tests for path delay faults. A strong non-robust test sensitizes the path by assigning non-controlling values to off-path inputs during the second pattern of the test. In addition the test creates a or a transition on every line of the path corresponding to the transition at the source of the path. To detect a transition path delay fault the test is also required to detect each corresponding transition fault along the path. This paper considers transition path delay faults associated with full paths and subpaths when determining values that can 1063-8210/$31.00 © 2012 IEEE

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Transcript of Computing Two-Pattern Test Cubes for Transition

Page 1: Computing Two-Pattern Test Cubes for Transition

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 21, NO. 3, MARCH 2013 475

Computing Two-Pattern Test Cubes for TransitionPath Delay Faults

Irith Pomeranz, Fellow, IEEE

Abstract—Considering full-scan circuits, incompletely-specifiedtests, or test cubes, are used for test data compression. When con-sidering path delay faults, certain specified input values in a testcube are needed only for determining the lengths of the paths asso-ciated with detected faults. Path delay faults, and therefore, smalldelay defects, would still be detected if such values are unspeci-fied. The goal of this paper is to explore the possibility of increasingthe number of unspecified input values in a test set for path delayfaults by unspecifying such values in order to make the test setmore amenable to test data compression. Experimental results in-dicate that significant numbers of such values exist. The proposedprocedure unspecifies them gradually to obtain a series of test setswith increasing numbers of unspecified values and decreasing pathlengths. Experimental results also indicate that filling the unspeci-fied values randomly (as with some test data compressionmethods)recovers some or all of the path lengths associated with detectedpath delay faults. The procedure uses a matching of the sets of de-tected faults for the comparison of path lengths.

Index Terms—Full-scan circuits, path delay faults, test cubes,transition faults, two-pattern tests.

I. INTRODUCTION

T EST DATA compression methods for full-scan circuitsuse incompletely-specified tests, or test cubes, to accom-

modate the constraints of test data decompression logic on thetests applicable to the circuit [1]–[4]. An incompletely-speci-fied test is obtained if test generation for a target fault stops assoon as the fault is detected. However, even in this case, due tothe order by which inputs are considered during test generation,a test may contain specified values that are not necessary forthe detection of the fault. Due to this possibility, dynamic testcompaction procedures include processes that increase the num-bers of unspecified values in a test without losing the detectionof target faults [5], [6]. Dynamic test compaction proceduresuse the unspecified values for detecting additional faults by thesame test. However, the specification of additional values can bedone under the constraints of a test data compression method.The procedures described in [7] and [8] start from a completely-specified test set and unspecify as many input values as possiblewithout reducing the number of detected target faults. The un-specified values can then be used for test data compression.In the procedures described in [5]–[8], the decision to un-

specify an input value in a test is made based on its effect on

Manuscript received July 19, 2011; revised December 14, 2011; acceptedFebruary 16, 2012. Date of publication March 22, 2012; date of current ver-sion February 20, 2013.The author is with the School of Electrical and Computer Engineering, Purdue

University, West Lafayette, IN 47907 USA (e-mail: [email protected]).Digital Object Identifier 10.1109/TVLSI.2012.2188727

the fault coverage. If the fault coverage is reduced, the inputretains its specified value. Otherwise, it is unspecified. This ap-proach, where unspecifying input values is guided by the faultcoverage, is applicable to any fault model (stuck-at faults areconsidered in [5]–[8]).When considering path delay faults for the detection of small

delay defects, in addition to the fault coverage, another param-eter of a test set is related to the lengths of the paths associatedwith detected path delay faults. In this case, certain specifiedinput values may be needed only for determining the lengths ofthe paths associated with detected faults. If such input valuesare unspecified, one or more path delay faults would still be de-tected for every originally detected fault. Therefore, small delaydefects would continue to be detected. However, the detectedfaults would be associated with shorter paths. The goal of thispaper is to explore the possibility of unspecifying input valuesthat affect the lengths of the paths associated with detected pathdelay faults, thus making a test set for path delay faults moreamenable to test data compression.The terminology used in this paper with respect to path delay

faults is the following. A small delay defect has an extra delaythat is smaller than the clock period. Path delay faults model thecase where the accumulation of small delay defects along a pathcauses the delay of the path to exceed the clock period. A fullpath starts from an input and ends at an output of the combina-tional logic of the circuit. A subpath starts from an internal lineor an input, and ends at an internal line or an output. A path canbe a full path or a subpath. The importance of subpaths to thediscussion of path delay faults results from the fact that the per-centage of detectable path delay faults can be low [9]–[13]. Toallow small delay defects to be detected even when path delayfaults are not detected, path delay faults that are associated withfull paths as well as path delay faults that are associated withsubpaths are considered in [14]–[16].To define the conditions under which a path delay fault asso-

ciated with a subpath is considered to be detected, the transitionpath delay fault model is used in [16]. A test for a transition pathdelay fault requires the detection of a transition fault on everyline along the path associated with the fault. Tests for transitionpath delay faults are a special type of strong non-robust tests forpath delay faults. A strong non-robust test sensitizes the path byassigning non-controlling values to off-path inputs during thesecond pattern of the test. In addition the test creates a ora transition on every line of the path corresponding to thetransition at the source of the path. To detect a transition pathdelay fault the test is also required to detect each correspondingtransition fault along the path.This paper considers transition path delay faults associated

with full paths and subpaths when determining values that can

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be unspecified under a two-pattern (broadside) test set for afull-scan circuit. The ability to define the detection conditions ofa transition path delay fault based on a set of transition faults thatneed to be detected facilitates the proposed procedure. Startingfrom a completely-specified test set, denoted by , the proce-dure focuses on scan-in values that can be unspecified. The pro-cedure consists of two parts, as follows.The first procedure described in this paper ensures that the

transition path delay faults that are detected by will continueto be detected after scan-in values are unspecified under . Letdenote the set of transition path delay faults detected by .

This procedure does not allow the detection of any fault fromto be lost when is unspecified. This is similar to requiring

that the fault coverage of with respect to transition path delayfaults would not decrease. It provides a baseline where as manyvalues as possible are unspecified without reducing the faultcoverage. This baseline represents the case where the test gener-ation procedure produces incompletely-specified tests to detecta set of target path delay faults. The main contribution of thispaper is in allowing additional values to be unspecified in casethe test set cannot be compressed by a selected test data com-pression method, as discussed next.To allow additional scan-in values in to be unspecified, the

second procedure described in this paper allows the lengths ofthe paths associated with the transition path delay faults into be reduced as is unspecified. For a fault that is asso-ciated with a path of length , it is possible to consider sub-paths of lengths . The proposed procedure allowspath lengths to be reduced to one. It thus allows the detection ofa transition path delay fault to be replaced by the detectionof each transition fault included in individually. By unspec-ifying scan-in values gradually, the procedure ensures that thepath lengths in are reduced gradually.Test data decompression logic applies completely-specified

tests, where the unspecified values of a test cube may be filledrandomly or based on other, specified values. Randomly fillingthe unspecified values of a test set produced by the proposedprocedure imitates this.Due to variations in path lengths associated with detected

path delay faults that occur when unspecified values are filledrandomly, the paper defines a matching between the transitionpath delay faults detected by the completely-specified test setto which the proposed procedure is applied, and the test sets

produced by the proposed procedure. The matching provides amore accurate assessment of the effects of unspecified values,and of randomly filling these values, on the path lengths associ-ated with detected faults.Experimental results indicate that randomly filling the un-

specified values of a test set obtained by the proposed proce-dure increases the path lengths associated with detected faults.For the first few test sets in the series produced by the proposedprocedure from a test set , the path lengths are equal or closeto those of .The discussion in this paper is independent of any particular

test data compression method, and targets only the number ofunspecified values in the test set. Additional unspecified valuesare assumed to improve the ability to compress a test set. Itis also possible to use the constraints of a particular test data

compression method for guiding the proposed procedure to un-specify certain input values.This paper is organized as follows. Section II describes the

background necessary for the proposed procedure. Section IIIdescribes the first procedure that unspecifies a test set withoutaffecting the set of detected transition path delay faults.Section IV describes the second procedure that unspecifies atest set while allowing detected transition path delay faults tobe associated with shorter paths. Section V gives a more formaldescription of the proposed procedure. Section VI discussesthe random filling of incompletely-specified test sets, and thematching between sets of detected faults for the purpose ofevaluating the effects on path lengths associated with detectedfaults. Section VII presents experimental results.

II. PRELIMINARIES

This section describes the background needed for describingthe proposed procedure.

A. Tests

A two-pattern test for a full-scan circuit has the form, where is the first pattern and

is the second pattern of the test. For and 2, is thepresent-state of the circuit during pattern , and is theprimary input vector applied during pattern .The state is scanned in at the beginning of a test. In a

broadside test, and are applied in two consecutive func-tional clock cycles after is scanned in. Consequently, isthe next-state for and .The test sets considered in this paper are broadside test sets

that were generated by the test generation procedure describedin [17]. The procedure targets path delay faults that are asso-ciated with the longest paths, and produces strong non-robusttests.The procedure described in this paper unspecifies only

scan-in values, which are values included in . Let thenumber of state variables be . For a state , the value ofstate variable is denoted by , where . Ifneeded, the primary input values can be unspecified by thesame procedure used for unspecifying the scan-in values. Ifprimary input vectors are held constant to accommodate testerconstraints, the proposed procedure will not modify them.

B. Transition Path Delay Faults

Path delay faults model small delay defects whose accumula-tion along a path cause the path to fail. The transition path delayfault model was defined in order to capture the situation wherethe accumulation of small extra delays is sufficient for causingfaulty behavior after a transition is propagated through a sub-path. As a result, the model captures both small and large delaydefects. This is accomplished as follows.Similar to a path delay fault, a transition path delay fault is

associated with a path and a transition on its first line. When thetransition is propagated along the path, it defines correspondingtransitions for all the lines of the path. Based on these transi-tions it is possible to define transition faults along the path. A

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transition path delay fault is detected when all the single transi-tion faults along the path are detected by the same test.For the discussion in this paper, a transition path delay

fault is denoted by , whereare the transition faults that need to be

detected in order to detect . The relationship between thefaults is the following.Let be the transition fault on line . Then

forms a path. In addition,if the number of inverters between and is even, and

if the number of inverters between and isodd.If is associated with a full path, a test for is a strong

non-robust test for the path delay fault associated withand the transition on . If

or is an internal line, the requirement to detect atransition fault on guarantees that a test for will causea transition to occur on even if it is an internal line. Thetransition is propagated to under the strong non-robustpropagation conditions. The requirement to detect a transitionfault on guarantees that a test will propagate fault effectsfrom to an output if is an internal line.The ease of dealing with subpaths under the transition path

delay fault model, and the uniformity in dealing with full pathsand subpaths, is one of the reasons for using the transition pathdelay fault model in this work. The disadvantage of using thismodel is that fault simulation requires simulation of transitionfaults under every test, as discussed below. With an appropriatedefinition for the detection conditions of faults associated withsubpaths, the procedures developed in this paper can be appliedto other path delay fault models, including ones for which faultsimulation requires only logic simulation.Given a two-pattern test , to find the transition path delay

faults detected by , the procedure from [16] first simulates allthe transition faults under . Next, the procedure marks all thelines with detected transition faults. It then identifies a set oflines where detected transition path delay faults begin. The setis denoted by . A line is associated with a detectedtransition fault. In addition it satisfies one of the following con-ditions, which ensure that a detected transition path delay faultstarting at cannot be extended towards the inputs.1) is an input.2) If is a gate output, none of the gate inputs is marked ashaving a detected transition fault.

3) If is a fan-out branch, the fan-out stem of is not markedas having a detected transition fault.

Starting from every line in , the procedure traces all the pos-sible paths using only lines that are marked as having detectedtransition faults. Tracing proceeds from the lines in towardsthe outputs. It stops when a path cannot be extended any fur-ther. The set of transition path delay faults detected by a testis denoted by .A given test set typically detects a limited number of transi-

tion path delay faults (or path delay faults in general). There-fore, there is no need to perform path selection for the purposeof transition path delay fault simulation. The fault simulationprocedure used in this paper finds all the transition path delayfaults detected by a given test set , and uses them as targets

Fig. 1. .

TABLE ITEST SET

when it unspecifies the test set. The set of transition path delayfaults detected by is denoted by . The set is obtained bythe following process.Initially, . For every test , the set of detected

transition path delay faults, denoted by , is obtained asdescribed earlier. After adding to , the fault simulationprocedure removes from duplicated faults. It also removesfaults that are contained in other faults. This is illustrated by theexample in the next subsection.

C. Example

Fig. 1 shows ISCAS-89 benchmark . Table I shows abroadside test set for path delay faults. Table II shows thesets of transition path delay faults detected by the firsttests in . The transition fault on line is denoted by

. Column full shows whether the path is a full path (indi-cated by a 1) or a subpath (indicated by a 0).After is added to , the transition path delay fault

1.01-8.10-12.10-25.01 appears twice, due to and due to .Only one appearance of this fault is retained.After is added to , the transition path delay fault

1.01-8.10-13.10-14.10-17.10-18.10-20.01-21.10-22.10-25.01,which is detected by , contains the transition path delay fault14.10-17.10-18.10-20.01, which is detected by . The faultdetected by is removed. Table III shows the set of detectedtransition path delay faults for and the tests that detectthem. The test that detects a transition path delay faultis denoted by .According to Table III, the fault 4.10-19.10-20.01-21.10-

22.10-25.01 is detected by the testfrom Table I. If is unspecified into the test

, the fault4.10-19.10-20.01-21.10-22.10-25.01 is not detected,but the fault 4.10-19.10-20.01 is. Other tests address thedetection of the fault 21.10-22.10-25.01. This illustrates a case

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TABLE IISETS OF DETECTED FAULTS

TABLE IIISET OF DETECTED FAULTS

where unspecifying a test reduces the lengths of the pathsassociated with detected path delay faults.

III. FIRST PROCEDURE FOR UNSPECIFYING A TEST SET

The first procedure for unspecifying a test set with a set ofdetected transition path delay faults maintains the detectionof all the faults in . The procedure proceeds as described next.Section V includes a more formal description of the procedure.For every test and for every such that ,

the procedure attempts to unspecify the scan-in value . It

TABLE IVTEST SET AFTER THE FIRST PROCEDURE

considers the scan-in values of all the tests one at a time in arandom order. This helps in distributing the unspecified valuesas evenly as possible. When is considered, the proceduresets , where is an unspecified value. It updatesby recomputing it as the next-state for and . It then per-forms fault simulation to determine the effect of the unspecifiedvalue on the set of detected transition path delay faults, . If theprocedure finds that a fault from is not detected, it restores theprevious, specified value of , and updates . Otherwise,it keeps unspecified.The procedure determines the effect on as follows. Since

unspecifying can only affect the set of faults detectedby , the procedure only checks whether all the faults inthat are detected by continue to be detected. To simplify thecheck, it only checks whether the faults are detected by . Thisis implemented as follows.Let be the subset of that contains every faultwith . Let , and suppose that

. To check whether isdetected, the procedure needs to simulate the transition faults

included in . The procedure adds thesefaults to a set of target faults denoted by . Thus, for every

includes thefaults .The procedure simulates under . To accept the un-

specified value on , all the faults in must continueto be detected.For illustration, the next example shows the process of un-

specifying the test set of shown in Table I. Considering thescan-in values in a random order, the procedure first attempts tounspecify . Based on Table III,and

. Fault simulation ofunder , after setting and updating , shows thatall the faults in are detected. Therefore, the unspecifiedvalue is accepted.Next, the procedure attempts to unspecify . Fault sim-

ulation of under , after setting and updating, shows that the fault 2.01 is not detected. Therefore, the pro-

cedure restores the specified value of and updatesagain.Considering next, the procedure finds that

, , andthat all the faults in are detected after settingand updating . Therefore, the unspecified value is accepted.After considering all the scan-in values in , the test set

shown in Table IV is obtained. This test set detects the sametransition path delay faults as the test set in Table I.

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IV. SECOND PROCEDURE FOR UNSPECIFYING A TEST SET

The goal of the second procedure is to unspecify additionalscan-in values, in order to make the test set more amenable totest data compression, at the cost of reducing the lengths of thepaths associated with detected transition path delay faults. Theprocedure unspecifies values and reduces path lengths graduallyto produce a series of test sets. Any one of these test sets can beselected as the one that will be used for the circuit. The proce-dure is described next. A more formal description is given inSection V.The procedure is based on the following considerations.1) While unspecifying the test set, the procedure considersthe tests in one at a time. This provides a gradualdecrease in path lengths while increasing the number ofunspecified values.

2) The procedure considers the tests in by order of de-creasing number of specified values, starting with thetests that have the highest number of specified values.In this way the procedure gives precedence to unspeci-fying these tests.

3) The shortest path that a transition path delay fault canbe associated with is of length one. The largest numberof unspecified values will be obtained if the procedureis allowed to reduce the path lengths associated with de-tected transition path delay faults to one. With a pathof length one, a transition path delay fault consists of asingle transition fault. Thus, allowing path lengths to bereduced to one is equivalent to requiring that the unspec-ified test set would detect all the transition faults that aredetected by the completely-specified test set. This is theconstraint used by the procedure.

Experimental results indicate that the path lengths associ-ated with detected transition path delay faults decrease gradu-ally even though the procedure allows paths of length one to beobtained. For an even slower decrease in path lengths it is pos-sible to define longer subpaths of the transition path delay faultsdetected by every test, and use them while unspecifying the test.Before attempting to unspecify the scan-in values of a test

, the procedure computes the set of transition faults thatare only detected by . This set is denoted by . To obtain

, the procedure performs transition fault simulation withfault dropping of the tests in excluding . It then simulates. The faults detected by are ones that are not detected by anyother test in . These faults are included in .Using as the set of target faults, the procedure unspec-

ifies the scan-in values of one at a time in a random order.When is considered, the procedure sets andupdates . It then performs fault simulation of under .If any of the faults in is not detected, the procedure re-stores the previous, specified value of , and updates .Otherwise, it keeps unspecified.It is possible to obtain if all the transition faults

detected by are also detected by other tests. In this case, theprocedure can unspecify all the scan-in values of . The proce-dure removes from the test set only after simulating transitionpath delay faults, as follows.

TABLE VTEST SET AFTER THE SECOND PROCEDURE

TABLE VISET AFTER APPLYING THE SECOND PROCEDURE

During transition path delay fault simulation, if a fault isdetected by a test , the procedure sets . If a test

does not have any transition path delay fault suchthat , the test is unnecessary and can be removedfrom .For illustration, the next example shows the application of

this procedure to the test set of shown in Table IV. Thetest with three specified scan-in values is considered first.Transition fault simulation where is simulated last shows that

. Unspecifying the bits of oneat a time in a random order, the procedure does not accept to un-specify and , but it accepts to unspecify .The test of the test set in Table IV is considered next. The

procedure finds that . It does not accept tounspecify , but it unspecifies .After considering all the tests, the test set shown in Table V

is obtained. The set of detected transition path delay faults forthis test set is shown in Table VI. Tables V and VI demonstratethe following effects.The test set of Table V has more unspecified values than the

test set of Table IV. In particular, the test set of Table IV has atest with three specified scan-in values. In Table V themaximumnumber of specified scan-in values in any test is two. The costis reduced path lengths associated with detected transition pathdelay faults. In general, there are also intermediate test sets withfewer unspecified values and higher path lengths.

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TABLE VIITEST SETS FOR

TABLE VIIITEST SETS FOR

V. OVERALL PROCEDURE FOR UNSPECIFYING A TEST SET

Procedures 1 and 2 given below summarize the proceduresdescribed in Sections III and IV, respectively. Given a test set, the proposed procedure applies Procedure 1 followed by Pro-cedure 2.In both procedures, is used for storing the indices and of

the scan-in values, , that the procedure needs to attemptto unspecify. is the set of faults that need to be detected byfor to be unspecified. It is defined based on transition

path delay faults that are detected by in Procedure 1, and basedon transition faults that are detected by in Procedure 2. In bothcases, contains transition faults.Procedure 1: First procedure for unspecifying a test set.1) Let be a given test set. Perform transition path delay faultsimulation of to find the set of detected transition pathdelay faults.

2) Set .3) Select an entry from randomly. Remove from

.

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TABLE IXTEST SETS FOR

4) Set . For everysuch that , add the faults

to .5) Set , and update .6) Simulate under . If any fault from is notdetected, set and update .

7) If , go to Step 3.Procedure 2: Second procedure for unspecifying a test set.1) Let be a given test set. For every set

to indicate that has not been considered yet.2) Select a test with that has thehighest number of specified scan-in values of all the testswith . Set .

3) Perform fault simulation with fault dropping of the set oftransition faults under .

4) Continue fault simulation with fault dropping of the setof transition faults under . Include the transition faultsdetected by in .

5) Set .6) Select an entry from randomly. Remove from

.7) Set , and update .8) Simulate under . If any fault from is notdetected, set and update .

9) If , go to Step 6.

10) Perform transition path delay fault simulation of to findthe set of detected transition path delay faults.

11) For every , if does not contain any fault suchthat , remove from .

12) If there is a test with , go to Step 2.

VI. RANDOMLY FILLED TEST SETS, AND COMPARISON OFSETS OF DETECTED FAULTS

When compressed tests are applied to a circuit throughdecompression logic, the tests are completely-specified. Thedecompression logic may fill unspecified values with randomvalues, or such that they are equal to other, specified values.This section discusses the random filling of incompletely-spec-ified test sets.For ease of reference, the completely-specified test set to

which the proposed procedure is applied, and the varioustest sets produced by the proposed procedure, are denoted asfollows.• is the completely-specified test set to which the pro-posed procedure is applied.

• is the test set obtained by applying Procedure 1• is the test set obtained after Procedure 2 unspecifiesthe th test in the order by which it considers the tests.

• is the test set obtained after Procedure 2 considersall the tests.

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TABLE XTEST SETS FOR

Let be an incompletely-specified test set obtained by theproposed procedure. The procedure described in this section fillsthe unspecified values of randomly to obtain a completely-specified test set denoted by .Let be the set of transition path delay faults detected by. Let be the set of transition path delay faults detected

by . When comparing with , it is guaranteed thatevery fault will have a corresponding fault

such that is contained in (as a special case,may be obtained). This is due to the fact that randomly fillingthe unspecified values of can only increase the lengths ofthe paths associated with detected transition path delay faults.A more interesting comparison is of with , whereis the set of transition path delay faults that are detected by

the completely-specified test set . This comparison needsto take into account the following effects.The most dominant effect is expected to be that unspecified

values in may result in a reduction of path lengths associ-ated with detected transition path delay faults. Randomly fillingthese values may or may not recover the path lengths. However,the following competing effects also occur.

was generated targeting path delay faults that are asso-ciated with the longest full paths. During transition path delayfault simulation, faults associated with shorter paths and sub-paths are considered as well. Due to the random filling of ,it is possible for to detect more faults than . It is alsopossible for to detect a fault associated with a longer sub-path than . In general, this implies that may detect afault that is not contained in any fault detected by .

However, the detection of transition path delay faults associatedwith shorter paths may cause the average path length associatedwith a detected transition path delay fault to be lower even whenthe test set detects faults associated with long paths.To alleviate these effects, the procedure used for comparingwith matches every fault with exactly

one fault based on . The fault maybe one of the faults in , or it may be contained in such afault. It is selected such that it is as similar to as possible, andit is associated with the longest possible path. This is based onthe observation that may be replaced by one or more faultsassociated with shorter paths when is unspecified, andmay or may not recover the detection of .The procedure computes for every by

applying the following steps.1) Considering the faults in by order of decreasinglength, the procedure looks for the first faultsuch that contains . If is found, the proceduresets and does not consider further.In this case, is matched with a fault that is similar to it.It may be the same or it may be associated with a longerpath. It is possible for to be associated with a longerpath than due to the random fill as discussed above.

2) Considering the faults in by order of decreasinglength again, the procedure looks for the first fault

such that contains . If is found, the pro-cedure sets and does not considerfurther. In this case, is as similar to as possible,

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POMERANZ: COMPUTING TWO-PATTERN TEST CUBES FOR TRANSITION PATH DELAY FAULTS 483

TABLE XITEST SETS FOR

TABLE XIITEST SETS FOR

but it is associated with a shorter path. The random filldoes not recover the length of in this case.

3) If nomatch is found for during the first or second step,the procedure considers subpaths of where it removestransition faults from the beginning and transition

faults from the end of , for . Letbe the fault obtained by removing transition

faults from the beginning and transition faults fromthe end of . Considering the faults in by orderof decreasing length, the procedure looks for the firstfault such that is contained in . The

procedure sets . In this case, the bestmatch for is the part of corresponding to .

Since detects all the transition faults detected by ,it is guaranteed that when consists of a single transitionfault, it will be contained in one of the faults in . Therefore,the third step guarantees that a match will be found for everyfault in .After computing for every , the proce-

dure computes a set that contains for every. The comparison between and is made

based on and .

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484 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 21, NO. 3, MARCH 2013

TABLE XIIITEST SETS FOR

Matching of sets of detected faults can also be applied to, which is the incompletely-specified test set produced by

the proposed procedure, and fromwhich was obtained. Thisallows the effects of the random fill in to be seen relative to

based on the same matching of the sets of detected faults.

VII. EXPERIMENTAL RESULTS

This section reports on the application of the proposed proce-dure to benchmark circuits. The test sets to which the procedurewas applied are the ones computed by the procedure from [17]as discussed in Section II.The results are shown in Tables VII–XIII. In order to show

detailed results and demonstrate the effects of gradually in-creasing the numbers of unspecified values on path lengths,results are shown only for several benchmark circuits. Theresults are shown as follows.There are several rows in every table corresponding to dif-

ferent test sets. The type of the test set is shown under column. The corresponding test set is , using the notation in-

troduced in the previous section.Of all the test sets obtained by Procedure 2, the tables re-

port on the ones where a reduction is obtained in the maximumnumber of specified values for any test in the test set, or the totalnumber of specified values in the test set is reduced by 10%.Each row is organized as follows. Column shows the

total number of tests in . Column shows the per-centage of specified scan-in values in , and the maximumpercentage of specified scan-in values in any test. With statevariables, the total number of scan-in values in is ,and there are scan-in values per test. The percentages of speci-fied scan-in values are computed with respect to these numbers.Column shows the total number of detected transi-

tion path delay faults, the number of detected faults that are as-sociated with full paths, and the number of detected faults thatare associated with subpaths.Column shows the average length of a path associ-

ated with a detected transition path delay fault considering allthe detected faults, considering detected faults associated withfull paths, and considering detected faults associated with sub-paths.

Column shows the normalized run time of theproposed procedure. For normalization, the run time is dividedby the run time for simulating . Normalization to the faultsimulation time of is appropriate since the proposed pro-cedure is based on fault simulation.Column shows the average length of a path associated

with a detected transition path delay fault using the matchingof sets of detected faults described in Section VI. Subcolumn

shows this information for the test set . Subcolumnshows this information for the test set obtained after the

random values of are filled randomly.The following points can be seen from the tables. Large num-

bers of detected transition path delay faults are associated withsubpaths. Therefore, it is important to consider subpaths duringthe process of unspecifying a test set.The first procedure reduces the percentages of specified

values without affecting the detected transition path delayfaults. The reduction is limited by the need to detect the sametransition path delay faults as the completely-specified test set.In all the cases, the maximum percentage of specified valuesfor a test remains high.The second procedure is able to reduce the percentages of

specified values significantly compared with the first proce-dure. While the transition fault coverage remains the same,the number of detected transition path delay faults is reduced,and the lengths of the paths associated with detected faults arereduced. The reductions are gradual, and allow an appropriatetest set to be selected for every circuit depending on the con-straints of a test data compression method.Randomly filling a test set that has unspecified scan-in values

increases the lengths of the paths associated with detected tran-sition path delay faults. Typically there are several test sets (thefirst test sets produced by the proposed procedure) where theaverage length of the paths associated with transition path delayfaults that are detected by is close to that of . It may beslightly higher if there are detectable faults that are associatedwith long subpaths, or if does not detect all the detectabletransition path delay faults associated with the longest paths.It is possible to stop the application of Procedure 2 when the

percentage of unspecified values is high enough such that a se-lected test data compression method can be applied to the test

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set. This would limit the run time of the procedure, and preventpath lengths from being reduced unnecessarily.

VIII. CONCLUDING REMARKS

This paper described two procedures for unspecifying a two-pattern test set for transition path delay faults in full-scan cir-cuits. Both procedures unspecify scan-in values. The first pro-cedure ensures that the same transition path delay faults will bedetected by the test set after it is unspecified. To allow addi-tional scan-in values to be unspecified, and thus make the testset more amenable to test data compression, the second pro-cedure allows the lengths of the paths associated with the de-tected transition path delay faults to be reduced. Experimentalresults demonstrated that the second procedure is able to un-specify significant numbers of scan-in values that the first proce-dure cannot unspecify. When the unspecified values were filledrandomly, the path lengths were increased, and became closerto those of the completely-specified test set to which the proce-dure was applied. Thus, it is possible to allow scan-in values tobe unspecified while reducing the path lengths associated withdetected path delay faults even if the goal is to maintain the pathlengths of the completely-specified test set. The comparison ofthe sets of detected path delay faults of different test sets used amatching of detected faults. The matching provided a more ac-curate assessment of the effects of unspecifying values and ofrandomly filling them on path lengths associated with detectedfaults.

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tiple scan chains,” in Proc. Int. Conf. Comput.-Aided Design, 1998, pp.74–78.

[2] C. Barnhart, V. Brunkhorst, F. Distler, O. Farnsworth, B. Keller, andB. Koenemann, “OPMISR: The foundation for compressed ATPG vec-tors,” in Proc. Int. Test Conf., 2001, pp. 748–757.

[3] B. Koenemann, C. Barnhart, B. Keller, T. Snethen, O. Farnsworth,and D. Wheater, “A smartBIST variant guaranteed encoding,” in Proc.Asian Test Symp., 2001, pp. 325–330.

[4] J. Rajski, J. Tyszer, M. Kassab, N. Mukherjee, R. Thompson, K.-H.Tsai, A. Hertwig, N. Tamarapalli, G. Mrugalski, G. Eide, and J. Qian,“Embedded deterministic test for low cost manufacturing test,” inProc.Int. Test Conf., 2002, pp. 301–310.

[5] P. Goel and B. C. Rosales, “Test generation and dynamic compactionof tests,” in Proc. Test Conf., 1979, pp. 189–192.

[6] I. Pomeranz, L. N. Reddy, and S. M. Reddy, “COMPACTEST: Amethod to generate compact test sets for combinational circuits,”IEEE Trans. Comput.-Aided Design, vol. 12, no. 7, pp. 1040–1049,Jul. 1993.

[7] S. Kajihara and K. Miyase, “On identifying don’t care inputs of testpatterns for combinational circuits,” in Proc. Int. Conf. Comput.-AidedDesign, 2001, pp. 364–369.

[8] A. El-Maleh and A. Al-Suwaiyan, “An efficient test relaxation tech-nique for combinational & full-scan sequential circuits,” in Proc. VLSITest Symp., 2002, pp. 53–59.

[9] K. Fuchs, F. Fink, and M. H. Schulz, “DYNAMITE: An efficientautomatic test pattern generation for path delay faults,” IEEE Trans.Computer-Aided Design Integr. Circuits Syst., vol. 10, no. 10, pp.1323–1335, Oct. 1991.

[10] U. Sparmann, D. Luxenburger, K.-T. Cheng, and S. M. Reddy, “Fastidentification of robust dependent path delay faults,” in Proc. DesignAutom. Conf., 1995, pp. 119–125.

[11] S. Kajihara, K. Kinoshita, I. Pomeranz, and S. M. Reddy, “A methodfor identifying robust dependent and functionally unsensitizablepaths,” in Proc. VLSI Design Conf., 1997, pp. 82–87.

[12] K. Heragu, J. H. Patel, and V. D. Agrawal, “Fast identificationof untestable delay faults using implications,” in Proc. Int. Conf.Comput.-Aided Design, 1997, pp. 642–647.

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[16] I. Pomeranz and S. M. Reddy, “Path selection for transition path delayfaults,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 18, no.3, pp. 401–409, Mar. 2010.

[17] I. Pomeranz and S. M. Reddy, “Input necessary assignments for testingof path delay faults in standard-scan circuits,” IEEE Trans. Very LargeScale Integr. (VLSI) Syst., vol. 19, no. 2, pp. 333–337, Feb. 2011.

Irith Pomeranz (M’89–SM’96–F’99) received theB.Sc. degree (summa cum laude) in computer engi-neering and the D.Sc. degree from the Department ofElectrical Engineering, Technion—Israel Institute ofTechnology, Haifa, Israel, in 1985 and 1989, respec-tively.From 1989 to 1990, she was a Lecturer with the

Department of Computer Science, the Technion.From 1990 to 2000, she was a faculty memberwith the Department of Electrical and ComputerEngineering, University of Iowa. In 2000, she joined

the School of Electrical and Computer Engineering, Purdue University, WestLafayette, IN. Her research interests include testing of VLSI circuits, designfor testability, synthesis and design verification.Dr. Pomeranz was a recipient of the NSF Young Investigator Award in 1993

and the University of Iowa Faculty Scholar Award in 1997. She is a GoldenCore Member of the IEEE Computer Society.