Computer Architecture CSE 3322 Lecture 3 Assignment: 2.4.1, 2.4.4, 2.6.1, 2.10.4, 2.10.6 Due 2/3/09...
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Computer Architecture CSE 3322 Lecture 3 Assignment: 2.4.1, 2.4.4, 2.6.1, 2.10.4, 2.10.6 Due 2/3/09 Read 2.8
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Transcript of Computer Architecture CSE 3322 Lecture 3 Assignment: 2.4.1, 2.4.4, 2.6.1, 2.10.4, 2.10.6 Due 2/3/09...
Computer Architecture CSE 3322Lecture 3
Assignment: 2.4.1, 2.4.4, 2.6.1, 2.10.4, 2.10.6
Due 2/3/09
Read 2.8
MIPS Assembly Instructions
Instruction Example Meaning
add add $s1, $s2, $s3 $s1 = $s2 + $s3subtract sub $s1, $s2, $s3 $s1 = $s2 - $s3
$s1, $s2, $s3, … are registers. The $ indicates a Register in the MIPS Assembly Language
Also $s2 + $s3 $s1
MIPS Assembly Instructions
Instruction Example Meaning
load word lw $s1, 300 ($s2) $s1 = Mem[$s2+300]
store word sw $s1, 300 ($s2) Mem[$s2+300] = $s1
$s1, $s2, $s3, … are registers300 is a constant
Machine Instruction Format
Instr Format op rs rt Constant lw I 35 18 17 300
bits 6 5 5 16
load word lw $s1, 300 ($s2) $s1 = Mem[$s2+300]
C statement: A[i] = h + A[i] A[i] & h are integers where A is an array with base in $s3 h is in $s1 i is in $s2
A[i] • • •A[3]A[2]A[1]A[0]
Base + 4 * i
Base + 12Base + 8Base + 4Base
Words in an Arrayin memory are 4 bytes apart, so the Address incrementsby 4.
C statement: A[i] = h + A[i], A[i] & h are integerswhere A is an array with base in $s3 h is in $s1 i is in $s2
Compiles into assembly code:# denotes comments
C statement: A[i] = h + A[i]where A is an array with base in $s3 h is in $s1 i is in $s2
Compiles into assembly code:# denotes comments
# Compute Address of A[i]: Base + 4*i
C statement: A[i] = h + A[i]where A is an array with base in $s3 h is in $s1 i is in $s2
Compiles into assembly code:
# Compute Address of A[i ]: Base + 4*i add $t1, $s2, $s2 # Temp reg $t1 = i + i =2iadd $t1, $t1, $t1 # Temp reg $t1 = 2i +2i = 4i
C statement: A[i] = h + A[i]where A is an array with base in $s3 h is in $s1 i is in $s2
Compiles into assembly code:
# Compute Address of A[i ]: Base + 4*iadd $t1, $s2, $s2 # Temp reg $t1 = i + i =2iadd $t1, $t1, $t1 # Temp reg $t1 = 2i +2i = 4iadd $t1, $t1, $s3 # $t1 = address of A[i]
C statement: A[i] = h + A[i]where A is an array with base in $s3 h is in $s1 i is in $s2
Compiles into assembly code:
# Compute Address of A[i ]: Base + 4*iadd $t1, $s2, $s2 # Temp reg $t1 = i + i =2iadd $t1, $t1, $t1 # Temp reg $t1 = 2i +2i = 4iadd $t1, $t1, $s3 # $t1 = address of A[i]
# Compute the new A[i]lw $t2, 0($t1) # Temp reg $t2 = A[i]
C statement: A[i] = h + A[i]where A is an array with base in $s3 h is in $s1 i is in $s2
Compiles into assembly code:
# Compute Address of A[i] : Base + 4*i add $t1, $s2, $s2 # Temp reg $t1 = i + i =2iadd $t1, $t1, $t1 # Temp reg $t1 = 2i +2i = 4iadd $t1, $t1, $s3 # $t1 = address of A[i]
# Compute the new A[i]lw $t2, 0($t1) # Temp reg $t2 = A[i] add $t2, $t2, $s1 # $t2 = A[i] + h
C statement: A[i] = h + A[i]where A is an array with base in $s3 h is in $s1 i is in $s2
Compiles into assembly code:
# Compute Address of A[i] : Base + 4*i add $t1, $s2, $s2 # Temp reg $t1 = i + i =2iadd $t1, $t1, $t1 # Temp reg $t1 = 2i +2i = 4iadd $t1, $t1, $s3 # $t1 = address of A[i]
# Compute the new A[i]lw $t2, 0($t1) # Temp reg $t2 = A[i] add $t2, $t2, $s1 # $t2 = A[i] + hsw $t2, 0($t1) # Store $t2 into A[i]
C statement: A[i] = h + A[i]where A is an array with base in $s3 h is in $s1 i is in $s2
lw $t2, 0($t1) # Temp reg $t2 = A[i] add $t2, $t2, $s1 # $t2 = A[i] + hsw $t2, 0($t1) # Store $t2 into A[i] $s1~17, $t1~9, $t2~10
Translate to MIPS Machine language using decimal op rs rt rd address/shamt funct
lw $t2, 0($t1) # Temp reg $t2 = A[i] add $t2, $t2, $s1 # $t2 = A[i] + hsw $t2, 0($t1) # Store $t2 into A[i] $s1~17, $t1~9, $t2~10
Translate to MIPS Machine language using decimal op rs rt rd address/shamt funct 35
lw $t2, 0($t1) # Temp reg $t2 = A[i] add $t2, $t2, $s1 # $t2 = A[i] + hsw $t2, 0($t1) # Store $t2 into A[i] $s1~17, $t1~9, $t2~10
Translate to MIPS Machine language using decimal op rs rt rd address/shamt funct 35 9 10 0
lw $t2, 0($t1) # Temp reg $t2 = A[i] add $t2, $t2, $s1 # $t2 = A[i] + hsw $t2, 0($t1) # Store $t2 into A[i] $s1~17, $t1~9, $t2~10
Translate to MIPS Machine language using decimal op rs rt rd address/shamt funct 35 9 10 0 0 10 17 10 0 32
lw $t2, 0($t1) # Temp reg $t2 = A[i] add $t2, $t2, $s1 # $t2 = A[i] + hsw $t2, 0($t1) # Store $t2 into A[i] $s1~17, $t1~9, $t2~10
Translate to MIPS Machine language using decimal op rs rt rd address/shamt funct 35 9 10 0 0 10 17 10 0 32 43 9 10 0
lw $t2, 0($t1) # Temp reg $t2 = A[i] add $t2, $t2, $s1 # $t2 = A[i] + hsw $t2, 0($t1) # Store $t2 into A[i] $s1~17, $t1~9, $t2~10
Translate to MIPS Machine language using decimal op rs rt rd address/shamt funct 35 9 10 0 0 10 17 10 0 32 43 9 10 0
Translate to MIPS Machine language using binary
100011 01001 01010 0000000000000000
lw $t2, 0($t1) # Temp reg $t2 = A[i] add $t2, $t2, $s1 # $t2 = A[i] + hsw $t2, 0($t1) # Store $t2 into A[i] $s1~17, $t1~9, $t2~10
Translate to MIPS Machine language using decimal op rs rt rd address/shamt funct 35 9 10 0 0 10 17 10 0 32 43 9 10 0
Translate to MIPS Machine language using binary
100011 01001 01010 0000000000000000
000000 01010 10001 01010 00000 100000
lw $t2, 0($t1) # Temp reg $t2 = A[i] add $t2, $t2, $s1 # $t2 = A[i] + hsw $t2, 0($t1) # Store $t2 into A[i] $s1~17, $t1~9, $t2~10
Translate to MIPS Machine language using decimal op rs rt rd address/shamt funct 35 9 10 0 0 10 17 10 0 32 43 9 10 0
Translate to MIPS Machine language using binary
100011 01001 01010 0000000000000000
000000 01010 10001 01010 00000 100000
101011 01001 01010 0000000000000000
Instructions for Making Decisionsif – then – else Constructif ( i = = j ) a = b; else a = c;
i = =j
a= ca = b
Exit:
NoYes
Instructions for Making Decisionsif – then – else Constructif ( i = = j ) a=b; else a=c;
i = =j
a= ca = b
Exit:
NoYesbeqbranch onequal
Instructions for Making Decisionsif – then – else Constructif ( i = = j ) a=b; else a=c;
i = =j
a= ca = b
Exit:
NoYes bnebeqbranch on not equalbranch on
equal
Instructions for Making Decisionsif – then – else Constructif ( i = = j ) a=b; else a=c;
i = =j
a= ca = b
Exit:
NoYes bnebeq
j
branch on not equalbranch onequal
jump
branch on equal beq rs, rt, Label means if (rs = =rt) go to Label
I type format op = 4
Label is the target statement label. It is an addressthat is calculated by the assembler.
Instr Format op rs rt address beq I 4 reg reg “Label”
bits 6 5 5 16
branch on equal beq rs, rt, Label means if (rs = =rt) go to Label
I type format op = 4
branch on not equal bne rs, rt, Labelmeans if (rs != rt) go to Label
I type format op = 5
Label is the target statement label. It is an addressthat is calculated by the assembler.
branch on equal beq rs, rt, Label means if (rs = =rt) go to Label
I type format op = 4
branch on not equal bne rs, rt, Labelmeans if (rs != rt) go to Label
I type format op = 5
jump j Labelmeans go to Label
J type format op = 2
Label is the target statement label. It is an addressthat is calculated by the assembler.
if ( i = = j ) a=b; else a=c;
i = =j
a= ca = b
Exit:
NoYesbne
beq
j
branch on not equalbranch onequal
jump
branch Else #go to Else if ?statement 1j Exit #go to Exit
Else: statement 2Exit:
if ( i = = j ) a=b; else a=c;
i = =j
a= ca = b
Exit:
NoYesbnebeq
j
branch on not equalbranch onequal
jump
branch Else #go to Else if ? Most Likelystatement 1 Casej Exit #go to Exit
Else: statement 2Exit:
if ( i = = j ) a=b; else a=c;
i = =j
a= ca = b
Exit:
NoYes bnebeq
j
branch on not equalbranch onequal
jump
a ~ $s1b ~ $s2c ~ $s3i ~ $s4j ~ $s5
if ( i = = j ) a=b; else a=c;
i = =j
a= ca = b
Exit:
NoYes bnebeq
j
branch on not equalbranch onequal
jump
bne $s4, $s5, Else # go to Else if i!=j
Else: add $s1, $s3, $zero # a=c , Note: $zero is 0 Exit:
a ~ $s1b ~ $s2c ~ $s3i ~ $s4j ~ $s5
if ( i = = j ) a=b; else a=c;
i = =j
a= ca = b
Exit:
NoYes bnebeq
j
branch on not equalbranch onequal
jump
bne $s4, $s5, Else # go to Else if i!=jadd $s1, $s2, $zero # a=bj Exit # go to Exit
Else: add $s1, $s3, $zero # a=cExit:
a ~ $s1b ~ $s2c ~ $s3i ~ $s4j ~ $s5
while ( A[i] >= 0)i = i + j
i ~ $s1j ~ $s2base of A ~ $s3
MIPS assembly code is:
while ( A[i] >= 0)i = i + j
i ~ $s1j ~ $s2base of A ~ $s3
MIPS assembly code is:
A[i] • • •A[3]A[2]A[1]A[0]
Base + 4 * i
Base + 12Base + 8Base + 4Base
Words in an Arrayin memory are 4 bytes apart, so the Address incrementsby 4.
while ( A[i] >= 0)i = i + j
i ~ $s1j ~ $s2base of A ~ $s3
MIPS assembly code is:
Loop: add $t1, $s1, $s1 # $t1 = 2 * iadd $t1, $t1, $t1 # $t1 = 4 * i
while ( A[i] >= 0)i = i + j
i ~ $s1j ~ $s2base of A ~ $s3
MIPS assembly code is:
Loop: add $t1, $s1, $s1 # $t1 = 2 * iadd $t1, $t1, $t1 # $t1 = 4 * iadd $t1, $t1, $s3 # $t1 = addr of A[i]
while ( A[i] >= 0)i = i + j
i ~ $s1j ~ $s2base of A ~ $s3
MIPS assembly code is:
Loop: add $t1, $s1, $s1 # $t1 = 2 * iadd $t1, $t1, $t1 # $t1 = 4 * iadd $t1, $t1, $s3 # $t1 = addr of A[i]lw $t0, 0 ($t1) # $t0 = A[i]
while ( A[i] >= 0)i = i + j
i ~ $s1j ~ $s2base of A ~ $s3
MIPS assembly code is:
Loop: add $t1, $s1, $s1 # $t1 = 2 * iadd $t1, $t1, $t1 # $t1 = 4 * iadd $t1, $t1, $s3 # $t1 = addr of A[i]lw $t0, 0 ($t1) # $t0 = A[i]
slt set on less than slt rd, rs, rt
means if rs < rt, rd = 1, else rd=0
while ( A[i] >= 0)i = i + j
i ~ $s1j ~ $s2base of A ~ $s3
MIPS assembly code is:
Loop: add $t1, $s1, $s1 # $t1 = 2 * iadd $t1, $t1, $t1 # $t1 = 4 * iadd $t1, $t1, $s3 # $t1 = addr of A[i]lw $t0, 0($t1) # $t0 = A[i]slt $t2, $t0, $zero # $t2 = 1 if $t0 < 0
Exit:
while ( A[i] >= 0)i = i + j
i ~ $s1j ~ $s2base of A ~ $s3
MIPS assembly code is:
Loop: add $t1, $s1, $s1 # $t1 = 2 * iadd $t1, $t1, $t1 # $t1 = 4 * iadd $t1, $t1, $s3 # $t1 = addr of A[i]lw $t0, 0 ($t1) # $t0 = A[i]slt $t2, $t0, $zero # $t2 = 1 if $t0 < 0 bne $t2, $zero, Exit # if A[i]<0 goto Exit
Exit:
while ( A[i] >= 0)i = i + j
i ~ $s1j ~ $s2base of A ~ $s3
MIPS assembly code is:
Loop: add $t1, $s1, $s1 # $t1 = 2 * iadd $t1, $t1, $t1 # $t1 = 4 * iadd $t1, $t1, $s3 # $t1 = addr of A[i]lw $t0, 0 ($t1) # $t0 = A[i] slt $t2, $t0, $zero # $t2 = 1 if $t0 < 0 bne $t2, $zero, Exit # if A[i]<0 goto Exitadd $s1, $s1, $s2 # i = i + jj Loop # goto Loop
Exit:
MIPS Assembly Instructions
add add $s1, $s2, $s3 $s1 = $s2 + $s3
subtract sub $s1, $s2, $s3 $s1 = $s2 - $s3
op rs rt rd shamt funct
0
op rs rt rd shamt funct
0 1718 19 0 32
1718 19 0 34
MIPS Assembly Instructionsload word lw $s1, 300 ($s2) $s1 = Mem[$s2+300]
store word sw $s1, 300 ($s2) Mem[$s2+300] = $s1
op rs rt address
35 18 17
op rs rt address
43 18 17
300
300
MIPS Assembly Instructions
op rs rt address
4 17 18
op rs rt address
5 17 18
address
address
branch on equal beq $s1, $s2, Label if ($s1 = =$s2) go to Label
branch on not equal bne $s1, $s2, Label if ($s1 != $s2) go to Label
MIPS Assembly Instructions
op address
2
op rs rt rd shamt funct
0 18 19
address
set on less than slt $s1, $s2, $s3 if $s2 < $s3, $s1 = 1, else $s1=0
jump j Label go to Label
0 4217
MIPS Assembly Instructions jump register
jr $s1 go to address in register $s1
op rs rt rd shamt funct
0 17 0 0 80
