1 COMP541 Combinational Logic - 3 Montek Singh Jan 23, 2012.
COMP541 Combinational Logic - 3
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Transcript of COMP541 Combinational Logic - 3
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COMP541
Combinational Logic - 3
Montek Singh
Sep 3, 2014
Today’s Topics
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Synthesis: from truth table to logic implementation
Schematic drawing conventions
Non-Boolean values“Don’t Cares”, or X values“Floating values”, or Z values
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Mechanically Go From Truth Table to Function
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From Truth Table to Logic Equation Consider a truth table
Standard sum-of-products implementationOR of all product terms that are 1For each row where output is 1
– write the minterm» called “ON-set minterm”
– OR all of these minterms
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Standard Forms Not necessarily simplest F
But it is a systematic way to go from truth table to function
Definitions:“Literal”: a single variable, complemented or not Ā“Product terms”: AND of literals ĀBZ“Sum terms”: OR of product terms X + ĀThis is logical product and sum, not arithmetic
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Definition: Minterm Product term in which all variables appear
once (complemented or not)each minterm is 1 in exactly one row, 0 elsewhere
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Number of Minterms For n variables, there will be 2n minterms
Like binary numbers from 0 to 2n-1Often numbered same way (often in decimal)
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Maxterms Sum term in which all variables appear once
(complemented or not)each maxterm is 0 in exactly one row, 1 elsewhere
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Minterm related to Maxterm Minterm and maxterm with same subscripts
are complements
Example
33 MZYXYZXm
Mjm j
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Implementation: Sum of Minterms OR all of the minterms of truth table row with a
1“ON-set minterms”F = m0 + m2 + m5 + m7
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More General: Sum of Products Simplifying sum-of-minterms can yield a sum
of productsdifference is that each term need not be a minterm i.e., terms do not need to have all variables
Ex:
Implementation is still AND-ORbut products may contain fewer literals
simplifies to:
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Two-Level Implementation Sum of products has 2 levels of gates
ANDs followed by an ORequivalently: NANDs followed by a NAND
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More Levels of Gates? What’s best?
Hard to answerMore gate delays (more on this later)But maybe we only have 2-input gates
So multi-input ANDs and ORs have to be decomposed
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Complement of a Function Definition: 1s & 0s swapped in truth table Mechanical way to derive algebraic form
Take the dualRecall: Interchange AND and OR, and 1s & 0s
Complement each literal
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Complement of F Not surprisingly, just sum of the other
mintermssum of “OFF-set minterms”
Example:F = m0 + m2 + m5 + m7
F’ = m1 + m3 + m4 + m6
simplifies to:
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Product of Maxterms Recall that maxterm is true except for its own
case So M1 is only false for 001
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Product of Maxterms Can express F as AND of all rows that should
evaluate to 0 i.e., product of OFF-set Maxterms!why?
a row in which F=0 (OFF-set)…… has a Maxterm that is 0which makes the product 0
or
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Complement of F Can express F’s
complement similarly:product of ON-set Maxterms!why?
a row in which F=1 (ON-set)…… has a Maxterm that is 0which makes F’ zero
or
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More General: Product of Sums Simplifying product-of-Maxterms can yield a
product of sumsdifference is that each term need not be a Maxterm i.e., terms do not need to have all variables
Ex:
Implementation is still OR-ANDbut each sum may contain fewer literals
simplifies to: HOW?? homework problem(hint: distributive property)
From Equations to Gates Simply parse the Boolean equation and
replace each operator with a gateAND, OR, NOT gatesparentheses indicate hierarchy
Example:
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Recap Working (so far) with AND, OR, and NOT Algebraic identities Algebraic simplification Minterms and maxterms Can now synthesize gate-level implementation
from truth table
Drawing Style Indicate inputs and outputs using
arrowsor: inputs at left/top, outputs at
right/bottom If possible, gates should flow from
left to rightor: top to bottom
Straight wires bestor: keep bends at a minimum (preferably
90 deg) Connections:
wires always connect at a “T” junctiona dot at a wire crossing indicates
connectionwire crossing without a dot means no
connection
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Circuit Schematic Rules (cont.)Wire connections
A dot where wires cross indicates a connectionWires crossing without a dot make no connectionWires always connect at a T junction
wires connectat a T junction
wires connectat a dot
wires crossingwithout a dot do
not connect
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Multiple Output Circuits: Example
A0
A1
PRIORITYCiIRCUIT
A2
A3
Y0
Y1
Y2
Y3
0
A1 A00 00 11 01 1
0
00
Y3 Y2 Y1 Y00000
0011
0100
A3 A20 00 00 00 0
0 0 0 1 0 00 10 11 01 10 0
0 10 10 11 0
0 11 01 01 10 00 1
1 01 01 11 1
1 01 11 11 1
0001
1110
0000
0000
1 0 0 01111
0000
0000
0000
1 0 0 01 0 0 0
Output assertedcorresponding tomost significantTRUE input
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Example: Priority Encoder Hardware
Example: Priority Encoder Hardware (contd.)
A1 A00 00 11 01 1
0000
Y3 Y2 Y1 Y00000
0011
0100
A3 A20 00 00 00 0
0 0 0 1 0 00 10 11 01 10 0
0 10 10 11 0
0 11 01 01 10 00 1
1 01 01 11 1
1 01 11 11 1
0001
1110
0000
0000
1 0 0 01111
0000
0000
0000
1 0 0 01 0 0 0
A3A2A1A0Y3
Y2
Y1
Y0
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Values that are not 0’s and 1’s
Don’t Cares (X)Floating values (Z)
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X values X is neither 1 nor 0
typically used to represent “unknown” or “illegal” values
Unknowne.g., an uninitialized value in a simulator
in hardware most flipflops will wake up to a 1 or a 0 value– but could be different each time it wakes up
Don’t Carean output specified as X means “don’t care”
i.e., left unspecified: whatever comes out is okay
Illegale.g., contention at output
two gates fighting
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Actually: Several Meanings of X
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When used to specify an input valueMeans: “Don’t Care”: this particular input variable’s
value does not matter when determining the outputExample: Output F is 1 when the inputs A, B, C are
1X1Means F = AC // B is a Don’t Care
Unknown/uninitialized signal If a simulator cannot determine the value of a signal,
it will display it as XOther values that depend on this signal may also
become X Contention (illegal input value)
Sometimes a simulator will use X to denote the value of a node that is being pulled both to 0 and to 1
Example: Outputs of two gates are shorted; or a gate has p-transistor and n-transistor network simultaneously on!
Don’t Cares (X)
A1 A00 00 11 01 1
0000
Y3 Y2 Y1 Y00000
0011
0100
A3 A20 00 00 00 0
0 0 0 1 0 00 10 11 01 10 0
0 10 10 11 0
0 11 01 01 10 00 1
1 01 01 11 1
1 01 11 11 1
0001
1110
0000
0000
1 0 0 01111
0000
0000
0000
1 0 0 01 0 0 0
A1 A00 00 11 XX X
0000
Y3 Y2 Y1 Y00001
0010
0100
A3 A20 00 00 00 1
X X 1 0 0 01 X
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Example: Priority Encoder Hardware
More compact representation!
Z values Also neither 1 nor 0
but actually “floating” i.e., the output is neither connected to 0
(ground) nor to 1 (power supply) Could be undesirable:
actual voltage is highly susceptible to noisee.g., neighboring wires/gates could easily
influence value
Could be by design:useful in buses, memories, multiplexers,
etc.usually one gate drives a wire to a 1 or 0all others “float” their outputs
example: tristate buffers/inverters cover in next lecture
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Next Mon next week:
Combinational building blocks
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