CHAOS GENERATION USING BJT’S AND PLL’S

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Active and Passive Elec. Comp., 2000, Vol. 23, pp. 97-100 (C) 2000 OPA (Overseas Publishers Association) N.V. Reprints available directly from the publisher Published by license under Photocopying permitted by license only the Gordon and Breach Science Publishers imprint. Printed in Singapore. CHAOS GENERATION USING BJT’S AND PLL’S UMESH KUMAR* EE Deptt., HT Delhi, New Delhi-llO016, India (Received 30 May 2000," In final form 12 July 2000) There are several simple equations which can be used to generate chaotic waveforms. We present two such equations, called the Duffing equation and the Ueda equation. The duffing equation displays a chaotic trajectory for particular values of the parameters. A two-BJT circuit and a PLL circuit are used as shown. Keywords: Dynamic systems; Chaos; Simple generating circuits; Use of BJT’s and PLL’s in chaotic waveforms I. THE BJT CHAOS CIRCUIT The complete two-transistor chaos generating (DOUBLE SCROLL) circuit is depicted in Figure [1]. We simulated the circuit on PSPICE and confirmed the chaotic waveforms. The simulated waveforms are shown in Figures 2-4. II. THE PLL CHAOS CIRCUIT Chaos can be observed in a widely used practical circuit, the second order phase worked loop [2]. It is used as a frequency modulated signal demodulator. The LM 565 C chip provides a PLL in the chip form and as shown in Figure 5, the output of the VCO becomes chaotic under certain operating conditions. Further detailed study on chaos *e-mail: [email protected] 97

Transcript of CHAOS GENERATION USING BJT’S AND PLL’S

Page 1: CHAOS GENERATION USING BJT’S AND PLL’S

Active and Passive Elec. Comp., 2000, Vol. 23, pp. 97-100 (C) 2000 OPA (Overseas Publishers Association) N.V.Reprints available directly from the publisher Published by license underPhotocopying permitted by license only the Gordon and Breach Science

Publishers imprint.Printed in Singapore.

CHAOS GENERATION USING BJT’SAND PLL’S

UMESH KUMAR*

EE Deptt., HT Delhi, New Delhi-llO016, India

(Received 30 May 2000," In finalform 12 July 2000)

There are several simple equations which can be used to generate chaotic waveforms. Wepresent two such equations, called the Duffing equation and the Ueda equation. Theduffing equation displays a chaotic trajectory for particular values of the parameters. Atwo-BJT circuit and a PLL circuit are used as shown.

Keywords: Dynamic systems; Chaos; Simple generating circuits; Use of BJT’s andPLL’s in chaotic waveforms

I. THE BJT CHAOS CIRCUIT

The complete two-transistor chaos generating (DOUBLE SCROLL)circuit is depicted in Figure [1]. We simulated the circuit on PSPICEand confirmed the chaotic waveforms. The simulated waveforms areshown in Figures 2-4.

II. THE PLL CHAOS CIRCUIT

Chaos can be observed in a widely used practical circuit, the secondorder phase worked loop [2]. It is used as a frequency modulated signaldemodulator. The LM 565 C chip provides a PLL in the chip formand as shown in Figure 5, the output of the VCO becomes chaoticunder certain operating conditions. Further detailed study on chaos

*e-mail: [email protected]

97

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98 U. KUMAR

D1 102

iFIGURE Two BJT chaos circuit.

10V

5V-

0V"

-5V

-10V-10mAV(1,3)

.5mA 0mA 5mA 10mA

FIGURE 2

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CHAOS GENERATION 99

2"0V

l1.0V

0.0V

2"011 -5nA 0mA 5mA0mAV(2,3)

10mA

FIGURE 3

10.0V

5.0V

0.0V

-5.0V

-10.0V-2,0VV(1,3)

-1.5V -1.0V -0.5V 0.0V 0.5V 1.0V 1.5V ., )V

FIGURE 4

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100 U. KUMAR

*Vc/2

O.01/=FFHInpot

LH 56 S O.01pF

FIGURE 5 PLL chaos circuit.

generation can be studied from two articles in Proceedings of theIEEE [3, 4].

References

[1] Chua, L. O., "Double Scroll via Two-transistor Circuit", IEEE Trans. on CAS,33(8), August, 1986.

[2] Endo, T. and Chua, L. O., "Chaos from PLL’s", IEEE Trans. on CAS, 35(8),August, 1988.

[3] Parker, T. and Chua, L. O., "Chaos: A Tutorial for Engineers", Proc. of IEEE,75(8), August, 1987 (special issue).

[4] Matsumoto, T., "Chaos in Electronic Circuits", Proc. ofIEEE, 75(8), August, 1987(special issue).

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