Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O...

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Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI and PCIe buses, and PCI and non-PCI video standards

Transcript of Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O...

Page 1: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Bus structures

Unit objectives: Describe the primary types of buses,

and define interrupt, IRQ, I/O address, DMA, and base memory address

Describe PCI and PCIe buses, and PCI and non-PCI video standards

Page 2: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Topic A

Topic A: Buses Topic B: The PCI bus

Page 3: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Buses

Communication pathway Defined by

– How many bits it transmits at one time– Signaling technique– Data transfer speed

Three types– Address– Data– Expansion (I/O)

continued

Page 4: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Buses, continued

Address and data buses enable: – Basic CPU operation – Interactions with memory

Expansion bus– Communication pathway for non-core

components to interact with the CPU, memory, and other core components

– Adapter cards add functionality– PCIe is taking over from PCI– Older buses: ISA, EISA, Micro Channel,

and PC bus

Page 5: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

PCI bus slots

Page 6: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

The riser bus

Brings the basic wiring and control of a function to a motherboard

Decreases cost Two main riser standards:

– Audio/Modem Riser (AMR) – Communications and Networking Riser

(CNR)

Page 7: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Activity A-1

Examining buses

Page 8: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

System interaction

Gain the attention of the CPU Access shared memory locations Extend the system BIOS Transfer data across the bus

Page 9: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Interrupts

Signal CPU that attention is needed– CPU stops what it was doing– Services the device request– Returns to its previous task

Page 10: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

IRQs

Numerical identifiers Help CPU identify interrupt source Enforce priority of interrupts Common IRQs

– IRQ 1: Keyboard– IRQ2: Cascade IRQs 8-15– IRQ4: COM1– IRQ6: Floppy– IRQ12: PS/2 mouse– IRQ14: Primary IDE hard drive

Page 11: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Device Manager: IRQs

Page 12: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Activity A-2

Examining IRQ assignments

Page 13: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

I/O addresses

Identify devices Have a range of numerical addresses

for each device Allow CPU to communicate multiple

commands Use 16-bit hexadecimal numbers User or BIOS configures the number

ranges

Page 14: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Device Manager: I/O addresses

Page 15: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Activity A-3

Viewing your computer’s I/O address assignments

Page 16: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

DMA channels

DMA controller relieves CPU Dedicated channels Largely replaced by other techniques,

such as bus mastering

Page 17: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Activity A-4

Viewing your computer’sDMA channel assignments

Page 18: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Memory addresses

Devices extend system BIOS with new routines– Display adapters– SCSI controllers– IDE controllers

System BIOS locates and loads BIOS extensions using mapped memory location

Historically in upper memory block (UMB) – space between 640KB (0x000A0000) and 1MB

Page 19: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Device Manager: Base memory

Page 20: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Activity A-5

Viewing your computer’s memory address assignments

Page 21: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Topic B

Topic A: Buses Topic B: The PCI bus

Page 22: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

PCI bus

32- or 64-bit bus– Pentium PCs

33 or 66 MHz clock speed 133-533 MBps maximum data transfer rate Up to 8 functions on a single card Up to 5 cards/slots per system Requires PnP

Page 23: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

PCI adapter

Page 24: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

PCIe

Newer standard Uses serial communication Lanes

– 2.5 Gbps in each direction using 8b/10b encoding (0.25 GBps)

– x1 (by one), x2, x4, x8, x12, x16, and x32 bus widths

Links – bidirectional switched lanes Can up-plug (e.g., x1 card in x16 slot) Can’t down-plug (not officially)

Page 25: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Multifunction cards

PCI spec supports multifunction cards Up to 8 functions per card Five slots/cards per system Total of 40 expansion devices

Page 26: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Activity B-1

Identifying a PCI bus

Page 27: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Video adapters

Generates signals sent to monitor Graphical interfaces involve massive

amounts of graphics data Can be built into motherboard or

adapter card Three types of video slots

– PCI– PCIe– AGP

Page 28: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

PCI-based video

Low-end systems: video adapter built into motherboard

PCI is slowest of three types Share bus with all other PCI-based

devices Work well for two-monitor system

Page 29: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

PCIe-based video

Designed to replace AGP cards x16 PCIe card has 4 GBps bandwidth

– Bidirectional nature allows up to 8 GBps

Simultaneous data movement upstream and downstream

Ideal for multimedia applications, such as gaming, photography, and videography

See http://tinyurl.com/ylpk4lw for comparison among PCI standards

Page 30: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

A PCIe video card

Page 31: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

AGP video adapters

Technically a port, not a bus Provides direct connection between video

adapter and CPU Referred to as #X Original performance benefit was accessing

and using main system memory– Direct Memory Execute (DIME)

Modern AGP cards use onboard memory, except in laptops

Multiple-monitor support Being phased out for PCIe

Page 32: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

AGP adapter

Note the hook

Page 33: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

AGP characteristics

32-bit bus Multiple of 33 MHz clock speed Speed “pumped” to as much as 533

MHz 266-2133 MBps data transfer rate PnP configurable

Page 34: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

AGP slots

Typically brown; sometimes maroon or other dark color

Separated from other bus slots to help cooling

High-end systems include multiple, independent AGP slots

Page 35: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Activity B-2

Identifying graphics connections

Page 36: Bus structures Unit objectives: Describe the primary types of buses, and define interrupt, IRQ, I/O address, DMA, and base memory address Describe PCI.

Unit summary

Described the primary types of buses, and defined interrupt, IRQ, I/O address, DMA, and base memory address

Described PCI and PCIe buses, and PCI and non-PCI video standards