Borislav Nikolić*, Luis M. Pinho*, Leandro S. Indrusiak^...Borislav Nikolić*, Luis M. Pinho*,...
Transcript of Borislav Nikolić*, Luis M. Pinho*, Leandro S. Indrusiak^...Borislav Nikolić*, Luis M. Pinho*,...
![Page 1: Borislav Nikolić*, Luis M. Pinho*, Leandro S. Indrusiak^...Borislav Nikolić*, Luis M. Pinho*, Leandro S. Indrusiak^ *CISTER/INESC-TEC, ISEP, IPP, Porto, Portugal ^Department of Computer](https://reader034.fdocuments.net/reader034/viewer/2022042806/5f6a4c347850ce3cc3680686/html5/thumbnails/1.jpg)
Borislav Nikolić*, Luis M. Pinho*, Leandro S. Indrusiak^
*CISTER/INESC-TEC, ISEP, IPP, Porto, Portugal
^Department of Computer Science, University of York
10/7/2016
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• Real-Time Systems
– … where time matters
Bullet dodging in Matrix
Lance Armstrong “detour”
in Tour de France '03
Super Mario video game
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• Multiprocessor platforms
Single-Chip-Cloud Computer
(Intel)
TILEPro64 Processor
(Tilera)
F
F2
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• Challenges
Processor
Memory
Processor 1 Processor 2
Memory
Yellow catch!!! Okay!!!Yellow swap?I access
memory!!!
I access
memory!!!
Multiprocessor
Scheduling
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• Communication => Traffic flows
– Size, source, destination, inter-arrival, deadline, (priority?)
– Similar to tasks
• 2-D mesh Network-on-Chip
• Wormhole switching
– Flit, indivisible transferable unit
– Throughput/performance
– Real-time concepts (preemptions)
• Relevant aspects
– Mapping, routing, (priorities), analysis
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• Virtual channels
• Buffers
• Flow per channel
• Flit-level preemptions
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Indrusiak, Burns, Nikolić. Analysis of buffering effects on hard real-time priority-preemptive
wormhole networks. 2016. arXiv:1606.02942 [cs.NI]
• Deceptively simple
– One of the most revisited topics over the last 2 decades
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• Preemptions in detail
• Not necessary to consider
entire paths
• Max “per hit” interference
equal to [traversal time – e]
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• Worst-case traversal time: j
fhpf j
iii C
T
RCR
ij
)(
Flow Priority C D = T R
1 3 10 3
2 2 6 5
3 2 5 4
bf
gf
yf
j
fhpf j
ji
ii CT
JRCR
ij
)(jj CR
Shi, Burns. Real-Time Communication Analysis for
On-Chip Networks with Wormhole Switching.
NOCS 2008
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* Xiong, Lu, Wu, Xie. Real-Time Analysis for Wormhole NoC: Revisited and Revised. In GLSVLSI 2016
• Noticed by Xiong et al.*
– Implies limited applicability of Shi&Burns analysis
– But failed to provide safe bounds
• Indrusiak et al.^ proposed the analysis
– Current state-of-the-art
^ Indrusiak, Burns, Nikolić. Analysis of buffering effects on hard real-time priority-preemptive
wormhole networks. 2016. arXiv:1606.02942 [cs.NI]
Active flows:
t1 t2 t3
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• Other investigated aspects
– Arbitrary deadlines
– Shared virtual channels
– Reduced hardware requirements
– Mapping
– Priority assignment
– Arbitration policies
– Analysis improvements
• What about routing?
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• Minimal routes
– Constant isolation latencies
– Solution space reduction
– Paths can be described as:
• {0, 0, 1, 1}
• {1, 1, 0, 0}
• {0, 1, 0, 1}
– Paths stored in headers
– #Paths , S
D
!!
!
ii
ii
vh
sE
– No deadlocks
iii vhs
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j
fhpf j
ji
ii CT
JRCR
ij
)(• WCRT depends on hp
– But also depends on priority ordering!
• WCRT not suitable to test candidates
• We introduce Indicative Traversal Time (ITT)
j
fpathf j
iii C
T
RCR
ij
)(
**
• Easy to compute
• Generic (not priority dependant)
• Good indication
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f3
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• Find the path with the smallest ITT
S
D
S
D
f1
f2
f2f2
f3
{ } { } { }
{ }
• Unfortunately, local minima may not lead to global
minima (example of f1 and f2)
• Therefore, Dijkstra’s algorithm does not apply
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f3
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• Construct a table Step Path ITT
9 10 11
5 6 7 8
2 3 4S
D
f1
f2
f2f2
f3
{ } { } { }
{ }
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f3
• Construct a table Step Path ITT
1 {r1} 10
9 10 11
5 6 7 8
2 3 4S
D
f1
f2
f2f2
f3
{ } { } { }
{ }
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f3
• Construct a table Step Path ITT
1 {r1} 10
2{r1, r2} 20
{r1, r5} 15
9 10 11
5 6 7 8
2 3 4S
D
f1
f2
f2f2
f3
{ } { } { }
{ }
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f3
• Construct a table Step Path ITT
1 {r1} 10
2{r1, r2} 20
{r1, r5} 15
3
{r1, r2} 20
{r1, r5, r6} 15
{r1, r5, r9} 15
9 10 11
5 6 7 8
2 3 4S
D
f1
f2
f2f2
f3
{ } { } { }
{ }
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f3
• Construct a table Step Path ITT
1 {r1} 10
2{r1, r2} 20
{r1, r5} 15
3
{r1, r2} 20
{r1, r5, r6} 15
{r1, r5, r9} 15
4
{r1, r2} 20
{r1, r5, r6, r7} 25
{r1, r5, r6, r10} 15
{r1, r5, r9} 15
9 10 11
5 6 7 8
2 3 4S
D
f1
f2
f2f2
f3
{ } { } { }
{ }
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• Compute #paths for all flows
• Sort non-decreasingly and treat in that order
• Find and assign a minimal path with min ITT
• After all paths are derived, assign priorities
• If schedulable => success
• If not, invoke path derivation & priority
assignment again
• Until success
– Or same paths & priorities => unschedulable
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• Schedulability improvements over best{XY,YX}
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• VC improvements over best{XY,YX}
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• Schedulability w.r.t. optimal
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• Traffic distribution
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• Computational complexity
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• Dimension-ordered routing not efficient!
• ITT metric suitable for this class of problems
• Minimal routes for search space reduction
• Proposed method
– Outperforms dimension-ordered routing methods
– Near optimal on a small-scale example
– Good workload distribution
– Scalable
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• Extend to non-minimal paths?
• Optimal routes and priorities?
• How to combine with mapping?
S D
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Questions?