Beyond-CMOS Technology Roadmap - Semiconductor Digest · Si FET SpinFET Spin wave NEMSTFET Atomic...
Transcript of Beyond-CMOS Technology Roadmap - Semiconductor Digest · Si FET SpinFET Spin wave NEMSTFET Atomic...
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Beyond-CMOS Technology Roadmap
An Chen
Emerging Research Devices (ERD), ITRS
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Outline
• Introduction
• Emerging logic devices – CMOS extension vs. beyond-CMOS devices
– Beyond-CMOS device assessment
• Emerging memory devices – Emerging memory taxonomy and assessment
– Promising emerging memories: STTRAM, RRAM, FeFET
• Emerging architectures – Beyond von-Neumann architectures
– Non-volatility information processing
• From scaling driver to function/application driver – More-than-Moore: functional diversification
• Summary
3
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Technology Innovations Driven by Scaling
4
J. Y.C. Sun, VLSI Tech., T2 (2013)
Beyond-CMOS technologies
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A Roadmap from ITRS PIDS
5
Courtesy of: Yuzo Fukuzaki, cited from M. Badaroglu, “More Moore scaling: opportunities and inflection points,” ERD
Meeting: Bridging Research Gap between Emerging Architectures and Devices, Feb 27, 2015
?
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“Energy Crisis” on Chip
• Scaling increasing power density
• Low-power design and multi-core introduced
• Beyond-CMOS devices for low-power solution?
0
20
40
60
1970 1980 1990 2000 2010 2020
Po
wer
den
sity
(W
/cm
2)
Year
Suppliers: AMD,
Intel, SPARC
Symbol size = # of cores
Courtesy of Jonas Wei-ting Chan, Andrew Kahng (UCSD)
Processor peak power density
Beyond-CMOS?
Source: Bernard S. Meyerson (IBM)
6
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ITRS Emerging Research Devices (ERD)
7
Emerging Research Devices
Emerging devices
Memory
Logic
Emerging architectures
More-than-Moore
Emerging devices for RF
Devices with learning capabilities
New directions
Sensor applications
Security applications
…..
• Low power
• Embedded NVMs
• Storage class memory
A. Chen, J. Hutchby, V. Zhirnov, G. Bourianoff (Ed’s) “Emerging
Nanoelectronic Devices” (Wiley, Jan. 2015)
http://www.wiley.com/WileyCDA/WileyTitle/productCd-
1118447743,subjectCd-EE13.html
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ERD Methodology
• Selection – Criteria to select technology entries to be added or removed in the
ERD chapter
– Transition of technology entries in and out of the chapter
• Categorization – Categorize technology entries based on the types and mechanisms
– Important considerations for materials, e.g., Si, III-V, carbon-based, 2D materials, etc.
• Evaluation – Conduct survey-based critical review among ERD experts
– Reference to quantitative benchmark from research community
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Outline
• Introduction
• Emerging logic devices – CMOS extension vs. beyond-CMOS devices
– Beyond-CMOS device assessment
• Emerging memory devices – Emerging memory taxonomy and assessment
– Promising emerging memories: STTRAM, RRAM, FeFET
• Emerging architectures – Beyond von-Neumann architecturess
– Non-volatility information processing
• From scaling driver to function/application driver – More-than-Moore: functional diversification
• Summary
9
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Emerging Logic Devices
Mechanism
State variable
Ch
arg
e N
on
-char
ge
Conventional Novel
Si FET SpinFET
Spin wave
NEMS TFET
Atomic sw.
Mott FET Neg-Cg
Nanomagnet
BiSFET
All spin logic
Ge & III-V
CNT FET Graphene FET
NW FET
Spin-torque
DW logic
FinFET RTD
SET QCA
IMOS
ExFET
CMOS extension Charge, beyond-CMOS
Non-charge, beyond-CMOS
• ITRS ERD categorizes emerging logic devices into three groups
based on state variables and mechanisms
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CMOS Extension and Beyond-CMOS
Eba
• New transport mechanisms
• New gating mechanisms
• New state variables
CMOS extension: • New materials Strain, SiGe, Ge, III-V, CNT, …
• New structures FinFET, gate-all-around, …
E.g., tunneling
E.g., mechanical ferroelectric
GateSource Drain
E.g., spin
Beyond-CMOS devices: new mechanism
K. Kuhn, IEDM,
171 (2012) A basic electronic
switch model
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Emerging Logic Device Survey
10%
15%
20%
Per
centa
ge
of
vote
Only showing devices with more than 10% vote
Most promising
Most need of resources
12
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Carbon Nanotube (CNT) FET
13
Size-exclusion chromatography
Advantages:
• Scalability
• Ultra-thin body
• Ballistic transport
• Gate-all-around
Challenges:
• Purity, placement, density
• Variability
• Contact resistance
• NFET for CMOS
Rc
S.J. Han, ERD Emerging logic device assessment workshop. 2014
9nm Lch FET
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Tunnel Field-Effect-Transistor (TFET)
14
Challenges:
• Improve Ion while keeping SS and Ioff low
• More stringent material, device, and fabrication
requirements
• Reduce interface state density
• Body thickness scaling at advanced nodes
• Device variation (body thickness, G-S overlap)
QM band-to-band tunneling enables steep sub-threshold
slope for low-power operation
TFET surpasses MOSFET in energy at low Vdd
S. Datta, ERD Emerging logic device assessment workshop. 2014
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Outline
• Introduction
• Emerging logic devices – CMOS extension vs. beyond-CMOS devices
– Beyond-CMOS device assessment
• Emerging memory devices – Emerging memory taxonomy and assessment
– Promising emerging memories: STTRAM, RRAM, FeFET
• Emerging architectures – Beyond von-Neumann architectures
– Non-volatility information processing
• From scaling driver to function/application driver – More-than-Moore: functional diversification
• Summary
15
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Emerging Memory Devices
Memory
Volatile
SRAM
DRAM
Stand-alone
Embedded
Nonvolatile
Baseline
Flash
NOR
NAND
Prototypical
FeRAM
PCM
MRAM
STT-RAM
Emerging
Ferroelectric Memory
FeFET
FTJ
ReRAM
Electrochemical Metallization Bridge
Metal Oxide - Bipolar Filamentary
Metal Oxide - Unipolar Filamentary
Metal Oxide - Bipolar Nonfilamentary
Mott Memory
Carbon Memory
Macromolecular Memory
Molecular Memory
PIDS
ERD
Two terminal
structures
4F2 footprint
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Emerging Memory Device Survey
10%
20%
30%
40%
Per
centa
ge
of
vote
Only showing devices with more than 10% vote
Most promising
Most need of resources
1st 2nd
2nd
1st
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STTRAM: Spin-Transfer-Torque RAM
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Challenges:
• Perpendicular-MTJ with sufficient parameters
• Integration and manufacturability
• Variability control
• Cost and commercial factors
Nonvolatile memory with endurance and speed comparable to those of
DRAM and SRAM
C. Yoshida, VLSI Tech., 59 (2012)
J. M. Slaughter, IEDM,
29.3 (2012)
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RRAM: Resistive RAM (Including CBRAM)
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Advantages:
• Potentially low-cost
• Potentially high-density
• Reasonable speed and endurance
• Versatile devices, materials and structures
(difficulties in down-selection and focus?)
Challenges:
• Stochastic mechanisms
• Intrinsic variability
• Controllability and repeatability
• Failure mechanisms
• Forming requirements
G. Jurczak, ERD Emerging logic device assessment workshop. 2014
Rich Fackenthal, ISSCC (2014)
16Gb CBRAM (Micron/Sony)
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Emerging NVMs toward Commercialization
Active industry R&D Testchip reports Early production
RRAM
STTRAM
64kB RRAM in 8-bit
microcontroller (2013)
64Mb DDR3
STTRAM (2013)
8Mb RRAM, 2012
32Gb RRAM, 2013
16Gb CBRAM, 2014
32Mb, in-plane, 2009
64Mb, in-plane, 2010
64Mb, p-MTJ, 2010
20
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Ferroelectric-FET (FeFET) RAM
21
A key breakthrough:
Ferroelectric HfOx
J. Muller, ERD Emerging logic device assessment workshop. 2014
ON: ID > 0 OFF: ID ~ 0
1995 2000 2005 2010 201510
-2
10-1
100
101
102
ph
ysi
cal
ga
te l
eng
th (
m)
publication year
perovskite
organic
FE-HfO2
Fe-HfOx closes FeFET gate length scaling gap
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Outline
• Introduction
• Emerging logic devices – CMOS extension vs. beyond-CMOS devices
– Beyond-CMOS device assessment
• Emerging memory devices – Emerging memory taxonomy and assessment
– Promising emerging memories: STTRAM, RRAM, FeFET
• Emerging architectures – Beyond von-Neumann architectures
– Non-volatility information processing
• From scaling driver to function/application driver – More-than-Moore: functional diversification
• Summary
22
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Emerging Architectures
• Conventional von Neumann architecture: dominant in today’s computing systems
• Novel architectures beyond von Neumann
– Cellular automata
– Co-located memory-logic (e.g., processor-in-memory, Memory-in-logic, computational memory, nonvolatile logic)
– Reconfigurable computing
– Cognitive computing (e.g., neuromorphics, machine learning)
– Statistical and stochastic computing (e.g., statistical inference, approximate computing)
– Collective-effect computing (e.g., coupled oscillator network)
– …
23
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Brain-Inspired Architectures
24
P.A. Merolla, et al, Science 345, 668 (2014)
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Emerging Logic Device Benchmark
25
• Benchmark emerging devices at logic gate levels (e.g., 32bit adder) • Energy-delay tradeoffs extend to beyond-CMOS devices
D.E. Nikonov, IEDM, p. 576 (2012)
Spin-wave device
Spin-torque majority gate
Nano-Magnet Logic
Spin-transfer-torque domain-wall
Spin-torque oscillator logic
Alll-spin-logic device
Graphene P-N junction
Hetero-junction tunnel FET
Graphene nano-ribbon tunnel FET
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Unique Properties of Beyond-CMOS Devices
• Nonvolatility
– Built-in memory in logic devices
• Efficient logic implementation
– E.g., majority gate
• Structural / layout regularity
– E.g., Quantum Cellular Automata (QCA), crossbar arrays
• Self-adaptive property
• Coherent or collective behaviors
– Low-power switching, robustness
26
Novel architectures and designs enabled by these unique device characteristics?
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Non-Volatile Information Processing (NVIP)
27
MTJ, ReRAM, FRAM, FeFET, PCM, Flash …
SRAM, FF, adder, CAM, LUT, FPGA, …
NV gates and logic
Nonvolatile switches
NVM
CMOS logic
FF: flip-flop LUT: look-up table
CAM: content-addressable memory
• Leverage fast-growing emerging NVM technologies
E.g., STTRAM, RRAM, FeFET, …
• Reduce/eliminate standby power
Run-time power-gating
• Increase throughput and lower power
Reduced data movement; immediate data availability
• Enable novel architectures
Non-von-Neumann architectures (e.g., cellular automata),
computation-in-memory, latch-less pipeline design, ...
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NVIP: Examples
28
Magnetic LUT
W.S. Zhao, et al, ICVSC, 37 (2011)
Ferroelectric flip-flop
M. Koga, et al, TENCON, 317 (2010)
ReRAM-based programmable interconnect
J. Cong, et al, IEEE TVLSIS 22, 864 (2014)
MTJ-based NV adder
S. Matsunaga, et al, APE 1, 091301 (2008)
ReRAM-based NV SRAM
P.F. Chiu, et al, JSSC 47, 1483 (2012)
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Emerging Architecture Roadmap
• Challenges
– Numerous applications and architecture concepts
– Different performance assessment methods and criteria
– General-purpose vs. application-specific computing
– Research gap between emerging architectures and devices
• A proposed approach
– Identify common tasks/applications
– Develop a uniform set of figure-of-merits (FOMs)
– Assess performance
– Map with underlying technologies
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Outline
• Introduction
• Emerging logic devices – CMOS extension vs. beyond-CMOS devices
– Beyond-CMOS device assessment
• Emerging memory devices – Emerging memory taxonomy and assessment
– Promising emerging memories: STTRAM, RRAM, FeFET
• Emerging architectures – Beyond von-Neumann architectures
– Non-volatility information processing
• From scaling driver to function/application driver – More-than-Moore: functional diversification
• Summary
30
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Booming Mobile and IoT Applications
31
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More-than-Moore: Functional Diversification
32
ITRS More-than-Moore whitepaper (2011)
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Emerging Devices for Sensor Node/Network
• Sensor materials
– Graphene, 2D materials, functional oxides, …
• Ultra-low power devices and design
– Sub-threshold and near-threshold design
– Steep sub-threshold slope devices (e.g., TFET)
• Nonvolatile memories
– Low-power, low-cost, high-density
– RRAM vs. STTRAM
• Communication components
• Power management
33
D. Sylvester, “Cubic millimeter sensor nodes,” Workshop on Rebooting the IT Revolution, March, 2015
Extremely tight power budget in
highly scaled sensor nodes
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Emerging Devices for Hardware Security
34
Y. Bi, et al, "Emerging Technology
based Design Primitives for
Hardware Security", submitted.
Utilize ambipolarity of Si nanowire FET for:
• Logic camouflaging: layout-level obfuscation with
similar layouts for different gates
• Polymorphic gates: multiple functionalities in the
same cell
Random number generator based on
random telegraph noise in RRAM
C.Y. Huang, et al, IEEE EDL 33, 1108 (2012)
Addre
ss(a
)A
ddre
ss(b
)
a bn n
Bit-wise
comparison
Ch
all
enge
Response
1T1R
RRAM
cells
Eg: Ri = 1 if ai > bi
Ri = 0 if ai < bi
(1 i n)
RRAM-based physical
unclonable functions (PUF)
A. Chen,
IEEE EDL
36, 138
(2015)
Connectivity = vulnerability
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Align Beyond-CMOS Technologies with New Application Drivers
Computing/
Communication
1. Memory
2. Logic
3. Architectures
4. More-than-
Moore (RF)
Internet-of-
Things
1. Low-power
devices, e.g.,
TFET, NEMS
2. Embedded
NVM
3. Security, e.g.,
TRNG, PUFs
4. RF and wireless
5. Sensors
integrated with
CMOS
6. Energy-
harvesting
devices
Cloud/Big Data
1. Optical
interconnects
2. Storage
Class
Memory
3. Efficient DC-
DC converters
4. Data driven
computing
(accelerators
for Hadoop,
etc)
5. Security
Focus of beyond-
CMOS technology:
Today
• Emerging Logic
• Emerging Memory
Future
• Novel architectures
• Sensor integration
• Hardware security
• Energy-harvesting
• Circuit blocks and
architectures for IoT
and cloud
• …
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Summary
• Beyond-CMOS logic devices focus on low-power and may utilize novel switching mechanisms and/or state variables.
• Emerging nonvolatile memories have made significant progress and some promising candidates may enable new applications and overcome memory performance bottleneck.
• Opportunities exist in the research gap between emerging architectures and device technologies.
• Technology drivers are transitioning from “scaling” to “functions and applications”.
• Technology roadmap needs to be aligned with new market opportunities and technology drivers.
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