Arizona-Sonora SMTA Presentation 30Aug11

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    ACCULOGICACCULOGIC

    Design forDesign for Flying ProbeFlying Probe

    TestingTesting

    DFT Seminar Series 20091 www.acculogic.com

    DFT Seminar Series 200

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    ACCULOGICACCULOGIC Agenda

    Introduction

    The DFT Concepts

    Mechanical DFT Issues

    Circuit DFT Issues

    DFT Seminar Series 20092 www.acculogic.com

    y ng ro e es ys ems Discussions

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    ACCULOGICACCULOGIC Glossary of Terms

    DFT Design forTestability

    DFM Design forManufacture

    DFx Design forExcellence = DFT+DFM

    SMT SurfaceMountTechnology SMD SurfaceMountDevice

    JTAG JointTestActionGroup

    TAP TestAccessPort

    DFT Seminar Series 20093 www.acculogic.com

    ICT InCircuitTest FPT FlyingProbeTest

    MDA Manufacturing Defect Analyzer

    PCA LoadedPrintedCircuitAssembly

    PCB BarePrintedCircuitBoard

    UUT UnitUnderTest

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    ACCULOGICACCULOGIC Why is DFT required in today's designs?

    Design ComplexityIncreasing

    Part Sizes Decreasing Part Pin Out Increasing

    System On Chip

    1100+ Pin BGA

    900 mm2

    400 mm2

    225 mm2

    QFPQFP

    TABTAB

    COBCOB

    15 mm

    20 mm

    30 mm

    DFT Seminar Series 20094 www.acculogic.com

    uBGA Fan out issues

    Part Placement DensityIncreasing

    Complex Fault Isolationwithout DFT

    100 mm2Flip ChipFlip Chip

    Source: IBM

    10 mm

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    ACCULOGICACCULOGIC Mechanical DFT Issues

    PCA Handler Issues

    PCA Alignment System

    Tall Part Test Limitations No Fly Zones

    Test Accessibility Near Card Edges

    DFT Seminar Series 20095 www.acculogic.com

    Types of Test Access Point Test Point Dimension Recommendations

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    ACCULOGICACCULOGIC PCA Handler Issues 3 mm rule

    Edge Clearance on two Parallelsides of the UUT are required 3

    mm

    Best along the longest edges ofthe UUT to prevent sag

    Predictable leading edgedimension required for boardstopping position on systems with

    Good Layoutfor conveyor

    3mm edge clearance

    DFT Seminar Series 20096 www.acculogic.com

    automatic conveyors 3mm edge clearance

    In the case with odd shapedboards two solutions exist

    Use break away rails thatcomply with the above

    Use a custom or universalcarrier to move the UUT intothe machine.

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    ACCULOGICACCULOGIC PCA Alignment and Fiducials 3 FID rule

    3 Board FID points are required on bothtopandbottomofthe UUT Placed near the perimeter of the UUT

    Must be free from solder after production Must not be identical from top to bottom

    Must not be near similar graphics, etches, silk screens.

    Must be clear from the 3 mm edge clearance

    DFT Seminar Series 20097 www.acculogic.com

    Should be in the CAD as a part or easily identifiable entity.

    3 Fiducial points place properly

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    ACCULOGICACCULOGIC PCA Alignment and Fiducials FID Qualities

    According to the IPC-SMEMA Council FiducialLocating marks should have the following

    characteristics: Size: 1 mm to 3 mm in diameter (40 118 mils)

    Clearance Area around the FID: - 1-2 times the radius of thesize

    DFT Seminar Series 20098 www.acculogic.com

    Some samples are below, most commonly used is thecircle in circular clearance area.

    Sample FID PatternsClearance Area

    1 to 2 times Radius

    FID Mark

    1-3 mm

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    ACCULOGICACCULOGIC PCA Alignment of Panelized UUTs

    Panels should have panel FIDPoints that follow singleboard requirements

    Clear from the edge, 3 top, threebottom, 1-3 mm is size and 1-3mm clearance

    DFT Seminar Series 20099 www.acculogic.com

    Must be in CAD or MechanicalDrawing and accurately

    referenced to individual UUT.

    This does not remove therequirement for Single Board

    FIDs, these are still required

    In the case when real FID points are not available mostIn the case when real FID points are not available mostsystems can capture another image and use it as asystems can capture another image and use it as a

    locating, but probing and placement accuracy goes downlocating, but probing and placement accuracy goes down

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    ACCULOGICACCULOGIC No Fly Limits and Part Selection

    As robotic systems, flying probe machinesneed to move over parts to go from place toplace. Given that they are to contact the

    board under test and they are not infinitelyhigh from the surface of the UUT some UUTmechanical limits will exist depending on thesystem you have, or plan to use.

    DFT Seminar Series 200910 www.acculogic.com

    Fly over heights range from 30 mm to 45 mm

    Fly around heights range from 30 mm to85mm in systems that have this capability.

    Fly Over or Fly Around issues can beminimized

    Select low profile parts

    Place tall parts after test

    Place heat syncs after test

    Tall

    device

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    ACCULOGICACCULOGIC Test Access Requirements

    Test Point Types:

    Dedicated Test Points

    Via Holes as Test Points

    Through Hole Pins as Test Points

    Surface Mount Pads as Test Points

    Virtual Test Points

    DFT Seminar Series 200911 www.acculogic.com

    Ideal DFT from an access point of view

    Full access to every net on the board is ideal

    One or more access point per connected net

    One access point per unconnected net

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    ACCULOGICACCULOGIC Dedicated Test Points

    As named are entities in the design that are specificallymeant for test access. Two main types exist:

    Copper areas that are free from solder resistive mask and otherimpediments.

    Should be as close as possible to the source end of

    DFT Seminar Series 200912 www.acculogic.com

    .

    Physical Parts that can be mounted/placed on the PCA

    Ground/VCC Stake

    Ground/VCC Clip

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    ACCULOGICACCULOGIC Vias as Test Points

    Four types of vias are common in PCB Layout:

    Testable Vias

    Standard Via accessible to both top and bottom and may beconnected to a mid plane layer

    Annular ring aperture may differ from top to bottom

    indicating the preferred side to probe

    DFT Seminar Series 200913 www.acculogic.com

    mid plane layer

    Non-Accessible Vias

    Buried Via not accessible to the top or bottom and only

    connects mid plane layers to one another. Tented or Masked Via can belong to all of the above

    categories and has a solder resist mask or other coating that

    prevents it from allowing electrical contact.

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    ACCULOGICACCULOGIC Through Hole Device Leads as Test Points

    Soldered Through Holes

    Connector, socket, resistor, etc device leads that are solderedthrough holes in PCB can be ideal test access locations.

    Flying probe will typically require that the actual contact pointbe offset from the center of the leg as its position is notabsolutely fixed in x, y or z planes.

    Standard ractice is to have the robe oint offset to the rin

    DFT Seminar Series 200914 www.acculogic.com

    where the leg is solderedICT/MDA will use the leg centers and a crown probe type

    Press Fit Through Hole

    Usually connectorsUsually connectors

    Flying Probe must be targeting to the annular ring ofthese access points

    care must be taken not to stick the probe into the connector hole and jamif from retraction for systems that do not have z-axis feedback.

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    ACCULOGICACCULOGIC SMD/SMT Pads as Test Points

    The accuracy and repeatability of certain FP machines will allowyou to use these leads at viable test access locations.

    0603 easy for most machines 0402- easy for some machine

    0201 getting harder

    01005 - difficult

    DFT Seminar Series 200915 www.acculogic.com

    IC Leads depends on pitch

    PAD exposures need to be meeting the minimum targeting requirementsof the system used.

    RF and other special circuits are burying pads underthe parts

    cannot probe what cannot be seen

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    ACCULOGICACCULOGIC Some SMD Packages from Wikipedia

    DFT Seminar Series 200916 www.acculogic.com

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    ACCULOGICACCULOGIC TYPICAL 0402 LAND PATTERN

    43 mils

    20 mils20 mils

    S

    O

    L

    S

    O

    L

    DFT Seminar Series 200917 www.acculogic.com

    m s

    31 mils31 mils 20 mils

    m s

    drawing not to scale

    Probe target

    D

    ER

    D

    ER

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    ACCULOGICACCULOGIC

    Provided there is enough spaceProvided there is enough space

    Some part pads can be used

    OK

    DFT Seminar Series 200918 www.acculogic.com

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    ACCULOGICACCULOGIC Manufacturing Issues that Impact Test

    Clean or No Clean Process

    If the UUT has flux residue or other non-conductivesubstance this can cause:

    False failures of all test types

    False passes of shorts tests

    Lead Free or Leaded Solder

    DFT Seminar Series 200919 www.acculogic.com

    Lead free is harder and can provide worse contact over timewith probe tip aging

    Through Hole Part Placement

    Drift in hand placement can prevent use as viable test points

    location Can damage the machine and parts if not consistently placed

    SMD Device Flow Variance

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    ACCULOGICACCULOGIC DFT Recommendations

    Ensure that output enable pins are not tied to ground or VCCdirectly. Use pull-up/pull-down resistors that can be driven such that the device when

    powered will be tri-stated.

    Ensure that each device that has a disable pin is independentlycontrollable

    DFT Seminar Series 200920 www.acculogic.com

    As an example, if you have a bank of buffers that are used in conjunction

    with a memory data but, the buffers and memories will need to be controlledfrom two nets so that we can effectively and discretely test each of theindividual parts.

    Ensure that all clock/oscillator/crystal circuits can be isolated orstopped from oscillating

    Ensure that watch-dog timers can be disabled so that they arenot continually resetting the UUT during test vector execution

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    ACCULOGICACCULOGIC Limited Access Test Products Flying Probes

    Double-Sided Flying ProberScorpion 8xx/9xx series

    DFT Seminar Series 200921 www.acculogic.com

    Single-Sided Flying Prober

    Sprint 4510

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    ACCULOGICACCULOGIC

    Enables Prototype , NPI & low volume PCBs to be tested

    Test PCBs with minimal NRE

    Greater Test Access with targets down to 4 mil (0.1 mm)

    Benefits of using a Flying Probers

    DFT Seminar Series 200922 www.acculogic.com

    Enables testing of PCBs without traditional ICT test pads

    Provide for greater test coverage with AOI capability

    Implement same day testing

    BOM verification

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    ACCULOGICACCULOGIC FLS Configuration flexibility

    DFT Seminar Series 200923 www.acculogic.com

    2 Stators - Topside and Bottom-side

    Up to 4 Shuttles per Stator

    3 Probe Slots per Shuttle

    Max Probes 11 Topside / 11 Bottom-side

    Total Maximum Probes 16

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    ACCULOGICACCULOGIC

    DFT Seminar Series 200924 www.acculogic.com

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    ACCULOGICACCULOGIC PCBA Carrier

    DFT Seminar Series 200925 www.acculogic.com

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    ACCULOGICACCULOGIC FLS Test Techniques

    Passive Components:Passive Components:

    Resistors (R) Capacitors (C) Inductors (L)

    Discrete Semiconductor:Discrete Semiconductor: Diode Zener diode (to 100V) Transistors

    Active analog and hybridComponents:

    Comparator and Regulator

    Operational Amplifier

    Other Tests: Contact

    Shorts

    Power Up and Functional Test

    DFT Seminar Series 200926 www.acculogic.com

    FE

    Thyristor Triac

    Other Devices:Other Devices: Bridges

    Switches Relay Optocoupler

    Boundary ScanAOI on all shuttles

    Vectorless Opens Test:

    ChipScan

    C-Scan

    Network Analysis: BodeScan

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    ACCULOGICACCULOGIC

    Resistors

    Capacitors

    Semiconductors

    Electrical Test

    Bypass Capacitors

    Mechanical parts

    Vision Inspection

    Complementary Vision Inspection

    DFT Seminar Series 200927 www.acculogic.com

    n uc ors

    OpAmps

    Transformers

    LEDs

    Switch/Relay contacts

    Shorts/Opens

    Connector orientationSockets

    Capacitor orientation

    Labels

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    ACCULOGICACCULOGIC FLYING PROBER COMPARISON

    TEST TECHNIQUE MDA FP-SS PON FP-SS MDA FP-DS PON FP-DS NOTES

    Shorts Nets on one side only not detectable

    Opens

    Passives

    Bypass caps Vision option on FP

    Low value RLC Dedicated hardware at DUT; kelvin tests

    Actives

    Markings/Barcode Vision inspection; barcode on one side only

    Switches Mechanical contact

    DFT Seminar Series 200928 www.acculogic.com

    Connectors Probe connector pin tip

    LED colors

    IC Opens Vectorless testing (TestJet, FrameScan)

    Frequency Test

    Voltage Test

    IC Internal Logic

    IC Programming Using B/S

    Boundary Scan FP needs B/S chain

    Test Target Largest target on either side for -2

    Datalog 1 log for both sides

    Test time Two pass testing on 1 sided FP

    SS: Single Sided; DS: Double Sided; FP: Flying Prober

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    ACCULOGICACCULOGIC Flying Fixture probing

    DFT Seminar Series 200929 www.acculogic.com

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    ACCULOGICACCULOGIC Stages of Boundary Scan Test

    TAPIT Test Access Port IntegrityTest Class 6

    VIT: Class 1, 2, 3, 4, Test VIT+:Boundary Scan and Non-

    Boundary Scan Device Test Digital I/Os behind Flying Probes Digital I/Os at Carrier I/O Interface

    VCCT: Cluster, Memor Test &

    U1 U2

    DFT Seminar Series 200930 www.acculogic.com

    Programmin

    Each stage is generated in SVFFormat and comes with Diagnostics

    Usually, test Coverage on UUTincreases with each additionalstage

    SVF is an Industry standard forgenerating serial and parallelpatterns in ASCII format file

    TDI TDO

    U3INPUT

    VIT+ makes testing U3 possibleVIT+ makes testing U3 possible