Applied Endura Amber PVD Amber Launch_Level 0_062… · Applied Endura ® Amber™ PVD System ......
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External Use SILICON SYSTEMS GROUP Applied Endura ® Amber ™ PVD Advancing a New Era in Copper Gap Fill for Nanoscale Interconnects Sundar Ramamurthy, Ph.D. Appointed Vice President General Manager, Metal Deposition Products Silicon Systems Group July 10, 2012
Transcript of Applied Endura Amber PVD Amber Launch_Level 0_062… · Applied Endura ® Amber™ PVD System ......
External Use
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SILICON SYSTEMS GROUP
Applied Endura® Amber™ PVD Advancing a New Era in Copper Gap Fill for Nanoscale Interconnects
Sundar Ramamurthy, Ph.D.
Appointed Vice President
General Manager, Metal Deposition Products
Silicon Systems Group
July 10, 2012
External Use
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SILICON SYSTEMS GROUP 2
ASIC Cross-Section
Via
Wire
Via
Wire
Flash Cross-Section
NAND Leads the Scaling, Logic Right Behind
Smallest gap to be filled today
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SILICON SYSTEMS GROUP 3
Source : ITRS 2010 and 2011 roadmaps
Critica
l M
eta
l F
ea
ture
Siz
e (
nm
)
0
10
20
30
40
50
80
2006 2008 2010 2012 2014 2016
70
60
Logic / ASIC
NAND Flash
New Era of Nanoscale Interconnects
New fill solution required
Nanoscale
Interconnects
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Interconnect Challenges Beyond 20nm
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Conformal seed makes conventional plating challenging below 20nm
+ Conventional Plating =
>12 nm
4:1
<10 nm
>7:1 Voids
Complete
Fill
Above 20nm
+ Conventional Plating =
Below 20nm
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Logic has Less Room for Error
5
Yie
ld L
oss
Fro
m S
ingle
Via
Fail
0%
5%
10%
15%
20%
30%
0 0.005 0.01
25%
40 nm
Via Defect Level (DPPM)
65 nm
90 nm
130 nm
1DPPB
28 nm 20 nm
Source: NVIDIA Corporation 2011
Zero Defect for Vias, Quality in Perfection
Tota
l Length
of
(1x p
itch)
Me
tal L
ine
s (
m)
0
200
400
600
800
1,000
1,600
130 nm 90 nm 65 nm 40 nm
1,400
1,200
Metal Length
Total Via #
Single Via #
Technology Nodes
0
200
400
600
800
1000
1600
1400
1200
1800
2000
Normalized to
1cm x 1cm area
Via
Count (m
illio
n)
Source: NVIDIA Corporation 2011
One void can have a major
impact on yield
Introducing the Revolutionary
Applied Endura® Amber™ PVD System
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Innovation built on Endura
ionized PVD
Thermal reflow for bottom up
copper fill
Fundamentally robust
to address technology scaling
Revolutionary architecture
opens new era
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SILICON SYSTEMS GROUP
Applied Endura Amber PVD Built on 20 Years of PVD Leadership
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Amber PVD provides the ideal deposition profile to promote reflow
Ionized
PVD Void
Thermal Reflow
Thermal Reflow
Selective
Deposition (Endura RFX Cu)
Amber PVD
x y
x << y Energy
Directionality
Cu+ Ionization
y
x x
y
y y
x x
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How Does Reflow Work in Amber PVD?
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Thermal Energy Cold Deposition
Increased surface
mobility, grain
coalescence
Mass movement of surface copper by
enhanced diffusion, and capillary action
Copper reflow to enable bottom-up, defect free fill
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The Magic of Amber Capillary Action Works Better on Smaller Features
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Smaller size tube shows
stronger capillary effect
(interconnect via structure)
Fill gets better with scaling – Amber PVD is an
extendible solution for future nodes
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20 Years of Endura PVD Innovation
≥ 0.75 0.35m 90 65nm 45 20nm < 20nm
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Amber PVD Ionized PVD Standard PVD
Endura continues to enable Cu interconnect
scaling through PVD innovations
Applied Endura® Amber™ PVD System Advancing a New Era in Copper Gap Fill for Nanoscale Interconnects
Ionized PVD and thermal reflow to
enable void-free bottom up Cu fill
Extendible technology fills anything
Revolutionary architecture expands
application flexibility
Endura continues to enable copper
interconnect scaling
External Use 11 SILICON SYSTEMS GROUP External Use
External Use
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