Application of XSBase270 and

FPGA Presenter ： Ming-Hsien Tsai

Outline Introduction

XSbase270 QT Linux Device Drivers

Development Environment Principle

FPGA Communicating with Hardware

Example

Outline Introduction

XSbase270 QT Linux Device Drivers

Development Environment Principle

FPGA Communicating with Hardware

Example

XSbase270

XSbase270 is a embedded portable application development platform base on PXA270 processor

QT Qt is a cross-platform application

development framework, widely used for the development of GUI(Graphical User Interface) programs.

Qt uses standard C++ to build programs.

We used Qt3 to build GUI applications.

QT The GUI programs can rapid build by QT

Designer tool.

Fig. 1. The example of GUI

Linux Device Drivers

Fig. 2. Device driver communicating

Outline Introduction

XSbase270 QT Linux Device Drivers

Development Environment Principle

FPGA Communicating with Hardware

Example

Development Environment OS : Ubuntu 8.10

Target Kernel : Linux 2.6.9 Arm-linux-gcc version : 3.3.2 FPGA : Quartus II 8.0 QT ： Embedded 3.3.8b

Outline Introduction

XSbase270 QT Linux Device Drivers

Development environment Principle

Communicating with Hardware FPGA

Example

Communicating with Hardware

Programming the FPGA device driver functions:

Open() Read() Write() Close()

Communicating with Hardware

FPGA register physical address define in fpga_reg_set.h

#define CS5_BASE_ADDR 0x14000000

#define SW_PHY_ADDR CS5_BASE_ADDR+0x20000

(read) #define LED_PHY_ADDR CS5_BASE_ADDR+0x0

(write)

FPGA Read Cycle

Fig. 3. Timing Diagram

FPGA

VCCSA_OE INPUT

VCCSA_CS5 INPUT

VCCSA[17..14] BIDIR

data[3..0]

enable

eq0

eq1

eq2

eq3

eq4

eq5

eq6

eq7

eq8

eq9

eq10

eq11

eq12

eq13

eq14

eq15

lpm_decode0

inst29

data[3..0]

enable

eq0

eq1

eq2

eq3

eq4

eq5

eq6

eq7

eq8

eq9

eq10

eq11

eq12

eq13

eq14

eq15

lpm_decode0

inst30NOT

inst

NOR2

inst40

IFLAG_EN

KEY_EN

ICNTR_RD

ADCNTR_RD

AD_EN

SA_OE

DACNTR_EN

DARAM_EN

ADCNTR_EN

ICNTRx

ADRAM_EN

rden

wren wren

rden

SA[17..14]

SA_CS5

SA_OE

Fig. 4. Decoder 0x20000=100000000000000000SW_PHY_ADDR : 8

0x0=000000000000000000LED_PHY_ADDR : 0

FPGA

DFFdata

clock q

lpm_ff2

inst8

DFFdata

clock q

lpm_ff2

inst9 up/downupdow n

clock q[7..0]

lpm_counter2

inst34

a

b

out

encoder_2_to_1

inst14

25

6 W

ord

(s)

RA

M

Block Ty pe: AUTO

data[7..0]

w raddress[7..0]

w ren

rdaddress[7..0]

rden

clock

q[7..0]

altdpram0

inst11

CLK20M

rden

CLK20M

wrenup_count

down_count

SA_CS5

addr[7..0]

AD_[7..0]

CLK20M

LED[7..0]

up_count

down_count

addr[7..0]

addr[7..0]

Fig. 5. Recorder

Outline Introduction

XSbase270 QT Linux Device Drivers

Development Environment Principle

FPGA Communicating with Hardware

Example

Example The example is a the action recorder that can

record the buttons by clicking for you. Then it can click the replay button to release the steps.