KLE Societys B.V. Bhoomaraddi College of Engineering and Technology,

Hubli

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A LAYOUT DESIGN OF SINGLE ENDED DIFFERENTIAL AMPLIFIER

Under the guidance of Dr. R B Shettar

Mentor : Mr. Charan

By, Mr. Abhishek C Math

Overview

Objective

What is Layout??.

Types of Layout

Matching of Device

Layout Design Techniques

Specification

Diff pair layout

Results

concluison

References

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Objective

Design the layout of Single ended Differential

Amplifier and verify the post layout simulation with the Schematic

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Analog Layout Design

What is Layout??...

The process of creating an accurate physical representation of an engineering drawing (netlist) that conforms to constraints imposed by the manufacturing process, the design flow and the performance requirements shown to be feasible by simulation.

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Full Custom IC Design Flow

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Types of Layout :

1.Building Block Layout

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2.Interconnection Layout

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3. Floorplanning layout

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MATCHING OF A DEVICE

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MATCHING

Two devices with the same physical layout never have quite the same electrical properties.

Variations between devices are called mismatches

A large variety of analog circuits rely on Matching of transistors. Circuits like differential pair rely on gate to source voltage matching while current mirrors rely on current matching.

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REASONS FOR MISMATCH

Mismatches may be either random or systematic, or a combination of both.

Suppose two matched devices have parameters P1 and P2.

Then let the mismatch between the devices equal P = P2 P1.

For a sample of units, measure P . Compute sample mean m(P ) and standard

deviation s(P ).

m(P ) is a measure of systematic mismatch. s(P) is a measure of random mismatch.

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RANDOM MISMATCH

Random mismatches due to microscopic fluctuations in dimensions, doping, oxide thickness and other

parameters that influence component values.

Random mismatches cannot be eliminated, but they can be reduced by increasing device dimensions

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SYSTEMATIC MISMATCH

Systematic mismatches which are caused by :

Process biases

Mechanical stress

Temperature gradients

Polysilicon etch rates etc

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Systematic mismatches may also arise from gradients.

Certain physical parameters may vary gradually across an integrated circuit, for example:

Temperature

Pressure

Oxide thickness

Because of the way we mathematically treat these variations, they are called gradients.

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Rules for MOS transistor matching

Place transistors in close proximity. Orient transistors in the same direction. Keep the layout of the transistors as compact as

possible Whenever possible use Common centroid layouts. Place transistors segments in the areas of low stress

gradients. Place transistors well away from the power devices. For current matching keep overdrive voltage large. For voltage matching keep overdrive voltage

smaller.

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Layout Design Techniques

1. Interdigitization

Process gradient almost evenly distributed between components A and B . A and B are split into units

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Common Centroid

Perfect cancelation of linear gradients. Several patterns are possible. Can split A and B into

more than two units.

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SPECIFICATION

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SCHEMATIC

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PRE SIMULATION

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LAYOUT OF DIFF PAIR

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RC EXTRACTION

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POST SIMULATION

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Result

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SPECIFICATION PRE SIMULATION POST SIMULATION

DC GAIN(dB) 51.92 51.9

UGB(MHz) 10.54 10.38

Conclusion

The layout of single ended differential amplifier is designed in cadence UMC 180nm technology virtuoso.

Pre and post simulation is verified.

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References

Seong K. Hong and Phillip E. Allen [21a. 'ANALOG CIRCUIT LAYOUT WIT'H OPTIMIZED PERFORMANCE"

Alan Hastings." The Art of Analog Layout (Sencond Edition), 2007."

Behzad Razavi, . "Design of Analog CMOS Integreated Circuits, 2001."

Dan Clein."CMOS IC LAYOUT Concepts, Methodologies, and Tools

Pelgrom, M. J. M., Duinmaiger, A. C. J., and Welbers, A. P. G., Matching Properties of MOS Transistors, IEEE J. Solid-State Circuits, Vol. SC-24, Oct. 1989, pp. 1433-1439

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THANK YOU

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