Adam_Mcconnell_Revision3

The World Leader in High Performance Signal Processing Solutions

ADI Confidential Information – Not for external distribution

COOP PresentationSummer 2010

Adam McConnell1st RotationDVP Group

Supervisor: Brent Scholten

—Analog Devices Confidential Information—

Overview of Projects

1) Develop FPGA code to write 3 copies of a HDCP key to the One-Time Programmable memory

First exposure to Xilinx, FPGA and Verilog

2) Automated the PLL Jitter Transfer Function using GPIB First exposure to General Purpose Interface Bus (GPIB) and GPIB

commands relating to AWG7102 and TDS7104

3) Extension of Automated transfer function using wxPython More exposure to Python, first time using wxPython, introduction

to threading


My First Day at ADI


After the Movie :Before Status:Current code only writes the HDCP key once into OTP

What it the issue with writing to the OTP only 1 copy?

Relevance/issueNeeded the ability to generate samples in lab

Background of error correction on the ADV7511Customers use them with ECC enabledSometimes there is no ATE solution available

Software does exist, but not hardware implementation

Goals:Program HDCP keys to samples in lab


Investigation

My Limitation: Can’t look at the entire written key ( and can’t read the entire OTP memory)We have no bench software that has this capability, only KSV

values The only thing we can look at are the first 5 bytes (KSV)On XRC software, they are showed backwards Here, the KSV values are C9 F7 AD 92 04

My primary debug technique was to enable Error-Correction Code to see how it changed (or didn’t change) KSV values


Continued…

Becoming familiar with XRC Eval software; Generating an image using a Tx, Rx and a motherboard

Learning Verilog-HDL and what a FPGA isReading Verilog code of the motherboardProgramming FPGA using Xilinx with Verilog code

Hardest part wasn’t editing or changing code but reading and understanding the data flowIt had nearly 10,000 lines of code!Composed of several modules

Top, i2c_reg_map, fpga_reg_map are the primary modules


Data Diagram of OTP

2nd Key

1st Key

3rd Key

329 bytes

329 bytes

329 bytes

Tx OTP Mapping we wantAUX1

KSV2

KSV1

AUX1

1st Key

CRC1

2nd Key

CRC2 AUX2 KSV3

3rd Key

What was happening

KSV3

KSV2

KSV1

CRC1

CRC2

CRC3

AUX2

AUX3

329 bytes

329 bytes

AUX3

331 bytes total

334 bytes


End results: What I’ve learned

Programmed HDCP keys correctly 3x with no auxiliary padding or offset Verified correct implementation by enabling ECC

Have an understanding of Verilog, Xilinx; Familiar with KSV values, ECC, XRC Software

Learned about HDCP Encryption within the 7511 Tx part

My biggest challenge was figuring out mistakes I made while trying to modify the code.


Look, No Hands! : Automating the AWG

Arbitrary Waveform Generator

Goals: - Learn GPIB Commands for various functions - Plot measurements to graph the Jitter Transfer Function-Automate the data collection required to evaluate a PLL’s jitter transfer function

GPIB Connectors


Why automate the PLL transfer function?

Better repeatability:Manual measurements

proved to be tediousTime consuming:

Creating a Transfer function of the PLL takes a long time

Any register settings changing the PLL would require modeling another transfer function

Why use the AWG? Easy to use1 piece of equipmentEasy to add jitter using

SerialXpress


Investigation

Needed to read Tektronix TDS 7104 and AWG7102 programmer’s manuals to learn about GPIB commandsManuals were between 200 - 400 pagesStarted by getting familiar with each piece of equipment

individuallyCreated 15 waveforms with different jitter frequencies for

measurements 10kHz, 20kHz, 50kHz, 100 – 900kHz, 1MHz, 5MHz, 10MHz

Going back to read documentation for clarification when script errors emerged as my setup became more automated and less manualTime delays, script would skip actions or the equipment didn’t

receive it, possible stack issues


10 100 1000 10000

-33.0

-30.0

-27.0

-24.0

-21.0

-18.0

-15.0

-12.0

-9.0

-6.0

-3.0

0.0

3.0

6.0 Recommended Settingsreference

Jitter Frequency (kHz)

Jitt

er G

ain

(dB

)

10 100 1000 10000

-33.0

-30.0

-27.0

-24.0

-21.0

-18.0

-15.0

-12.0

-9.0

-6.0

-3.0

0.0

3.0

6.0Charge Pump Current

5uA10uA25uA30uA35uA40uA45uA15uA_recommended


Gai

n (d

B)

10 100 1000 10000

-33

-30

-27

-24

-21

-18

-15

-12

-9

-6

-3

0

3

6

9Capacitor 1

50pF100pF150pF300pF350pF200pF_recommended


G

ain

(dB

)


What I’ve Learned

Advantages/Disadvantages of GPIB connections

Familiarity with AWG and python scripting

Added experience with the oscilloscope on top of exposure in classes.

High-level Basic understanding of how a PLL works

Basic understanding of Jitter and the transfer function of a PLL


Extending the automationFind a way to stop the script at any point during runtime

Initial Idea was to use a ‘while’ loop :while(keyboard_pressed == False):

Run script

An easy solution was to make a GUI and have two buttons, Run script & Stop script respectively, then use a thread to control my scriptGreat idea, but I didn’t know what threads were

Boa Constructor was a non-intuitive python GUI builder and this was my first introduction to threads


Equipment I learned to use during my time at ADI

HardwareInstek Programmable

Power Supply (PST-3202)Quantum Data Video

Gen. (882)Astro 1809 HDMI

Protocol AnalyzerTektronix AWG-7102Tektronix Oscilloscope

(TDS-7104)

SoftwareNational Instruments:

Measurement & Automation

Xilinx ISE 9.2i iMPACT

Boa Constructor


Thanks to:John BoglovitzBryan CampbellFrank FarellyHarry GoingsMike HannahPatrick KellyDeene KennonOlie Kreidler

Sid KrishnanMatt McCarnKaushal ModiRalph MooreMeredith MorganBrent ScholtenGerry SpringJeff Ugalde

Questions or comments?

Adam_Mcconnell_Revision3

Documents

Transcript of Adam_Mcconnell_Revision3