A VERY FLEXIBLE BICMOS LOW-VOLTAGE HIGH-PERFORMANCE SOURCE FOLLOWER

Carlo Fiocchi', Umberto Gatti ( IV-IEEE)~

'Mikron AG Corso Mazzini 3,27100 Pavia, Italy

21taltel S.p.A., Research & Development Center 20019 Settimo Milanese, Milano, Italy

Tel. +39 02 43887415: E-Mail: umberto.gatti@italtel.it

ABSTRACT This paperpresents a new high performance source follow- er, which features very low output impedance and excellent driving capability, while only requiring a supply of one threshold plus two saturation voltages. In fact, its output conductance can be increased by a factor > 500 with a suit- able local loop, making this cell suitable for driving loads up to some tenths of ohms. Using this basic block, a novel class AB push-pull operational amplifier has been de- signed. It achieves good performance (output quiescent cur- rent = 1.2 @, peak output current > 200 @, max. capacitive load = I nF), with a supply voltage of 1.3 V and a total power consumption of only 3.7pW.

1. INTRODUCTION

The increasing demand for chip-sets for all portable battery operated devices (watches, calculators, pagers, mobile tele- phones, etc.) together with ever thinner gate-oxide thick- nesses have been incentivating the design of low-voltage low-power circuits. To achieve both these goals new topol- ogies and basic blocks need to be studied. The source fol- lower is one of the most widely used building blocks [ 11. It presents low output impedance and is commonly utilised to decouple two successive sections of a processing chain or to drive low impedance loads as a final output stage. However, i t suffers from some limitations. The main problem is that output resistance is poor even for large bias currents. An al- ternative solution, which aims at improving the above men- tioned performance is the so-called "source follower with local feedback" (SFLF) [2]. Indeed, a classic way to reduce the output resistance of a gain stage is to introduce a feed- back. Fig. 1 shows a BiCMOS source follower with addi- tional circuitry that can be identified as a local feedback loop. As for conventional source followers, the input signal

is replicated at the emitter of Q1, but here it is also amplified at the collector of the same transistor.

Figure 1. Conventional source follower with local feedback (SFLF)

The amplified signal is fed to the input of M2 which oper- ates as the input element of a second gain stage. A feedback loop is established through the Ql-M2 path. Thus, its output conductance g,l is increased by a factor gm2rds3 with re- spect to a conventional solution. The minimum supply for this structure is limited to one threshold and three saturation voltages. For a conventional process (Vths = 0.7 V and V,, = 0.2 V) a supply of 1.3 V is needed at least. Unfortunately, one drawback is this loop's asymmetrical and limited output current driving capability (operation in class A). While the stage is able to source a high current, it can sink only a lim- ited one. This behaviour is suitable for charging loads con- nected to ground, but precludes the use of SFLF as a driving stage for class AB output stages. Moreover, the dependence of the output conductance on the biasing current (as will be shown in the next section) is not very efficient and leads to an output impedance that may not be low enough for driving off-chip applications. In addition, although the distortion due to the modulation of the base-emitter voltage of Q1 is

0-7803-5471 -0/99/$10.0001999 IEEE

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reduced by the loop gain, this performance may not be sat- isfactory in the presence of very low impedance loads. Fi- nally, the upper dynamic range of the Q 1 collector is limited by VDD - Vgs2, thus limiting the input swing. output

Conductance

2. BASIC TOPOLOGY OF THE PRO- POSED SOURCE FOLLOWER

BiCMOS CMOS Currents Currents

Dependence Dependence

One possible solution for the above mentioned problems of the source follower with local feedback is shown in Fig. 2a. Here, the feedback which is made up by transistor M4, acts on the lower bias transistor, M2: the signal current sourced or sunk on the load is furnished by M2, while the current in Q1 is set equal to I, even in presence of an input signal. Thus, the modulation of the base-emitter voltage of Q1 is minimised, with benefits on the distortion. The output con- ductance is now given by gmlgm2rds5. In principle, the mul- tiplying factor gm2rds5 is of the same order of magnitude as that one in the SFLF.

I

a)

Figure 2. Proposed source follower with local feedback: a) BiCMOS implementation; b) CMOS implementation

However, a careful look at current dependencies (see Table 1) indicates that the proposed solution ensures greater flex- ibility. The Table relates the BiCMOS implementation of the new source follower to a pure CMOS one (Fig. 2b). The above table, shows that in the proposed circuit, an increase in current I, achieves a stronger improvement in the output conductance than in SFLF. This factor leads to lower cur- rent consumption while maintaining the same output im- pedance. Similar behaviour characterises the harmonic distortion. Moreover, the input dynamic range in the pro- posed structure is better than in SFLF because the Q1 col- lector can rise at one saturation voltage below VDD, while the supply itself can be as low as one threshold and two sat- uration voltages. In this manner it is possible to take advan- tage of more advanced NPN-only technology (usually faster and with more linear parasitic capacitances than BiCMOS

technology) without sacrificing circuit performance, be- cause a lateral PNP need only be used for the biasing.

Table 1. Comparison between output conductance and current dependencies in SFLF and in the proposed structure for CMOS and BiCMOS implementation

Another interesting feature of the proposed topology is shown in Fig. 3. It is easy to transform the BiCMOS imple- mentation of Fig. 2a into a NPN-only one.

Figure 3. Proposed source follower with local feedback implemented with NPN-only technology

In contrast, the SFLF solution also requires a PNP in the sig- nal path to substitute M2, thus drastically lowering the speed of the feedback loop. A resistor Rb and a capacitance Cb have been added to the feedback to improve the dynamic range (Rb) and high-frequency performance (ct,).

3. BICMOS LOW-VOLTAGE PUSH-PULL OPERATIONAL AMPLIFIER

The attractive features of the above described source fol- lower make its use possible as key block in a novel low- voltage single-stage class AB push-pull operational ampli- fier. The target of this class of circuits is to reduce the qui- escent power consumed while retaining sufficient speed and driving capabilities even with very heavy loads (either a small resistor or a large capacitor). The proposed pull-down section is illustrated in Fig. 4.

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V0"I

9 d I I

Figure 4. Use of the proposed circuit as an input stage for a push-pull operational amplifier (pull-down section)

Transistor 4 2 has been added to provide the opposite input of the stage, while MNO represents the pull-down transis- tor. Since the positive signal Vinp applied to Q1 is replicated with very low output impedance and distortion at the com- mon emitters (node E), the whole input differential signal Vi, = Vinp - Vi,, appears on the Q2 base-emitter junction in a push-pull fashion. For a large Vi, signal, i.e. positive at Vinn and negative at Vinp, the voltage drop across 4 2 causes a large increase in the current across M2. As a consequence, a current which is much larger than the quiescent level is available for mirroring to the pull-down transistor and thus delivering to the load. In contrast, the quiescent current is well defined and controlled by the matching of identical (or ratioed) devices. As already pointed out, the SLFL cannot be used in place of the proposed one in building a push-pull op. amp., since the lower bias transistor is not able to sink the current delivered by Q2, when Vinn is positive. The cur- rent generator I1 in Fig. 4 was added to guarantee that the current mirrored in the output stage by M2-MNO is exactly the same current which flows across Q2. This topology al- lows a shorter signal path and less current consumption. The proposed approach is quite similar to the one presented in [3]. However, it exhibits some specifically improved fea- tures, which are listed below. In the novel solution current saturation occurs when the current level is such that the voltage drop across the input path (Ql, M2 and current gen- erator I) is equal to the supply, i.e. V,,, + 3VSat = Vsupply, at least one threshold less than in [3]. This allows a low-sup- ply voltage (< 1.5 V) to be used without sacrificing driving capability and distortion performance. Moreover, the lower dynamic range of the proposed structure is superior than in [ 3 ] , because the former is limited by Vths + 2VSat, while the latter by 2V,h, + 3VSat. Other important performance enhancements are:

nominal doubling of differential gain (+6 dB) with re- spect to [ 3 ] , obtained by doubling the transconductance (2gm against gm) with benefits also to the bandwidth superior insensitivity of the quiescent current to variation in processing, temperature and supply compared with [4]

Moreover, implementing the traditional push-pull principle in BiCMOS technology is not straightforward, since no complementary bipolar devices are available to substitute n- channel and p-channel transistors. Instead, in the proposed solution, there is no need for PNP devices in the signal path, at the same time as it takes advantage of NPN availability in terms of speed and gain. It is important to note that class AB operation is achieved without using a positive feedback loop (such as in [6]), so no stability problems arise. Moreover, it is simpler than [5], which includes two op. amps. and suffers from distortion due to the interaction of the two op. amps. during transients. The simplified schematic of the novel operational amplifier is shown in Fig. 5.

1""; I * 4 1 I

Figure 5. Simplified schematic of the novel push-pull class AB operational amplifier

Branch 1 drives the pull-down transistor, MNO, while branch 2 drives the pull-up one, MPO. An high compliance current mirror [7], MB1 and MB2, has been introduced to drive MPO, so as to optimise the upper dynamic range.

4. SIMULATION RESULTS An operational amplifier based on the proposed idea was simulated using conventional double-poly double-metal 0.8 pm BiCMOS technology. Fig. 6 shows the simulated frequency response of the op. amp. with a 1 nF capacitive load. The differential DC gain obtained is 57 dB, the gain bandwidth product >10 kHz and the phase margin is 90 degrees. Fig. 7 shows the step response (0.5 V) of the push-pull op- erational amplifier in unity gain configuration.

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block is used to design a novel class AB push-pull opera- tional amplifier capable of working with a supply voltage as low as 1.3 V, while achieving satisfactory performance at the same time. This behaviour is obtained using a conven- tional 0.8 pm BiCMOS process, with no need for expensive special low threshold devices. The results from simulations demonstrate the validity of the proposed solution; in partic- ular, the Slew-Rate performance (0.2 V/ps) obtained with a power consumption of only 3.7 pW attains the state-of-the art. Thanks to its flexibility, the proposed source follower can be easily employed in a variety of circuits as well.

Gain

Bandwidth (Cl= 1 nF)

Figure 6. Simulated frequency response of the proposed push-pull operational amplifier (C, = 1 pF, VDD = 1.3 V) -

57 dB

> 10 kHz

Figure 7. Simulated step response of the proposed push- pull operational amplifier (C, = 1 pF, VDD = 1.3 V, = 0.5 v, v,, = 1 V)

It can be observed that we obtained a Slew-Rate of 0.2 Vlps corresponding to a peak output current of 200 pA, while the output quiescent current is only 1.2 pA, which means an ef- ficiency > 80. The settling time indicated in the same figure is around 65 ps. The Total Harmonic Distortion when a 0.5 VPp@ 1 kHz input sinewave is applied is -58 dB. Table 2 contains a summary of the simulated performance of the novel push-pull class AB operational amplifier. The results demonstrate the validity of the architecture used to achieve class AB operation with a power supply voltage of only 1.3 V and a static power consumption of 3.7 pW. The proposed circuit was designed using the same technol- ogy and its size is approximately 0.025 mm2. A capacitance of about 5 pF was added to the output terminal as a compen- sation capacitance.

5. CONCLUSION In this paper we have presented a source follower based on new local feedback loop which allows the limitations shown by previously proposed solutions to be overcome. This

I Performance 1 I Feature

1 ~~ I Slew-Rate (Cl= 1 nF) I 0.2 V / p I Output Quiescent Curr. I 1.2 pA 1

Peak Output Current

Input Dynamic Range (Vcm = 1 V)

~~ ~~

THD (0.5 Vpp@ 1 kHz)

Power Consumption

~ > 200 pA

M.25 v

-58 dB

3.7 pW@ 1.3 Vsupply

Table 2. Performance summary of the novel class AB operational amplifier

6. REFERENCES

P. R. Gray, R. G. Meyer, Analysis and Design of Analog Integrated Circuits - 3rd Ed., John Wiley&Sons, 1993

G. Giustolisi, G. Palmisano, G. Palumbo, 1.5 V Power Supply, CMOS Voltage Squarer, Elect. Lett., Vol. 33, N. 13, June 1997, pp. 1 134-1 135 R. Castello, P. R. Gray, A High-Performance Micropower Switched-Capacitor Filter, IEEE Journal of Solid State Circuits, Vol. SC-20, Dec. 1985, pp. 1122-1 132 M. Blazes, Two Novel Fully Complementary Self-Biased CMOS Differential Amplifiers, IEEE Journal of Solid State Circuits, Vol. SC-26, Feb. 1991, pp. 165-168 F. Wang, R. Heineke, R. Harjani, A Low Voltage Class AB CMOS Amplifier, Proc. ISCAS 1996, pp. 393-396 L. Callewaert, W. Sansen, Class AB CMOS Amplifiers with High Efficiency, IEEE Journal of Solid State Circuits, Vol. SC-25, June 1990, pp. 684-691 P. J. Crawley, G. W. Roberts, High-Swing MOS Current Mirror with Arbitrarily High Output Resistance, Elect. Lett., Vol. 28, N. 4, pp. 361-363, Feb. 1992

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