A Two-Step-Recess Process Based on Atomic-Layer Etching for … · 2016. 8. 17. · IEEE...

IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 55, NO. 7, JULY 2008 1577

A Two-Step-Recess Process Based onAtomic-Layer Etching for High-Performance

In0.52Al0.48As/In0.53Ga0.47As p-HEMTsTae-Woo Kim, Associate Member, IEEE, Dae-Hyun Kim, Sang-Duk Park, Seung Heon Shin, Seong June Jo,

Ho-Jin Song, Member, IEEE, Young Min Park, Jeoun-Oun Bae, Young-Woon Kim, Geun-Young Yeom,Jae-Hyung Jang, Member, IEEE, and Jong-In Song, Senior Member, IEEE

Abstract—We investigated 60-nm In0.52Al0.48As/In0.53Ga0.47As pseudomorphic high-electron mobility transistors(p-HEMTs) fabricated by using a Ne-based atomic-layer-etching(ALET) technology. The ALET process produced a reproducibleetch rate of 1.47 Å/cycle for an InP etch stop layer, an excellentInP etch selectivity of 70 against an In0.52Al0.48As barrier layer,and an rms surface-roughness value of 1.37 Å for the exposedIn0.52Al0.48As barrier after removing the InP etch stop layer.The application of the ALET technology for the gate recessof 60-nm In0.52Al0.48As/In0.53Ga0.47As p-HEMTs producedimproved device parameters, including transconductance (GM ),cutoff frequencies (fT ), and electron saturation velocity (υsat)in the channel layer, which is mainly due to the high etchselectivity and low plasma-induced damage to the gate area. The60-nm In0.52Al0.48As/In0.53Ga0.47As p-HEMTs fabricated byusing the ALET technology exhibited GM,Max = 1.17 S/mm,fT = 398 GHz, and υsat = 2.5 × 107 cm/s.

Index Terms—Atomic-layer etching (ALET), channel electronsaturation velocity (υsat), gate-recess process, pseudomorphichigh-electron mobility transistor (p-HEMT).

I. INTRODUCTION

THE InP-BASED high-electron mobility transistors(HEMTs) have shown outstanding high-frequency

performances. A short-circuited common-source current-gaincutoff frequency (fT ) of 562 GHz for p-HEMTs, having a gate

Manuscript received January 15, 2008. This work was supported in partby the Plant Technology Advancement Program funded by the Ministry ofConstruction and Transportation of Korean government under KRF GrantD00642 and in part by the Fusion Technology program. The review of thispaper was arranged by Editor S. Bandyopadhyay.

T.-W. Kim, S. H. Shin, S. J. Jo, H.-J. Song, J.-H. Jang, and J.-I. Song arewith the Center for Distributed Sensor Network, Department of Informationand Communications, Gwangju Institute of Science and Technology, Gwangju500-712, Korea (e-mail: [email protected]).

D.-H. Kim is with the Microsystems Technology Laboratories,Massachusetts Institute of Technology, Cambridge, MA 02139 USA.

S.-D. Park, J.-O. Bae, and G.-Y. Yeom are with the Department of Ad-vanced Materials Science and Engineering, Sungkyunkwan University, Suwon440-746, Korea.

Y. M. Park was with Department of Materials Science and Engineering,Seoul National University, Seoul 151-742, Korea. He is now with StanfordUniversity, Stanford, CA 94305 USA.

Y.-W. Kim is with the Department of Materials Science and Engineering,Seoul National University, Seoul 151-742, Korea.

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TED.2008.923522

length of 25 nm through a deep vertical insulator thicknessscaling and a reduction of the source/drain resistance byusing a multilayer cap structure [1], [2], has been reported.Using the remarkable high-frequency performance of HEMTs,ultrahigh speed integrated circuits (ICs), including 100-Gb/soptoelectronic ICs [3] and monolithic microwave ICs operat-ing at frequencies over 200 GHz [4], have already been success-fully demonstrated. More challengingly, InP-based HEMTsare considered as potential candidates for the future n-channeldevice for “beyond Si-CMOS” applications and have beenextensively investigated to study the suitability for logic deviceapplications [4]–[9].

For the fabrication of the ultrahigh speed InP-based HEMTs,the formation of the submicrometer gate is considered as oneof the most important processing steps, and thus, various sub-micrometer gate formation techniques have been investigated.Previously, Suemitsu et al. [10] proposed a two-step-recess(TSR) technology that has been widely utilized in the fab-rication of InP-based HEMTs for various applications [11]–[13]. Basically, this technology consists of a selective wetetching of a heavily n-doped InGaAs/InAlAs cap layer and asubsequent anisotropic etching of a thin InP etch stop layer byan Ar-based reactive ion etching (RIE). However, the secondprocess step has a drawback of a finite InP etch selectivityagainst an underlying In0.52Al0.48As barrier layer, becausethis process mostly utilizes the high energy of ionized atomsfor etching materials. More seriously, there also exists a highprobability that the highly energetic ionized atoms could yielda severe plasma-induced damage within the active region of thedevice (In0.52Al0.48As/In0.53Ga0.47As quantum well), possiblyleading to the degradation of device performance. Recently,we have successfully demonstrated a Ne-based atomic-layer-etching (ALET) technology to selectively remove the InP etchstop layer against the In0.52Al0.48As barrier layer [14]–[16].Because the Ne-based ALET technology uses the irradiationof a neutral Ne beam having a very low energy (< 27 eV), thethin InP etch stop layer can be etched with a negligible plasma-induced damage to the underlying active layer. The Ne-basedALET process exhibited an InP etch rate of 1.47 Å/cycle and anextremely high selectivity of 70 compared with that (approxi-mately ten) of the conventional Ar-based RIE [14]–[16].

In this paper, we report the application of ALETtechnology to the fabrication of high-performance 60-nm

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1578 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 55, NO. 7, JULY 2008

Fig. 1. Conceptual diagram showing a cycle of the ALET process.

In0.52Al0.48As/In0.53Ga0.47As p-HEMTs. Using characteriza-tion techniques, including an atomic force microscope (AFM)measurement for the analysis of the etched surface rough-ness, an angular-resolved X-ray photoelectron spectroscopy(ARXPS) for the analysis of the atomic percentage of the ex-posed In0.52Al0.48As barrier layer, and a scanning transmissionelectron microscopy (STEM) for the analysis of the remain-ing In0.52Al0.48As barrier-layer thickness, various aspects ofthe etching results produced by the Ne-based ALET and theconventional Ar-based RIE were investigated and compared.The characteristics of the 60-nm In0.52Al0.48As/In0.53Ga0.47Asp-HEMTs implemented by using the Ne-based ALET and theconventional Ar-based RIE will also be compared.

II. ALET TECHNOLOGY

Fig. 1 shows a schematic diagram depicting the detailedoperational principle of the ALET process [17]. Basically,the process consists of the following four separate sequentialsteps:

1) Supply of Cl2 gas for 20 s to the etching chamber so thatchlorine can be adsorbed on the surface of the InP layer(adsorption step);

2) Evacuation of excess chlorine gas;3) Ne neutral beam irradiation to the Cl2 adsorbed surface

for the desorption of InP chlorides (desorption step);4) Evacuation of the desorbed InP chlorides.

The pressure of the Cl2 gas was 0.4 mtorr during the ad-sorption step, and the Ne neutral beam irradiation dose was7.2 × 1015 atom/cm2 during the desorption step. A cycle of theALET takes approximately 80 s and yields an InP etch rate of1.47 Å/cycle (approximately one monolayer of InP/cycle).

To investigate the effect of the ALET technology on thesurface morphology of the exposed In0.52Al0.48As barrier layerafter the removal of the InP etch stop layer, AFM measurementswere carried out. For comparison, a selective wet etching usinga HCl-based solution (HCl : H3PO4 : CH3COOH : H2O = 1 :1 : 5 : 1) and the conventional Ar-based RIE were also used toselectively etch the InP etch stop layer. The RIE was performed

in an Oxford Plasma Lab-80 RIE chamber with a processpressure of 10 mtorr, an Ar flow rate of 50 sccm, and an RFpower of 7 W. The RIE process produced an InP etch rateof 4 Å/ min and an InP etch selectivity of ten against theIn0.52Al0.48As barrier layer.

Fig. 2 shows the AFM results of the exposed In0.52Al0.48Assurface after removing the 60-Å thin InP etch stop layer bythree different etching techniques. The measured rms surface-roughness values were 7.7, 2.9, and 1.37 Å for the wet etching,the Ar-based RIE, and the ALET, respectively. The smallestrms surface-roughness value of the ALET sample is attributedto the etching mechanism of the ALET, where the chlorine-based chemical reaction with the InP layer and the subsequentdesorption of the InP chloride by the low-energy Ne beamsputtering are combined. By localizing the chemical reactiononly at the surface of the InP layer and by minimizing theenergy of the Ne beam below 27 eV, the ALET process yieldedthe smallest rms surface-roughness value [14].

An ARXPS was utilized to analyze the stoichiometric modi-fication of the exposed In0.52Al0.48As barrier-layer surface. Asshown in Fig. 3, insignificant change of the surface compositionof the exposed In0.52Al0.48As barrier layer was observed in thesample prepared by the ALET process. On the contrary, therewas a significant decrease in the ratios of As/InAl and Al/In inthe sample prepared by the conventional Ar-based RIE.

In order to physically inspect the exact thickness of theremaining In0.52Al0.48As barrier layer, STEM inspections werecarried out for the samples prepared by the ALET and RIE.Fig. 4 shows the STEM images of both samples. In bothcases, the InP layer was overetched by approximately 22%of the exact etching time. In the sample prepared by theconventional Ar-based RIE, it was found that approximately1.5 nm of the In0.52Al0.48As barrier layer was etched, whichis mainly due to the finite InP etch selectivity of the RIEprocess against the In0.52Al0.48As layer. On the contrary,in the sample prepared by the Ne-based ALET, no notice-able etching of the In0.52Al0.48As barrier layer was ob-served. According to the AFM, ARXPS, and STEM results,it is concluded that the ALET process can possibly produce

KIM et al.: PROCESS BASED ON ATOMIC-LAYER ETCHING FOR In0.52Al0.48As/In0.53Ga0.47As p-HEMTs 1579

Fig. 2. AFM images of the In0.52Al0.48As surface obtained after removingthe 60-Å InP etch stop layer by the selective wet etching, Ar-based RIE, andNe-based ALET. (a) Wet etching rms roughness = 7.77 Å. (b) Ar-based plasmarms roughness = 2.97 Å. (c) ALET rms roughness = 1.37 Å.

more reproducible and improved device performance of theIn0.52Al0.48As/In0.53Ga0.47As p-HEMTs.

III. APPLICATION OF THE ALET TO

60-nm InP-BASED HEMTs

Fig. 5 shows the epitaxial layer structure of theIn0.52Al0.48As/In0.53Ga0.47As p-HEMT. It has a Si δ-doping layer with a planar doping density of 5 × 1012 cm−2.A gated van der Pauw–Hall structure, with an active areaof 100 × 100 µm2, was fabricated to measure Hall mobility(µn,hall) and sheet carrier density (ns). After etchingthe multilayer cap, the measured Hall mobility (µn,hall)and sheet carrier density (ns) were 14 000 cm2/V · s and3.2 × 1012 cm−2, respectively, at room temperature.

Fig. 3. Ratios of As/InAl and Al/In at the surface of the In0.52Al0.48Asbarrier layer measured by using an ARXPS after the Ar-based RIE andNe-based ALET processes.

Device fabrication process began with a mesa isolationdown to the InAlAs buffer layer by a wet chemical etch-ing. After source and drain ohmic metallization (Ni/Ge/Au =100/450/1500 Å), a subsequent rapid thermal annealing at275 C for 45 s was performed in a N2 ambient. The measuredohmic contact resistivity (Rc) was as low as 0.02 Ω · mm. Then,the pad patterns for ground–signal–ground RF probes weredefined with Ti/Au (200/3000 Å) metallization. After coatingthe trilayer e-beam resist stacks (ZEP520A/PMGI/ZEP520A),double e-beam exposure method was used to define 60-nmT-gates. After isotropically removing the n-InGaAs/InAlAsmultilayer cap by a citric acid-based wet-chemical-etchingsolution, the Ne-based ALET process was used to removethe InP etch stop layer. For comparison, the conventionalAr-based RIE was also used to etch the InP etch stoplayer for other samples. Finally, Ti/Pt/Au (200/200/3000 Å)Schottky gate metallization was performed by an electron beamevaporation.

Fig. 6 shows the STEM image of the gate region of the60-nm In0.52Al0.48As/In0.53Ga0.47As p-HEMTs fabricated bythe ALET process. Note that there exists insignificant etchingof the exposed In0.52Al0.48As barrier due to the excellentetch selectivity. Fig. 7 shows the output current–voltage char-acteristics of the 60-nm p-HEMTs fabricated by ALET andRIE. The p-HEMT fabricated by the ALET showed a bettercurrent driving capability. At the same time, it also showed alittle bit larger output conductance (GO). Because the outputconductance of a submicrometer p-HEMT is closely relatedto the impact ionization-induced gate-hole-current component(Ig,hole), the gate leakage current characteristics were measuredto extract the gate-hole-current component. The extracted peakgate-hole current of the p-HEMT fabricated by the ALETwas larger than that of the p-HEMT fabricated by the Ar-based RIE. The smaller gate-hole current of the p-HEMTfabricated by the Ar-based RIE is presumably attributed tothe reduced peak electric field between the gate and draindue to the decreased channel mobility (i.e., the increasedchannel resistance) caused by the plasma-induced etchingdamage.

Fig. 8 shows the normalized drain saturation currentand transconductance characteristics of the 60-nm p-HEMTs


Fig. 4. STEM images of the region under the gate of the p-HEMTs implemented by using the Ar-based RIE and Ne-based ALET.

Fig. 5. Epitaxial layer structure of the In0.52Al0.48As/In0.53Ga0.47Asp-HEMTs.

measured at VDS = 0.5 V. The GM,Max of the p-HEMTsfabricated by the ALET process was larger than that of thep-HEMT fabricated by the Ar-based RIE by 21%, which ismainly due to the much lower plasma-induced damage char-acteristics of the ALET process.

On-wafer S-parameter measurements were carried out from500 MHz to 50 GHz. Fig. 9 shows the short-circuited common-source current gain (|H21|) of the 60-nm p-HEMTs as a func-tion of the frequency measured at Vgs = 0.05 V and Vds =0.5 V. The extrapolated current-gain cutoff frequency (fT ) was398 and 355 GHz for the p-HEMT fabricated by the ALET andthe Ar-based RIE, respectively.

Fig. 6. STEM image of the fabricated TSR 60-nm In0.52Al0.48As/In0.53Ga0.47As p-HEMT implemented by using the ALET.

IV. DISCUSSIONS

In order to analyze the cause of the fT improvement of thep-HEMT fabricated by the ALET, the analysis of the intrinsicdelay time was carried out. According to Moll’s model [18],the total intrinsic delay of the device consists of three differentcomponents

τIntrinsic = τtransit + τRC + τdrain. (1)

Here, τintrinsic is the total delay time, τtransit is the electrontransit time beneath the physical gate region, τRC is the channelcharging time, and τdrain is the drain delay time due to the ex-tension of the gate depletion region toward the drain side [19].


Fig. 7. Typical IDS–VDS characteristics of the fabricated TSR 60-nmIn0.52Al0.48As/In0.53Ga0.47As p-HEMTs implemented by using the RIEand ALET.

Fig. 8. Typical drain saturation and dc transconductance characteristics ofthe fabricated TSR 60-nm In0.52Al0.48As/In0.53Ga0.47As p-HEMTs imple-mented by using the RIE and ALET.

Fig. 9. Short-circuited common-source current gain as a function of thefrequency of the fabricated TSR 60-nm In0.52Al0.48As/In0.53Ga0.47Asp-HEMTs implemented by using the RIE and ALET.

Fig. 10 shows the plots of the total delay time (τintrinsic)as a function of the Wg/IDS, in which τtransit + τdrain andτRC can be extracted independently [18]. Fig. 11 shows the

Fig. 10. Intrinsic delay time as a function of the inverse drain–source cur-rent of the fabricated TSR 60-nm In0.52Al0.48As/In0.53Ga0.47As p-HEMTsimplemented by using the RIE and ALET.

Fig. 11. Sum of the τtransit and τdrain as a function of the gate length (Lg)for the calculation of the channel electron saturation velocity (υsat).

sum of τtransit and τdrain as a function of the gate length(Lg). The τdrain can be extracted from the y-intercept, and theelectron saturation velocity (υsat) can also be estimated fromthe inverse slope of the plot [20]. The p-HEMTs fabricated bythe ALET exhibited the τtransit + τdrain value that is smallerby 5% and the τRC value that is smaller by 29% comparedwith those of the p-HEMT fabricated by the RIE. The smallerτRC of the p-HEMTs fabricated by the ALET suggests thatthe channel resistance of these devices is smaller than that ofthe devices fabricated by the RIE. The extracted τdrain andυsat of the p-HEMTs fabricated by the ALET are 0.04 ps and2.5 × 107 cm/s and those for the p-HEMT fabricated by the RIEare 0.04 ps and 1.9 × 107 cm/s, respectively. The 30% higherυsat of the p-HEMT fabricated by the ALET is the consequenceof the improved carrier transport property of the p-HEMTchannel achieved by the ALET process. Table I summarizes thedetailed results of the delay time analysis for p-HEMT devicesfabricated by the ALET and RIE.


TABLE IESTIMATED VALUES OF DELAY TIME CONSTITUENTS AND CHANNEL ELECTRON SATURATION VELOCITY OF THE

60-nm In0.52Al0.48As/In0.53Ga0.47As p-HEMTs FABRICATED BY USING THE ALET AND RIE TECHNOLOGIES

V. CONCLUSION

In this paper, a TSR process utilizing the ALET technol-ogy was successfully employed for the fabrication of high-performance 60-nm In0.52Al0.48As/In0.53Ga0.47As p-HEMTs.The ALET technology used for the two-step gate-recess processyielded better electrical characteristics of the p-HEMTs, whichis due to the higher InP etch selectivity against the underlyingIn0.52Al0.48As barrier layer and much less plasma-induceddamage characteristics of the ALET technology compared withthe conventional Ar-based RIE process. The 60-nm p-HEMTsfabricated by the ALET process exhibited improved GM,Max

and fT of 1.17 S/mm and 398 GHz, respectively, comparedwith those (0.91 S/mm and 355 GHz, respectively) of thep-HEMTs fabricated by the ALET process. The results indicatethe potential of the ALET technology for the fabrication ofhigh-performance InP-based p-HEMTs.

ACKNOWLEDGMENT

The authors would like to thank Y. K. Kim at NCNT inPOSTECH for the help with TEM analysis and the NationalProgram for Tera-Level Nanodevices for supporting the ALETtechnology in the device fabrication.

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Tae-Woo Kim (S’04–A’08) received the B.S. degreein electronic engineering from the Kumoh NationalInstitute of Technology, Gumi, Korea, in 2001 andthe M.S. degree in information and communicationengineering from the Gwangju Institute of Scienceand Technology, Gwangju, Korea, in 2003, wherehe is currently working toward the Ph.D. degree ininformation and communications in the Center forDistributed Sensor Network, Department of Informa-tion and Communications.

His current research interests include InP-basedhigh-electron mobility transistors and their application to microwave mono-lithic integrated circuits.


Dae-Hyun Kim was born in Korea on November 13,1974. He received the B.S. degree in electronics fromthe Kyungpook National University, Daegu, Korea,in 1997 and the M.S. degree in electrical engineeringand Ph.D. degree in electrical engineering and com-puter science from Seoul National University, Seoul,Korea, in 2000 and 2004, respectively.

From 2004 to 2005, he was a Postdoctoral As-sociate with the Interuniversity Semiconductor Re-search Center, Seoul National University. Since2005, he has been with the Massachusetts Institute

of Technology, Cambridge, where he is currently a Postdoctoral Associate inthe Microsystems Technology Laboratories.

Sang-Duk Park received the B.S. degree in materialscience and engineering from Kunsan National Uni-versity, Kunsan, Korea, in 1997 and the M.S. degreein nanoscience and engineering and Ph.D. degreein advanced materials science and engineering fromSungkyunkwan University, Suwon, Korea, in 2002and 2007, respectively.

He is currently with the Department of AdvancedMaterials Science and Engineering, SungkyunkwanUniversity. His present interests include atomic layeretching and neutral beam etching.

Seung Heon Shin was born in Gunsan, Korea, in1980. He received the B.S. degree in radio sci-ence and engineering from Kwangwoon University,Seoul, Korea, in 2005 and the M.S. degree in infor-mation and communications from the Gwangju Insti-tute of Science and Technology, Gwangju, Korea, in2007, where he is currently working toward the Ph.D.degree in information and communications in theCenter for Distributed Sensor Network, Departmentof Information and Communications.

His current research interests include III-V com-pound semiconductor technology, high-electron-mobility-transistor technol-ogy, and high-frequency circuit design.

Seong June Jo received the B.S. degree in electronicengineering from Gyeongsang National University,Jinju, Korea, in 1997 and the M.S. and Ph.D. degreesin information and communication engineering fromthe Gwangju Institute of Science and Technology,Gwangju, Korea, in 1999 and 2006, respectively.

In 2007, he was with EPIPLUS, Pyeongtaek,Korea, where he was working on the development oflarge-size high brightness LED. His current researchinterests include LED lighting and reliability.

Ho-Jin Song (S’02–M’06) received the B.S. degreein electronic engineering from Kyungpook NationalUniversity, Daegu, Korea, in 1999 and the M.S. andPh.D. degrees in information and communicationengineering from the Gwangju Institute of Scienceand Technology (GIST), Gwangju, Korea, in 2001and 2005, respectively.

From 2005 to 2006, he was a Research Professorwith the Center for Hybrid Optical Access Network,GIST. In 2006, he was with NTT Microsystem Inte-gration Laboratories, Atsugi, Japan, as a Postdoctoral

Researcher, where he was working on the development of millimeter-waveand subterahertz-wave signal synthesizer utilizing microwave photonic tech-nologies for communication, sensing, imaging, and measurement applications.His current research interests include optical-wireless hybrid millimeter-wavecommunication and submillimeter-wave measurement systems.

Young Min Park received the B.S. degree in mate-rials science and engineering and mathematics andthe M.S. degree in materials science and engineeringfrom Seoul National University, Seoul, Korea, in2005 and 2007, respectively. He is currently workingtoward the Ph.D. degree from Stanford University,Stanford, CA, where his main research interests arenanoscale materials and properties.

Jeoun-Oun Bae received the B.S. degree in physicsfrom Kyunggi University, Suwon, Korea, in 1995and the M.S. degree in vacuum science and en-gineering and Ph.D. degree in advanced materialsscience and engineering from Sungkyunkwan Uni-versity, Suwon, in 1997 and 2001, respectively.

From 2002 to 2005, he was a Postdoctoral Asso-ciate with the Micro and Nanotechnology Labora-tory, University of Illinois, Urabana. He is currentlythe Chief Researcher with Verticle Inc., Korea, wherehe is working on the technology for LED.

Young-Woon Kim received the B.S. and M.S. de-grees in metallurgical engineering from Seoul Na-tional University, Seoul, Korea, in 1983 and 1985,respectively, and the Ph.D. degree in materials sci-ence and engineering from the University of Illinois,Urbana, in 1995.

From 1995 to 1999, he was a Senior ProcessEngineer with Intel Corporation. From 1999 to 2001,he was a Senior Research Scientist with the MaterialsResearch Laboratory, University of Illinois. Since1999, he has been with Seoul National University,

where he is currently an Associate Professor in the Department of MaterialsScience and Engineering.


Geun-Young Yeom received the B.S. degree in elec-trical material engineering from Hanyang University,Seoul, Korea, in 1981, the M.S. degree in electricalmaterial engineering from Seoul National University,Seoul, in 1983, and the Ph.D. degree in electricalmaterial engineering from the University of Illinois,Urbana, in 1989.

From 1989 to 1991, he was a Process Engineerwith Tektronix Inc. From 1991 to 1992, he was aSenior Engineer with TDK Corporation, Seoul.Since 1992, he has been with Sungkyunkwan Uni-

versity, Suwon, Korea, where he is currently a Professor in the Department ofAdvanced Materials Science and Engineering.

Jae-Hyung Jang (M’02) received the B.S. and M.S.degrees in electrical engineering from Seoul Na-tional University, Seoul, Korea, in 1993 and 1995,respectively, and the Ph.D. degree in electrical andcomputer engineering from the University of Illinois,Urbana, in 2002.

He is currently an Assistant Professor with theCenter for Distributed Sensor Network, Departmentof Information and Communications, Gwangju Insti-tute of Science and Technology (GIST), Gwangju,Korea. His research interests at GIST include the

design, fabrication, and characterization of compound semiconductor devicesand circuits, including InP high-electron mobility transistors, single photondetectors, ZnO-based transparent thin-film transistors, and highly efficient solarcells. He is also doing active research works on small antennas based onmetamaterials and ring-resonator-coupled devices on silicon on insulator forphotonic integrated circuits and the integrated biosensors.

Jong-In Song (A’95–M’95–SM’02) received theB.S. degree in electronics engineering from SeoulNational University, Seoul, Korea, in 1980, theM.S. degree in electronics engineering from theKorea Advanced Institute of Science and Technol-ogy, Daejeon, Korea, in 1982, and the Ph.D. de-gree in electrical and electronics engineering fromColumbia University, New York, NY, in 1990.

From 1986 to 1990, he was a Graduate ResearchAssistant with the Center for TelecommunicationsResearch, where he pioneered high-performance

GaAs/AlGaAs 2-D electron-gas charge-coupled-device research for microwaveand infrared imaging applications. From 1990 to 1994, he was with theElectronics Science and Technology Division, Bellcore, where he workedprimarily on the development of microwave transistors, including GaInP/GaAs,InAlAs/InGaAs, InP/InGaAs HBTs, and their application to MMICs. He wasalso involved in the research on MMICs for phase arrayed antenna T/R modulesthat incorporate InP/InGaAs HBTs for SSPA and InAlAs/InGaAs HEMTsfor LNA monolithically. Since 1994, he has been with Gwangju Institute ofScience and Technology, Gwangju, Korea, where he is currently a Professorin the Department of Information and Communications and the Director of theCenter for Distributed Sensor Network, which is supported by the Ministry ofEducation, Science, and Technology. His current research interests include low-power circuits and systems, millimeter-wave over fiber (MMoF) for broadbandwireless access, and distributed sensor network.

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