A Theoretical Study on Wire Length Estimation Algorithms for

Placement with Opaque Blocks

Tan Yan*, Shuting Li

Yasuhiro Takashima, Hiroshi Murata

The University of Kitakyushu

* Now with University of Illinois at Urbana-Champaign

Motivation

“Opaque” blocks makes HPWL inexact Because of IP blocks, analog blocks, memory module… Lead to timing violation, unroutable nets…

S

THPWL

MWL

s

t

Motivation—cont’d

Exact wire length estimation for Block Placement the obstacle-avoiding shortest path length

Time complexity: O(n)? O(n2)? O(nlogn)?... Time complexity is almost the same as HPWL!

Already proposed in Computational Geometry

However Not well-known in CAD community Need interpretation to be applicable to CAD!

Our Contribution

We restate the results in

[P.J.de Rezende ’85] & [M.J.Atallah ’91] Simplify the discussion (with Block Placement

notions) CAD-oriented language Tailor the theory to fit into Physical Design

background

Problem Formulation

Input: Block location Pin location (on block boundaries) ABLR relations * (obtainable from Sequence

Pair, etc)

Output: Rectilinear block-avoiding shortest path length

for every 2-pin net = Minimal Wire Length (MWL)

Assumption

2-pin net s on S, t on T S ≠ T S is left-to T ys ≤ yt

S Ts

t

Locus

v

UR locus

RU locus

Theorem 1

MWL = HPWL ↔ RU locus of s goes below or through t

Proof omitted

Ss

Tt

RU locus

MWL > HPWL

Ss

Tt

RU locus

MWL = HPWL

AB-region

Lemma 2

There exists an MWL routing inside the AB-region

S

T

s

t

Horizontal Visibility Graph (HVG)

S

T

s

t

q’s LAB

p’s RAB

(a) The RU/RD edge and the LU/LD edge (dotted edges)

(b) The corresponding routing of (a)(c) The Horizontal Visibility Graph (HVG)

of net (s,t)

p

q

p

q

MWL = shortest path length

Only linear number of edges, but still captures MWL!

S

T

s

t

Lemma 4: There exists a path (s,t) on the visibility graph that corresponds to an MWL routing.

Visibility graph of a placement

The overall flow

and so on …

Time complexity

M = # of blocks, N = # of netsBuilding visibility graph:

O(M logM)

Estimating one net: O(M)

Total: O(M logM + NM) Shortest path on channel graph takes O(NM2)

Use LUT to enhance the speed

Blocks in between

S2

AT1

s2t1

BS1s1

T2t2

a1

a2

b1

b2

No path between two vertices? (a2b2)

Need to judge whether RU locus above t ? How to find out A & B promptly?

Two lemmas:

Lemma 5: Two vertices s and t on visibility graph. If there is no path between them, then MWL = HPWL

Lemma 6: If t is above s’s RU locus and there exists a shortest path between them, then its length = HPWL.

a

b

c

d MWL(a,b) = HPWL

ShortestPath(c,d)

= MWL (c,d) = HPWL

Theorem 3

The MWL of any two vertices on the visibility graph can be obtained by shortest path algorithm: Shortest path exists, MWL = path length Otherwise, MWL = HPWL

How it works

MWL = shortest path length

No path!

MWL = HPWL

And so on…

Lookup table

Time complexity

Building LUT: O(M2)

Estimating one net: O(1)

Total: O(M2+N) Almost the same as HPWL!

Future works

Integration of routing congestionExtension to handle multi-pin netsApplication to global routerExperimental study

Thank you!

Q & A

Proof of Theorem 1

MWL = HPWL ↔ RU locus of s goes below or through t

Ss

Tt

Ss

Tt

(c) The light gray blocks makes S below T

(d) If RU locus and DL locus intersect, then there exists a HPWL routing

RU locus

DL locus

Ss

Tt

RU locus

(b) No HPWL routing exists if the RU locus of s goes above t

Proof of Lemma 2

There exists an MWL routing completely inside AB-region

S

T

s

t

s’

t’

Proof of Lemma 4

There exists a path p from s to t on HVG that corresponds to an MWL routing.

S

T

s

t

v

v

Proof of Lemma 6

If t is above s’s RU locus and there exists a shortest path between them, then its length = HPWL.

s

u

t

w

v s

u

t

z

(a) u’s RU locus goes below t (b) u’s RU locus goes above t