A LINE OPERATED, REGULATED 5 V/50 A SWITCHING POWER SUPPLY

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AN-767 Application Note AN-316 (European) A LINE OPERATED, REGULATED 5 V/50 A SWITCHING POWER SUPPLY Prepared by: Dr. J.A. Gutmann and R.T. Suva Applications Engineering Geneva, Switzerland This application note describes a regulated 220 V ac to 5 Vdc converter using high voltage switching transistors and Schottky barrier rectifiers. The control functions are all performed by integrated circuits. MOTOROLA SenJiconduct:or Product:s Inc_

Transcript of A LINE OPERATED, REGULATED 5 V/50 A SWITCHING POWER SUPPLY

AN-767Application Note

AN-316(European)

A LINE OPERATED, REGULATED 5 V/50 ASWITCHING POWER SUPPLY

Prepared by:Dr. J.A. Gutmann and R.T. SuvaApplications EngineeringGeneva, Switzerland

This application note describes a regulated 220 V ac to 5Vdc converter using high voltage switching transistors andSchottky barrier rectifiers. The control functions are allperformed by integrated circuits.

MOTOROLA SenJiconduct:or Product:s Inc_

A LINE OPERATED, REGULATED 5 VjSO ASWITCHING POWER SUPPLY

Almost all electronic circuits require a dc voltage supplywith some degree of stabilization. The voltage is normallyobtained by rectifying and' filtering an ac voltage. Thedesired stability is produced by the action of certain regu-lating circuits.The most widely used regulator is the series linear regula-tor which is essentially a controlled voltage divider. Theratio of this divider is controlled such that the outputvoltage remains at a constant level for all specified changesof input voltage and load current. This type of regulatorhas outstanding properties as far as load and line regula-tion, noise and regulation response time are concerned. Itis particularly suitable for those applications where linearoperational amplifiers have to be supplied and noise can bea problem, or where a very high degree of stability is re-quired. On the other hand, a lot of power is dissipated inthese regulators because their efficiency is rarely higherthan 50 percent. Higher efficiency, however, at the ex-pense of slower regulation response time and higher noiselevels, can be achieved by series switching regulators.In a series switching regulator, the filtered dc input voltageis chopped by a series switching element, in general, aswitching transistor. The resulting rectangular pulse train isfiltered by a low pass filter, yielding a smooth dc voltageat the output of the filter. The value of this voltage isdetermined by the duty-cycle of the chopper and cantherefore be stabilized electronically by controlling theduty-cycle, with respect to a reference voltage. This typeof regulator offers noise and regulation performances thatare always inferior by one order of magnitude to the cor-responding linear regulators. They are therefore best suitedfor supplying less critical loads, like digital circuits. Thelosses in a series switching regulator are caused mainly bythe voltage drops of the saturated switching transistor, theforward voltage drop of the freewheeling diode and thepower dissipation during the commutation of the switch-ing transistor. Efficiencies up to 85 percent can be ob-tained with this system.Both types of series regulator use a transistor as the con-trolling element which has not only to withstand the fullinput voltage but also to carry the full load current. There-fore, both systems usually need a line transformer inorder to produce the lowest possible input voltage to theregulator. Transformers operating at 50 or 60 Hz that haveto transmit several hundred volt-amperes are heavy andbulky components and frequently prove difficult to place

in equipments that have to be compact. The availability ofhigh voltage transistors capable of carrying several amperescollector current have made it possible to design inverter-type switching regulators working directly off the linevoltage without an intermediate 60 Hz transformer.These inverter switching regulators offer noise and regula-tion performances similar to the series switching types andcan replace them in most applications where price is notthe ultimate requirement. They can be built to be morecompact and light-weight, at the expense of slightly morecomplicated electronics, than the equivalent series switch-ing units.Inverter regulators use either two or four switching transis-tors for chopping the rectified line voltage at ultrasonicfrequency (usually between 20 and 50 kHz) before apply-ing it to a compact power transformer designed for oper-ation at this frequency. The transformer, generally a step-down, is followed by a rectifier and a smoothing filter toobtain the dc output. The basic inverter configurations oftransistors are the full bridge and its derivatives, the push-pull and the half bridge. A discussion of the properties ofthe last two circuits is presented in AN737 (ref. 1). Thechoice between these circuits depends on specific condi-tions such as magnitude of the line voltage, availableswitching devices, desired output power, etc. In brief, thefull bridge is mainly used for obtaining very high outputpowers, above 1 kW. For medium and low output powersthe half bridge and push-pull are preferred; they requiretwo high power transistors but only two drivers, as com·pared to four smaller transistors and four drivers for thefull bridge. The disadvantage of requiring transistors ofhigher power is compensated by a simpler driving circuit.

For high line voltages (typically 220 V) the half bridge ispreferred to the push-pull because it requires lower voltagetransistors. For low line voltages (typically 115 V) thesimplicity of the driving circuit of a push-pull invertermakes it generally preferable to the half bridge, althoughits potential ability to draw destructive dc current throughone leg of the output transformer and also sometimes thenecessity of having to isolate electrically the transmissionof the output voltage magnitude to the control electronicsmay require extra efforts to find suitable solutions.In this note a system is described which uses a half bridgePulse Width Modulated Inverter to generate a 5V/50A out-put from 220 volts ac lines. * The switching transistors,

Circuit diagrams external to Motorola products are included as a means of illustrating typical semiconductar applications; consequently,complete information sufficient for construction purposes is not necessarily given. The information in this Application Note has been care-fully checked and is believed to be entirely reliable. However, no responsibility is assumed for inaccuracies. Furthermore, such informationdoes not convey to the purchaser of the semiconductor devices described any license under the patent rights of Motorola Inc. or others.

·Operation from a 115 V ac line is possible if a full-wave voltagedoubler is used.

LINE INPUT220V

LINERECTifiER+ fitTER

P.W.M.INVERTER

20kHzTRANS-

fORMER

OUTPUTRECTifiER

+ fit TER

5V 150AOUTPUT

operated at 20 kHz, are used to produce an ac voltagewhich is stepped down by a ferrite core transformer to anappropriate value. The secondary voltage of the trans-former is rectified and filtered to yield the smoothed 5Vdc output. Regulation of the output voltage is achievedby controlling the duty cycle of the switching waveforms.

GeneralA block diagram of the complete system is shown in Fig. 1.Rectifying and filtering the line voltage yields a 310 Vdcvoltage which provides the supply voltage for the dc-dcconverter generating the 5 volts output.The control circuitry consists basically of a Pulse WidthModulator, a clock oscillator and a control amplifier. Thecontrol pulses generated by the P.W.M. are at clock fre-quency and have a duration dictated by the controlamplifier.

The input circuitThe input circuit can be seen in detail in figure 2; it con-sists of a rectifier and a smoothing capacitor. Nominal linevoltage is 220 volts, 50-60 Hz. The minimum voltage fora full power output is 190 Vac and the maximum, for theelements selected here, is 260 Vac corresponding to 268and 367 peak dc volts respectively. The line is rectifiedby an MDA 806 bridge and filtered by an electrolyticcapacitor of 600 IJ.F. This gives a ripple voltage of 15 voltspeak-to-peak at full load and at nominal input voltage. Thecurrent flowing from the capacitor to the inverter underthese conditions is 1.1 amps dc. The current through therectifier bridge is 2.4 amps rms.

P.W.M. inverterThe half bridge inverter circuit shown in figure 2 consistsof capacitor C1 and C2, transistors TR 1 and TR2 andtransformer T,.The capacitors C1 and C2 divide the dc supply voltageapproximately to its mid-value (155 Vdc). These capa-citors also prevent any net dc voltage being applied to the

primary of T 1. Transistors TR 1 and TR2 are alternatelyturned ON and OFF, producing across the primary of T1the stepped ac waveform indicated in the upper half offigure 3, the same waveform that appears across theswitching transistors. The current in one transistor is indi-cated in the lower half of figure 3. At the beginning and atthe end of the conduction period the collector-emittervoltage of each transistor changes ideally by half the inver-ter dc supply voltage (155 volts). The full dc voltage of310 volts appears at the transistor collector only after thetransistors are completely cut-off and draw no more col-lector current. The peak switching power which the tran-sistors have to handle is therefore, theoretically, the prod-uct 1/2 VCC x IC.In practice the switch -off portion of the load Iine tends toextend up to the point VCC 'IC due to stray inductance inthe power transformer. Use of an RC snubber network inparallel with TR2 is therefore recommended to keep theload line within the Reverse Bias Safe Operating Area ofthe switching devices. A practical result obtained withsuch a technique is illustrated in figure 4.

FIGURE 3 - VOLTAGE AND CURRENT WAVEFORMSFOR THE INVERTER TRANSISTORS

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Vertical: 1 A/Div.Horizontal: 50 V/Div.

FIGURE 4 - LOAD LINE OF THE INVERTERTRANSISTORS AT FULL LOAD

The transistors used in the present design, 2N6546, arefast high voltage devices capable of switching currentsof 8 A at 350 volts level. In order to keep the de-vices switching at high speed throughout the completerange from full output load to no-load, great care has to betaken in the design of the base driving circuits. Here, asillustrated in figure 2, use is made of a diode network foravoiding saturation of the transistors. The diodes 04 up to09 very effectively maintain full switching speed for thetransistors with any load. A fast recovery type of diodehas to be selected for 04 and 07.

The transistor dissipation is about 20 watt for both devicestogether at full load. The required heatsink should have athermal resistance of about 2.5°C/watt in order to keepthe junction temperature below 120°C for a 50°C ambienttemperature.

Special care is needed in the design of the ultrasonic fre-quency power transformer. The winding technique has tobe such as to minimize the leakage inductance in order toavoid large voltage overshoots affecting transistor commu-tation. An interleaved structure was adopted for the trans-former windings as shown in figure 5. The primarywinding consists of three windings in parallel, the twohalves of the secondary winding are sandwiched betweenthe primary ones.

In addition to proper winding techniques, high frequencywiring rules must be observed in order to minimize RFinterference and parasitic oscillation.

The following is the specification for transformer T 1:Core Philips P 66/56 - 3HlNp = 33 turns of 0.6 mm dia wireNs = 2 turns of 1 x 6 mm flat wire

The current transformer T2 is used as the detector for thecurrent control loop to limit the output at 50 A. Whenloaded with 10 kn, it provides a signal of about 0.4 VIA.

Construction data for T2 are as follows:T2: Core Telmag HWR 4/5/4, single loopNp = 1Ns = 1000 turns of 0.2 mm dia wire

Cl and C2 are metallized polyester capacitors with a 20kHz impedance of approximately 2neach. The ultrasonicfrequency ripple across them at full load is about 5 voltspk-pk.

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FIGURE 5 - WINDI",G TECHNIQUES USED FORTHE TRANSFORMER T 1

Output rectifier and filterThe voltage at the secondary of transformer T 1 has anamplitude of approximately 9 volts at nominal input volt-age. This voltage is rectified by two 40A/30V Schottkyrectifiers which provide a very efficient high current rec-tification. The thermal power dissipation of these devicesat full load is approximately 20 watts each and a heat sinkof at least 1.3°CIW is required to keep their junction tem-perature below 125°C at an ambient temperature of 50°C.Schottky diodes are very sensitive to over-voltages even inthe form of short spikes; a simple ZMer diode 03 protectsthem against spikes above 2 x Vz and greatly increases thereliability of the system.The output filter consists of two LC sections with follow-ing data:

L1 Core Telmag HWR 40/24/4, double loop with a1.5 mm airgap, 23 windings of copper sheet 55 x 0.4 mm

L2 1 cm2 iron core with 4 windings of copper flatwire 6 x 1 mm.The first filter section has a series resonance frequency ofabout 400 Hz for greater attenuation of the ripple at theworking frequency and above. The 100 Hz ripple is re-duced by the regulating circuit itself, by as much as 70 dB.The second filter section attenuates the residual commu-tating spikes which can pass the first filter section byvirtue of the winding capacitance of L1.A fixed, preload of 8.2D. maintains a minimum of conduc-tion time in the switching transistors and avoids largeshifts in the dc level at the junction of C1 and C2. Suchshifts would increase the switching power in the switchingdevices when large loads are suddenly applied.

The control circuitryThe control circuitry is shown in figure 6; it includes allthe electronic circuits necessary to produce a stabilized dcoutput voltage with a limited dc output current, by con-trolling the duty cycle of the switching power transistorsTR 1, and TR2 of the inverter. It also contains an overvolt-age protection circuit and a reset circuit. Using quadoperational amplifiers, the whole circuit needs only 5 ICpackages and a few discrete elements, and can easily bebuilt on a 10 x 16 cm circuit board.Two control ampl ifiers provide the necessary loop gain tostabil ize either the output voltage or the output currentwith respect to a given reference. The gain of both feed-back loops can be controlled by adjusting the gain of theamplifiers. No particular frequency compensation of theloops was required for their stability.The Pulse-Width-Modulator consists of a linear ramp gen-erator and three voltage comparators. The Iinear ramp gen-erator, employing a MC1455 and a small signal transistor,also produces the system's clock frequency. The linearramp is separately compared to the outputs of the twocontrol amplifiers and also to a pre-set fixed limiting volt-age, by three MC3302. The outputs of these three compar-ators are connected together in a wired "OR" so thatpreference is given to the one defining the shorter pulses

(i.e. the one defining the lower output voltage). Control ofthe output voltage is dictated by the voltage loop, up to anoutput current of approximately 50 A. Above 50 A thecurrent control loop defines the pulse width and causesthe output voltage to decrease. The fixed voltage providedby the Limiter defines the maximum length of the pulsesand consequently guarantees that in all circumstances(particularly if the input voltage is too low) the switchingtransistors are both disabled for a few J1s at each halfcycle. This time, set by potentiometer P1, is required forthe conducting transistor to recover completely before theother transistor is driven ON.

The inverter has to be started with a low duty cycle inorder to prevent a large starting pulse (in terms of volt·seconds) from driving the transformer core into saturationand possibly causing high inrush current into the switchingtransistors. A low duty-cycle start-up network has there-fore been foreseen in combination with the Limiter. Whenthe Reset push-button is pressed, capacitor C5, initiallydischarged, causes the Limiter comparator to assumecontrol of the duty cycle and to keep it to a very lowvalue. C5 is then slowly charged-up through R5 and theduty cycle is progressively increased until control is takenup by the voltage or the current loop.The phase spl itter provides the correct routing of thepulses from the P.W,M. to the power transistors'drivers. Ituses one D-flip-flop MC14013 and two gates MC14023.The pulse train can be stopped by the reset circuit; thedrivers and the output power transistors are then auto-matically disabled.The power transistors' drivers are self-commutating push-pull drivers providing electrically isolated signals to thepower transistors by means of the transformers T3 and T4.Data for these transformers are as follows:

Core 3H1 18/11Np = 2 x 60 turns of 0.25 mm dia wireNs = 15 turns of 0.5 mm dia wire

While a positive driving pulse is being transmitted to thebases of the power transistors, energy is stored in the coreof these transformers. At the end of each pulse this energyis .Iiberated at the secondary of T3 and T 4 in the form of anegative 5V pulse appl ied across the emitter-base junctionof the power transistors, resulting in fast recovery of thetransistor. During development, it was found useful toinclude a small fuse in series with the transistors' bases toprotect the driving circuits in case of accidental transistorfailure.

The overvoltage detector compares the output voltage to areference by means of. a programmable unijunction transis-tor (PUT). If the output voltage exceeds that reference(typically 6 volts) the PUT is t~iggered and generates apulse, which, amplified by an MC3302, clocks the resetcircuit. An optional thyristor crowbar could easily beadded to short the output of the supply so as to avoiddamaging the load.

The purpose of the reset circuit, aD-flip-flop MC14013, isto stop the system's clock and disable the output drivers.It is set upon command of the overvoltage detector as wellas each time the power supply is switched on, so that it

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insures that the correct supply voltages are present whenthe clock is enaBled. A push button on the front panelallows the circuit to be reset for starting operation.

Performance of the power supplyThe output voltage is stable to within +0.2% and -0.3%,for a line voltage variation between 190 and 260 volts andcurrents up to 50 A.Output ripple has a maximum of 25 m volts rms measuredwith a bandwidth from 10 Hz to 10 MHz. Ripple ampli-tude is 60 mV peak-to-peak.Overall efficiency of the power supply at full load isapproximately 75%.

The design of a 5 V /50 A switching power supply workingdirectly off the line has been illustrated. It has been

Estimation of the critical value of the bridge capacitors C1, C2

C1 and C2 should be selected large enough to ensure goodefficiency of the power supply, an upper critical valueexists however which may lead to saturation of the powertransformer T 1 if the switching transistors are not perfect·Iy matched. A quick method for estimating this criticalvalue is given here, it is based on a number of simplifyingassumptions leading to an approximate, but worst·caseresult.It is supposed that the supply is unloaded, that the resist-ive components in T 1 are negligible and that a differenceexists between the on-time of TR1 and the on-time ofTR2. This difference initially gives rise to a net dc voltaget:::,.Vacross the primary of T1. t:::,.Vcauses a current '1 in

11 having the form: I, = t:::,.V- fiC. sin ( t )VL V2LC

where C is the common value of C1 and C2 and L is thevalue of the primary inductance of T1.

@MOTOROLA

shown how modern power transistors and high frequencyrectifiers can be used in a high performance and yet simpledesign. Notable simpl ification of the control circuits wasachieved by the use of quad operational ampl ifiers andquad comparators operated from the same single supplyused for the CMOS logic circuits.The magnitude of the output voltage of a power supplysuch as the one described here, depends on the choice ofthe turns ratio of the output transformer and on thesuitability of the output rectifier and filter. Only theseparts and the gain of the voltage control amplifier wouldhave to be adapted to obtain a 250 watt supply havingalmost any output voltage.

Ref. 1. Haver, R.J. - Switched Mode Power SuppliesHighlighting a 5V, 40A Inverter Design, AN-737Motorola Semiconductors Products Inc.

In the worst case 11 has to be added to the current in T 1

due to the switching square wave: 12=Vdc • ton4L

where Vdc is the rectified line voltage and ton the equiv-alent on-time of the power transistors.If saturation of transformer T 1 is to be avoided, then itstotal magnetizing current has to be lower than its satura-tion current Isat:

t:::,.V£ I2C + Vdc • ton < 'satV-r 4L

This condition allows the determination of C for a givenset of the other parameters.As an example, if Isat = 0.3 A, L = 15 mH, Vdc = 310Volt, ton = 20 p.s and ~V = 6 Volts due to a differenceof 2 p.s between the on-time of TR1 and TR2, then thevalue of C is 8.5p.F.

SelT'liconductor Products Inc.Printed in Switzerland