A High-Speed and High-Capacity Single-Chip Copper Crossbar
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Transcript of A High-Speed and High-Capacity Single-Chip Copper Crossbar
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John Damiano - TECHCON 2000 / SRC Copper ChallengeJohn Damiano - TECHCON 2000 / SRC Copper Challenge
A High-Speed and High-Capacity A High-Speed and High-Capacity Single-Chip Copper CrossbarSingle-Chip Copper Crossbar
Outline Circuit Design and Simulation Advantages of Copper Interconnect Electrical and Physical Characterization
John Damiano, Bruce Duewer, Alan Glaser, Toby Schaffer, John Wilson, and Paul Franzon
Copper Challenge Team #38North Carolina State University
Raleigh, NC
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John Damiano - TECHCON 2000 / SRC Copper ChallengeJohn Damiano - TECHCON 2000 / SRC Copper Challenge
The Copper CrossbarThe Copper Crossbar
Why a crossbar? The inherently long interconnects can best
demonstrate the benefits of advanced interconnect technology
Function Crosspoint switch with
programmable, non-blocking connections between sets of input and output lines
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John Damiano - TECHCON 2000 / SRC Copper ChallengeJohn Damiano - TECHCON 2000 / SRC Copper Challenge
Cell DesignCell Design Programmed through input lines
Cell Schematic
Cell LayoutReset & Pre-Configures provide fast erase & write
Cell size (W x L) = 5.68 m x 19.50 m
two cells shown at right)
I/O connection set by writing “1” to latch
Latch outputs along output column combined OR-tree
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John Damiano - TECHCON 2000 / SRC Copper ChallengeJohn Damiano - TECHCON 2000 / SRC Copper Challenge
Interconnect StrategiesInterconnect Strategies
Input lines on M5, Output OR-tree on M3
M4/M6 used as GND planes
Interconnect Al (fF) Cu (fF) % red.Input lines 1478 705 52%Reset lines 112 77 34%
Pre-configure lines 56 38 32%Write-enable lines 56 38 32%
OR-tree, final stage 112 77 34%OR-tree, int. stage 56 38 32%
Global Strategy: Maintain R and Decrease Linewidth to Reduce C
Reduced RC load drops => Higher Performance
Reliability of Cu not an issue
Capacitance Values for Crossbar Interconnect
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John Damiano - TECHCON 2000 / SRC Copper ChallengeJohn Damiano - TECHCON 2000 / SRC Copper Challenge
SimulationSimulation
Metric #1 - Data Ratemaximum input signal frequency for the crossbar
Reduced RC load using Copper interconnect enables higher data rate vs. Aluminum
Copper: 5.3 Gb/sAluminum: 4.0 Gb/s
Copper
Aluminum
Output for 2.0GHz square wave input
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John Damiano - TECHCON 2000 / SRC Copper ChallengeJohn Damiano - TECHCON 2000 / SRC Copper Challenge
SimulationSimulation
Metric #2 - LatencyDelay of signal from crossbar input to output
Faster edge rate with Copper interconnect enables lower latency vs. Aluminum
Copper: 370 psAluminum: 425 ps
Copper
Aluminum
Output for 2.0GHz square wave input
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John Damiano - TECHCON 2000 / SRC Copper ChallengeJohn Damiano - TECHCON 2000 / SRC Copper Challenge
Advantages of Copper InterconnectAdvantages of Copper Interconnect
Performance Copper Interconnect enables 30% higher Data
Rate and 15% lower Latency vs. Aluminum
Cell Size Tighter metal pitch with same resistivity
available with Copper Interconnect Aluminum cell with equivalent performance
would be 64% larger due to wider lines, increased pitch, and/or larger drivers
Significant for arrayed / SOC applications
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John Damiano - TECHCON 2000 / SRC Copper ChallengeJohn Damiano - TECHCON 2000 / SRC Copper Challenge
Electrical ResultsElectrical Results
Input
VDD-VDD & VSS -VSS VDD -VSS
Input NOT passed to Output for all I/O configurations
VDD/VSS Diode characteristics NOT observed
Output
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John Damiano - TECHCON 2000 / SRC Copper ChallengeJohn Damiano - TECHCON 2000 / SRC Copper Challenge
Failure AnalysisFailure AnalysisDie stripped to substrate
using HF to investigate VDD-VSS opens
Diffusion pattern, created by P20 reticle, discovered to be absent!
Only Diffusion pattern visible on die consists of Fill Shapes around original diffusion data
How could this happen?
Detail of pad cell
Detail of crossbar array
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John Damiano - TECHCON 2000 / SRC Copper ChallengeJohn Damiano - TECHCON 2000 / SRC Copper Challenge
Generating Fill ShapesGenerating Fill Shapes
AB B’
A-B’(A-B’)+B
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John Damiano - TECHCON 2000 / SRC Copper ChallengeJohn Damiano - TECHCON 2000 / SRC Copper Challenge
Silicon vs. Layout DataSilicon vs. Layout Data
pad cell layout
array layout
pad cell silicon
array silicon
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John Damiano - TECHCON 2000 / SRC Copper ChallengeJohn Damiano - TECHCON 2000 / SRC Copper Challenge
Failure AnalysisFailure Analysis
Crossbar pad cells compared to NCSU Team #16 - the diffusion pattern was dropped only for our die
Explains unusual electrical data - no active devices present
Only solution - new P20 (diffusion) reticle must be generated
Good News! UMC has agreed to re-order P20 reticle and start new Copper Challenge lot
Team #38 pad cell
Team #16 pad cell
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John Damiano - TECHCON 2000 / SRC Copper ChallengeJohn Damiano - TECHCON 2000 / SRC Copper Challenge
ConclusionsConclusions Copper Crossbar circuit developed to exploit the
advantages of copper interconnect technology
Crossbar design using copper interconnect achieved a higher data rate and reduced latency, with a smaller cell size vs. equivalent aluminum circuit
Puzzling Electrical Results from fabricated chips led to discovery of missing diffusion pattern
UMC re-run of Copper Challenge designs promises to yield functional die with advanced interconnect & high performance