3D ICs for Mobile Computing GSA/ITAC April 2011 Paul Kempf.
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Transcript of 3D ICs for Mobile Computing GSA/ITAC April 2011 Paul Kempf.
![Page 1: 3D ICs for Mobile Computing GSA/ITAC April 2011 Paul Kempf.](https://reader031.fdocuments.net/reader031/viewer/2022013121/5513d8cb55034679748b5074/html5/thumbnails/1.jpg)
3D IC’s for Mobile Computing
GSA/ITAC April 2011
Paul Kempf
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3D IC’s for Mobile Computing(or Mobile Computing = Smartphone evolution)
1. Smartphone trends driving 3D IC’s2. Technology for 2.5D & 3D
– Through Silicon Via (TSV) for Memory– Interposers & Wafer Level Packages– Heterogeneous Integration– Embedded silicon
3. 10 years in 2
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Smartphone Component Footprint
PCBArea(mm2)
Year
Mainstream Smartphone• fewer IC’s each year• integration into a few subsystems
High-End Smartphone• die size limited SoC’s• integration has not kept pace with feature race• handhold size contraint
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Torch 9800
4
SIM Card Holder
uSD Card Holder
EDGE Transceiver
SAW Filters
UMTS PA
EDGE PA
WiFi/BT
Audio Codec
PMIC
ISP
uP and Memory
eMMC
GPS
Analog BaseBand
RF PMIC
UMTS Transceiver
EDGE Filters
RF Switch
uUSB connector
Side 2
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Smartphone Part Count
ComponentCount (#)
Year
Mainstream Smartphone• high level integration• lower cost• increasing performance
High-End Smartphone• mobile computing platform• packed with features
• embedded memory• many radio connectivity• sensors• cameras
• time-to-market is key
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High-End Memory Performance
LPDDR1 LPDDR2
LPDDR2 2ch
LPDDR3 2chWide IO SDR
Wide IO DDR
2X
2X
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BiCMOS to CMOS analogy
Lesson from Compute Servers
Power density driving 3D integration for servers
Mobile devices have extreme thermal constraints- How long until mobile follows servers?
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Integration is deadLong live (3D) integrationN
umbe
r of d
ie in
pac
kage
Hybrid/Ceramic/Glass
Mixed Semiconductor Technology
SoC
2.5D
3DIC
PoPSiP
NOW
RF CMOS
Mixed Signal
Year
(courtesy Yuan Xie, PENNSTATE)
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3D Applications in Mobile
Memory Speed Power
Imaging Sensitivity
RF Efficiency
Power Mgt Size
Connectivity Size
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TSV Memory Stack
• LPDDR2 with TSV stack• Applications Processor
with TSV
• Design standards required to scale-up supply base• Bump layout• Array configuration• Pin Assignments
(source: Texas Instruments)
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Heterogeneous Integration
• Silicon interposer advantages– Reduced die complexity– Mixed technologies
MechanicalStrength
Fewer IOLower power
Wide interfaces
(source: Amkor Technology, Inc.)
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Cost-Efficient Heterogeneous Stacking
Heterogeneous integration is usually expensive
3D stacking: cost-efficient for heterogeneous integration
(Courtesy: Borkar, Intel) (Courtesy: Yuan Xie, PENNSTATE)
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Silicon Embeded Substrate(1) Space saving / Miniaturization
(2) Reduction of IC bump pitches potentially leads to size reduction of the IC
(3) SESUB can take over redistribution
(4) Low height substrate of max. 300µm incl. the embedded ICs
(5) Excellent EMI performance, good heat dissipation, high reliability
(6) Roadmap to embed Thin-Film inductors, Thin-Film capacitors and other passive components
(7) Integrated Shielding
(source: TDK-EPC Corporation)
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SESUB Process Flow
BumpingHalf DicingBack Grinding
(source: TDK-EPC Corporation)
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Preparing L1-L2Chip MountingLaminationVia HolePlating
SESUB Process Flow
(source: TDK-EPC Corporation)
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LaminationVia Hole L1&L4Plating & EtchingSR Laminating Solder Ball Attach SMT & CSP Mount Under Fill
SESUB Process Flow
(source: TDK-EPC Corporation)
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Layer 1-2 via
Layer 2-3 via
Layer 3-4 via
Line/space 40/40 µm (min)
IC ( Si thickness: 50 µm )
Bump
BGA
SMD parts Fine pitch connection 50-80 µm (min.)
Layer 2
Layer 1
Layer 4
Layer 3
Cross-section of highly integrated SESUB module
Substrate thickness 300 μm
(source: TDK-EPC Corporation)
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• Module size :10 x 8 x1,6mm • 285pins 0.5mm pitch BGA, Ball size Φ0.25mm• Die : PM-IC die 5.0 x 5.0mm, • Digital die 2.8 x 2.4mm • 31 components integrated• Metal Can Shield or Integrated Shield
0.3mm
1,6 mm
L CC C
<Cross Section>
L
Molding Resign Shielding Metal
0.1mm
1.0mm
L4L3
L2L1
VLS2520
C1005
MLP2012
MLP2012
MLP2012
MLP
2012
C1005C1005
MLP1608
C1005
C1005
C1005
C1005
C1005
C1608
C1608
C06 C06
C06
C06 C06
C06
C06
C06
C06
C06
C06
<Top View> <Bottom View><IC embedding>
8mm
10mm
0.5mm
0.25mm
C06
C06
PMU (Power Management Unit)
(source: TDK-EPC Corporation)
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Connectivity Combo Module - R074R054D = 113sq.mm(9.5 x 11.9 mm)
Buried Quad-Combo IC(GPS-WLAN-BT-FM)
~31sq.mm
SESUBsize reduction of
45%
R074 = 60sq.mm(7.5 x 8 mm)
(source: TDK-EPC Corporation)
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Mixed TSV and SESUB
(source: Yole Developpment)
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10 Years in 2 A Mobile Computing Revolution
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Acknowledgements
• Thanks to those who put together a lot of the original material for this review:– Yuan Xie, PENNSTATE– R. Schmidt, IBM– Texas Instruments– Amkor Technology, Inc.– TDK-EPC– Yole Developpment