2-Stage Operational Transconductance Amplifier -Bias...
Transcript of 2-Stage Operational Transconductance Amplifier -Bias...
![Page 1: 2-Stage Operational Transconductance Amplifier -Bias ...tera.yonsei.ac.kr/class/2017_1_1/lecture/Lect 18 Design Project.pdf · Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim](https://reader035.fdocuments.net/reader035/viewer/2022063011/5fc5d0187e496716d4436f7c/html5/thumbnails/1.jpg)
Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim
Lect. 18: Design Project
2-Stage Operational Transconductance Amplifier
- Bias
- Differential Amplifier
- Cascode Amplifier
![Page 2: 2-Stage Operational Transconductance Amplifier -Bias ...tera.yonsei.ac.kr/class/2017_1_1/lecture/Lect 18 Design Project.pdf · Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim](https://reader035.fdocuments.net/reader035/viewer/2022063011/5fc5d0187e496716d4436f7c/html5/thumbnails/2.jpg)
Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim
Lect. 18: Design Project
• Differential Amplifier
Parameter Value
Av > 20 dB
BW > 120 MHz
CMRR > 60 dB
ICMR > 1.4 V
Power < 1.25 mW
![Page 3: 2-Stage Operational Transconductance Amplifier -Bias ...tera.yonsei.ac.kr/class/2017_1_1/lecture/Lect 18 Design Project.pdf · Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim](https://reader035.fdocuments.net/reader035/viewer/2022063011/5fc5d0187e496716d4436f7c/html5/thumbnails/3.jpg)
Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim
Lect. 18: Design Project
Set DC to 0Vdc
Set ACMAG to 1 (Important!)
• Differential input pair setting
![Page 4: 2-Stage Operational Transconductance Amplifier -Bias ...tera.yonsei.ac.kr/class/2017_1_1/lecture/Lect 18 Design Project.pdf · Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim](https://reader035.fdocuments.net/reader035/viewer/2022063011/5fc5d0187e496716d4436f7c/html5/thumbnails/4.jpg)
Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim
Lect. 18: Design Project
• Differential input pair setting
Part name : E
![Page 5: 2-Stage Operational Transconductance Amplifier -Bias ...tera.yonsei.ac.kr/class/2017_1_1/lecture/Lect 18 Design Project.pdf · Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim](https://reader035.fdocuments.net/reader035/viewer/2022063011/5fc5d0187e496716d4436f7c/html5/thumbnails/5.jpg)
Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim
Lect. 18: Design Project
• Output Plot
DC Gain > 20 dB
3dB Bandwidth > 120 MHz
![Page 6: 2-Stage Operational Transconductance Amplifier -Bias ...tera.yonsei.ac.kr/class/2017_1_1/lecture/Lect 18 Design Project.pdf · Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim](https://reader035.fdocuments.net/reader035/viewer/2022063011/5fc5d0187e496716d4436f7c/html5/thumbnails/6.jpg)
Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim
Lect. 18: Design Project
• Gain measurement
![Page 7: 2-Stage Operational Transconductance Amplifier -Bias ...tera.yonsei.ac.kr/class/2017_1_1/lecture/Lect 18 Design Project.pdf · Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim](https://reader035.fdocuments.net/reader035/viewer/2022063011/5fc5d0187e496716d4436f7c/html5/thumbnails/7.jpg)
Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim
Lect. 18: Design Project
• BW measuement
-3dB
Your Bandwidth
Click Toggle cursor
![Page 8: 2-Stage Operational Transconductance Amplifier -Bias ...tera.yonsei.ac.kr/class/2017_1_1/lecture/Lect 18 Design Project.pdf · Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim](https://reader035.fdocuments.net/reader035/viewer/2022063011/5fc5d0187e496716d4436f7c/html5/thumbnails/8.jpg)
Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim
Lect. 18: Design Project
• CMRR
CMRR = |Adm/Acm|
But our gains are dB scale,
CMRR (dB) = Adm (dB) – Acm (dB)
< Common Mode Gain >
![Page 9: 2-Stage Operational Transconductance Amplifier -Bias ...tera.yonsei.ac.kr/class/2017_1_1/lecture/Lect 18 Design Project.pdf · Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim](https://reader035.fdocuments.net/reader035/viewer/2022063011/5fc5d0187e496716d4436f7c/html5/thumbnails/9.jpg)
Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim
Lect. 18: Design Project
• ICMR
Gain < 20dB
![Page 10: 2-Stage Operational Transconductance Amplifier -Bias ...tera.yonsei.ac.kr/class/2017_1_1/lecture/Lect 18 Design Project.pdf · Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim](https://reader035.fdocuments.net/reader035/viewer/2022063011/5fc5d0187e496716d4436f7c/html5/thumbnails/10.jpg)
Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim
Lect. 18: Design Project
• Cascode Amplifier
Parameter Value
Av > 34 dB
BW > 250 kHz
Output Impedance > 30kΩ
Power < 1.25 mW
![Page 11: 2-Stage Operational Transconductance Amplifier -Bias ...tera.yonsei.ac.kr/class/2017_1_1/lecture/Lect 18 Design Project.pdf · Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim](https://reader035.fdocuments.net/reader035/viewer/2022063011/5fc5d0187e496716d4436f7c/html5/thumbnails/11.jpg)
Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim
Lect. 18: Design Project
• Output Plot
DC Gain > 34 dB
3dB Bandwidth > 250 kHz
![Page 12: 2-Stage Operational Transconductance Amplifier -Bias ...tera.yonsei.ac.kr/class/2017_1_1/lecture/Lect 18 Design Project.pdf · Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim](https://reader035.fdocuments.net/reader035/viewer/2022063011/5fc5d0187e496716d4436f7c/html5/thumbnails/12.jpg)
Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim
Lect. 18: Design Project
• Output Impedance
![Page 13: 2-Stage Operational Transconductance Amplifier -Bias ...tera.yonsei.ac.kr/class/2017_1_1/lecture/Lect 18 Design Project.pdf · Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim](https://reader035.fdocuments.net/reader035/viewer/2022063011/5fc5d0187e496716d4436f7c/html5/thumbnails/13.jpg)
Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim
Lect. 18: Design Project
• Differentiation
DC Gain > 34 dB
3dB Bandwidth > 250 kHz
1) Click Add Trace
3) Choose signal what you want to differentiate
2) Select D( )
example
Then, your plot is differentiated by x-axis’ variable what you have sweeped.
![Page 14: 2-Stage Operational Transconductance Amplifier -Bias ...tera.yonsei.ac.kr/class/2017_1_1/lecture/Lect 18 Design Project.pdf · Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim](https://reader035.fdocuments.net/reader035/viewer/2022063011/5fc5d0187e496716d4436f7c/html5/thumbnails/14.jpg)
Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim
Lect. 18: Design Project
DC Gain > 34 dB
3dB Bandwidth > 250 kHz
• 2 – Stage OTA
Parameter Value
Av > 76 dB
BW > 25 kHz
Phase Margin > 75 o
CMRR > 75 dB
ICMR > 0.4 V
Power < 2.5 mW
![Page 15: 2-Stage Operational Transconductance Amplifier -Bias ...tera.yonsei.ac.kr/class/2017_1_1/lecture/Lect 18 Design Project.pdf · Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim](https://reader035.fdocuments.net/reader035/viewer/2022063011/5fc5d0187e496716d4436f7c/html5/thumbnails/15.jpg)
Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim
Lect. 18: Design Project
DC Gain > 34 dB
3dB Bandwidth > 250 kHz
PM > 75o
-180o
Gain = 0dB
• Phase margin measurement
![Page 16: 2-Stage Operational Transconductance Amplifier -Bias ...tera.yonsei.ac.kr/class/2017_1_1/lecture/Lect 18 Design Project.pdf · Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim](https://reader035.fdocuments.net/reader035/viewer/2022063011/5fc5d0187e496716d4436f7c/html5/thumbnails/16.jpg)
Electronic Circuits 2 (17/1) W.-Y. Choi / H.-K. Kim
Lect. 18: Design Project
DC Gain > 34 dB
Deadline: 2:00 PM on May. 4, 2017