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Lecture 32Datapath Analysis

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Overview

° Datapaths must deal with input and output data values• Implement with tri-state buffers

° Necessary to control external interfaces• Perform repetitive operations

° Some datapaths require decision making• Control outputs implemented in ROM

° Moving towards software• Control implemented as a series of instructions

° Understanding the data and control path

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Datapath I/O

° A wire can be driven by only one tri-state at a time• If InPass is active, AluPass must be inactive

• If AluPass is active, InPass must be inactive

Function

X Y LoadYLoadX

ALU

InPass OutPass

AluPass

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Datapath I/O

° Two values enter from the left (A and B)• Need to perform (A+B)+A

• In -> X (Load A)

• In -> Y (Load B)

• A+B -> Y

• (A+B)+A -> Out

Function

X Y LoadYLoadX

ALU

InPass OutPass

AluPass

In Out

Four steps and then repeat

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Implementing the Control ROM

° Two values enter from the left (A and B)• Need to perform (A+B)+A

• In -> X (Load A) - State 00

• In -> Y (Load B) - State 01

• A+B -> Y - State 10

• (A+B)+A -> Out - State 11

PS NS Function LoadX LoadY InPass AluPass OutPass

00 01 000 1 0 1 0 001 10 000 0 1 1 0 010 11 011 0 1 0 1 011 00 011 0 0 0 1 1

PS

NS

01000101001000001100

1101101010

000110

ROM

Control outputs

0001100011 11

Addr

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More Complicated Example

° Can we compute (A+B) . (A-B)?

° Currently, no place for intermediate storage

° Solution: Add RAM to datapath.

Function

X Y LoadYLoadX

ALU

InPass OutPass

AluPass

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More Complicated Example

° Can we compute (A+B) . (A-B)?• Need to add intermediate storage.

° Typical sizes (1MB – 2GB)

Function

X Y LoadYLoadX

ALU

InPass OutPass

AluPass

RAMAddr

ReadWrite

Add RAM to the Datapath

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Implementing the Control ROM

° Two values enter from the left (A and B)• Need to perform (A+B) . (A-B)

• In -> X (Load A) - State 000

• In -> Y (Load B) - State 001

• A+B -> RAM[4] - State 010

• A-B -> X - State 011

• RAM[4] ->Y - State 100

• (A+B) . (A-B) ->Out - State 101

PS NS Function LoadX LoadY InPass AluPass OutPass Addr Read Write

000 001 000 1 0 1 0 0 000 0 0001 010 000 0 1 1 0 0 000 0 0010 011 011 0 0 0 1 0 100 0 1 011 100 010 1 0 0 1 0 000 0 0 100 101 000 0 1 0 0 0 100 1 0 101 000 110 0 0 0 1 1 000 0 0

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Does the Value of the Data Matter?

° Problem: Add A to itself until overflow occurs• Amount of steps depends on A

Function

X Y LoadYLoadX

ALU

InPass OutPass

AluPass

RAMAddr

ReadWrite

How can we determine if overflow occurred?

OF

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Implementing the Control ROM using Conditions

° One value enters from the leftAdd A to itself until overflow occurs

• In -> X, Y (Load A, B) - State 0 - Next state 1

• X+Y -> Out, X - State 1 - Next state (1 if no overflow, 0 if overflow)

Include overflow (OF) bit as a ROM inputNote that it doubles the size of the ROM

PS OF NS Function LoadX LoadY InPass AluPass OutPass Addr Read Write

0 0 1 000 1 1 1 0 0 000 0 00 1 1 000 1 1 1 0 0 000 0 01 0 1 011 1 0 0 1 1 000 0 01 1 0 011 1 0 0 1 1 000 0 0

Bits in the ROMEach row indicates a ROM word

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Implementing the Control ROM with Conditionals

° Control path may have many inputs• Overflow, carry out, zero

° Used to perform conditional operations

° If statements and loops in programming languages

Addr

NS

10001110000000

10001110000000

10111001100000

000110

ROM

Control outputs

00110101100000 11

OF

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PS OF NS Function LoadX LoadY InPass AluPass OutPass Addr Read Write

0 0 1 000 1 1 1 0 0 000 0 00 1 1 000 1 1 1 0 0 000 0 01 0 1 011 1 0 0 1 1 000 0 01 1 0 011 1 0 0 1 1 000 0 0

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One More Example

° Read two values from RAM (locations 0 and 1) and store to location 2.• Very common operation for microprocessor

Function

X Y LoadYLoadX

ALU

InPass OutPass

AluPass

RAMAddr

ReadWrite

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Implementing the Control ROM

° Perform memory reads and writes• RAM[0] -> X - State 00

• RAM[1] -> Y - State 01

• X+Y -> RAM[2] - State 10

PS NS Function LoadX LoadY InPass AluPass OutPass Addr Read Write

00 01 000 1 0 0 0 0 000 1 001 10 000 0 1 0 0 0 001 1 010 00 011 0 0 0 1 0 010 0 1

No interaction with outside interfaces (In, Out) is required

Very similar to microprocessor operations

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Processor Construction Kit

L.E.

ALUFn CCs

O.E.

STATIC RAM

R/W

MUXSel

Subproblem 1: DATA PATHS

ROM

Inputs from Data Path

Data Path Control Signals

Subproblem 2: CONTROL

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Processor Compilation

° Software engineer writes C program

° Compiler software converts C to assembly code

° Assembler converts assembly code to binary format

main () {int A, B, C;

C = A + B;}

C program

Compile LD R1, A ; load A to Reg R1LD R2, B ; load B to Reg R2ADD R3, R1, R2 ; Add R1, R2 -> R3ST R3, C ; Store result in C

Assembly program

A, B, and C are storage locations inmain memory (DRAM)

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Summary

° Datapaths are important components of computer systems

° Interaction between control and data path determines execution time

° Each sequence of operations can be represented with a ROM program

• Each row in the state table corresponds to a word in the ROM

° Multiple rows for each state if the ROM has a control input (e.g. ALU overflow)

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Recap after Combinational Logic

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Sequential Logic (Why) ?

° Sequential circuit has additional dimension which is time

° Combinational logic only depends on current input

° Sequential circuit output depends on previous input other than current input

° More powerful than combinational logic

° Able to model condition that can’t be accommodated by combinational logic

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Sequential Circuits: Latches

° Circuits require memory to store intermediate data

° Sequential circuits use a periodic signal to determine when to store values.

• A clock signal can determine storage times

• Clock signals are periodic

° Single bit storage element is a flip flop

° A basic type of flip flop is a latch

° Latches are made from logic gates• NAND, NOR, AND, OR, Inverter

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Sequential Circuits: Latches

° Latches are based on combinational gates (e.g. NAND, NOR)

° Latches store data even after data input has been removed

° S-R latches operate like cross-coupled inverters with control inputs (S = set, R = reset)

° With additional gates, an S-R latch can be converted to a D latch (D stands for data)

° D latch is simple to understand conceptually• When C = 1, data input D stored in latch and output as Q

• When C = 0, data input D ignored and previous latch value output at Q

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Sequential Circuits: Flip flops

° The most fundamental sequential components are the latch and flip-flop

° They store one bit of data and make it available to other components

° The main difference between a latch and a flip-flop is that the first are level triggered and the latter are edge triggered

° Flip-flops and latches have a clock input

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Sequential Circuits: Flip flops

° Flip flops are powerful storage elements• They can be constructed from gates and latches!

° D flip flop is simplest and most widely used

° Asynchronous inputs allow for clearing and presetting the flip flop output

° Multiple flops allow for data storage• The basis of computer memory!

° Combine storage and logic to make a computation circuit

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Combinational vs. Sequential

Combinational Logic Circuit Output is a function only of the present

inputs. Does not have state information. Does not require memory.

Sequential Logic Circuit (Finite State Machine) Output is a function of the present state and

at times present state and input. Has state information Requires memory. Uses Flip-Flops to implement memory.

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Synchronous vs. Asynchronous

Synchronous Sequential Logic Circuit Clocked All Flip-Flops use the same clock and

change state on the same triggering edge.

Asynchronous Sequential Logic Circuit No clock Can change state at any instance in

time. Faster but more complex than

synchronous sequential circuits.

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Shift Registers

° Multiple flip flops can be combined to form a data register

° Shift registers allow data to be transported one bit at a time

° Registers also allow for parallel transfer • Many bits transferred at the same time

° Shift registers can be used with adders to build arithmetic units

° Remember: most digital hardware can be built from combinational logic (and, or, invert) and flip flops

• Basic components of most computers

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Shift Registers

° Shift registers can be combined together to allow for data transfer

° Serial transfer used in modems and computer peripherals (e.g. mouse)

° D flip flops allow for a simple design• Data clocked in during clock transition (rising or falling edge)

° Serial addition takes less chip area but is slow

° Universal shift register allows for many operations• The register is programmable.

• It allows for different operations at different times

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Counters

° Counters are important components in computers• The increment or decrement by one in response to input

° Two main types of counters• Ripple (asynchronous) counters

• Synchronous counters

° Ripple counters • Flip flop output serves as a source for triggering other flip flops

° Synchronous counters• All flip flops triggered by a clock signal

° Synchronous counters are more widely used in industry.

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Counters

° Counter: A register that goes through a prescribed series of states

° Binary counter• Counter that follows a binary sequence

• N bit binary counter counts in binary from n to 2n-1

° Ripple counters triggered by initial Count signal

° Applications:• Watches

• Clocks

• Alarms

• Web browser refresh

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Timing Analysis

° Circuits do not respond instantaneously to input changes

° Predictable delay in transferring inputs to outputs• Propagation delay

° Sequential circuits require a periodic clock

° Goal: analyze clock circuit to determine maximum clock frequency

• Requires analysis of paths from flip-flop outputs to flip-flop inputs

° Even after inputs change, output signal of circuit maintains original output for short time

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Timing Analysis

° Maximum clock frequency is a fundamental parameter in sequential computer systems

° Possible to determined clock frequency from propagation delays and setup time

° The longest path determines the clock frequenct

° All flip-flop to flip-flop paths must be checked

° Hold time are satisfied by examining contamination delays

° The shortest contamination delay path determines if hold times are met

° Check handout for more details and examples.

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RAM

° Memory is a collection of storage cells with associated input and output circuitry

• Possible to read and write cells

° Random access memory (RAM) contains words of information

° Data accessed using a sequence of signals• Leads to timing waveforms

° Decoders are an important part of memories• Selects specific data in the RAM

° Static RAM loses values when circuit power is removed.

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Read-Only Memory (ROM)

° Read-only memory can normally only be read

° Internal organization similar to SRAM

° ROMs are effective at implementing truth tables• Any logic function can be implemented using ROMs

° Multiple single-bit functions embedded in a single ROM

° Also used in computer systems for initialization• ROM doesn’t lose storage value when power is removed

° Very useful for implementing FSMs

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Read-Only Memory (ROM)

° An array of semiconductor devices• diodes

• transistors

• field effect transistors

° 2N words by M bits

° Data can be read but not changed• (normal operating conditions)

Data is written to the ROM once, and read from the ROM many times.

A read-only memory (ROM) consists of an array of semiconductor devices that are interconnected to store a set of binary data.

Once binary data is stored in the ROM, it can be read out whenever desired, but the data that is stored cannot be changed under normal operating conditions.

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ROM° ROMs are actually combinational devices, not sequential

ones!• You can’t store arbitrary data into a ROM, so the same address will always

contain the same data.

• You can think of a ROM as a combinational circuit that takes an address as input, and produces some data as the output.

° A ROM table is basically just a truth table.• The table shows what data is stored at each ROM address.

• You can generate that data combinationally, using the address as the input.AddressA2A1A0

DataV2V1V0

000 000001 100010 110011 100

100 101101 000110 011111 011

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Programmable Logic Array

° A ROM is potentially inefficient because it uses a decoder, which generates all possible minterms. No circuit minimization is done.

° Using a ROM to implement an n-input function requires:

• An n-to-2n decoder, with n inverters and 2n n-input AND gates.

• An OR gate with up to 2n inputs.

• The number of gates roughly doubles for each additional ROM input.

° A programmable logic array, or PLA, makes the decoder part of the ROM “programmable” too. Instead of generating all minterms, you can choose which products (not necessarily minterms) to generate.

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ALU

° Main computation unit in most computer systems

° ALUs perform a variety of different functions• Add, subtract, OR, AND…

° Example: ALU chip (74LS382)• Has data and control inputs

° Individual chips can be chained together to make larger ALUs

° ALUs are important parts of datapaths• ROMs often are used in the control path

° Build a data and control path

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Circuit Maker Simulator

° Circuit Implementation using Computer

° Circuit Analysis

° Rich Library

° Can Add your own component but need professional version

° Student Version have certain limitations