1 Lecture 23 Design example: Traffic light controller.
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Transcript of 1 Lecture 23 Design example: Traffic light controller.
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Lecture 23
Design example: Traffic light controller
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FSM design process
1. Understand the problem– State diagram and state-transition table
2. Determine the machine’s states– Consider missing transitions: Will the machine start?– Minimize the state diagram: Reuse states where possible
3. Encode the states – Encode states, outputs with a reasonable encoding choice– Consider the implementation target
4. Design the next-state logic– Minimize the combinational logic– Choices made in steps 2 & 3 affect the logic complexity
5. Implement the FSM
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Example: Traffic light controller
Highway/farm road intersection
highway
farm road
car sensors (C)
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Example: Traffic light controller
A busy highway is intersected by a little used farm road Detectors C sense the presence of cars on the farm road
With no car on farm road, lights remain Green in highway direction
If vehicle on farm road, highway lights go from Green to Yellow to Red, allowing the farm road lights to become Green
These stay Green only as long as a farm road car is detected but never longer than a set interval (say, 20 time units)
When these are met, farm lights transition from Green to Yellow to Red, allowing highway to return to Green
Even if farm road vehicles are waiting, highway gets at least a set interval as Green (say, 20 time units)
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What are inputs and outputs?
Inputs Reset C (farm road car
detector)
Outputs HG (highway green) HY (highway yellow) HR (highway red) FG (farm road green) FY (farm road yellow) FR (farm road red)
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What are the states?
How about color of the lights? HG (highway green) HY (highway yellow) HR (highway red) FG (farm road green) FY (farm road yellow) FR (farm road red)
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Any redundancy?
If the highway light is green or yellow, the farm road light must be red.
States HG (highway green) HY (highway yellow) FG (farm road green) FY (farm road yellow)
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Partial traffic light controller
Useful to walk through typical execution sequence
What's the problem?
HG HY0 HY1 HY2 HY3 HY4
C
C'
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FSM can get very big!
Utilize external timer like a subroutine
HG HYb
TL·C
(TL·C)'
HYa
[ST]FG[ST]
TS
TS'
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External timer
ST resets timer and starts counting Timer generates a short time pulse (TS) and a long
time pulse (TL) TS is to be used for timing yellow lights and TL for
green lights
Interval Timer
Traffic Light Controller
ST
TL
TS
ST
TS
TL
short
long
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Revised FSM specification
Inputs reset place FSM in initial state C detect vehicle on the farm road
TS short time interval expiredTL long time interval expired
OutputsHG, HY, HR assert green/yellow/red highway lights FG, FY, FR assert green/yellow/red farm road lightsST start timing a short or long interval
StateHG highway green (farm road red)HY highway yellow (farm road red)FG farm road green (highway red)FY farm road yellow (highway red)
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Traffic light controller
HG
HY
HR
Interval Timer
Traffic Light Controller
ST
TL
TS
Creset
FG FY FR
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Moore/Mealy hybrid
Reset
TS'
TS / ST
(TL•C)'
TL•C / ST
TS'
TS / ST
(TL+C')'
TL+C' / ST
HG
FG
FYHY
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State encoding
Let's use a one-hot encoding: HG = 0001 HY = 0010 FG = 0100 FY = 1000
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Next-state logic
P3 = (C'·Q2) + (TL·Q2) + (TS'·Q3)
P2 = (TS·Q1) + (C·TL'·Q2)
P1 = (C·TL·Q0) + (TS'·Q1)
P0 = (C'·Q0) + (TL'·Q0) + (TS·Q3)
ST = (C·TL·Q0) + (TS·Q1) + (C'·Q2) + (TL·Q2) + (TS·Q3)
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Outputs
Green = 00 Yellow = 01 Red = 10
Two sets of outputs: H1H0 and F1F0
H1 = Q3 + Q2
H0 = Q1
F1 = Q1 + Q0
F0 = Q3
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State partitioning
TS / ST
Reset
TL•C / ST
TS' HY
(TL•C)'
HG
TS / ST
(TL+C')'
TL+C' / STFG
FY TS'
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State partitioningReset
(TL+C')'
TL+C' / STFG
FY
TL•C / ST
TS' HY
(TL•C)'
HG
TS / ST
TS / STHR
TS•FY
TS•HY
(TS•HY)’
(TS•FY)’
FR
Reset
Add idle statesAdd return arcs
Label idle wait loops
TS'