00217061

Recent developments in current conveyors and current-mode circuits

B. Wilson

Indexing terms: Reviews ofprogress

Abstract: Current conveyors and related current- mode circuits have begun to emerge as an important class of circuits with properties that enable them to rival their voltage-mode counterparts in a wide range of applications. The use of current rather than voltage as the active parameter can result in higher usable gain, accuracy and bandwidth due to reduced voltage excursion at sensi- tive nodes. A current-mode approach is not just restricted to current processing, but also offers certain important advantages when interfaced to voltage-mode circuits. This paper sets out to survey developments in conveyors and current- mode circuits from both an historical and technical viewpoint and to act as a useful source of reference material.

1 Introduction

From their introduction in 1968 by Smith and Sedra [l] and subsequent reformulation in 1970 by Sedra and Smith [Z], current conveyors have proved to be function- ally flexible and versatile, rapidly gaining acceptance as both a theoretical and practical building block. However, it is only in the last five years that high performance implementations have emerged, to enable conveyors now to challenge successfully traditional voltage operational amplifier circuits in areas such as active filters, oscillators and amplifiers. In addition, a number of novel circuit functions and topologies have been explored on the broader front of current-mode analogue circuits, opening up wider areas of interest. Consequently the time seems opportune for a comprehensive and up-to-date tutorial review of concepts and new developments in current conveyors and associated current-mode circuits, especially as many of these developments have occurred since earlier reviews were compiled [3, 41 or have only been outlined in necessarily brief conference papers [>7] or less acces- sible educational publications [SI. The scope of this review will include current conveyors and their applications as well as related current-mode circuits, but will exclude operational transconductance amplifiers since they have been commercially available as integrated circuits for some time.

Paper 71466 (E10, E16), received 23rd August 1989 The author is with the Digital Communications Sub-Group, Depart- ment of Electrical Engineering and Electronics, University of Manches- ter Institute of Science and Technology, PO Box 88, Manchester MM) IQD, United Kingdom

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2 Conveyor proposals and implementations

A class I1 current conveyor has defined properties which may be expressed in the relationship [;I=[; 0 * 1 : :][;:I 0 U,

The output current i, thus depends only on the input current at terminal X, in Fig. 1. This current may be

Fig. 1 C U I + current conveyor v, = y , I , = I ,

injected directly at X, or it may be produced by the copy of the input voltage V , , from terminal Y, acting across the impedance connected at X. In a class I1 current conveyor input Y draws no current, whereas, for the older class I formulation, the impedance connected at X is also reflected at Y. The + sign indicates whether the conveyor is formulated as an inverting or noninverting circuit, termed CCII- or CCII+. By convention, positive is taken to mean i, and i, both flowing simultaneously towards or away from the conveyor.

Adopting a nullor approach [9] for ease of functional synthesis [lo], a class I1 current conveyor may be rep- resented by a nullator and norator [ l l , 121, as in Fig. 2.

Fig. 2 Nullator-norator representation of CCII + conueyor

Other conveyor functions have also been proposed, namely current-voltage [13], generalised [14], 3 port immittance types [lS, 161, voltage inverting type I1 [17], and, most recently, a conveyor with an electronically programmable current transfer ratio [18]. However, the type I1 current conveyor continues to prove its dura- bility, probably due to a favourable balance of simplicity and versatility.

Smith and Sedra [l] themselves produced the first conveyor circuit implementation, based on an emitter driven current mirror approach, followed closely by an improved version using a greater number of transistors in 1969 [19]. The first implementation to use an operational

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amplifier was reported by Black et al. [20] in 1971 where the uncommitted output transistors of a pA749 were configured with additional transistors to produce a current output. Both positive and negative conveyors were available using their approach, but with restricted frequency response and accuracy. Additional transistors were dis- pensed with in Bakhtiar and Aronhime’s [21] realisation in 1978 which used no less than five operational amplifiers and a number of tightly matched resistors, again resulting in only moderate bandwidth. Two years later in 1980 Senani [22] proposed a simpler realisation using only one operational amplifier, two resistors and a transconductance amplifier. No practical results were presented for the proposed circuit, however the inclusion of an early integrated transconductance amplifier would most probably have resulted in modest performance. In the same year Huertas [23] reported a conveyor structure that loosely followed Senani’s synthesis, but employed two operational amplifiers and six resistors instead, to overcome the well known limitations of transconductance amplifiers. Until the time of the compilation of Kumar and Shukla’s review [4], this was the most promising line of development, even though the closed- loop response of the operational amplifiers restricted the frequency performance of the resulting conveyor.

Meanwhile, developments had been taking place in current mirror design that would eventually prove to be useful for current conveyors. The traditional two transistor current mirror circuit exhibited two weaknesses; poor accuracy beyond approximately 1 mA and a strong dependence of output current on output voltage [24]. The addition of a third transistor on the output side of the mirror [25] assisted in buffering the primary pair against output voltage changes, resulting in improved performance that could be quantified and predicted ana- lytically [26]. Finally, errors in the current transfer ratio over a wide range of currents were minimised by the inclusion of a fourth transistor in the input side of the mirror [27], Fig. 3. This four transistor version of the

input

Y O i P U t in out

h common

Four-transistor current mirror and symbol Fig. 3

current mirror has become the accepted building block in precision applications. The symbol most often used to denote a current mirror (no matter how many transistors are used) is also shown in Fig. 3, with the arrow indicat- ing both the input terminal and mirror polarity.

A number of attempts were made to improve the frequency response of early pnp mirrors, but all involved additional operating restrictions [28-301 or required an operational amplifier to be included [31, 321. Fortu- nately, currently available pnp transistors display SUE- ciently improved performance to complement the frequency response of most standard operational amplifiers.

Combining the improvements in current mirror formulations and voltage to current convertor design [33-

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371, Wilson [38] introduced a new style of conveyor implementation in 1984 with greatly increased performance over earlier circuits. The approach utilises four transistor current mirrors and operational amplifier supply current sensing [34, 361 as an alternative to dupli- cating the inaccessible output of the amplifier transistors to provide a copy of output current. Unimpaired access to all the terminals of the operational amplifier results in a precision class I1 + current conveyor, Fig. 4. Input Y is

Fig. 4 High-performance conveyor implementation

a short-circuit stable voltage input of very high impedance that draws only the operational amplifier bias current, and input X reflects the voltage at Y and per- forms as an open-circuit stable current terminal. A class I1 - conveyor can be realised by simply adding a second pair of mirrors, crosscoupled to produce a phase inversion between input and output current [39]. Reported results include bandwidths in excess of 3 MHz, terminal capacitances of 1.5 pF [40] and transfer distortions less than -70 dB with output currents up to & 10 mA [41]. The method is equally suitable for both discrete construc- tion and integrated fabrication, with potentially superior performance available from the benefits of tighter active device matching and direct access to the currents from the output transistors.

In 1985 both Fabre [42] and Normand [43] independently proposed a conveyor based around a Gilbert translinear cell [44], as in Fig. 5. The translinear current

1 t l I

I I I

I - v Fig. 5 Translinear conveyor

equation (outlined in Section 4.1) and mirror arrange- ments force the current out of Z to be equal to the current out of X, while the voltage at X will faithfully track Y; exactly the properties of a class 11+ current conveyor. Unfortunately the effective input resistance presented at Y is relatively low and strongly dependent upon the accuracy and matching of the constituent mirrors [42]. Modifying the circuit, as suggested by Wilson [8, 451, with the addition of a long tailed pair, or

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incorporating an operational amplifier, improves both the magnitude and predictability of input resistance. However, to realise conveyors from discrete components, the circuits require a greater number of transistor array ICs than the operational amplifier and mirror approach, without producing any performance advantage. In integrated form both the modified translinear conveyor, with a suitable high input impedance section, and the operational amplifier and mirror conveyor should produce comparable performances.

Surakampontorn and Thitimajshima [18] have very recently proposed a design for an integrable conveyor featuring variable transfer gain designed around a Gilbert current amplifier and using oniy npn mirror structures. Preliminary results reported from breadboarding of the circuit from transistor arrays indicate the promise of wideband gain errors of less than 1%, but unfortunately restricted to output currents of less than 1 mA. Research on MOS current mode circuits has traditionally been restricted by the poor matching available from discrete MOSFET devices. However, Nishio et al. [46] have demonstrated a discrete conveyor composed of an operational amplifier and multiple MOSFET mirrors in a topology intended for integration and very similar to the style of early bipolar voltage to current convertors in which the output section of the amplifier is duplicated to access currrent [35]. (Related developments specific to MOS technology are discussed in section 4.3).

3 Conveyor applications

3.1 Immittance conversion

3.1.1 Inductance synthesis Because of the desirability of producing solid state filters without the use of physical coils, attention soon became focused on the impedance transforming capabilities of current conveyors, especially since an operational amplifier approach had so far required extensive component matching [47]. Developments occurred primarily along two lines: one aiming ultimately at a satisfactory single conveyor configuration for discrete component implementation and the other moving towards a multiconveyor structure to take advantage of integrated fabrication.

The first reported conveyor scheme by Black [20] in 1971 employed two conveyors, but only exhibited a moderate Q factor at low frequencies. In 1977 Nandi [48] presented a pair of single conveyor circuits for realising both bilinear and series RL impedances with the restriction of a dependent relationship between L and Q. This was partially overcome by limiting the single conveyor circuits to moderate Q applications and proposing a new simplified two conveyor design for higher Q regimes [49]. Senani [SO] then published a series of three circuits, the first two of which simulated a grounded RL impedance using a single conveyor with three and four passive components respectively. In the two conveyor design a floating RL impedance was available for the first time. However, all three circuits required tight resistor tolerances, as discussed by Nedungadi [Sl] in his communication, to improve the range of floating inductance available.

By adopting a conveyor version of the Ford-Girling circuit Soliman [52] was able to produce a grounded parallel RL impedance without critical component matching, followed shortly by a single conveyor gyrator formulation of an ideal grounded inductor, which still

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required component matching [53]. Senani [54] overcame matching constraints in his single conveyor realisation of a lossy floating inductance at the expense of using a nongrounded capacitor. Almost simultaneously Nandi [55] reported a two conveyor circuit employing two resistors and a grounded capacitor to simulate a grounded lossy inductance whose Q was both high and independently adjustable. Singh's first proposal [56] was essentially the same as Senani's circuit from the previous year [SO], whereas his second contribution [57] adopted a single conveyor approach to simulate a floating lossy inductance without component matching, unfortunately with the disadvantage of Q and L dependence. Rathore and Singhi [58] had during the course of the year also described a synthesis procedure for grounded lossy inductance simulation which, when implemented practically, resulted again in configurations identical to those first presented by Senani for both current conveyors [SO] and operational amplifiers [59].

Two new lossy floating inductive simulations (series and parallel RL), requiring no component matching, and exhibiting independent resistive control of L and Q, were introduced in 1980 by Senani [60] in a two conveyor configuration, subsequently reformulated [61] to reduce the number of passive components. Patranabis and Paul [62], meanwhile, had devised a two conveyor circuit to produce a floating inductance in series with a negative resistance, a possibility not previously exploited. At this point Rathore [63] proposed a new two conveyor simulation of an RL impedance with independent resistive control of L and Q and utilising for the first time a grounded capacitor, as a result of his generalised form of lagging current analysis. Pal [64] brought 1980 to a close with three multiconveyor proposals for lossless floating inductor simulation, all requiring triple resistor matching, along with a floating capacitor. The first scheme employed four identical conveyors, where the other two schemes featured three conveyors in loss compensated versions of earlier circuits, due to various authors [SO, 54, 571.

The single conveyor circuit proposed by Paul and Patranabis [65] in 1981 for a range of inductive applications was later shown by Soliman [66] to be identical to that published by himself three years earlier [53], albeit with a less detailed analysis. In a series of four papers, Pal describes initially [67] a two conveyor circuit featuring single resistor control of an ideal grounded inductance, and a floating single conveyor RL impedance, both employing a floating capacitor and requiring resistor matching. Secondly, two multiple conveyor circuits are suggested [68] for grounded inductance realisation with the advantage of using unmatched resistors and grounded, rather than floating, capacitors. The next publication [69] outlined a four conveyor ideal floating inductance scheme reverting to two sets of matched resistors with a single controlling grounded capacitor. However, Singh [70] soon proposed a simple modifi- cation to allow the more favoured resistive control method at the expense of a single matching condition, while retaining the grounded capacitor. In the final paper of the series Pal [71] reduced the passive component count to a pair of matched grounded resistors, a grounded capacitor and a floating control resistor. In addition, a four conveyor floating capacitance multiplier, requiring no component matching, is described.

Shortly afterwards Senani [72] published a four conveyor contribution that overcame the disadvantages of the previous three proposals by removing the require-

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ment of component matching completely. The resulting circuit employs a minimum number of passive components, uses a grounded capacitor for ease of micro- fabrication and features grounded resistor control, Fig. 6.

CCII. z CCII. 2

Fig. 6 Floating inductance synthesis

By a suitable interchange of passive components, the circuit also acts as a floating capacitance multiplier using a grounded capacitor. In 1983 Nandi [73] contributed a two conveyor simulation of a grounded ideal inductance employing two matched resistors and a floating capacitor, and exhibiting floating resistive control. Finally, employing their own previously published synthesis technique [ l l , 743 Higashimura and Fukui have recently reported [75] a floating lossless inductance implementation using two conveyors, one transconductance amplifier, a grounded capacitance and a single resistor. The resultant inductance is electronically tunable over a range of approximately three decades by varying the transconductance amplifier bias current.

Since 1983 attention has increasingly focused on a more general approach involving frequency dependent negative resistance (FDNR) and generalised immittance convertors that are also suitable for inductance simulation. However, a number of papers have appeared [39, 761 presenting practical results for inductance synthesis resulting from the adoption of Wilson's high-performance conveyor implementation [38], a preliminary attempt at a MOSFET conveyor [46], and a conveyor with electronically variable gain [18]. In related developments operational transconductance amplifiers, which in general display an inferior performance compared to conveyors, have been proposed for a current controlled capacitance multiplier [77]. Senani [78] has also recently described a floating inductance synthesis employing a pair of standard voltage operational amplifiers, but with the disadvantage of requiring 12 resistors (two matched) and a floating capacitor.

In parallel with the general shift of interest from purely inductive simulation to the more general FDNR circuits for continuous time analogue filter synthesis there has been a corresponding increase in the number of publications concerning a current-mode approach to the design of GaAs amplifiers for switched capacitor filters (Section 4.3).

3.1.2 Frequency dependent negative resistance The function of frequency dependent negative resistance (FDNR), occasionally referred to as a super capacitance, is an additional synthetic circuit element that is often required in active filter design. Early single conveyor formulation by Soliman [52], using a conveyor equivalent of the Ford-Girling circuit, and Nandi [79], resulted in high loss resonators rather than an FDNR relationship, TWO further contributions by Soliman [80, 811, describe a three conveyor circuit with a suggested FDNR capability and a single conveyor circuit for realising both an

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ideal and lossy FDNR respectively, but requiring extensive component matching. A reduction in the number of passive components was achieved by Pal [82] in his two conveyor frequency dependent negative conductance configuration, employing two equal-valued grounded capacitors and a single resistor, an advantage that was not obtainable with Salawu's [83] later two conveyor proposal needing six passive components. Pal's [64] introduction of a four conveyor FDNR structure in 1981 also required a high passive component count with equality constraints on both capacitors and resistors. However, this trend was reversed in his next publication, containing two FDNR simulations [68]. The proposal of a four conveyor implementation for the first time imposed no equality constraints on the passive components, while the three conveyor circuits employed only two grounded capacitors, of equal value, and a single resistor. Nandi's [84] contribution required only two conveyors, but at the cost of indirectly involving all five passive components in the balance equation for lossless behaviour.

All the previous conveyor FDNR configurations had been grounded realisations and it was not until two publications by Nandi [85, 861 that a floating FDNR imple- mention first became available. The two formulations were closely related, both employing three conveyors along with two floating capacitors and a single resistor, with no component matching required. A minor modifi- cation was later suggested by Abdalla [87] to the second circuit to make use of conveyors of the same polarity throughout. Meanwhile, Senani [88] had also presented a two conveyor floating FDNR not requiring any component matching that could also implement a range of other circuit functions, Fig. 7. Practical results for this

I cll --Tl I pw: CCII-z

Z=-(w*C C R /R )-'

1 3 p 4 P I I 1 I

Fig. 7 Floating FDNR synthesis

formulation were reported by Wilson [39] in his publication of a high performance inverting conveyor employing an operational amplifier and two current mirrors.

Two further floating FDNR circuits, utilising only two conveyors, a voltage buffer and three unmatched passive components, were outlined by Higashimura and Fukui [89] in 1986 that avoided the problem of parasitic capacitive components degrading performance. This line of development has been continued by them with the recent introduction [90] of four new floating FDNR simulations, ostensibly needing only two conveyors, but also requiring a current inverting negative immittance convertor, which is itself usually implemented with a conveyor.

Whilst a great amount of attention has been focused on a range of frequency dependent negative resistance simulations, little work has been reported on frequency dependent positive resistance (FDPR) circuits, possibly because of stability problems. The only conveyor FDPR appears to be a publication by Pookaiyaudom and Srisarakham [91] in which they describe a two conveyor implementation using three unmatched grounded passive

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components, complete with practical results obtained from their own conveyor realisation.

3.1.3 General immittance convertors The first publication to consider the use of conveyors for general immittance synthesis was that by Soliman [92] in 1972 in which he presented a range of multiconveyor circuits capable of producing transfer functions of a single specified order, either as positive or negative convertors. This procedure was extended in his next contribution [93] to the wider problem of transfer functions realisable through two general power series by adopting a nested configuration employing positive voltage generalised immittance convertors constructed from conveyors. The third paper in the series [94] described a number of four conveyor realisations for generalised immittance invertors that offered, for the first time, the advantage of using only grounded impedances. Conversion from a grounded to a floating immittance synthesis was made possible by Senani [14] with the introduction of his immittance floatator using a generalised current convey- or [23], in this case constructed from standard voltage and transconductance operational amplifiers.

The application of current conveyors to grounded negative immittance conversion was first outlined by Sedra and Smith [2] in their introduction of class I1 conveyors, and illustrated later by Surakampontorn [95] in a translinear conveyor. In 1983 a floating negative immittance convertor composed of a pair of crosscoupled conveyors, was published by Paul et al. [96], and later implemented practically by Toumazou and Lidgey [76] in a general impedance convertor, that required no passive components except the load impedance. The analysis includes a method to compensate for the effects of conveyor transfer ratio errors by the expedient of a single additional impedance, assuming that the precise nature of the transfer errors is known and invariant. This work stimulated two closely related negative immittance convertors and error compensation schemes by Nandi [97, 981 differing only in the particular nature of their cross-symmetry and conveyor polarities. A practical realisation of a general immittance convertor using a differential current mirror structure shared by two operational amplifiers has been described by Normand [99] in an attempt at component minimisation. Khan and Ahmed [lo01 have also demonstrated a dual transconductance amplifier circuit for the synthesis of a floating negative resistance, tunable by an external control current.

Higashimura and Fukui’s [ll] contribution of a for- malised nullator-norator conveyor model to assist with the process of immittance synthesis, shown by Senani [I21 to have been employed previously in a similar context, has proved fruitful. The adoption of such a for- malised method has allowed them to identify a great number of possible multiconveyor configurations to implement specific higher order immittance functions [lOl, 1021, along with practical results for third order Butterworth low and highpass conveyor filters [74].

3.2 Filters Much of the early work on conveyor filters focussed on single conveyor allpass formulations, like the second order implementations reported by Soliman [103, 1041 in 1973 and modified by Gopal [81] to remove the disadvantage of constant loss with respect to phase. Aron- hime [I051 soon demonstrated the generality of the conveyor approach for any real rational voltage transfer

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functions, with Rathore [lo61 developing a systematic synthesis procedure, illustrating that previous circuits [U, 103, 1041 were special cases of a more general approach. In a parallel development Nandi [I071 suggested in his comments on a publication by Ganguly [lo81 the use of conveyors in realising noninverting bilateral transfer functions with a high input impedance.

Salawu [I091 attempted in 1980 to reduce the component count of Soliman’s original circuit [103], an attempt that was later discovered by Salawu [llO] himself to be restricted to a first order function and not the original second order allpass function, as noted by Soliman [I l l ] and, later, Rathore [112] in a more general context. Pal [113] contributed three allpass multiple conveyor filters in 1981, the last of which was found by Rathore [114] to contain an error, a point soon corrected by the original author himself [ll5]. Mean- while, Pal [I161 had also published a multiple conveyor allpass filter structure that for the first time employed only grounded capacitors. Two single conveyor first order allpass conveyor formulations, exhibiting high input impedance for ease of cascading, have been recently reported by Higashimura [I 171, but neither unfortunately has the advantage of utilising a grounded capacitor.

In his conveyor implementation of a Ford and Girling style circuit, Soliman [52] illustrated its use as a lowpass filter with zeros in the open left half plane. Soliman’s [I181 next paper concentrated on two realisations of bandpass functions using resonators, in contrast to Nandi [49] whose approach was through the use of grounded conveyor inductance simulation as a nested element within a separate conveyor resonator. Similarly, Pal [67] also described bandpass and reject filters designed around conveyor inductance simulation. Naqsh- bendi’s [I 191 improved configuration offered high input impedance and single resistor parameter adjustment in a conveyor bandpass filter for the first time.

Turning to more classical forms, Soliman’s [92] synthesis procedure for generalised immittance convertors has made it possible to design various types of Butter- worth filters. However, the circuit originally due to Nandi [120], simplified by Stephenson [121] and later modified by Dunning-Davies [122], has proved to be more attractive owing to the use of grounded capacitors and equal valued components. Patranabis [62] has implemented a third order Butterworth lowpass filter by the alternative route of using conveyors to simulate negative resistance inductors. Higher order conveyor filters may also be obtained, as shown by Senani [123] in his novel impedance scaling scheme where single conveyors with no component matching whatsoever are used to simulate a lossy inductance per stage in an example of a fourth order Butterworth lowpass filter.

During early 1986 Nawrocki and Klein [124] proposed a universal biquad formulation involving eight transconductance amplifiers and two grounded capacitors that allowed all major filter functions to be implemented from the same structure, an improvement on earlier designs where only a single filter function had been available from each biquad circuit [125, 1261. Within six months Nawrocki and Klein’s implementation was modified by Toumazou and Lidgey [127] who replaced all the operational transconductance amplifiers by current conveyors and resistors, Fig. 8.

In late 1986 Chong and Smith [17] introduced another variant on the conveyor theme which included a voltage inversion between the input terminals, realising

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what they termed a CCII & 2 type conveyor. The improvement to reduce its sensitivity to conveyor offsets purpose of the voltage inversion was to enable lowpass, highpass and bandpass filters with independently control- Additional current-mode oscillator formulations have lable properties to be designed using a biquad style func- also been investigated using operational trans- tion implemented through a single conveyor. Since that conductance amplifiers. Nandi's proposal [137], employ-

and potential latch-up problems, Fig. 9.

"I" -

Fig. 8 Current conueyor biquadfilter

time attention has become increasingly focussed on switched capacitor filter design, as previously noted, with the exception of a recent publication by Roberts and Sedra [128] employing conveyors with current gain ('operational' conveyors [40]) as a general filter design element.

3.3 Oscillators The negative impedance transformation properties of current conveyors make them a natural candidate for oscillator circuits. However, most of the early approaches outlined in the review by Kumar and Shukla [4] suffer from one or more non-optimum characteristics.

The first conveyor oscillator proposal by Soliman [129] in 1975 was effectively limited to the audio frequency range, exhibiting linked sustainability and frequency in the two conveyor form and also requiring extensive component matching in the single conveyor version. Nandi's [ 1301 contribution separated the frequency and sustainable equations in his two conveyor configurations with grounded frequency control, but still required a floating capacitance. In the same year Nandi [131] also reported two Wien bridge conveyor oscillator formulations that displayed an improved frequency stability at the expense of using an increased number of passive components. The first single conveyor oscillator circuit, introduced by Soliman [132], had the disadvantage of using a capacitor for frequency control. This inconvenience was later avoided by both Soliman himself [ 1331 and Senani [ 1341 in closely related single conveyor circuits featuring grounded resistive control, but with the inconvenience of having to use floating capacitors and matched components.

For an integrable conveyor oscillator realisation it is important that all capacitors in the circuit should be grounded and that the frequency of operation should be determined by a single grounded resistive element to open the way for voltage or current frequency control. The first such design using a single conveyor and ful- filling these desirable criteria was published in 1984 by Jana and Nandi [135] following earlier work by Nandi [84] on a two conveyor oscillator. This implementation remained the preferred formulation until 1987 when Chong and Smith [136] published a comparative analysis of single conveyor oscillators, suggesting an

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7 Fig. 9 Conveyor oscillator

ing one such amplifier along with two voltage buffers, was soon superseded by an implementation involving only two transconductance amplifiers with two grounded capacitors and single floating resistor tuning [138]. Later developments from Senani [139, 1401 and Abuelma'atti [141] have centred around the use of electronic frequency control by adjustment of the transconductance amplifier bias currents and a progressive reduction in the number of passive components to a single grounded capacitor. The development of differential current mirrors by Normand [99] and Wilson [142] has also led to an oscillator based on a current mirror phase shifting circuit by Pookaiyaudom and Samootrut [143], but with the disadvantage of requiring twin tuning resistors.

3.4 Conveyor amplifiers By definition a current conveyor is also a current follower with an accurately defined unity current gain, but with the added advantage that the input may be refer- enced to any voltage by using terminal Y. A trans- resistance amplifier can therefore be constructed using a conveyor as a current follower, feeding a known resistance, followed by a voltage buffer. Both inverting and noninverting transconductance amplifiers are also easily formulated using the conveyor current input and a single resistor to define the conversion gain. Current amplifiers may be obtained either by modifying the basic conveyor circuit to attenuate the feedback current [41], effectively producing an 'operational' conveyor [e], or by employing two cascaded conveyors with an intermediate resistor, equivalent to a voltage follower sandwiched between two current followers [144]. Similarly, a voltage amplifier can be configured from a conveyor arranged as a transconductance amplifier with a specific load resistance, followed by a voltage buffer. The absence of overall feedback, whether the voltage amplifier is composed of conveyors or separate voltage and current followers, results in wider bandwidths at higher gains [145, 1461.

Current conveyors are also equally applicable to voltage feedback amplifier formulations, where they exhibit certain advantages compared to traditional operational amplifiers [146, 1471. For example, it has become generally accepted that feedback voltage amplifiers exhibit a constant gain-bandwidth product. However, this has recently been shown to be simply a result of the way in which feedback voltage amplifiers have habitually been designed [147, 1481. In the traditional approach the loop gain of the amplifier is equivalent to the forward voltage gain divided by the demanded closed-loop voltage gain. For a specific operational amplifier there-

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fore, the loop gain available at any frequency is determined solely by the desired closed-loop gain of the system, resulting in a constant gain-bandwidth product. This restriction can only be avoided by making the loop gain of a topology independent of its closed-loop gain, in which case the bandwidth would be the same for all values of closed-loop gain.

Such a situation may conveniently be achieved by designing a voltage amplifier using feedback around a current conveyor, as in Fig. 10, for the inverting and non-

R2

* “ o vlnTFf VO

G, =-R2/(2f lq)

G:I+Rz/(ZR~) RI

a b

Feedback voltage ampl@ers wing conveyors Fig. 10 a Inverting b Noninverting

inverting cases respectively. The performance available from the new style of conveyor amplifier topology is impressive, with bandwidths greater than 3 MHz at all gains up to 40dB being reported by Wilson [40, 1493, behaviour equivalent to a gain-bandwidth product beyond 300MHz at 1OV ppk from an operational amplifier advertised as having a unity-gain bandwidth of only 4 MHz. In addition voltage slew rate is also remark- ably improved, especially in the inverting version, since the output from the operational amplifier is connected as a virtual earth, and so does not move through any significant voltage whatsoever, leaving that task to the current mirrors. The main limitations on high-gain behaviour have been found to be determined by the high-frequency deviation in the X terminal impedance of the conveyor [l50].

A universal conveyor instrumentation amplifier has recently been demonstrated by Wilson [40, 149, 1511 through the adoption of a generalised dual conveyor approach to a current-mode configuration originally proposed by Nedungadi [152] in 1980 and subsequently revised by Toumazou and Lidgey [7, 153-1551. The sym- metrical nature of the input circuit, as shown in Fig. 11,

I C C I I .

V2

Fig. 11 Universal conveyor instrumentation ampl@er V, = ( I . - IJR, 5, =U‘, - VJRJR,

ensures a differential input voltage capability with an intrinsically high common-mode rejection ratio without the need for any resistor matching whatsoever, unlike the

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traditional triple operational amplifier instrumentation amplifier. Current inputs can also be catered for by removing R I and using the conveyor X terminals directly. Bandwidths greater than 1.5 MHz at all gains up to 40dB have been reported using general purpose operational amplifiers with a common-mode rejection ratio of more than 100 dB at low frequencies, falling progressively to 40 dB at around 1 MHz [40, 1491. Performance limitations are due primarily to amplifier gain-bandwidth product mismatch (as with the traditional circuit) and residual capacitance at the conveyor X terminal [149, 1511.

4 Developments in current-mode circuits

A current-mode circuit may be taken to mean any circuit in which current is used as the active variable in prefer- ence to voltage, either throughout the whole circuit or only in certain critical areas. In addition to current conveyors themselves, such circuits range from voltage to current convertors through translinear circuits and current-mode rectifiers to neural computation and many new amplifier topologies. For many of the applications described a current-mode approach enables superior performance to be achieved, even in cases where circuits have been synthesised from voltage-mode components due to the lack of suitable alternatives.

4.1 Current convertors, amplifiers and translinear circuits

Early experimental designs of integrated voltage to current convertors as instrumentation subsystems offered good linearity, but were only optimised for a relatively narrow range of conversion gains [156, 1571. At that time discrete formulations of voltage to current convertors were either designed around an operational amplifier [33], a voltage follower [35] with an additional output stage consisting of current mirrors of various complexity or a form of crosscoupled compensated mirrors [l58]. The reintroduction in 1979 by Haslett and Rao [36] and independently by Hart and Barker [34] of an operational amplifier supply current sensing technique, first explored by Graeme [159] a number of years earlier, permitted greater circuit flexibility and performance to be obtained in the design of convertors [34]. Nedungadi [152] extended the scheme to encompass differential input signals whilst Huijsing and Veelenturf [32] produced a convertor in which the limitations of early pnp mirrors were overcome by synthesis from npn devices and an additional amplifier. Distortion performance was signifi- cantly improved in 1981 with the publication by Wilson [37, 411 of a new feedback convertor topology. Conver- tors with extended output capability were demonstrated by Nedungadi [160] employing a separate high-power output stage and by Wilson [161] using an error feedforward technique to achieve low distortion with unbiased output transistors. A convertor design suitable for single supply operation has also recently been described by Barker and Hart [162].

After the renewal of interest in current followers and amplifiers by Jager and Smit [163] their evolution has traced a path similar to that of current convertors (since most convertor circuits were essentially followers with added conversion stages), but with only a limited amount of theoretical material being published [148, 163, 1641. The unipolar current amplifiers introduced by Hart [165] and Nedungadi [166] were soon modified to accommo- date supply current sensing and bipolar capability by

69

Nedungadi [152] and by Wilson [41, 1671 to operate with feedback mirrors for lower distortion. Meanwhile, with the exceptions of early implementations by Nedungadi [168, 1691 and Bel [170], very similar topologies were being employed by Haslett and Rao [36], and later Lidgey and Toumazou [la, 1451, to produce accurate current followers. At this stage, related developments in translinear circuit theory began to influence the design of current-mode circuits.

In 1975 Gilbert [MI, drawing on earlier work of his own [171] and of others [172], unified several areas of circuit theory with the publication of his translinear circuit principle, later modified slightly by Hart [173]. One of the many possible variations of a translinear arrangement is illustrated in Fig. 12, where a set of four

6 13 14

Fig. 12 : , I , = I , I ,

transistors arranged in a ring bears a strong resemblance to a pair of back-to-back transistor mirrors. Assuming we have matched devices, operating at the same tem- perature, the translinear principle produces the current balance I , I , = 121.,. Many different functions, like multiplication, division and squaring, can be achieved by a suitable choice of driven currents. More complicated analogue computational functions, square and other roots for example, may be obtained by using more complex topologies [172, 174, 1751.

The translinear approach was soon adopted by Fabre in a series of papers concerning voltage to current convertors with single class A [176], class AB [177] or multiple [178] outputs. By extracting the design of the central current follower from the convertor Fabre was able to produce a differential current follower [179] and a range of suggested applications [l80]. The original four transistor translinear ring was extended by Toumazou and Lidgey E1811 to form a six transistor chain acting as the input stage of a fully differential current amplifier with a gain of two. By using controllable bias currents within the translinear gain cell Fabre [182] has also demonstrated a current amplifier with a similar gain, but programmable over a restricted range. Returning to the basic four transistor translinear ring, Toumazou and Lidgey [7, 1831 have very recently added an operational amplifier to produce a single ended current amplifier with a moderate open-loop gain and bandwidth. The approach would seem to have scope for extension as an operational conveyor by a suitable minor circuit modifi- cation to gain access to the noninverting terminal of the operational amplifier.

In 1980 Nedungadi E1521 reported a general current- mode amplifier configuration, based on two operational amplifiers and a pair of current mirrors, capable of per- forming a number of related functions. By suitable choices of component values, a differential voltage to

Four transistor translinear cell

70

current convertor, a current to voltage convertor and a full instrumentation amplifier displaying a high common- mode rejection ratio, without component matching, could be obtained. Because of its versatility Nedungadh approach has proved to be popular [7, 150, 153, 1551 and has also led to the development of a conveyor version of an instrumentation amplifier [40, 149, 1511, as noted previously in Section 3.4.

More sophisticated current-mode behaviour involving fully differential input and output capabilities has also been proposed from time to time by various authors, whether as current amplifiers [7, 81, simple or composite seven terminal amplifiers [ 5 , 761 or operational floating amplifiers [184, 1851 in attempts to produce new basic building blocks from which both novel and traditional electronic functions may be implemented.

4.2 Signal processing computing and neural networks

4.2.1 Precision rectification The traditional design of a precision rectifier, composed of two operational amplifiers, closely matched resistors, diodes and multiple feedback [186], can result in undesir- able distortion becoming noticeable at frequencies as low as 1 kHz due to various open-loop waveform transitions. By 10 kHz, distortion is a major contributory factor to error in measurements made with such circuits. Barker and Hart [187] overcame these problems in 1977 with a current-mode precision full wave rectifier circuit employing two voltage to current convertors and a current mirror that exhibited a wide dynamic signal handling capability. Retaining the same overall topology Touma- zou and Lidgey [188, 1891 have recently updated the voltage to current convertors by using Hart and Barker's [34] own supply current sensing technique to produce a fast precision current-mode rectifier, Fig. 13. A positive

I , .v m, , R P b R

IYI

I - V

Fig. 13 Current-mode rectifiation

input voltage causes a current, determined by R,, to flow in the positive supply lead of A, and the negative lead of A,. When the input polarity is reversed, the opposite occurs. The two split phases are then recombined at the input to the current mirror and finally converted back to a voltage by a resistor and buffer amplifier. Only a single npn current mirror is employed to avoid frequency restrictions imposed by pnp transistors. Even using a low peak-to-peak input voltage of 500mV Toumazou and Lidgey [188] report excellent results with no perceptible distortion up to 1 MHz.

4.2.2 Analogue computing Analogue computation is an additional area of application of current conveyors and current-mode circuits, since current can be conveniently summed at a single point without the need for an extra summing amplifier. Linear programmable gain blocks may be obtained using

IEE PROCEEDINGS, Vol. 137, Pi . G , No. 2, APRIL 1990

either a feedback current amplifier [45] along with floating controllable resistors [190, 1913, gain programmable current amplifiers [182] or electronically tunable current conveyors [18]. Both current differentiation and integration are also available using conveyor circuits [Z]. in addition to current-mode frequency selective circuits [128] and current processing phase control schemes [192]. Root and power-law functions are achievable using the translinear circuits described previously. Complex waveforms may also be synthesised by virtue of the ease with which currents can be summed. A certain amount of hardware reduction is possible when multiple conveyors are employed since a single set of mirrors may be used to sum the currents from the constituent operational amplifiers [7]. Alternatively a differential conveyor structure may be employed [142].

4.2.3 Neural networks Artificial neural networks are presently attracting a great amount of interest since they offer the possibility of pro- viding solutions to problems inherently unsuited to sequential machines. Any electronic neuron must essentially be able to sum and filter the outputs from neurons feeding it and respond with a soft limited output. The links between neurons are formed by synapses which may be excitatory or inhibitory, increasing or decreasing the influence of presynaptic neuron activity on postsynaptic activity.

The most promising continuous-time line of development appears to be the current-mode approach of House- lander et al. [193, 1941, which has supplanted the earlier circuits of Tsividis and Satyanarayana [195]. In their implementation, a copied presynaptic neuron current is acted upon by the steering effect of a synaptic strength signal at the base of a long tailed pair, resulting in a modulated postsynaptic neuron output current. The cas- cadable structure suggested is well suited to integration, enabling a large neural matrix to be developed along the lines demonstrated by Boahen et al. [I961 in their current-mode heteroassociative memory. Alternative approaches involving analogue multipliers and digitally selected binary weighted current sources [197], multiple input transconductance amplifiers [ 1981 and CMOS neural oscillators [199] have also been reported. However, in an attempt to reduce the number of pinouts required for chip interconnections Houselander and Taylor [200] have recently focussed their attention on a time multiplexed scheme that sequentially programmes synaptic activity.

4.3 MOS, GaAs and optical It is, of course, feasible to construct the full range of current mirrors from MOS devices using similar topologies to bipolar designs. The use of discrete MOS devices, however, usually results in a significant reduction of accuracy due to individual threshold voltage variations, effectively restricting MOS mirrors to integrated designs. Advantage may then be taken of precise geomet- ric control to produce accurate nonunity mirror transfer ratios, especially if several mirror stages are cascaded to avoid bandwidth reduction problems [201]. Wang and Guggenbiihl [202] have very recently demonstrated an improved bipolar current capability by formulating a mirror with an adjustable transfer ratio from a closed- loop CMOS transconductance amplifier with a duplicated output stage.

Early formulations of MOS floating resistances and transconductors (required to substitute for the impracti-

IEE PROCEEDINGS, Vol. 137, Pt. G, No. 2, A P R I L 1990

I I ,

* I

yg I I

53

I I I

M I I == c, I I

71

copy of the input current available to the load. A number of circuit refinements are added to isolate and stabilise the MOS copier cell operating conditions as well as to minimise charge feedthrough to the gate capacitor from the MOS switching elements. Transfer ratio errors of around several hundred parts per million are predicted for this approach compared to approximately 1 % for standard current mirrors under similar mismatch conditions [216], confirmed by measurements taken from the first practical implementation of the scheme reported by Wegmann and Vittoz [217]. Such a level of accuracy and the noncritical nature of the technique clearly indicate that it will eventually have a strong impact in a number of areas.

Closely related developments by Hughes et al. [219, 2203 promise to extend the concept of switched or sampled currents firmly into the arena of VLSI digital signal processing and provide a unification of analogue and digital current-mode concepts. In their scheme similar single, or more commonly, dual MOS transistor switched mirrors have been extended to perform a memory function by using each clock cycle to step the copied bipolar current through a series of cascaded mirrors and so produce defined delays, as in Fig. 15. Current integration can then be performed by feeding back a copy of the delayed output current, scaled as required, to produce a varied range of transfer functions. Minor circuit modifications, such as the use of cascode

Q: 8" Q J

M Fig. 15 Current memory using dynamic mirrors

transistor current cells are again suggested for practical implementations of the basic method. Initial results, both for CAD simulation of a sixth order 1 MHz Chebyshev lowpass lilter and measurements on a current memory module, confirm the potential of the method [219, 2201. As pressures increase on VLSI designers to use a lower supply voltage of 3.3 V rather than the present 5 V, such current-mode digital signal processing techniques will surely become increasingly important and attractive.

Yet another area in which current-mode techniques are playing an important rBle is that of analogue to digital convertors. Using current rather than voltage as the signal variable Nairn and Salama [221, 2221 have implemented a 6 bit algorithmic analogue to digital converter using a standard 3 pm CMOS process requiring approximately 0.4 mm2 of chip area, consuming less than 5 mW and operating at a sampling rate of 200 kHz. The internal structure of the convertor utilises bit cells based on standard CMOS mirror and comparator structures cascaded up to the required number of bits. Replacing the standard mirror formulation by a more accurate active mirror [223], in which an auxiliary low-gain operational amplifier is inserted between the drain and gate of the mirror input transistor (effectively turning the mirror

72

into a current conveyor), has enabled the same authors to achieve 8 bit resolution at a higher sampling rate of 500 kHz [224], but with an increase in chip size to just over 0.7 mm2 and a power consumption of 65 mW.

Utilising the new concept of switched, or dynamic, mirrors has permitted even greater resolution by removing the main limitation of mirror accuracy. Nairn and Salama [141, 2251 have very recently reported a 10 bit convertor operating at 25 kHz and occupying only 0.2 mm2 using a 3 pm process in which each bit cell oper- ates on a four phase clock cycle. In a parallel development Roberts et al. [226] have adopted a six phase clock cycle for their proposed pipelined architecture on dynamic mirrors that they predict will achieve 12 bit resolution with a chip area of around 2 mm2.

A current-mode approach has been very successful in the last two years when applied to problems posed by the low mutual conductance of GaAs devices, helping to realise the potentially high gain-bandwidth products available with this technology. Martin [227] has demonstrated the improved amplifier gain obtainable by using a bootstrapped input differential pair to improve interstage matching. However, perhaps the most significant development has been the proposal by Toumazou and Haig [228] of a single-stage double cascode type of amplifier architecture employing a crosscoupled transistor pair to achieve a push-pull output, resulting in an amplifier optimised for a switched capacitor filter design expected to operate at a switching rate of 500 MHz [229, 2301. The single-ended nature of the topology has also been converted to a differential input by the same authors [231]. For slightly less demanding applications a simplified output structure has been suggested by them in their 1988 review of GaAs design techniques [232]. In later optimisations [233,234] they have reduced the simulated settling time of the original design to 360 ps, with a modified design of negative mirror [235] enabling this to be further reduced to 230 ps for a push-pull configuration; an encouraging step towards switched-capacitor filters operating with switching frequencies approaching 1 GHz.

A current-mode approach has also started to appear in the design of both low-noise and high-speed transimpedance amplifiers intended for use with optical fibre communication systems. Wilson and Darwazeh [236, 2371 have regarded the amplifier as a true transimpedance amplifier, rather than as a voltage amplifier, and designed it to exhibit a low input impedance in order to remove source capacitance constraints. Van den Brink [238] has reported significant noise benefits attainable by actively generating feedback current in an optical fibre transimpedance receiver instead of relying on the output voltage acting across the feedback element as is usually the case. Taking this concept a step further, a number of authors [239-2421 have used an optical emitter driven directly from the voltage to current convertor to produce an optical feedback signal, with subsequent noise improvements.

5 Conclusions

This paper has sought to review historical and technical developments in current conveyor and related current- mode developments over the last twenty years. Evidence that the area is experiencing a sustained and dramatic growth is highlighted by the fact that over one sixth of the references were published during the first six months of 1989. One striking feature that has emerged from such a wide range of publications is that with a careful reading

IEE PROCEEDINGS, Vol. 137, P t . G, No. 2, APRIL 1990

many of the seeds of later principles and circuits could be discovered already embedded in earlier material. What seems to have changed is the ‘way of seeing’ such circuits, comparable to the manner in which other subjects periodically undergo a shift of perception or change of paradigm. We now have a number of different and related ways in which fundamental building blocks can be both viewed and used to implement all the old, and many new, circuit functions.

Pressure from a number of circuit designers to per- suade various manufacturers to produce one or other integrated current-mode circuits seems largely to have been in vain, except that now a limited range of amplifiers employing current-mode feedback are becoming available. The semiconductor industry can be both inno- vative and strangely conservative at the same time! There would seem to be a strong case now for a joint concerted research and development programme between uni- versities and industry to decide on a series of current- mode circuits for monolithic fabrication, whether they be current conveyors, operational conveyors, differential current amplifiers, seven terminal operational amplifiers or operational floating amplifiers.

It is inevitably in any undertaking of this nature that a number of references will have been overlooked. However, it is to be hoped that the method of cross- checking adopted during compilation has resulted in only minor lapses. No doubt aggrieved authors will inform me of any bibliographical shortcomings.

6 Acknowledgments

It is with pleasure that I acknowledge many interesting and stimulating discussions with Dr. Lidgey and Dr. Toumazou and other research workers and students too numerous to mention individually. I am also indebted to Linda Morris for her continued patience and painstaking efforts in helping to prepare the text.

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95 SURAKAMPONTORN, W.: ‘Intepable wide-dynamic-range negative resistance circuits’, Electron. Lett., 1985, 21, (1 1). pp. 5 6 5 0 8

96 PAUL, A.N., DEY, A.N., and PATRANABIS, D.: ‘A floating NIC without constraint and its application’, IEEE Trans., 1983, CAS-30, pp. 181-183

97 NANDI, R.: ‘Precise realisation of an insensitive floating negative admittance convertor’, Electron. Lett., 1987.23, (15), pp. 775777

98 NANDI, R.: ‘Novel floating negative immittance convertor’, IEE Proc. G., 1987, 134, (9, pp. 236238

99 NORMAND, G.: ‘Floating-impedance realisation using a dual operational-mirrored amplifier’, Electron. Lett., 1986, 22, pp. 521-522

100 KHAN, LA., and AHMED, M.T.: ‘Realisation of tunable floating resistors’, Electron. Lett., 1986,22, (15). pp. 799-800

101 HIGASHIMURA, M., and FUKUI, Y.: ’Novel method for realising higher-order immittance function using current conveyors’. IEEE International Symposium on Circuits and Systems, Helsinki, 1988,3, pp. 2677-2680

102 ISHIDA, M., HIGASHIMURA, M., FUKUI, Y., and EBISU- TANI, K.: ‘Synthesis of immitance function using current conveyors’. IEEE International Symposium on Circuits and Systems, Helsinki, 1988, 3, pp. 2681-2684

103 SOLIMAN, A.M.: ‘Inductorless realisation of an all-pass transfer function using the current conveyor’, IEEE Trans., 1973, CT-20,

104 SOLIMAN, A.M.: ‘Another realisation of an all-pass or a notch filter using a current conveyor’, Int. J. Electron., 1973, 35, pp. 135-1 36

105 ARONHIME, P.: ‘Transfer-function synthesis using a current conveyor’, IEEE Trans., 1974, CAS-21, pp. 312-313

106 RATHORE, T.S., and DASGUPTA, S.M.: ‘Current-conveyor realisation of transfer function’, IEE Proc. G., 1975, 122, pp. 1119- 1120

107 NANDI, R.: ‘Comments on “Precise non-inverting operator realisation with high-resistive input impedance’”, IEEE Proc., 1977, 65, pp. 1261207

108 GANGULY, U.S.: ‘Precise non-inverting operator realisation with high-resistive input impedance’, IEEE Proc., 1976, 64, pp. 1019- 1021

109 SALAWU, R.I.: ‘Realisation of an all-pass transfer function using the second generation current conveyor’, IEEE Proc., 1980.68, pp. 183-184

I10 SALAWU, R.I.: ‘Reply to Comments by A.M. Soliman on Realis- ation of an all-pass transfer function using the second generation current conveyor’, IEEE Proc., 1981.69, p. 395

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1 1 1 SOLIMAN, A.M.: ‘Comments on Realisation of an all-pass transfer function using the second generation current conveyor’, IEEE Proc., 1980,68, p. 1035

112 RATHORE, T.S.: ‘Comments on Realisation of an all-pass transfer function using the second generation current conveyor’, IEEE Proc., 1981,69, p. 395

113 PAL, K.: ‘Realisation of current conveyor all-pass networks’, Int. J . Electron., 1981, SO, pp. 16S168

114 RATHORE, T.S.: ’Comments on Realisation of current conveyor all-pass networks’, Int. J . Electron., 1983,S3, p. 501

115 PAL, K.: ‘Reply to Comments on Realisation of current conveyor all-pass networks’, Int. J . Electron., 1983,S3, p. 502

116 PAL, K., and SINGH, R.: ‘Inductorless current conveyor all-pass lilter using grounded capacitors’, Electron. Lett., 1982, 18, (I), p. 47

117 HIGASHIMURA, M., and FUKUI, Y.: ‘Realisation of all-pass networks using a current conveyor’, Int. J . Electron., 1988, 65, pp. 249-250

118 SOLIMAN, A.M.: Two novel active RC canonic bandpass networks using the current conveyor’, Int. J . Electron., 1977, 42, pp. 49-54

119 NAQSHBENDI, S.F.H., and SHARMA, R.S.: ‘High input impedance conveyor filters’, Int. J . Electron., 1983,55, pp. 499-500

120 NANDI, R.: ‘Equal-valued earthed-capacitor realisation of a third- order low D ~ S S Butteworth characteristic using current conveyors’, Electron. I&, 1978, 14, (22), pp. 699-700

- 121 STEPHENSON, F.W., and DUNNING-DAVIES, I.: ‘Simplified

design procedures for a third-order system using current conveyors’, Electron. Lett., 1979, 15, (7). pp. 215-216

122 DUNNING-DAVIES, J., and STEPHENSON, F.W.: ‘Sensitivity optimisation of active filters containing conveyors and controlled sources’, Int. J . Electron., 1980,48, pp. 28S289

123 SENANI, R.: ‘Novel higher-order active filter design using current conveyors’, Electron. Lett., 1985,21, (22). pp. 1055-1057

124 NAWROCKI, R., and KLEIN, U,: ‘New OTA-capacitor realisation of a universal biquad‘, Electron. Lett., 1986,22, (l), pp. 5C-51

125 GEIGER, R.L., and FERRELL, J.: ‘Voltage controlled filter design using operational transconductance amplier’. IEEE lntemalional Symposium on Circuits and Systems, Newport Beach, USA, 1983,

126 MALVAR, S.H.: ‘Electronically controlled active-C filters and equalisers with OTAs’, IEEE Trans., 1984, CAS-31, pp. 64S649

127 TOUMAZOU, C., and LIDGEY, F.J.: ‘Universal active filter using current conveyor’, Electron. Lett., 1986.22, (12), pp. 662464

128 ROBERTS, G.W., and SEDRA, A.: ‘All current-mode frequency selective circuits’, Electron. Lett., 1989,2S, (12), pp. 759-761

129 SOLIMAN, A.M.: ‘Simple sinusoidal active RC oscillators’, Int. J . Electron., 1975,39, pp. 455458.

130 NANDI, R.: ‘New RC oscillators using current conveyors’, Int. J . Electron., 1977,42, pp. 309-31 1

131 NANDI, R.: ‘Wien bridge oscillators using current conveyors’, IEEE Proc., 1977,6S, pp. 160&1609

132 SOLIMAN, A.M.: ‘A novel variable frequency sinusoidal oscillator using a single current conveyor’, IEEE Proc., 1978,66, p. 800

133 SOLIMAN, A.M.: ‘Realisation of frequencydependent negative- resistance circuits using two capacitors and a single current conveyor’, IEE Proc. G., 1978,125, pp. 13361337

134 SENANI, R.: ‘New canonic single-resistance-controlled sinusoidal oscillator using a single current conveyor’, Electron. Lett., 1979,lS.

135 JANA, P.B., and NANDI, R.: ‘Single current conveyor tunable sinewave RC oscillator’, Electron. Lett., 1984,20, (l), pp. 44-45

136 CHONG, C.P., and SMITH, K.C.: ‘Sinusoidal oscillators employing current conveyors’, Int. J . Electron., 1987.62, pp. 515-520

137 NANDI, R.: ‘Novel variable-frequency oscillator with single resistor control using DVCCS/DVCVS’, Electron. Lett., 1982, 18, (3), pp. 144145

138 SAHA, A.R., NANDI, R., and NANDI, S.: ‘Integrable tunable sinusoid oscillator using DVCSS’, Electron. Lett., 1983, 19, (18). pp. 745746

139 SENANI, R., and KUMAR, B.A.: ‘Linearly tunable Wien bridge oscillator realised with operational transconductance amplifiers’, Electron. Lett., 1989, 25, (l), pp. 19-21

140 SENANI, R.: ‘New eleclronicallv tunable OTA-C sinusoidal oscil-

2, pp. 594597

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lator’, Electron. Lett., 1989, 25, (4), pp. 28.5287 141 ABUELMAATTI, M.T., and ALMASKATI, R.H.: Two new inte-

grable active< OTA-based linear voltage (current)-controlled oscillations’, Int. J . Electron., 1989,66, pp. lT5-138

142 WILSON, B.: ‘Differential current-follower and conveyor using new mirror formulation’, Electron. Lett., 1986, 22, (13), pp. 708-710

143 POOKAIYAUDOM, S., and SAMOOTRUT, K.: ‘Current-mirror phase-shifter oscillator’, Electron. Lett., 1987, 23, (l), pp. 21-23

144 LIDGEY, F.J.: ‘Current followers’, Wireless World, 1984, 90, pp. -3

IEE PROCEEDINGS, Vol. 137, Pt . G, No. 2, APRIL I990

145 LIDGEY, F.J., and TOUMAZOU, C.: ‘Accurate current follower’, Electron. Wirel. World, 1985, 91, pp. 17-19

146 WILSON, B.: ‘A new look at gain-bandwidth product’, Electron. Wirel. World, 1987,93, pp. 834-836

147 WILSON, B.: ‘Constant bandwidth voltage amplification using current conveyors’, Int. J . Electron., 1988,6S, pp. 983-988

148 ALLEN, P.E., and TERRY, M.B.: ‘The use of current amplifiers for high performance voltage applications’, IEEE J., 1980, SC-15, pp. 155-162

149 WILSON, B.: ‘Current-mode feedback voltage amplifiers’. IEE Colloquium on Current-mode Analogue Circuits, London, 1989, Digest 1989/25, Paper 7

150 WILSON, B.: ‘Performance analysis of current conveyors’, Elec- tron. Lett., 1989,2S, (23). pp, 15961598

151 WILSON, B.: ‘Universal conveyor instrumentation amplifier’, Electron. Lett., 1989,2S, (7), pp. 47W71

152 NEDUNGADI, A.: ‘A dual differential bilateral current convertor’, IEEE Proc., 1980,68, pp. 932-934

153 TOUMAZOU, C., and LIDGEY, F.J.: ’Novel current-mode instrumentation amplifier’, Electron. Lett., 1989, 25, (3), pp. 228-230

154 TOUMAZOU, C., LIDGEY, F.J., and MAKRIS, C.A.: ‘Current- mode instrumentation amplifier’. IEE Colloquium on Current- Mode Analogue Circuits, London, 1989, Digest 1989/25, Paper 8

155 LIDGEY, F.J., TOUMAZOU, C., and MAKRIS, C.: ‘High CMRR - no matching’, Electron. Wirel. World, 1989, 95, pp. 344345

156 VAN DE PLASSCHE, R.J.: ‘A wide-band monolithic instrumentation amplifier’, IEEE J . , 1975, SC-10, pp. 424431

157 VAN ZENTEN, A.T., and HUIJSING, J.H.: ‘An accurate integrated voltage to current convertor’, IEEE J., 1975, SC-10, pp. 432436

158 POOKAIYAUDOM, S., and SURAKAMPONTORN, W.: ‘An integrable precision voltage-to-current convertor with bilateral capability’, IEEE J., 1978, SC-13, pp. 411413

159 GRAEME, J.G.: ‘Applications of operational amplifiers - third generation techniques’ (McGraw-Hill, New York, 1973), Chap. 1

160 NEDUNGADI, A.: ‘High-current class AB convertor technique’, Electron. Lett., 1980, 16, (11). pp. 418-419

161 WILSON, B.: ‘Low-distortion high-output class AB current convertor using error feedforward‘, Electron. Lett., 1981, 17, (13), pp. 4 6 4 3

162 BARKER, R.W.J., and HART, B.L.: ‘A novel integrable voltage- current convertor’, IEEE J . , 1987, SC-17, pp. IW111

163 DE JAGER, W., and SMIT, J.: ‘Application, design and symbolic analysis of a current follower’, Electronic Circuits and Systems, 1977,1, pp. 79-84

164 ABUELMAATTI, M.T.: ‘On the non-linear performance of a current follower’, Int. J . Electron., 1989,66, pp. 277-281

165 HART, B.L.: ‘A precision low-frequency current-amplifier circuit technique’, IEEE Proc., 1978,66, pp. 1664-1666

166 NEDUNGADI, A.: ‘Improved low-frequency current amplifiers’, IEEE Proc., 1979,67, pp. 1569-1570

167 WILSON, B.: ‘Design current-output amplifiers using current- mirror circuits’, Electron. Des. News, 1982,27, pp. 121-124

168 NEDUNGADI, A.: ‘A precise large current ratio integrated gain cell’, IEEE Proc., 1980.68, pp. 412413

169 NEDUNGADI, A.: ‘A simple monolithic current-gain cell for large current ratios’, Int. J . Electron., 1980,48, pp. 341-343

170 BEL, N.: ‘A high precision monolithic current follower’, IEEE J., 1978, SC-13, pp. 371-373

171 GILBERT, B.: ‘A new wide-band amplifier technique’, IEEE J., 1968, SC-3, pp. 353-365

172 BARKER, R.W.J., and HART, B.L.: ‘Root law circuit using monolithic bipolar-transistor arrays’, Electron. Letf . , 1974, 10, (21), pp. 4 3 9 4

173 HART, B.L.: Translinear circuit principle: a reformulation’, Elec- tron. Lett., 1979, IS, (24), pp. 801-803.

174 McGOVERN, P.A.: ‘Simple square law circuits of wide dynamic range’, IREE Proc., 1975,36, pp. 119-121

175 LIDGEY, F.J.: ‘Looking into current mirrors’, Wireless World, 1979,8S, pp. 57-59

176 FABRE, A.: ‘Dual translinear voltage/current convertor’, Electron. Lett., 1983, 19, (24), pp. 103I&1031

177 FABRE, A.: ‘Wideband translinear current convertor’, Electron. Lett., 1984,20, (6), pp. 241-242

178 FABRE, A.: ‘Ultra-low-distortion current conversion technique’, Electron. Lett., 1984, 20, (17), pp. 674-675

179 FABRE, A.: ‘The translinear operational current amplifier: a new building block‘, Int. J . Electron., 1986,60, pp. 275279

180 FABRE, A., and ROCHEGUDE, P.: ‘Current processing circuits with translinear operational current amplifiers’, Int. J . Electron., 1987,63, pp. 9-28

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181 TOUMAZOU, C., and LIDGEY, F.J.: ‘Novel bipolar differential input/outout currentcontrolled current source’, Electron. Lett., 1985,21, (5). pp. 19%200

182 FABRE, A.: Translinear currentcontrolled current amplifier’, Electron. Lett., 1988, U, (9), pp. 548-549

183 TOUMAZOU, C., LIDGEY, FJ., and YANG, M.: Translinear class AB current amplifier’, Electron. Lett., 1989, 25, (13), pp. 873874

184 NORDHOLT, E.H.: ‘Extending opamp capabilities by using a current-source power supply’, IEEE Trans., 1982, CAS-29, pp. 411414

185 HUIJSING, J.H.: ‘Operational floating amplifier’, IEEE Interna- tional Symposium on Circuits and Systems, Portland, USA, 1989,

186 ANTONIOU, A.: ‘Design of precision rectifiers using operational amplifiers’, IEE Proc. G, 1974,121, (lo), pp. 104-1044

187 BARKER, R.W.J., and HART, B.L.: ‘Versatile precision fullwave mifief, Electron. Lett., 1977, 13, (5), pp. 143-144

188 TOUMAZOU, C., and LIDGEY, F.J.: ‘Wide-band precision rectification’, IEE Proc. G., 1987, 134, pp. 7-15

189 TOUMAZOU, C., AND LIDGEY, F.J.: ’Fast current-mode precision rectifier’, Electron. Wirel. World., 1987,93, pp. 11 15-11 18

190 NAGARAJ, K.: ‘New CMOS floating voltage-controlled resistor’, Electron. Lett., 1986,22, (12), pp. 667668

191 RYAN, P.J., and HAIGH, D.G.: ‘Novel fully differential MOS transconductor for integrated continuous-time filters’, Electron. Lett., 1987.23, (14), pp. 742-743

192 FABRE, A., and LONGUEMARD, J.P.: ‘High performance current processing all pass filters’, Int. J. Electron., 1989, 66, pp. 61’+932

193 HOUSELANDER, P.K., TAYLOR, J.T., and HAIGH, D.G.: ‘Current mode analogue circuit for implementing artificial neural networks’, Electron. Lett., 1988, U , (lo), pp. 63M31

194 HOUSELANDER, P.K., and TAYLOR, J.T.: ‘Implementation of artificial neural networks using current mode analogue circuit techniques’. IEE Colloquium on Current-mode Analogue Circuits, London, 1989, Digest 1989/25, Paper 5

195 TSIVIDIS, Y., and SATYANARAYANA, S.: ‘Analogue circuits for variable-synapse electronic neural networks’, Electron. Lett., 1987, U, (24), pp. 1313-1314

1% BOAHEN, K.A., POULIQUEN, P.O., ANDREU, A.G., and JENKINS, R.E.: ‘A heteroassociative memory using current-mode MOS analog VLSI circuits’, IEEE Trans., 1989, CAS-36, pp. 747-755

197 PAULOS, JJ., and HOLLIS, P.W.: ‘Neural networks using analogue multipliers’. IEEE International Symposium on Circuits and Systems, Helsinki, 1988, 1, pp. 499-502

198 REED, R.D., and GEIGER, R.L.: ‘A multiple-input OTA circuit for neural networks’, IEEE Trans., 1989, CAS-36, pp. 767-770

199 LINARES-BARRANCO, B., SANCHEZ-SINENCIO, E., NEWCOMB, R.W., RODRIGUEZVAZQUEZ, A., and HUERTAS, J.L.: ‘A novel CMOS analog neural oscillator cell’. IEEE International Symposium on Circuits and Systems, Portland, U.S.A., 1989, 2, pp. 794-797

200 HOUSELANDER, P.K., and TAYLOR, J.T.: Time-multiplexed analogue circuit for implementing artificial neural networks’, Elec- tron. Lett., 1988, 24, (23), pp. 1413-1414

201 PETERSON, K.D., and GEIGER, R.L.: ‘Area/bandwidth trade- offs for CMOS current mirrors’, IEEE Trans., 1986, CAS-33, pp. 667-669

202 WANG, Z., and GUGGENBOHL, W.: ‘Adjustable bidirectional MOS current mirror/amplifier’, Electron. Lett., 1989, 25, (lo), pp. 673-675

203 BANU, M., and TSIVIDIS, Y.: ‘Floating voltagecontrolled resistors in CMOS technology’, Electron. Lett., 1982, 18, (15), pp. 678479

204 TSIVIDIS, Y., CZARNUL, Z., and FANG, S.C.: ‘MOS transconductors and intearators with hiah linearitv’. Electron. Lett..

1, pp. w 9 4

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205 HAIG, D.G., and TAYLOR, J.T.: %ontinuous-time and switched capacitor monolithic filters based on current and charge simulation’. IEE Colloquium on Current-mode Analogue Circuits, London, 1989, Digest 1989/25, Paper 3

206 HAIG, D.G., and TAYLOR, J.T.: ‘Continuous-time and switched capacitor monolithic filters based on current and charge simulation’, IEEE International Symposium on Circuits and Systems, Portland, USA, 1989.3, pp. 1580-1583

207 RAY, D., and GORECKI, J.: ‘Novel single-ended CMOS transconductance ampliliers’, Electron. Lett., 1985.21, (15). pp. 642-643

208 GRAY, P.R., and MEYER, R.G.: ‘MOS operational amplifier design - a tutorial overview’, IEEE J., 1982, SC-17, pp. 969-982

209 KLUMPERINK, E., ZWAN, E., and SEEVINCK, E.: ‘CMOS variable transconductance circuit with constant bandwidth, Elec-

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tron. Lett., 1989, 25, (lo), pp. 675-676 210 FREITAS, D.A., and CURRENT, K.W.: ‘CMOS current compa-

rator circuit’, Electron. Lett., 1983, 19, (17). pp. 695697 211 WANG, Z., and GUGGENBOHL, W.: ‘Novel CMOS current

Schmitt trigger’, Electron. Lett., 1988, 24, (24), pp. 1514-1516 212 WANG, Z., and GUGGENBUHL, W.: ‘CMOS current Schmitt

trigger with fully adjustable hysteresis’, Electron. Lett., 1989, 25, (6), pp. 397-398

213 TEMES, G.C., and KI, W.H.: ‘Fast CMOS current amplifier and buffer stage’, Electron. Lett., 1987.23, (13). pp. 69-97

214 SHYU, J.B., TEMES, G.C., and KRUMMENACHER, F.: ‘Random error effects in matched MOS caDacitors and current sources’, IEEE J., 1984, SC-19, pp. 948-955

215 VALLENCOURT, D., TSIVIDIS, Y.P., and DAUBERT, S.J.: ‘Sampled-current circuits’. IEEE International Symposium on Cir- cuits and Systems, Portland, USA, 1989,3, pp. 1592-1595

216 DAUBERT, S.J., VALLENCOURT, D., and TSIVIDIS, Y.P.: ‘Current copier cells’, Electron. Lett., 1988,Zq (25). pp. 156&1562

217 WEGMANN, G., and VITTOZ, E.A.: ‘Very accurate dynamic current mirrors’, Electron. Lett., 1989, 25, (10). pp. 64&646

218 BARKER, R.W.J.: ‘Accuracy of current mirrors’. IEE Colloquium on Current-mode Analogue Circuits, London, 1989, Digest 1989/ 25, Paper 2

219 HUGHES, 1.9.. BIRD, N.C., and MACBETH, I.C.: ‘Analogue sampled-data signal processing for VLSI using switched currents’. IEE Colloquium on Current-mode Analogue Circuits, London, 1989, Digest 1989/25, Paper 6

220 HUGHES, J.B., BIRD, N.C., and MACBETH, IC.: ‘Switched currents - a new technique for analogue sampleddata signal processing’. IEEE International Symposium on Circuits and Systems, Portland, USA, 1989,3, pp. 15861587

221 NAIRN, D.G., and SALAMA, C.A.T.: ‘Algorithmic analogue/ dimtal convertor based on current mirrors’. Electron. Lett.. 1988. %I:@), pp. 471472

222 NAIRN, D.G., and SALAMA, C.A.T.: ‘A current mode algonth- mic analog to digital wnvertor’. IEEE International Symposium on Circuits and Systems, Helsinki, 1988,3, pp. 2573-2576

223 NAIRN, D.G., and SALAMA, C.A.T.: ‘High-resolution current- mode A/D convertors using active current mirrors’, Electron. Lett., 1988,24, (21), pp. 1331-1332

224 NAIRN, D.G., and SALAMA, C.A.T.: ‘Current mode analog-to- digital convertors’. lEEE lnternational Symposium on Circuits and Systems, Portland, USA, 1989,3, pp. 1588-1591

225 NAIRN, D.G., and SALAMA, C.A.T.: ’Ratio independent current mode algorithmic analog-to-digital convertors’. IEEE International Symposium on Circuits and Systems, Portland, USA, 1989, 1, pp. 250-253

226 ROBERT, I., DEVAL, P., and WEGMANN, G.: ‘Novel CMOS pipelined A/D convertor architecture using current mirrors’, Elec- tron. Lett., 1989, 25, (ll), pp. 691692

227 MARTIN, K.W.: ‘Gain enhancement technique for differential pairs’, Electron. Lett., 1987, 23, (4), pp. 156156

228 TOUMAZOU, C., and HAIGH, D.G.: ‘Design of a high-gain, single stage operational amplifier for GaAs switched-capacitor filters’, Electron. Lett., 1987,23, (14), pp. 752-754

229 HAIGH, D.G., TOUMAZOU, C., HARROLD, S.J., and SEWELL, J.I.: ‘Design and optimisation of a GaAs switched capacitor filter’. IEE Saraea Colloauium on Electronic Filters. London. 1988, Digest 1988-77,IPaper 1 .

230 HAIGH, D.G., TOUMAZOU, C., HARROLD, S.J., SEWELL, J.I.. and STEPTOE. K.: ‘Desien and oDtimisation of a GaAs switched capacitor fiter’. IEEE international Symposium on Cir- cuits and Systems, Portland, USA, 1989.2, pp. 1449-1454

231 TOUMAZOU, C., and HAIGH, D.G.: ‘Level-shifting differential to singlecnded convertor circuits for GaAs MESFET implementation’, Electron. Lett., 1987, U, (ZO), pp. 1053-1054

232 TOUMAZOU, C., and HAIGH, D.G.: ‘Analogue design techniques for high speed GaAs operational amplifiers’. IEEE Inter- national Symposium on Circuits and Systems, Helsinki, 1988, 2, pp. 14531456

233 HAIGH, D.G., and TOUMAZOU, C. : ‘Fast-settling high-gain GaAs operational amplifiers for switched-capacitor applications’, Electron. Lett., 1989.25, (ll), pp. 134136

234 TOUMAZOU, C., HAIGH, D.G., and RICHARDS, 0.: ‘Fast settling GaAs operational amplifiers for switched capacitor applications’. IEEE International Symposium on Circuits and Systems, Portland, USA, 1989, 1, pp. 659-b62

235 TOUMAZOU, C., and HAIGH, D.G.: ‘Design and application of GaAs MESFET current mirror circuits’. IEE Colloauium on Current-mode Analogue Circuits, London, 1989, Digesi 1989125, Paper 1

236 WILSON, B., and DARWAZEH, I.: ‘Transimpedance optical pre- amplifier with a very low input resistance’, Electron. Lett., 1987, 23,

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(4), pp. 138-139 240 KASPER, B.L., McCORMICK, A.R., BURRUS, C.A., and 237 WILSON, B., and DARWAZEH, I.: ‘Low input resistance trans- TALMAN, J.R.: ‘An optical-feedback transimpedance receiver for

impedance optical preamplik for fibre optic local area networks’. high sensitivity and wide dynamic range at low bit rates’, J. Light- IEEE International Symposium on Circuits and Systems, Helsinki, wave Technol., 1988,6, pp. 329-338 1988.3, pp. 2531-2534 241 METHLEY, S.G.: ‘Optical receiver employing 850 nm feedback’,

238 VAN DEN BRINK, R,F.M.: ‘Optical receiver with third-order Electron. Left., 1988,24, (13), pp. 778-779 capacitive current-cweut feedback’, Electron. Lett., 1988, 21, (16). 242 METHLEY, S.G.: ‘-7OdBm APD optical feedback receiver at pp. 10241025 2.048Mbits/s’, Electron. Lett., 1988,21, (20), pp. 1259-1260

239 FORSBERG, G.S.: ‘Optical receiver with optical feedback‘, Elec- non. Lett., 1987, U, (9), pp. 478-480

IEE PROCEEDINGS, Vol. 137, Pt. G, N o 2, APRIL 1990

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