[6] Integrated-CircuitFabrication

- CPE213 -

Electronic Devices for Computer Engineering

-- CPE213CPE213 --

Electronic Devices for Computer EngineeringElectronic Devices for Computer Engineering

2

Integrated Circuit (IC)Integrated Circuit (IC)Integrated Circuit (IC)

IC = Electronic circuit fabricated in surface of a thin substrate of semiconductor material (based on planer technology) which can include several devices or components

• Small Scale Integration (SSI) ~10 gates• Medium Scale Integration (MSI) 10~100 gates• Large Scale Integration (LSI) 100~10k gates• Very Large Scale Integration (VLSI) 100k~ gates• Ultra-Large Scale Integration (ULSI) 1M~ gates

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Integrated Circuit (IC)Integrated Circuit (IC)Integrated Circuit (IC)

http://en.wikipedia.org/wiki/Moore's_law

4

Integrated Circuit (IC)Integrated Circuit (IC)Integrated Circuit (IC)

http://www.sparkfun.com/tutorials/230

IC Packaging

http://www.circuitstoday.com/classification-of-integrated-circuits

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p-n Junctions pp--nn JunctionsJunctions

Photoresist

[1] Oxidize the Si sample[2] Apply the layer of photoresist

n-type Si

SiO2

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p-n Junctions pp--nn JunctionsJunctions

PolymerizedPhotoresist

Ultraviolet

n

Mask A

[3] Expose photoresistthrough mask A

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p-n Junctions pp--nn JunctionsJunctions

[4] Remove unexposed photoresist

n n

[5] Remove SiO2 inwindows

Window

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p-n Junctions pp--nn JunctionsJunctions

[6] Remove Photoresist[7] Diffuse Br through windows

n

p p

Diffused p region

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p-n Junctions pp--nn JunctionsJunctions

Al

n

p p

[8] Evaporate Al onto the surface

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p-n Junctions pp--nn JunctionsJunctions

Mask B

n

p p

[9] Use photoresist and mask Bto etch away Al except in p contact area

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BJTsBJTsBJTs

[1] Oxidize the Si sample[2] Open window in oxide

n-type Si

SiO2

[3] Diffuse Br through windows

n

p

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BJTsBJTsBJTs

n

pn+

[4] Oxidize [5] Open window[6] Diffuse P

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BJTsBJTsBJTs

Base

Emitter

Emitter Base

collector

n

pn+

[4] Oxidize [5] Open window[6] Diffuse P

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Multi-emitter BJTsMultiMulti--emitteremitter BJTsBJTs

n

pn+n+n+n+

C BE1 E2 E3

B

C

E1 E2

E3

B

C

E1 E2

E3

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BJTsBJTsBJTs

p+-isolation

p-substrate

n

pn+

p+p+ p+n

pn+

C1 E1 B1 C2 E2 B2

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BJTsBJTsBJTs

CCV

C1

E1B1

C2

E2B2

n

pn+

p+p

np+p+p+

n

pn+

C2 E2 B2 B1 E1 C1

p

R

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NMOSNMOSNMOS

DDV

G1

n+

p

n+n+n+

D1

S1

D2

S2G2

G1B S1 D1 G2S2 D2

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CMOSCMOSCMOS

DDV

G1B1 S1 D1 G2 S2D2 B2

n+

p

n+

n

p+ p+