Project
06152180
Ultra-Low Power Electronics and Design
Design and Use of Memory-Specific Test Structures to Ensure SRAM Yield and Manufacturability F. Duan, R. Castagnetti, R. Venkatraman, O. Kobozeva and S.
Institute of Microelectronics, PKU SINANO Workshop, Montreux, Switzerland Sept. 12~16, 2006 Reliability Degradation Characteristics of Ultra-thin Gate.
A 90nm RF CMOS technology supported by device modelling and circuit demonstrators J. Ramos, A. Mercha, W. Jeamsaksiri, D. Linten 1, S. Jenei, S. Thijs,
Mdc fftifft processor with variable length
Project lfsr
1.IJAEST Vol No 7 Issue No 1 FPGA Implementation of 2 D DCT for JPEG Image Compression 001 009
Improving Multi-Level NAND Flash Memory Storage Reliability Using Concatenated BCH-TCM Coding
A 32 Nm, 3.1 Billion Transistor, 12 Wide Issue Itanium Processor for Mission-Critical Servers
5-45nm Design for Manufacturing
