A Low-Power Wave Union TDC Implemented in FPGA Wu, Jinyuan Fermilab Yanchen Shi and Douglas Zhu Illinois Mathematics and Science Academy Sept. 2011.
Improving Single Slope ADC and an Example Implemented in FPGA with 16.7 GHz Equivalent Counter Clock Frequency Wu, Jinyuan Fermilab John Odeghe, Scott.
A Digitization Scheme of Sub-uA Current Using a Commercial Comparator with Hysteresis and FPGA-based Wave Union TDC Wu, Jinyuan Fermilab Sept. 2012.
