3/8/2002CSE 141 - Buses Buses Pentium 4 Processor L1 and L2 caches Memory Controller Hub RDRAM Disks RDRAM I/O Controller Hub 2 133 MB/sec (33 MHz, 32.
I/O—I/O Busses Professor Alvin R. Lebeck Computer Science 220 Fall 2001.
Csci 136 Computer Architecture II – Buses and IO Xiuzhen Cheng [email protected].
Csci 136 Computer Architecture II – Buses and IO
