Electrical Simulation of Liquid CrystalsElectrical Simulation of Liquid Crystals Introduction Liquid...

July August September 2015 The Simulation StandardVolume 25 Number 3 July August September 2015

Engineered Excellence A Journal for Process and Device Engineers

Electrical Simulation of Liquid Crystals

Introduction Liquid Crystals (LCs) are state of matter intermediate between that of a crystalline and a liquid The optical mechanical electrical and magnetic properties of LC me-dium are defined by the orientation order of the constitu-ent anisotropic molecules Due to the anisotropy of the electrical properties the orientation of the LC molecules is effectively controlled by electric fields As a result LCs exhibit very specific electrooptical phenomena because of their large birefringence All of these are important to the functional devices based on LCs for example flat panel displays that have been commercialized for decades

The constituents of LCs are elongated or rod-like mol-ecules and disk-like molecules The average direction of the molecular long axes defines the director n which gives the direction of the preferred orientation of LC mol-ecules The LC molecules reorient in externally applied electric fields because of their dielectric anisotropy The electric energy of a LC depends on the orientation of the director in the applied electric field Under a given elec-tric field the LC will be in the equilibrium state where the total free energy is minimized

Theory The field-induced reorientation of the LC is now able to be calculated in Clever The coupled equations governing the LC physics and the electrostatic potential are solved The major variables are the voltage and the director To calculate a director configuration of the LC it is necessary to express the free energy of the system Let n(xyz) = (nx (xyz) ny (xyz) nz (xyz))be the director where (xyz) is a point in the LC region The Frank-Oseen free energy density is given as [1]

f(xyz) = K11(nabla n)2 + K22(n nabla times n)2 + K33(n times nabla times n)2

- (K22 + K24)nabla (nnabla n + n timesnabla times n) ndashq0 K22(n nabla times n)

where K11 K22 and K33 are the splay twist and bend elas-tic constants of the LC respectively q0 is the chirality of the LC The electric free energy density is given by

g= ε0 ∆ε[n (ndashnablaν)]2

where ε0 is the permittivity of vacuum ∆ε = ε||ndash εperp is the

difference between the dielectric constant parallel and ver-tical to the director and ν=ν(xyz)is the voltage at point (xyz) The Gibbs free energy density is then defined as

F = f ndash g

The total free energy is the volume integration of the free energy density within the LC domain The total free energy is minimized by a method based on a variational approach to the Oseen-Frank free energy formulation considering three elastic constants The vector repre-sentation of the director field is used with the constraint n2 = n2

x + n2y + n2

z = 1

Simulation ExamplesAs an example a twisted nematic (TN) geometry with the LC layer thickness of 3 microm is simulated The elastic constants of the LC are K11=144times10-12N K22=69times10-12N and K33=183times10-12N The anisotropic relative permittivity

INSIDEPerformance Improvement by MPI Parallelization in 3D Device Simulation 5Improvements and Features of the Updated DeckBuild 2 GUI 8Hints and Tips How can I do local conformal mesh refinement in Victory Process 11

Continued on page 2

The Simulation Standard Page 2 July August September 2015

is ε=107 and εperp=37 LC material parameters can be specified in the SetLC statement in Clever as follows

setLC epsParaDir=107 epsVertDir=37 splay=144e-12 twist=69e-12 bend=183e-12

The pretilt angles at the top and the bottom boundary of the LC layer are both 1˚ The initial twist angle is 90˚ These alignment conditions can be defined in the following commands

LCbndaryT partition(0 10) rubAngle(0) tiltangle(1)

LCbndaryB partition(0 10) rubAngle(90) tiltangle(1)

where LCbndaryT and LCbndaryB denote the statement for the top and the bottom boundary respectively The rubAngle sets the rubbing angle with respect to the x axis and tiltangle specifies the tilt angle measured from the x-y plane

The LC cell structure consisting of a LC layer sandwiched by two electrodes was created in Victory Process and ex-ported with conformal tetrahedral mesh as shown in Figure 1 The bias voltage on the electrode ldquoPixrdquo was in-creased linearly from 0 to 6V in a 025V bias step through the following command in Clever

Interconnect Capacitance domainboundarycondition=cyclic contact=rdquoPixrdquo uservoltage=6 stevolt=025 strcture=rdquotnrdquo

The solution was stored after each voltage step The structure filename was generated in such a way that the current bias voltage is appended to the root file name ldquotnrdquo The director orientation of the TN-LC structure at 0 and 4V bias voltage is shown in Figure1(a) and 1(b) respectively The arrows in the LC layer indicate the director orientation Since Clever uses strong anchoring boundary condition for the LC simulation the director orientation at the top and bottom boundaries will never change with the bias Therefore we can see as the bias is increased from 0 to 4V the director remains the same at the top and bottom boundaries while it becomes highly tilted in the middle of the LC layer

The z component of the director nz was extracted along a line parallel to the z axis across the entire LC layer The profile of nz at various bias voltages is shown in Figure 2 We can observe quantitatively how the director changes with increased bias A nominal threshold voltage exists between 15V and 2V in this case In order to identify the threshold voltage more clearly the nz in the middle x-y plane (in terms of z axis) of the LC layer was extracted The data was plotted as a function of the bias voltage with different twist angles of the director in Figure 3 We can see the transition region ie the region where the nz goes from nearly 0 to nearly 1 becomes narrower and narrower with increased twist angle Therefore the

Figure 1 The TN-LC cell structure biased at (a) 0V and (b) 4V respectively Arrows indicate the orientation of the director

Figure 3 The director component nz in the middle x-y plane of the LC layer as a function of bias voltages with different twist angles

Figure 2 The profile of the director component nz along the z direction with different bias voltages

July August September 2015 Page 3 The Simulation Standard

threshold voltage becomes more distinct This is a well-known phenomenon in TN LC Because of their steep transition TNs with twist angle larger than 90˚ (known as super-TNs) are used to make multiplexed displays on passive matrices

Another example is an in-plane switching (IPS) cell with two coplanar zigzag electrodes shown in Figure 4 The LC layer of the structure has a lateral size of 10micromtimes10microm and a thickness of 3m The whole structure was created in Victory Process with conformal tetrahedral mesh The LC material parameters are the same as those used in the TN example The initial rubbing angle of the director is 90 with respect to the x axis As the applied voltage at the ldquoPixrdquo electrode is increased the director inbetween two electrodes turns to the x direction gradually due to the increased electric field along the x axis The director above electrodes twists in a much smaller amount because the electric field is almost vertical to the electrode surface

Shown in Figure 5 is the contour plot of the x component of the LC director nx in a x-z plane located at y=75 m at the (a) 4V and (b) 6V bias voltage Shown in Figure 6 is the contour plot of the nx in a x-y plane 1m to the electrode plane at the (a) 4V and (b) 6V We can see clearly from these two figures how the director reorients with bias in differ-ent regions of the LC layer The nx profile was extracted along a line parallel to the z axis across the LC layer at x=45 m and y=5 m the middle point between two zig-zag electrodes The result is shown in Figure 7 where the electrodes are located in the left The threshold voltage is estimated to be around 3V from the curve shape

Figure 4 The IPS structure with zigzag electrodes

Figure 5 The nx contour in a x-z plane at (a) 4V and (b) 6V

Figure 6 The nx contour in a x-y plane at (a) 4V and (b) 6V

Figure 7 The nx profile along the z direction with different bias voltages The electrode plane is on the left side

Figure 8 The capacitance-voltage curve of the IPS cell


The capacitance of the LC cell between two electrodes can be obtained during the voltage ramping simulation The calculation takes into account the anisotropic permittivity of the LC director To save the capacitance one needs to add the following command after the Interconnect statement

save spice=rdquoipsnetrdquo

The data in the netlist file can be viewed in Tonyplot The capacitance-voltage (CV) curve of the IPS cell is plotted in Figure 8 The threshold voltage is a bit smaller than 3V in consistence with the director result shown in Figure 7

ConclusionIn summary three-dimensional static simulation of the liquid crystal with user-definable material parameters can be carried out in Clever All vector components of the LC director in the presence of the external electric field (applied voltage) are solved by the finite element method The director data can be output at any stage of the simulation for visualization or post-simulation pro-cessing The simulation on the TN and IPS structures has been demonstrated Other LC geometries such as vertical alignment (VA) and fringe field switching (FFS) can be analyzed as well

References

[1] H Mori et al ldquoMultidimensional Director Modeling Using the Q Tensor Representation in a Liquid Crystal Cell and Its Ap-plication to the π Cell with Patterned Electrodesrdquo Jpn J Appl Phys Vol 38 (1999) pp 135ndash146


IntroductionAs the design technology for power devices such as MOSFET GTO and IGBT has matured the importance of large domain 3D TCAD simulation has increased rapidly Distributed computing is one of the attractive solutions for such simulations because the systemrsquos performance and capability is not limited by the number of CPUs or the total amount of memory on a specific computer This advantage of distributed computing is expected to be increasingly advantageous as the size and mesh point count for these devices becomes ever larger

Silvacorsquos TCAD applications provide the user with the distributed computing feature which is supported in the solution of linear systems using the PAM solver [1 2] The PAM solver is a domain decomposition type solver that runs in parallel using MPI (Message Passing Inter-face) The user can set up the distributed computing fea-ture with MPI parallelization easily with the addition of a few simple settings on a Linux operating system [1]

In this article we demonstrate good performance from the PAM solver with MPI parallelization using Victory Device on a blade server with a total of 120 threads In addition we verify the dependence of performance im-provement by MPI parallelization on the device size and number of mesh points

Simulation ConditionsTable 1 shows the specification of the server used in this work It consists of 6 nodes of a Dell PowerEdge C8220C8220x blade server with 20 threads of execution per node and 64 Gbytes of memory available To achieve optimal performance in MPI parallelization it is important to use a high speed network interconnect between the cluster nodes InfiniBand FDR (Fourteen Data Rate 14Gbs data rate per lane) was utilized for the interconnection here

On this cluster system we carried out a DC Ic-Vc simula-tion for the multiple cell array of a standard punch-through (PT) type 3D IGBT using the PAM solver in Victory Device As the physical model in this simulation we considered the field and concentration dependent mobility SRH and Auger recombination together with impact ionization

The PAM solver is a domain decomposition type linear solver specially designed for very large sparse linear systems Figure 1 shows a schematic diagram of the simulation method using the PAM solver with MPI parallelization Each MPI process handles the solution of one part of the linear system and the MPI processes are run in parallel on each CPU thread After each MPI process finishes with itrsquos part of the linear system the solution is sent back to the main MPI process and the solution to the global linear system is re-formed and returned [2]

We carried out the same device simulation by using the various numbers of threads up to 120 on the cluster sys-tem shown in Table 1 MPI parallelization was applied to every simulation with 2 threads and more This means that the MPI processes by default are spawned across the individual server nodes even if the number of threads specified in the simulation is less than that on one server node For example if the user specifies parallelization with 3 threads the first process is assigned to node 1 the next to the node 2 and the last to the node 3 re-spectively

In order to verify the dependence of performance im-provement by MPI parallelization on the device size and number of mesh points we ran device simulations for two cell sizes of IGBT array One was a 2times2 cell structure resulting in 134K mesh nodes and the other was a 6times5 cell structure with 977K mesh nodes

Performance Improvement by MPI Parallelization in 3D Device Simulation

Table 1 Specification of the server used in this work


Figure 2 Dependence of simulation time on the number of threads in parallel

Figure 3 Dependence of speed-up rate on the number of threads in parallel

Figure 1 A schematic diagram of the simulation method using the PAM solver with MPI parallelization

Results and DiscussionsFigure 2 shows the dependence of simulation time on the number of threads parallelized by MPI For relatively small numbers of threads the simulation time was drasti-cally reduced as the number of threads increased but the improvement saturated when using a much larger num-ber of threads The number of threads that gave the fast-est simulation time was 32 for the 2times2 cells and 80 for the 6times5 cells respectively As expected the number of parallel threads for the fastest calculation tends to increase as the device size andor the number of mesh increases

This feature can expand the device size for which the de-vice simulation is completed in a practical time range It will certainly be useful for the user who wants to simu-late a large device especially in power device design

Figure 3 shows the dependence of speed-up rate on the number of threads for the 2times2 cells structure The speed-up rate is defined as the ratio of the single thread simula-tion time to the parallel thread simulation time For the number of threads less than the optimal value it was observed that the speed-up rate exceeded the ideal line on the assumption of the proportion to the number of threads The speed-up rate reached the peak value of 50x at the optimal 32 threads

The speed-up rate however saturated or decreased gradu-ally for the number of threads more than this optimal value It is not so easy to clarify the reason because this is com-plicatedly related to not only the software factor like solver performance or mesh quality but also the hardware factor like CPU capability or network interconnecting speed More comprehensive design of the cluster system can probably help the user achieve better MPI performance


Figure 4 Ic-Vc characteristics simulated with the various numbers of threads in parallel

As a result it can be confirmed from this result that Vic-tory Device has the capability to improve the simulation time by orders of magnitude by using the distributed computing feature

Figure 4 shows the overlay plot of the Ic-Vc character-istics simulated with the various numbers of threads in parallel It can be seen from this figure that all the curves are identical with each other and therefore the accuracy of the simulation result is kept independently of the num-ber of parallel threads MPI parallelization by the PAM solver can provide the user with performance improve-ment without decreasing the accuracy

ConclusionWe have demonstrated a 3D device simulation parallel-ized by MPI using Victory Device on a blade server with a total of 120 threads As a result the simulation time was drastically reduced without decreasing the accuracy as the number of threads increased and the speed-up rate reached the peak value of 50 at the optimal number of threads Moreover it has been confirmed that the num-ber of parallel threads for the fastest calculation tends to increase as the device size andor the number of mesh increases

Silvacorsquos TCAD having the distributed computing feature can expand the device size for which the device simulation is completed in a practical time range We believe that it can help the user who wants to do 3D TCAD simulation with a large domain especially in power device design

Acknowledgments

We gratefully acknowledge the support of Dell Solution Center Tokyo and HPC Solutions Inc that provided the server and the equipment used in this work

References

[1] Hints Tips and Solutions Simulation Standard Volume 24 Number 1 January February March 2014 httpwwwsilvacocomtech_lib_TCADsimulationstandard2014jan_feb_marhints2hints2html

[2] State of the Art 3D SiC Process and Device Simulation Simulation Standard Volume 23 Number 1 January Feb-ruary March 2013 httpwwwsilvacocomtech_lib_TCADsimulationstandard2013jan_feb_mara1state_of_the_art_3D_SiC_Process_and_device_simulation_a1html


Improvements and Features of the Updated DeckBuild 2 GUI

Figure 1 Examples menu and popup Figure 2 Search results for search string ldquostressrdquo

IntroductionIn this article we will emphasize the new features and improvements of the DeckBuild 2 deck editing environ-ment We will start by illustrating the examples section followed by the basic execution modes of DeckBuild and a description of how an Athena deck can be automati-cally converted to be run in Victory Process The article will also demonstrate how the visualization tools Tony-Plot and TonyPlot3D are integrated and available directly from the various parts of DeckBuild

DeckbuildDeckBuild is an input deck file development environ-ment within which all of Silvacorsquos TCAD and several other EDA products can run It offers various modes of how deck can be executed debugged and how results can be obtained and visualized DeckBuild contains an extensive library of hundreds of pre-run example decks which cover many technologies and materials

Examples DatabaseDeckBuild is shipped with a comprehensive set of over 500 TCAD examples Figure 1 displays how the examples dialog can be opened from the File menu of DeckBuild The initial examples dialog gives a hierarchical view at the examples similar from what is available in the previous version DeckBuild 1 You are presented with a tree-like view which allows you to effectively browse through the different sections of the examples database By clicking on a particular example the lower part of the examples dialog is updated with the description of the selected ex-

ample The example description itself was extended by screen-shots and pictures to better illustrate the textual description of the example

Once an example was selected you get the choice of ei-ther loading the deck only or to load the whole example inclusive of all available structure files or screen-shots The idea is to allow you to quickly browse through a deck without the need to copy large structure files

An interesting extension to the hierarchical view can be found at the very top of the examples dialog which contains a search field By entering text in the search field and hitting the enter button (or clicking on search) an index of the examples database is queried Figure 2 displays the results when ndash for instance - you search for the term ldquostressrdquo The hierarchical view has changed to display a list of results In this example a total of 27 hits is shown as is indicated in the top right of the ex-amples dialog Search strings are not limited to simple words but can be complex boolean expressions as il-lustrated in Figure 3 If we extend the search term from ldquostressrdquo to ldquostress and titlesubstraterdquo then only results which additionally have the word substrate in the title are shown The hits are now reduced to a total of five This example also illustrates how a search string can be limited to be effective in a particular section only Here the word ldquosubstraterdquo is only matched against the title section of an example whereas the word ldquostressrdquo is matched against any part of an example The ldquohomerdquo button at the very left of the search field brings back the hierarchical view should it be desired


Figure 3 Boolean search phrase

Figure 4 Deck execution buttons on toolbar

Figure 5 Deck with Stop Points

Figure 6 Toolbar buttons for variable and output tracking

Figure 7 Variables and Outputs tracking

Execution ModesOne fundamental concept of DeckBuild is to allow the user to execute a simulation deck in various ways The following basic options are offered

bull Run the whole deck without stopping

bull Run line-by-line halting execution at every line

bull Run to a pre-defined Stop point and halt execution at the stop point

The execution modes are made available via the ldquoRunrdquo menu as well as via the toolbar shown in Figure 4 and via configurable keyboard shortcuts

DeckBuild 2 allows you to define an arbitrary number of stop points in the deck Figure 5 displays a portion of the deck which has three Stop Points defined If you execute this deck by using the ldquoRun-gtRunContinuerdquo menu en-try or the corresponding button on the tool bar execu-tion will stop right at the first Stop Point After that when invoking ldquoRunContinuerdquo again execution will continue and stop at the 2nd Stop Point and so forth

Apart from executing deck by using Stop Points you also have the choice of running a single command at a time only This so-called single-stepping feature is available via the Run menu as well as via a button on the toolbar and via a keyboard shortcut Finally if you want to run through the whole deck without ever stopping you can simply use the ldquoRunrdquo button Execution will then Stop af-ter the last line has been executed (provided that no Stop points have been defined in the deck)

Tracking Variables and ResultsDeckBuild allows you to keep track of all variables and files which are created during a simulation run Two sep-arate panes can be opened one to view all variables and extracts and a second one to view generated files

Figure 6 displays the buttons on the toolbar which are used to open or close respectively the variables and out-puts tracking windows of DeckBuild Figure 7 displays a screen-shot of the two tracking windows At the top right the pane titled ldquoVariables historyrdquo shows a view at all extracted values The line number in the deck where the corresponding extract (or set) statement appeared is given in parentheses

By clicking on the value of a variable you can change its value This can be useful if you are debugging a deck and want to temporarily assign a different value to a variable The change is effective immediately and will effect any statement which takes as input the variable value and is executed after the variable was changed


Figure 8 Plotting structure and log files Figure 10 Converted deck with Athena commands commented out

Figure 9 Toolbar buttons for the Syntax converter

At the bottom right the pane called ldquoOutputsrdquo shows all files that have been created in due course of the simula-tion To limit the number or kind of displayed files you can enter a filter string Only files matching the filter are then displayed

Files shown in the ldquoOutputsrdquo pane are visualized in the exact same way as files that are encountered in the deck or runtime output ndash by simply right-clicking on them Figure 8 displays the context menu that opens upon right-click-ing The first option ldquoPlot appendrdquo allows you to load a file into a previously started TonyPlot window It is only displayed if you have started TonyPlot before The 2nd op-tion ldquoPlotrdquo will load the file into a new TonyPlot window Appending is helpful ndash for instance ndash if you want to create an overlay plot of several curves in TonyPlot

Victory Process Deck ConversionAs of version 420 DeckBuild comes with a built-in Ath-ena to Victory Process converter A loaded Athena deck can thereby be converted to execute in the Victory Pro-cess simulator

Figure 9 displays the two toolbar buttons to use the Ath-ena to Victory Process syntax converter The converter is used by first loading an Athena deck and then hitting the left of the two buttons This will then initiate the conver-sion and open the converted deck in a new window The original Athena deck commands will still be visible in the new deck for your reference but have been commented out as shown in Figure 10 The right button on the toolbar shown in Figure 9 can be used to strip the commented Athena commands and only keep the converted Victory Process commands

ConclusionIn this article we gave an overview of the new features of the DeckBuild software We presented the new look and functionality of the examples section and the vari-ous modes of execution The new variables and outputs tracking facility was illustrated and the Athena to Victory Process converter was demonstrated

Future work on DeckBuild will include features to navi-gate between the various components of DeckBuild (run-time output deck variables outputs) at a simple mouse click will offer improved editor capabilities and will also allow to run DOE and optimization experiments known from VWF


Hints Tips and Solutions

How can I do local conformal mesh refinement in Victory Process

Figure 1 Victory(conformal) process mode example export

Figure 2 Victory (conformal) export with maxsize refinement

IntroductionThe Victory Process conformal export is generated from the volume planes specified in a user deck The accu-racy and resolution of the export is currently controlled by these planes Local refinement gives a further level of user control that allows the mesh density to be increased near regions of interest We now support interface junc-tion box and global refinement schemes These refine-ment schemes behave similarly to the Delaunay export with the exception that the distance parameter is calcu-lated automatically This is necessary since the conformal nature of the mesh would be lost if the wrong distance is used

Conformal refinement is achieved by subdividing an ele-ment into eight The element lsquoshapersquo is maintained by the subdivision In the case of a path simplex within the con-formal mesh (six tetrahedra forming a cube) a single lev-el of refinement will create 48 new elements These new elements will form eight smaller path simplices where each cube is now 18 of the original cubesrsquo volume

An example of our input structure is shown in Figure 1 This was generated using the victory(conformal) process mode export

GlobalThe uniform refinement syntax is

export victory(conformal)

structure=rdquoglobalstrrdquo

maxsize=025

This will refine until all elements within the mesh have a maximum feature size of 025 microns The feature size is defined to be the radius of the circumsphere of the ele-ments (tetrahedra) An example is shown in Figure 2

ShapeThe shape refinement can be used to specify a 3D cuboid within which the mesh will be refined The syntax is


structure=rdquoboxstrrdquo

boxmin=rdquo5 5 3rdquo boxmax=rdquo7 7 2rdquo

maxboxsize = 0175


Figure 3 Victory(conformal) box refinement example

Figure 4 Victory(conformal) interface refinement example

In this case we have a box from (5 5 -3) to (7 7 -2) Unlike the Delaunay refinement it is necessary to create grading elements outside of the refined section The grading ele-ments are calculated automatically and will result in a small level of refinement outside of the given box This is to maintain the mesh quality between refinednon-refined mesh regions

It should also be noted that grading elements can only oc-cur in perfect path simplex cubes (six tetrahedra forming the cube) If the box refinement is close to an interface the algorithm may need to refine the interface in order to ensure smooth grading levels An example of the box refinement is shown in Figure 3

Cone cylinder and sphere refinement are also supported The respective export commands are


structure=rdquoconestrrdquo

conestart=rdquo65 65 10rdquo

coneend=rdquo65 65 4rdquo

startconeradius=10

endconeradius=005

maxconesize=025


structure=rdquocylinderstrrdquo

cylinderstart=rdquo65 65 10rdquo

cylinderend=rdquo65 65 4rdquo

cylinderradius=10 maxcylindersize=025


structure=rdquospherestrrdquo

spherecenter=rdquo65 65 10rdquo

sphereradius=10 maxspheresize=025

InterfaceThe interface refinement syntax is


structure=rdquointerfacestrrdquo

distanceinterface

material=rdquoSiliconDioxiderdquo

maxinterfacesize=01

In this case the elements at the interface of Silicon Diox-ide will be refined until they have a maximum feature size of 01 microns An example of the interface refine-ment is given in Figure 4

JunctionThe junction refinement specifies the maximum feature size for elements that have a minimum containment cen-ter with zero distance from the junction An example of junction refinement is shown in Figure 5


Figure 5 Victory(conformal) junction refinement example

Figure 6 Structured conformal junction refinement

Figure 7 Unstructured Delaunay junction refinement

Delaunay and Conformal ComparisonThe conformal export already provides a means to refine regions of the mesh through the placement of the volume planes However in many cases regular refinement is in-sufficient The refinement schemes demonstrated in this document allow refinement of localized regions without the requirement to refine along an entire axis plane How-ever the placement of the volume planes is paramount to achieve a quality refined mesh In this section we will demonstrate how the volume planes should be placed to achieve refinement in regions of interest

The following conditions must be taken into account when using the structured conformal refinement

1 In a conformal mesh assuming no interfaces a single block (path simplex) is comprised of 6 tetrahedra A single refinement level subdivides each edge once The 6 tetrahedra become 48

2 We only place vertices on edges (ie subdivide) In comparison the unstructured Delaunay refinement will place vertices inside tetrahedra

3 The user must be careful where the initial volume planes are placed in order to ensure sufficient volume to grade within (further details on this point are given below)

4 If we wish for refinement along an entire axis plane the best option is to use a volume plane If we wish for refinement along a junction or interface the volume planes must be placed to ensure the refinement can grade correctly

In Figure 6 and 7 an example of the unstructured De-launay junction refinement in comparison to the struc-tured conformal junction refinement on the same device is shown

The export statements used were


structure=rdquoconformalstrrdquo

maxjunctionsize=04

export victory(delaunay)

structure=rdquodelaunaystrrdquo

maxjunctionsize=04

maxjunctiondistance=95

maxsize=2


Call for QuestionsIf you have hints tips solutions or questions to contribute

please contact our Applications and Support Department Phone +1 (408) 567-1000 Fax +1 (408) 496-6080

e-mail supportsilvacocom

Hints Tips and Solutions ArchiveCheck out our Web Page to see more details of this example

plus an archive of previous Hints Tips and Solutions wwwsilvacocom

Further details on grading

1 The Delaunay refinement requires a user specified junction distance within which the refinement is graded (95 microns in this example)

2 The conformal refinement determines this distance based on the existing volume planes and therefore a distance parameter is redundant

3 Each level of structured conformal refinement will introduce another level of grading

4 The conformal refinement junction distance is effec-tively the number of refinement bisection levels mul-tiplied by the volume plane spacing at that region of the mesh

5 In the example we must bisect a maximum of two levels to meet the 04 microns size requirement so we have two levels of grading ie the distance is two times the volume mesh planes spacing (approximate-ly 95 microns at the center of the structure)

Further it should also be noted that the unstructured De-launay refinement will only refine the junction elements that require it In the structured conformal refinement we may refine additional junction elements that already meet the 04 size requirement This can be seen at the top of the structure This behavior is necessary to maintain the conformal constraints of the export


Worldwide Offices Silvaco Japan jpsalessilvacocom

Silvaco Koreakrsalessilvacocom

Silvaco Taiwantwsalessilvacocom

Silvaco Singaporesgsalessilvacocom

Silvaco Europeeusalessilvacocom

USA Headquarters

Silvaco Inc4701 Patrick Henry Drive Bldg 2Santa Clara CA 95054 USA

Phone 408-567-1000Fax 408-496-6080

salessilvacocomwwwsilvacocom

The Simulation Standard July August September 2015

is ε=107 and εperp=37 LC material parameters can be specified in the SetLC statement in Clever as follows

setLC epsParaDir=107 epsVertDir=37 splay=144e-12 twist=69e-12 bend=183e-12

The pretilt angles at the top and the bottom boundary of the LC layer are both 1˚ The initial twist angle is 90˚ These alignment conditions can be defined in the following commands

LCbndaryT partition(0 10) rubAngle(0) tiltangle(1)

LCbndaryB partition(0 10) rubAngle(90) tiltangle(1)

where LCbndaryT and LCbndaryB denote the statement for the top and the bottom boundary respectively The rubAngle sets the rubbing angle with respect to the x axis and tiltangle specifies the tilt angle measured from the x-y plane

The LC cell structure consisting of a LC layer sandwiched by two electrodes was created in Victory Process and ex-ported with conformal tetrahedral mesh as shown in Figure 1 The bias voltage on the electrode ldquoPixrdquo was in-creased linearly from 0 to 6V in a 025V bias step through the following command in Clever

Interconnect Capacitance domainboundarycondition=cyclic contact=rdquoPixrdquo uservoltage=6 stevolt=025 strcture=rdquotnrdquo

The solution was stored after each voltage step The structure filename was generated in such a way that the current bias voltage is appended to the root file name ldquotnrdquo The director orientation of the TN-LC structure at 0 and 4V bias voltage is shown in Figure1(a) and 1(b) respectively The arrows in the LC layer indicate the director orientation Since Clever uses strong anchoring boundary condition for the LC simulation the director orientation at the top and bottom boundaries will never change with the bias Therefore we can see as the bias is increased from 0 to 4V the director remains the same at the top and bottom boundaries while it becomes highly tilted in the middle of the LC layer

The z component of the director nz was extracted along a line parallel to the z axis across the entire LC layer The profile of nz at various bias voltages is shown in Figure 2 We can observe quantitatively how the director changes with increased bias A nominal threshold voltage exists between 15V and 2V in this case In order to identify the threshold voltage more clearly the nz in the middle x-y plane (in terms of z axis) of the LC layer was extracted The data was plotted as a function of the bias voltage with different twist angles of the director in Figure 3 We can see the transition region ie the region where the nz goes from nearly 0 to nearly 1 becomes narrower and narrower with increased twist angle Therefore the

Figure 1 The TN-LC cell structure biased at (a) 0V and (b) 4V respectively Arrows indicate the orientation of the director

Figure 3 The director component nz in the middle x-y plane of the LC layer as a function of bias voltages with different twist angles

Figure 2 The profile of the director component nz along the z direction with different bias voltages















References



























Acknowledgments


References
















































maxsize=025






maxboxsize = 0175











startconeradius=10

endconeradius=005

maxconesize=025













distanceinterface


maxinterfacesize=01

















maxjunctionsize=04



maxjunctionsize=04


maxsize=2




















USA Headquarters


Phone 408-567-1000Fax 408-496-6080


July August September 2015 The Simulation Standard














References



























Acknowledgments


References
















































maxsize=025






maxboxsize = 0175











startconeradius=10

endconeradius=005

maxconesize=025













distanceinterface


maxinterfacesize=01

















maxjunctionsize=04



maxjunctionsize=04


maxsize=2




















USA Headquarters


Phone 408-567-1000Fax 408-496-6080







References



























Acknowledgments


References
















































maxsize=025






maxboxsize = 0175











startconeradius=10

endconeradius=005

maxconesize=025













distanceinterface


maxinterfacesize=01

















maxjunctionsize=04



maxjunctionsize=04


maxsize=2




















USA Headquarters


Phone 408-567-1000Fax 408-496-6080



























Acknowledgments


References
















































maxsize=025






maxboxsize = 0175











startconeradius=10

endconeradius=005

maxconesize=025













distanceinterface


maxinterfacesize=01

















maxjunctionsize=04



maxjunctionsize=04


maxsize=2




















USA Headquarters


Phone 408-567-1000Fax 408-496-6080















































maxsize=025






maxboxsize = 0175











startconeradius=10

endconeradius=005

maxconesize=025













distanceinterface


maxinterfacesize=01

















maxjunctionsize=04



maxjunctionsize=04


maxsize=2




















USA Headquarters


Phone 408-567-1000Fax 408-496-6080












startconeradius=10

endconeradius=005

maxconesize=025













distanceinterface


maxinterfacesize=01

















maxjunctionsize=04



maxjunctionsize=04


maxsize=2




















USA Headquarters


Phone 408-567-1000Fax 408-496-6080
















maxjunctionsize=04



maxjunctionsize=04


maxsize=2




















USA Headquarters


Phone 408-567-1000Fax 408-496-6080





















USA Headquarters


Phone 408-567-1000Fax 408-496-6080


Electrical Simulation of Liquid CrystalsElectrical Simulation of Liquid Crystals Introduction Liquid...

Documents

Transcript of Electrical Simulation of Liquid CrystalsElectrical Simulation of Liquid Crystals Introduction Liquid...