Download - Tim Hieu LCD 16x2

8/12/2019 Tim Hieu LCD 16x2

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ChnChn KK M tM t

Gii thiu cbn v LCD 16x2Gii thiu cbn v LCD 16x23/02/2012 09:09:00 CH3/02/2012 09:09:00 CH Gii thiu cbnGii thiu cbn,, LCD 16x2LCD 16x2,, Linh Kin CBnLinh Kin CBn,, in tcbnin tcbn No commentsNo comments

* Gii thiu :* Gii thiu :

Ngy nay, thit bhin thLCD (Liquid Crystal Display) c sdng trong rt nhiu cc ng dng ca VK. Ngy nay, thit bhin thLCD (Liquid Crystal Display) c sdng trong rt nhiu cc ng dng ca VK.

LCD c rt nhiu u im so vi cc dng hin thkhc: N c khnng hin thk ta dng, trc quan (ch,LCD c rt nhiu u im so vi cc dng hin thkhc: N c khnng hin thk ta dng, trc quan (ch,

sv k tha), ddng a vo mch ng dng theo nhiu giao thc giao tip khc nhau, tn rt t tisv k tha), ddng a vo mch ng dng theo nhiu giao thc giao tip khc nhau, tn rt t ti

nguyn hthng v gi thnh rnguyn hthng v gi thnh r

Tng Qut VLCD HD44780Tng Qut VLCD HD447801> Hnh dng v kch thc:1> Hnh dng v kch thc:

C rt nhiu loi LCD vi nhiu hnh dng v kch thc khc nhau, trn hnh 1 l loi LCD thngC rt nhiu loi LCD vi nhiu hnh dng v kch thc khc nhau, trn hnh 1 l loi LCD thng

dng.dng.

Hnh 1 : Hnh dng ca loi LCD thng dngHnh 1 : Hnh dng ca loi LCD thng dng

Khi sn xut LCD, nh sn xut tch hp chp iu khin (HD44780) bn trong lp vv cha cc chn giaoKhi sn xut LCD, nh sn xut tch hp chp iu khin (HD44780) bn trong lp vv cha cc chn giao

tip cn thit. Cc chn ny c nh sthtv t tn nhhnh 2 :tip cn thit. Cc chn ny c nh sthtv t tn nhhnh 2 :

Hnh 2 : Schn ca LCDHnh 2 : Schn ca LCD

2> Chc nng cc chn :2> Chc nng cc chn :

Top10Top10 Danh Mc ChDanh Mc Ch

Tng HpTng Hp

LIN HLIN H

ThGviTKhavEnter

13

BNG XP HNG TUNBNG XP HNG TUN

Download Proteus 7.8 SP2 FULLDownload Proteus 7.8 SP2 FULL

IC 555 - Nguyn l, Cu toIC 555 - Nguyn l, Cu to

[Hc Lp trnh 8051] Bi 2:[Hc Lp trnh 8051] Bi 2:Hng Dn SDng Keil C LpHng Dn SDng Keil C LpTrnh 8051Trnh 8051

[Hng Dn] Ci t - SDng[Hng Dn] Ci t - SDngTrnh Bin Dch Dev-C++Trnh Bin Dch Dev-C++

[Hc lp trnh 8051] Bi 7: Ngt[Hc lp trnh 8051] Bi 7: Ngttrong 8051trong 8051

Gii thiu cbn vLCD 16x2Gii thiu cbn vLCD 16x2

Code mu cho PIC - Kt hp:Code mu cho PIC - Kt hp:ADC o nhit , in p, hin thADC o nhit , in p, hin thLCD v giao tip vi my tnhLCD v giao tip vi my tnh

TRANG CHTRANG CH BN TINBN TIN IN TCBNIN TCBN LP TRNHLP TRNH VI IU KHINVI IU KHIN CHIP KHTRNHCHIP KHTRNH PHN MMPHN MM GII THUTGII THUT

MUSICMUSIC

DIENTUMAYTINH.COMDIENTUMAYTINH.COM

thiu cbn v LCD 16x2 ~ in TMy Tnh http://www.dientumaytinh.com/2012/03/gioi-thieu-co-ban-ve-lcd-

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hiuhiu11 VssVss Chn ni t cho LCD, khi thit kmch ta ni chn nyChn ni t cho LCD, khi thit kmch ta ni chn ny

vi GND ca mch iu khinvi GND ca mch iu khin

22 VDDVDD Chn cp ngun cho LCD, khi thit kmch ta ni chnChn cp ngun cho LCD, khi thit kmch ta ni chnny vi VCC=5V ca mch iu khinny vi VCC=5V ca mch iu khin

33 VEEVEE iu chnh tng phn ca LCD.iu chnh tng phn ca LCD.

44 RSRS Chn chn thanh ghi (Register select). Ni chn RS viChn chn thanh ghi (Register select). Ni chn RS vilogic 0 (GND) hoc logic 1 (VCC) chn thanh ghi.logic 0 (GND) hoc logic 1 (VCC) chn thanh ghi.+ Logic 0: Bus DB0-DB7 sni vi thanh ghi lnh IR+ Logic 0: Bus DB0-DB7 sni vi thanh ghi lnh IR

ca LCD (chghi - write) hoc ni vi bm aca LCD (chghi - write) hoc ni vi bm achca LCD (chc - read)chca LCD (chc - read)+ Logic 1: Bus DB0-DB7 sni vi thanh ghi dliu+ Logic 1: Bus DB0-DB7 sni vi thanh ghi dliuDR bn trong LCD.DR bn trong LCD.

55 R/WR/W Chn chn chc/ghi (Read/Write). Ni chn R/WChn chn chc/ghi (Read/Write). Ni chn R/Wvi logic 0 LCD hot ng chghi, hoc nivi logic 0 LCD hot ng chghi, hoc nivi logic 1 LCD chc.vi logic 1 LCD chc.

66 EE Chn cho php (Enable). Sau khi cc tn hiu c tChn cho php (Enable). Sau khi cc tn hiu c tln bus DB0-DB7, cc lnh chc chp nhn khi c 1ln bus DB0-DB7, cc lnh chc chp nhn khi c 1xung cho php ca chn E.xung cho php ca chn E.+ chghi: Dliu bus sc LCD chuyn+ chghi: Dliu bus sc LCD chuynvo(chp nhn) thanh ghi bn trong n khi pht hin mtvo(chp nhn) thanh ghi bn trong n khi pht hin mt

xung (high-to-low transition) ca tn hiu chn E.xung (high-to-low transition) ca tn hiu chn E.+ chc: Dliu sc LCD xut ra DB0-DB7+ chc: Dliu sc LCD xut ra DB0-DB7khi pht hin cnh ln (low-to-high transition) chn Ekhi pht hin cnh ln (low-to-high transition) chn Ev c LCD gibus n khi no chn E xung mcv c LCD gibus n khi no chn E xung mcthp.thp.

7 - 147 - 14 DB0 -DB0 -

DB7DB7Tm ng ca bus dliu dng trao i thng tinTm ng ca bus dliu dng trao i thng tinvi MPU. C 2 chsdng 8 ng bus ny :vi MPU. C 2 chsdng 8 ng bus ny :+ Ch8 bit : Dliu c truyn trn c8 ng, vi+ Ch8 bit : Dliu c truyn trn c8 ng, vibit MSB l bit DB7.bit MSB l bit DB7.

+ Ch4 bit : Dliu c truyn trn 4 ng t+ Ch4 bit : Dliu c truyn trn 4 ng tDB4 ti DB7, bit MSB l DB7DB4 ti DB7, bit MSB l DB7

1515 -- Ngun dng cho n nnNgun dng cho n nn

1616 -- GND cho n nnGND cho n nn

[Hng Dn] Download - Ci t[Hng Dn] Download - Ci tPhn Mm Altium Designer FULLPhn Mm Altium Designer FULL

[Hc lp trnh 8051] Bi 6: Truyn[Hc lp trnh 8051] Bi 6: Truynthng ni tip vi 8051thng ni tip vi 8051

in Tr- Cch c Gi Trinin Tr- Cch c Gi TrinTrTr

Chng ti ang trn

NHN LM N IN TTI HNNHN LM N IN TTI HN

Nhm qun trwebsiteNhm qun trwebsite www.linhkiendientu.co/www.linhkiendientu.co/chng ti quyt nh cung cp ccchng ti quyt nh cung cp cc sn phm insn phm intttheo yu cu, nhn thit ktheo yu cu, nhn thit kmch in tmch in tvvn in tn in t.. Chi tit ti yChi tit ti y:: Nhn lm n,Nhn lm n,

thit kmch in ttheo yu cu ti H Ni.thit kmch in ttheo yu cu ti H Ni.

LIN KTLIN KT

Kim Tin Trn MngKim Tin Trn Mng

Qung Co LEDQung Co LED

Truong ChuyenTruong Chuyen

Pho ThongPho Thong

NG NHPNG NHP

vi Kt ni Bn b ca Google

Thnh vin (35) Thm

Bn l thnh vin ri? ng nhp


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Bng 1 : Chc nng cc chn ca LCDBng 1 : Chc nng cc chn ca LCD

* Ghi ch : chc, ngha l MPU sc thng tin tLCD thng qua cc chn DBx.* Ghi ch : chc, ngha l MPU sc thng tin tLCD thng qua cc chn DBx.

Cn khi chghi, ngha l MPU xut thng tin iu khin cho LCD thng qua cc chn DBx.Cn khi chghi, ngha l MPU xut thng tin iu khin cho LCD thng qua cc chn DBx.

3> Skhi ca HD44780:3> Skhi ca HD44780:

hiu r hn chc nng cc chn v hot ng ca chng, ta tm hiu squa chp HD44780 thng qua cchiu r hn chc nng cc chn v hot ng ca chng, ta tm hiu squa chp HD44780 thng qua cc

khi cbn ca n.khi cbn ca n.

Hnh 3 : Skhi ca HD44780Hnh 3 : Skhi ca HD44780

TRUY CPTRUY CP

FOLLOW BY EMAILFOLLOW BY EMAIL

Email address...


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a> Cc thanh ghi :a> Cc thanh ghi :

Chp HD44780 c 2 thanh ghi 8 bit quan trng : Thanh ghi lnh IR (Instructor Register) v thanh ghi dliu Chp HD44780 c 2 thanh ghi 8 bit quan trng : Thanh ghi lnh IR (Instructor Register) v thanh ghi dliu

DR (Data Register)DR (Data Register)

- Thanh ghi IR : iu khin LCD, ngi dng phi ra lnh thng qua tm ng bus DB0-DB7. Mi lnh- Thanh ghi IR : iu khin LCD, ngi dng phi ra lnh thng qua tm ng bus DB0-DB7. Mi lnh

c nh sn xut LCD nh a chr rng. Ngi dng chvic cung cp a chlnh bng cch np vo thanhc nh sn xut LCD nh a chr rng. Ngi dng chvic cung cp a chlnh bng cch np vo thanh

ghi IR. Ngha l, khi ta np vo thanh ghi IR mt chui 8 bit, chp HD44780 stra bng m lnh ti a chm IRghi IR. Ngha l, khi ta np vo thanh ghi IR mt chui 8 bit, chp HD44780 stra bng m lnh ti a chm IR

cung cp v thc hin lnh .cung cp v thc hin lnh .

VD :VD : Lnh hin thmn hnh c a chlnh l 00001100 (DB7DB0)Lnh hin thmn hnh c a chlnh l 00001100 (DB7DB0)

Lnh hin thmn hnh v con tr c m lnh l 00001110Lnh hin thmn hnh v con tr c m lnh l 00001110

- Thanh ghi DR : Thanh ghi DR dng cha dliu 8 bit ghi vo vng RAM DDRAM hoc CGRAM- Thanh ghi DR : Thanh ghi DR dng cha dliu 8 bit ghi vo vng RAM DDRAM hoc CGRAM

(chghi) hoc dng cha dliu t2 vng RAM ny gi ra cho MPU (chc). Ngha l, khi MPU(chghi) hoc dng cha dliu t2 vng RAM ny gi ra cho MPU (chc). Ngha l, khi MPU

ghi thng tin vo DR, mch ni bn trong chp stng ghi thng tin ny vo DDRAM hoc CGRAM. Hoc khighi thng tin vo DR, mch ni bn trong chp stng ghi thng tin ny vo DDRAM hoc CGRAM. Hoc khi

thng tin va chc ghi vo IR, dliu a chny trong vng RAM ni ca HD44780 sc chuyn rathng tin va chc ghi vo IR, dliu a chny trong vng RAM ni ca HD44780 sc chuyn ra

DR truyn cho MPU.DR truyn cho MPU.

=> Bng cch iu khin chn RS v R/W chng ta c thchuyn qua li gi2 thanh ghi ny khi giao tip vi=> Bng cch iu khin chn RS v R/W chng ta c thchuyn qua li gi2 thanh ghi ny khi giao tip vi

MPU. Bng sau y tm tt li cc thit lp i vi hai chn RS v R/W theo mc ch giao tip.MPU. Bng sau y tm tt li cc thit lp i vi hai chn RS v R/W theo mc ch giao tip.

RSRS R/WR/W Chc nngChc nng

00 00 Ghi vo thanh ghi IR ra lnh cho LCDGhi vo thanh ghi IR ra lnh cho LCD

00 11 c cbn DB7 v gi trca bm a chDB0-DB6c cbn DB7 v gi trca bm a chDB0-DB6

11 00 Ghi vo thanh ghi DRGhi vo thanh ghi DR

11 11 c dliu tDRc dliu tDR

Bng 2 : Chc nng chn RS v R/W theo mc ch sdngBng 2 : Chc nng chn RS v R/W theo mc ch sdng

b> Cbo bn BF: (Busy Flag)b> Cbo bn BF: (Busy Flag)

Khi thc hin cc hot ng bn trong chp, mch ni bn trong cn mt khong thi gian hon tt. KhiKhi thc hin cc hot ng bn trong chp, mch ni bn trong cn mt khong thi gian hon tt. Khi

ang thc thi cc hot ng bn trong chip nhth, LCD bqua mi giao tip vi bn ngoi v bt cBF (thngang thc thi cc hot ng bn trong chip nhth, LCD bqua mi giao tip vi bn ngoi v bt cBF (thng

qua chn DB7 khi c thit lp RS=0, R/W=1) ln bo cho MPU bit n ang bn. Dnhin, khi xong vic, nqua chn DB7 khi c thit lp RS=0, R/W=1) ln bo cho MPU bit n ang bn. Dnhin, khi xong vic, n

st cBF li mc 0.st cBF li mc 0.

c> Bm a chAC : (Address Counter)c> Bm a chAC : (Address Counter)

Nhtrong skhi, thanh ghi IR khng trc tip kt ni vi vng RAM (DDRAM v CGRAM) m thng qua bNhtrong skhi, thanh ghi IR khng trc tip kt ni vi vng RAM (DDRAM v CGRAM) m thng qua b

m a chAC. Bm ny li ni vi 2 vng RAM theo kiu rnhnh. Khi mt a chlnh c np vo thanhm a chAC. Bm ny li ni vi 2 vng RAM theo kiu rnhnh. Khi mt a chlnh c np vo thanh

ghi IR, thng tin c ni trc tip cho 2 vng RAM nhng vic chn la vng RAM tng tc c bao hmghi IR, thng tin c ni trc tip cho 2 vng RAM nhng vic chn la vng RAM tng tc c bao hm

trong m lnh.trong m lnh.

Sau khi ghi vo (c t) RAM, bm AC tng tng ln (gim i) 1 n vv ni dung ca AC c xut raSau khi ghi vo (c t) RAM, bm AC tng tng ln (gim i) 1 n vv ni dung ca AC c xut ra

cho MPU thng qua DB0-DB6 khi c thit lp RS=0 v R/W=1 (xem bng tm tt RS - R/W).cho MPU thng qua DB0-DB6 khi c thit lp RS=0 v R/W=1 (xem bng tm tt RS - R/W).

Lu :Lu : Thi gian cp nht AC khng c tnh vo thi gian thc thi lnh m c cp nht sau khi cBF lnThi gian cp nht AC khng c tnh vo thi gian thc thi lnh m c cp nht sau khi cBF ln

mc cao (not busy), cho nn khi lp trnh hin th, bn phi delay mt khong tADD khong 4uS-5uS (ngay saumc cao (not busy), cho nn khi lp trnh hin th, bn phi delay mt khong tADD khong 4uS-5uS (ngay sau

khi BF=1) trc khi np dliu mi. Xem thm hnh bn di.khi BF=1) trc khi np dliu mi. Xem thm hnh bn di.

Hnh 4 : Gin xung cp nht ACHnh 4 : Gin xung cp nht AC


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d> Vng RAM hin thDDRAM : (Display Data RAM)d> Vng RAM hin thDDRAM : (Display Data RAM)

y l vng RAM dng hin th, ngha l ng vi mt a chca RAM l mt k ttrn mn hnh v khi bny l vng RAM dng hin th, ngha l ng vi mt a chca RAM l mt k ttrn mn hnh v khi bn

ghi vo vng RAM ny mt m 8 bit, LCD shin thti vtr tng ng trn mn hnh mt k tc m 8 bit mghi vo vng RAM ny mt m 8 bit, LCD shin thti vtr tng ng trn mn hnh mt k tc m 8 bit m

bn cung cp. Hnh sau y strnh by r hn mi lin hny :bn cung cp. Hnh sau y strnh by r hn mi lin hny :

Hnh 4 : Mi lin hgia a chca DDRAM v vtr hin thca LCDHnh 4 : Mi lin hgia a chca DDRAM v vtr hin thca LCD

Vng RAM ny c 80x8 bit nh, ngha l cha c 80 k tm 8 bit. Nhng vng RAM cn li khng dng choVng RAM ny c 80x8 bit nh, ngha l cha c 80 k tm 8 bit. Nhng vng RAM cn li khng dng cho

hin thc thdng nhvng RAM a mc ch.hin thc thdng nhvng RAM a mc ch.

Lu l truy cp vo DDRAM, ta phi cung cp a chcho AC theo m HEXLu l truy cp vo DDRAM, ta phi cung cp a chcho AC theo m HEX

e> Vng ROM cha k tCGROM: Character Generator ROMe> Vng ROM cha k tCGROM: Character Generator ROMVng ROM ny dng cha cc mu k tloi 5x8 hoc 5x10 im nh/k t, v nh a chbng 8 bit. TuyVng ROM ny dng cha cc mu k tloi 5x8 hoc 5x10 im nh/k t, v nh a chbng 8 bit. Tuy

nhin, n chc 208 mu k t5x8 v 32 mu k tkiu 5x10 (tng cng l 240 thay v 2^8 = 256 mu k t).nhin, n chc 208 mu k t5x8 v 32 mu k tkiu 5x10 (tng cng l 240 thay v 2^8 = 256 mu k t).

Ngi dng khng ththay i vng ROM ny.Ngi dng khng ththay i vng ROM ny.

Hnh 5 : Mi lin hgia a chca ROM v dliu to mu k t.Hnh 5 : Mi lin hgia a chca ROM v dliu to mu k t.

Nhvy, c thghi vo vtr thx trn mn hnh mt k ty no , ngi dng phi ghi vo vng DDRAM tiNhvy, c thghi vo vtr thx trn mn hnh mt k ty no , ngi dng phi ghi vo vng DDRAM ti

a chx (xem bng mi lin hgia DDRAM v vtr hin th) mt chui m k t8 bit trn CGROM. Ch la chx (xem bng mi lin hgia DDRAM v vtr hin th) mt chui m k t8 bit trn CGROM. Ch l

trong bng m k ttrong CGROM hnh bn di c m ROM A00.trong bng m k ttrong CGROM hnh bn di c m ROM A00.

V d:V d:Ghi vo DDRAM ti a ch01 mt chui 8 bit 01100010 th trn LCD ti th2 ttri sang (dngGhi vo DDRAM ti a ch01 mt chui 8 bit 01100010 th trn LCD ti th2 ttri sang (dng

trn) shin thk tb.trn) shin thk tb.


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Bng 3 : Bng m k t(ROM code A00)Bng 3 : Bng m k t(ROM code A00)

f> Vng RAM cha k tha CGRAM : (Character Generator RAM)f> Vng RAM cha k tha CGRAM : (Character Generator RAM)

Nhtrn bng m k t, nh sn xut dnh vng c a chbyte cao l 0000 ngi dng c thto cc mu kNhtrn bng m k t, nh sn xut dnh vng c a chbyte cao l 0000 ngi dng c thto cc mu k

tha ring. Tuy nhin dung lng vng ny rt hn ch: Ta chc thto 8 k tloi 5x8 im nh, hoc 4 ktha ring. Tuy nhin dung lng vng ny rt hn ch: Ta chc thto 8 k tloi 5x8 im nh, hoc 4 k

tloi 5x10 im nh.tloi 5x10 im nh.

ghi vo CGRAM, hy xem hnh 6 bn di.ghi vo CGRAM, hy xem hnh 6 bn di.


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Hnh 6 : Mi lin hgia a chca CGRAM, dliu ca CGRAM, v m k t.Hnh 6 : Mi lin hgia a chca CGRAM, dliu ca CGRAM, v m k t.

4> Tp lnh ca LCD :4> Tp lnh ca LCD :

Trc khi tm hiu tp lnh ca LCD, sau y l mt vi ch khi giao tip vi LCD :Trc khi tm hiu tp lnh ca LCD, sau y l mt vi ch khi giao tip vi LCD :

* Tuy trong skhi ca LCD c nhiu khi khc nhau, nhng khi lp trnh iu khin LCD ta chc thtc* Tuy trong skhi ca LCD c nhiu khi khc nhau, nhng khi lp trnh iu khin LCD ta chc thtc

ng trc tip c vo 2 thanh ghi DR v IR thng qua cc chn DBx, v ta phi thit lp chn RS, R/W phng trc tip c vo 2 thanh ghi DR v IR thng qua cc chn DBx, v ta phi thit lp chn RS, R/W ph

hp chuyn qua li gi2 thanh ghi ny. (xem bng 2)hp chuyn qua li gi2 thanh ghi ny. (xem bng 2)

* Vi mi lnh, LCD cn mt khong thi gian hon tt, thi gian ny c thkh lu i vi tc ca MPU,* Vi mi lnh, LCD cn mt khong thi gian hon tt, thi gian ny c thkh lu i vi tc ca MPU,

nn ta cn kim tra cBF hoc i (delay) cho LCD thc thi xong lnh hin hnh mi c thra lnh tip theo.nn ta cn kim tra cBF hoc i (delay) cho LCD thc thi xong lnh hin hnh mi c thra lnh tip theo.

* a chca RAM (AC) stng tng (gim) 1 n v, mi khi c lnh ghi vo RAM. (iu ny gip chng* a chca RAM (AC) stng tng (gim) 1 n v, mi khi c lnh ghi vo RAM. (iu ny gip chng

trnh gn hn)trnh gn hn)

* Cc lnh ca LCD c thchia thnh 4 nhm nhsau :* Cc lnh ca LCD c thchia thnh 4 nhm nhsau :

Cc lnh vkiu hin th. VD : Kiu hin th(1 hng / 2 hng), chiu di dliu (8 bit / 4 bit), Cc lnh vkiu hin th. VD : Kiu hin th(1 hng / 2 hng), chiu di dliu (8 bit / 4 bit),

Chnh a chRAM ni. Chnh a chRAM ni.

Nhm lnh truyn dliu trong RAM ni. Nhm lnh truyn dliu trong RAM ni.

Cc lnh cn li . Cc lnh cn li .

Bng 4 : Tp lnh ca LCDBng 4 : Tp lnh ca LCD

Tn lnhTn lnh Hot ngHot ngClearClearDisplayDisplay

M lnh :M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

DBx = 0 0 0 0 0 0 0 1 DBx = 0 0 0 0 0 0 0 1

Lnh Clear Display (xa hin th) sghi mt khong trng-blank (mLnh Clear Display (xa hin th) sghi mt khong trng-blank (mhin k t20H) vo t t c nhtrong DDRAM, sau trb m hin k t20H) vo tt c nhtrong DDRAM, sau trbm AC=0, trli kiu hin thgc nu n bthay i. Ngha l : Tt hinAC=0, trli kiu hin thgc nu n bthay i. Ngha l : Tt hinth, con trdi vgc tri (hng u tin), chtng AC.th, con trdi vgc tri (hng u tin), chtng AC.


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ReturnReturnhomehome


DBx = 0 0 0 0 0 0 1 * DBx = 0 0 0 0 0 0 1 *

Lnh Return home trbm a chAC v0, trli kiu hin thgLnh Return home trbm a chAC v0, trli kiu hin thgnu n bthay i. Ni dung ca DDRAM khng thay i.nu n bthay i. Ni dung ca DDRAM khng thay i.

EntryEntrymodemodesetset


DBx = 0 0 0 0 0 1 [I/D] [S] DBx = 0 0 0 0 0 1 [I/D] [S]

I/D : Tng (I/D=1) ho

c gi

m (I/D=0) b

m

a chhin th

AC 1

I/D : Tng (I/D=1) hoc gim (I/D=0) b m a chhi n thAC 1 vmi khi c hnh ng ghi hoc c vng DDRAM. Vtr con trvmi khi c hnh ng ghi hoc c vng DDRAM. Vtr con trcng di chuyn theo stng gim ny.cng di chuyn theo stng gim ny.

S : Khi S=1 ton bni dung hin thbdch sang phi (I/D=0) hocS : Khi S=1 ton bni dung hin thbdch sang phi (I/D=0) hocsang tri (I/D=1) mi khi c hnh ng ghi vng DDRAM. Khi S=0:sang tri (I/D=1) mi khi c hnh ng ghi vng DDRAM. Khi S=0:khng dch ni dung hin th. Ni dung hin thkhng dch khi ckhng dch ni dung hin th. Ni dung hin thkhng dch khi cDDRAM hoc c/ghi vng CGRAM.DDRAM hoc c/ghi vng CGRAM.

DisplayDisplayon/offon/offcontrolcontrol


DBx = 0 0 0 0 1 [D] [C] [B] DBx = 0 0 0 0 1 [D] [C] [B]

D: Hin thmn hnh khi D=1 v ngc li. Khi tt hin th, ni dungD: Hin thmn hnh khi D=1 v ngc li. Khi tt hin th, ni dungDDRAM khng thay i.DDRAM khng thay i.

C: Hin thcon trkhi C=1 v ngc li.C: Hin thcon trkhi C=1 v ngc li.

B: Nhp nhy k tti vtr con trkhi B=1 v ngc li.B: Nhp nhy k tti vtr con trkhi B=1 v ngc li.Chu k nhp nhy khong 409,6ms khi mch dao ng ni LCD lChu k nhp nhy khong 409,6ms khi mch dao ng ni LCD l250kHz.250kHz.

CursorCursororordisplaydisplayshiftshift

M lnh :M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DBx = 0 0 0 1 [S/C] [R/L] * * DBx = 0 0 0 1 [S/C] [R/L] * *

Lnh Cursor or display shift dch chuyn con trhay dliu hin thLnh Cursor or display shift dch chuyn con trhay dliu hin thsang tri m khng cn hnh ng ghi/c dliu. Khi hin thkiusang tri m khng cn hnh ng ghi/c dliu. Khi hin thkiudng, con trsnhy xung dng di khi dch qua vtr th40 cadng, con trsnhy xung dng di khi dch qua vtr th40 cahng u tin. Dliu hng u v hng 2 d ch cng mt lc. Chi tihng u tin. Dliu hng u v hng 2 d ch cng mt lc. Chi tisdng xem bng bn di:sdng xem bng bn di:

S/CS/C R/LR/L Hot ngHot ng

00 00 Dch vtr con trsang tri (Ngha l gim AC mtDch vtr con trsang tri (Ngha l gim AC mtn v).n v).

00 11 Dch vtr con trsang phi (Tng AC ln 1 nDch vtr con trsang phi (Tng AC ln 1 nv).v).

11 00 Dch ton bni dung hin thsang tri, con trDch ton bni dung hin thsang tri, con trcng dch theo.cng dch theo.

11 11 Dch ton bni dung hin thsang phi, con trDch ton bni dung hin thsang phi, con trcng dch theo.cng dch theo.

FunctionFunctionsetset

M lnh :M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DBx = 0 0 1 [DL] [N] [F] * * DBx = 0 0 1 [DL] [N] [F] * *

DL: Khi DL=1, LCD giao tip vi MPU bng giao thc 8 bit (tbitDL: Khi DL=1, LCD giao tip vi MPU bng giao thc 8 bit (tbit

DB7 n DB0). Ngc li, giao thc giao tip l 4 bit (tbit DB7 DB7 n DB0). Ngc li, giao thc giao tip l 4 bit (tbit DB7 bit DB0). Khi chn giao thc 4 bit, dliu c truyn/nhn 2 ln libit DB0). Khi chn giao thc 4 bit, dliu c truyn/nhn 2 ln litip. vi 4 bit cao gi/nhn trc, 4 bit thp gi/nhn sau.tip. vi 4 bit cao gi/nhn trc, 4 bit thp gi/nhn sau.N : Thit lp shng hin th. Khi N=0 : hin th1 hng, N=1: hin thN : Thit lp shng hin th. Khi N=0 : hin th1 hng, N=1: hin th2 hng.2 hng.

F : Thit lp kiu k t. Khi F=0: kiu k t5x8 im nh, F=1: kiu kF : Thit lp kiu k t. Khi F=0: kiu k t5x8 im nh, F=1: kiu kt5x10 im nh.t5x10 im nh.

SetSetCGRAMCGRAMaddressaddress

M lnh :M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DBx = 0 1 [ACG][ACG][ACG][ACG][ACG][ACG] DBx = 0 1 [ACG][ACG][ACG][ACG][ACG][ACG]

Lnh ny ghi vo AC a chca CGRAM. K hiu [ACG] ch1 bit cLnh ny ghi vo AC a chca CGRAM. K hiu [ACG] ch1 bit cchui dliu 6 bit. Ngay sau lnh ny l lnh c/ghi dliu tchui dliu 6 bit. Ngay sau lnh ny l lnh c/ghi dliu t


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Chn cp ngun (Vcc-GND)Chn cp ngun (Vcc-GND) Min:-0.3V , Max+7VMin:-0.3V , Max+7V

Cc chn ng vo (DBx,E,)Cc chn ng vo (DBx,E,) Min:-0.3V , Max:(Vcc+0.3V)Min:-0.3V , Max:(Vcc+0.3V)

Nhit hot ngNhit hot ng Min:-30C , Max:+75CMin:-30C , Max:+75C

Nhit bo qunNhit bo qun Min:-55C , Max:+125CMin:-55C , Max:+125C

CGRAM ti a ch c chnh.CGRAM ti a ch c chnh.SetSetDDRAMDDRAMaddressaddress

M lnh :M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DBx = 1 [AD] [AD] [AD] [AD] [AD] [AD] [AD] DBx = 1 [AD] [AD] [AD] [AD] [AD] [AD] [AD]

Lnh ny ghi vo AC a chca DDRAM, dng khi cn thit lp taLnh ny ghi vo AC a chca DDRAM, dng khi cn thit lp tahin thhin thmong mun. Ngay sau lnh ny l lnh c/ghi dliu tDDRAMmong mun. Ngay sau lnh ny l lnh c/ghi dliu tDDRAMti a ch c chnh.ti a ch c chnh.Khi chhin th1 hng: a chc tht00H n 4FH. Khi Khi chhin th1 hng: a chc tht00H n 4FH. Khi chhin th2 hng, a cht00h n 27H cho hng thnht, vchhin th2 hng, a cht00h n 27H cho hng thnht, v

t40h n 67h cho hng th2.t40h n 67h cho hng th2.Read BFRead BFandandaddressaddress

M lnh :M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DBx =[BF] [AC] [AC] [AC] [AC] [AC] [AC] [AC] DBx =[BF] [AC] [AC] [AC] [AC] [AC] [AC] [AC]

(RS=0,R/W=1)(RS=0,R/W=1)

Nh cp trc y, khi cBF bt, LCD ang lm vic v lnhNh cp trc y, khi cBF bt, LCD ang lm vic v lnhtip theo (nu c) sbbqua nu cBF cha vmc thp. Chotip theo (nu c) sbbqua nu cBF cha vmc thp. Chonn, khi lp trnh iu khin, phi kim tra cBF trc khi ghi dlinn, khi lp trnh i u khi n, phi ki m tra cBF trc khi ghi dlivo LCD.vo LCD.

Khi c cBF, gi trca AC cng c xut ra cc bit [AC]. N lKhi c cBF, gi trca AC cng c xut ra cc bit [AC]. N la chcaa chcaCG hay DDRAM l ty thuc vo lnh trc .CG hay DDRAM l ty thuc vo lnh trc .

WriteWrite

data todata toCG orCG orDDRAMDDRAM


DBx = [Write data]DBx = [Write data](RS=1, R/W=0)(RS=1, R/W=0)

Khi thit lp RS=1, R/W=0, dliu cn ghi c a vo cc chnKhi thit lp RS=1, R/W=0, dliu cn ghi c a vo cc chnDBx tmchDBx tmchngoi sc LCD chuyn vo trong LCD ti a chc xc nhngoi sc LCD chuyn vo trong LCD ti a chc xc nhtlnh ghi a chtrc (lnh ghi a chcng xc nh lun vngtlnh ghi a chtrc (lnh ghi a chcng xc nh lun vngRAM cn ghi)RAM cn ghi)Sau khi ghi, bm a chAC tng tng/gim 1 ty theo thit lSau khi ghi, bm a chAC tng tng/gim 1 ty theo thit lEntry mode.Entry mode.

ReadReaddatadatafrom CGfrom CGoror

DDRAMDDRAM

M lnh :M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DBx = [Read data]DBx = [Read data]

(RS=1, R/W=1)(RS=1, R/W=1)

Khi thit lp RS=1, R/W=1,dliu tCG/DDRAM c chuyn raKhi thit lp RS=1, R/W=1,dliu tCG/DDRAM c chuyn raMPU thng qua cc chn DBx (a chv vng RAM c xcMPU thng qua cc chn DBx (a chv vng RAM c xcnh bng lnh ghi a chtrc ).nh bng lnh ghi a chtrc ).Sau khi c, AC tng tng/gim 1 ty theo thit lp Entry mode,Sau khi c, AC tng tng/gim 1 ty theo thit lp Entry mode,tuy nhin ni dung hin thkhng bdch bt chp chEntrytuy nhin ni dung hin thkhng bdch bt chp chEntrymode.mode.

5> Giao tip gia LCD v MPU :5> Giao tip gia LCD v MPU :

a> c tnh in ca cc chn giao tip :a> c tnh in ca cc chn giao tip :

LCD sbhng nghim trng, hoc hot ng sai lch nu bn vi phm khong c tnh in sau y:LCD sbhng nghim trng, hoc hot ng sai lch nu bn vi phm khong c tnh in sau y:

Bng 6 : Maximun Rating Bng 6 : Maximun Rating

c tnh in lm vic in hnh: (o trong iu kin hot ng Vcc = 4.5V n 5.5V, T = -30 n +75C)c tnh in lm vic in hnh: (o trong iu kin hot ng Vcc = 4.5V n 5.5V, T = -30 n +75C)


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Chn cp ngun Vcc-GNDChn cp ngun Vcc-GND 2.7V n 5.5V2.7V n 5.5V

in p vo mc cao VIHin p vo mc cao VIH 2.2V n Vcc2.2V n Vcc

in p vo mc thp VILin p vo mc thp VIL -0.3V n 0.6V-0.3V n 0.6V

in p ra mc cao (DB0-DB7)in p ra mc cao (DB0-DB7) Min 2.4V (khi IOH = -0.205mA)Min 2.4V (khi IOH = -0.205mA)

in p ra mc thp (DB0-DB7)in p ra mc thp (DB0-DB7) Max 0.4V (khi IOL = 1.2mA)Max 0.4V (khi IOL = 1.2mA)

Dng in ng vo (input leakage current) ILIDng in ng vo (input leakage current) ILI -1uA n 1uA (khi VIN = 0 n Vcc)-1uA n 1uA (khi VIN = 0 n Vcc)

Dng in cp ngun ICCDng in cp ngun ICC 350uA(typ.) n 600uA350uA(typ.) n 600uA

Tn sdao ng ni fOSCTn sdao ng ni fOSC 190kHz n 350kHz (in hnh l 270kHz)190kHz n 350kHz (in hnh l 270kHz)

Bng 7: Min lm vic bnh thngBng 7: Min lm vic bnh thng

b> Sni mch in hnh:b> Sni mch in hnh:

- Smch kt ni gia m un LCD v VK 89S52 (8 bit).- Smch kt ni gia m un LCD v VK 89S52 (8 bit).

- Smch kt ni gia mun LCD v VK (4 bit).- Smch kt ni gia mun LCD v VK (4 bit).

c> Bus Timing:c> Bus Timing:


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6> Khi to LCD:6> Khi to LCD:

Kh

i to l vi

c thi

t l

p cc thng s

lm vi

c ban

u.

i v

i LCD, kh

i to gip ta thi

t l

p cc giao th

c lmKhi to l vic thit lp cc thng slm vic ban u. i vi LCD, khi to gip ta thit lp cc giao thc lm

vic gia LCD v MPU. Vic khi to chc thc hin 1 ln duy nht u chng trnh iu khin LCD vvic gia LCD v MPU. Vic khi to chc thc hin 1 ln duy nht u chng trnh iu khin LCD v

bao gm cc thit lp sau :bao gm cc thit lp sau :

Display clear : Xa/khng xa ton bni dung hin thtrc . Display clear : Xa/khng xa ton bni dung hin thtrc .

Function set : Kiu giao tip 8bit/4bit, shng hin th1hng/2hng, kiu k t5x8/5x10. Function set : Kiu giao tip 8bit/4bit, shng hin th1hng/2hng, kiu k t5x8/5x10.

Display on/off control: Hin th/tt mn hnh, hin th/tt con tr, nhp nhy/khng nhp nhy. Display on/off control: Hin th/tt mn hnh, hin th/tt con tr, nhp nhy/khng nhp nhy.

Entry mode set : cc thit lp kiu nhp k tnh: Dch/khng dch, ttng/gim (Increment). Entry mode set : cc thit lp kiu nhp k tnh: Dch/khng dch, ttng/gim (Increment).

a> Mch khi to bn trong chp HD44780:a> Mch khi to bn trong chp HD44780:

Mi khi c cp ngun, mch khi to bn trong LCD stng khi to cho n. V trong thi gian khi toMi khi c cp ngun, mch khi to bn trong LCD stng khi to cho n. V trong thi gian khi to

ny cBF bt ln 1, n khi vic khi to hon tt cBF cn gitrong khong 10ms sau khi Vcc t n 4.5V (vny cBF bt ln 1, n khi vic khi to hon tt cBF cn gitrong khong 10ms sau khi Vcc t n 4.5V (v

2.7V th LCD hot ng). Mch khi to ni sthit lp cc thng slm vic ca LCD nhsau:2.7V th LCD hot ng). Mch khi to ni sthit lp cc thng slm vic ca LCD nhsau:

Display clear : Xa ton bni dung hin thtrc . Display clear : Xa ton bni dung hin thtrc .

Function set: DL=1 : 8bit; N=0 : 1 hng; F=0 : 5x8 Function set: DL=1 : 8bit; N=0 : 1 hng; F=0 : 5x8

Display on/off control: D=0 : Display off; C=0 : Cursor off; B=0 : Blinking off. Display on/off control: D=0 : Display off; C=0 : Cursor off; B=0 : Blinking off.

Entry mode set: I/D =1 : Tng; S=0 : Khng dch. Entry mode set: I/D =1 : Tng; S=0 : Khng dch.Nhvy sau khi mngun, bn sthy mn hnh LCD ging nhcha mngun do ton bhin thtt. Do ,Nhvy sau khi mngun, bn sthy mn hnh LCD ging nhcha mngun do ton bhin thtt. Do ,

ta phi khi to LCD bng lnh.ta phi khi to LCD bng lnh.

b> Khi to bng lnh: (chui lnh)b> Khi to bng lnh: (chui lnh)

Vic khi to bng lnh phi tun theo lu sau ca nh sn xut :Vic khi to bng lnh phi tun theo lu sau ca nh sn xut :


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Bi ng Mi hnBi ng Mi hn Bi ng ChnBi ng Chn

Nh cp trn, chgiao tip mc nh ca LCD l 8bit (tkhi to lc mi bt in ln). V khi kt niNh cp trn, chgiao tip mc nh ca LCD l 8bit (tkhi to lc mi bt in ln). V khi kt ni

mch theo giao thc 4bit, 4 bit thp tDB0-DB3 khng c kt ni n LCD, nn lnh khi to ban u (lnhmch theo giao thc 4bit, 4 bit thp tDB0-DB3 khng c kt ni n LCD, nn lnh khi to ban u (lnh

chn giao thc giao tip function set 0010****) phi giao tip theo ch8 bit (chgi 4 bit cao mt ln, bquachn giao thc giao tip function set 0010****) phi giao tip theo ch8 bit (chgi 4 bit cao mt ln, bqua

4 bit thp). Tlnh sau tri, phi gi/nhn lnh theo 2 nibble.4 bit thp). Tlnh sau tri, phi gi/nhn lnh theo 2 nibble.Lu l sau khi thit lp function set, bn khng ththay i function set ngoi trthay i giao thc giao tipLu l sau khi thit lp function set, bn khng ththay i function set ngoi trthay i giao thc giao tip

(4bit/8bit).(4bit/8bit).

(ngun: trietnguyen)(ngun: trietnguyen)

Trang chTrang ch

0 nhn xt:0 nhn xt:

ng mt Nhn xtng mt Nhn xt

+2 xut url ny trn Google


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Nhn xt vi tcch:

Cc lin kt vi bi nyCc lin kt vi bi ny

To mt Lin ktTo mt Lin kt

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