©Richard L. Goldman1
IRQInterrupt Requests
(Static Presentation)
©Richard L. Goldman
April 25, 2002
©Richard L. Goldman2
Hardware Interrupts
• Hardware interrupts are signals from different devices in the computer.
• The interrupts are sent along dedicated traces to the CPU.
• When the CPU receives an interrupt is stops the job that it is doing and saves it in a memory stack.
• The CPU then processes the job associated with the interrupt.
• The interrupts and other CPU job are processed in order according to an established priority.
• Several jobs may be stored in memory stacks while higher priority jobs are being run.
©Richard L. Goldman3
IRQ Assignments
IRQ # Assignment IRQ
# Assignment
0 System Timer 8 Real-time Clock
1 Keyboard 9 NIC
2 2nd IRQ Controller 10 USB
3 Com 2 & 4 (Int. Modem) 11 SCSI
4 Com 1 & 3 12 System Mouse
5 LPT 2 or Sound Card 13 Math Coprocessor
6 Floppy Disk 14 Primary IDE (C: Hard Drive)
7 LPT 1 (Printer) 15 Secondary IDE (CD-ROM)
Set FunctionStandard FunctionRecommended Use
©Richard L. Goldman4
Sys TimerKeyboard
RTC
Math CP
CPU
32 Bit PCI Slots
8 BitISA Slots
16 BitISA Slots
USBSystemMouse
LPT 1
LPT 2Parallel Ports
FDD
Serial PortsCom 2 Com 1
01234567
Interrupt Controller
8259 (#1)INT
89101112131415
Interrupt Controller
8259 (#2)
INT
PrimarySecondary
IDE Channels
ABCD
PC
I Controller
IRQ Steering
IRQ Wiring
SCSIController
©Richard L. Goldman5
Interrupt Dialog
CPU MemoryHardwareDevice
(modem)
IRQ#3(I need attention) Who is assigned IRQ#3 ?
IRQ#3 is the Modemat I/O address 0FEEFA
I/O address 0FEEFA - ACK(modem, what do you want)
INT 6(Do my handler program #6)
Get and run handler atAddress 0FC2F7
InterruptVector Table
Where is modem handler #6 stored?
Modem handler #6 is atmemory address 0FC2F7
©Richard L. Goldman6
IRQ Priorities
IRQ #
Priority Assignment IRQ #
Priority Assignment
0 0 System Timer 8 2A RTC
1 1 Keyboard 9 2B NIC
2 --- Above 7 IRQs 10 2C USB
3 3 Com 2 & 4 11 2D SCSI
4 4 Com 1 & 3 12 2E System Mouse
5 5 Sound or LPT 2 13 2F Math CP
6 6 Floppy Disk 14 2G Primary IDE
7 7 LPT 1 15 2H Secondary IDE
©Richard L. Goldman7
IRQ Assignment Review
IRQ # Assignment IRQ
# Assignment
0 Sys Time 8 RTC
1 KB 9 NIC
2 --- 10 USB
3 Com 2 & 4 11 SCSI
4 Com 1 & 3 12 Sys Mouse
5 Sound / LPT 2 13 Math CP
6 FDD 14 P IDE
7 LPT 1 15 S IDE
©Richard L. Goldman8
IRQ Assignment Quiz
IRQ # Assignment IRQ
# Assignment
0 8
1 9
2 10
3 11
4 12
5 13
6 14
7 15
©Richard L. Goldman9
ISA & PCI Bus Signaling
PCI interrupts useLevel-sensitive Signaling
Off
Slot 1
Slot 2
Slot 3
Slot 4
5 VDC
4 VDC
3 VDC
2 VDC
0 VDC
ISA interrupts useEdge-triggered Signaling
Off
On
0 VDC
5 VDC
•ISA interrupts must use one trace for each interrupt.
•Many different PCI interrupts can use the same trace.
•Most all PCI devices share PCI interrupt A.
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