Recall Lecture 10
DC analysis of BJT BE Loop (EB Loop) – VBE for npn and VEB for pnp
CE Loop (EC Loop) - VCE for npn and VEC for pnp
IE
EXAMPLE - PNP
Given = 75 and VEC = 6V. Find the values of the labelled parameters, RC and IE,
DC analysis of BJT When node voltages is known, branch current
equations can be used.
R
a b
I
(Va – Vb) / R = I
BJT Circuits at DC = 0.99
KVL at BE loop: 0.7 + IERE – 4 = 0IE = 3.3 / 3.3 = 1 mA
Hence, IC = IE = 0.99 mA
IB = IE – IC = 0.01 mA
KVL at CE loop: ICRC + VCE + IERE – 10 = 0 VCE = 10 – 3.3 – 4.653 = 2.047 V
BJT Circuits at DC
VBE = 0.7VVB – VE = 0.7VVE = 4 – 0.7 = 3.3 V since VB = 4V
= 0.99
IC = IE
IB = IE - IC
VE – 0 = IE
3.3 k
10 - VC = IC
4.7 k
VC = 5.347 VHence, VCE = VC – VE
= 5.347 – 3.3= 2.047 V
LOAD LINE AND VOLTAGE TRANSFER
CHARACTERISTIC
Load Line and Voltage Transfer Characteristic can be used to visualize the characteristic of the transistor circuits.
LOAD LINE
The input load line is obtained from Kirchhoff’s voltage law equation around the B-E loop, written as follows:
Input Load Line Input Load Line – I– IBB versus V versus VBEBE
Derived using B-E loopDerived using B-E loop
Both the load line and the quiescent base current change as either or both VBB and RB change.
VBE – VBB + IBRB = 0
The input load line is essentially the same as the load line characteristics for diode circuits.
For example;For example;
IBQ = 15 μA
VBE – 4 + IB(220k) = 0
IB = -VBE + 4
220k 220k
y = mx + c
Output Load Line Output Load Line – I– ICC versus V versus VCECE
Derived using C-E loopDerived using C-E loop
For the C-E portion of the circuit, the load line is found by writing Kirchhoff’s voltage law around the C-E loop. We obtain:
For example;For example;
To find the intersection points setting IC = 0,VCE = VCC = 10 V
setting VCE = 0IC = VCC / RC = 5 mA
IC = -VCE + 10
2k 2k
y = mx + c
Q-point is the intersection of the load line with the iC vs vCE curve, corresponding to the
appropriate base current
Example: Calculation and Load Line
Calculate the characteristics of a circuit containing an emitter resistor and plot the output load line. For the circuit, let VBE (on) = 0.7 V and β = 75.
Load LineLoad LineUse KVL at B-E loop
Use KVL at C-E loop – to plot the load line
IB = 75.1 A
VCE = 12 – 5.63 (1.01)VCE = 6.31 V
VCE = 12 – IC (1.01)IC = - VCE + 12
1.01
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