Ramon Chips
RC64
65nm Rad-Hard Manycore
High-Performance DSP for
Software Defined Telecom
Payloads
1
Ramon Chips is named in memory of Col. Ilan Ramon, Israeli astronaut who died on board the Columbia space shuttle, 1/2/2003
Ran GinosarCEO, Ramon Chips
Professor, EE & CS, Technion--Israel
with Peleg Aviely and Fredy Lange
23 March 2016
Ramon Chips
Contents
Ramon Chips
RC64 motivation
RC64 architecture, programming model, software
DSP roadmap
RC64-based Software Defined Payload
RC64-based Active Phased Array Antenna Element
New business model
2
Ramon Chips
Ramon Chips
Government funded, in Israel
Make ITAR-free rad-hard high-performance
processors for space
Deliver & support for 30 years
Combined leadership in
RH, semiconductors,
architecture and software
3
Ramon Chips
Previous Products
4
SpaceIL
SAMSON
GR712RC
2-core LEON3Image
Compression
Plastic
PQFP
OPSAT
3000
MASCOT on
HAYABUSA-2
Ramon Chips
RC64 motivation
Enable payload supercomputing for space
– Replace ASICs, FPGAs, GPUs, CPUs
– Planned for 30 years (2020-2050)
Chip
64 processors
Board
many chipsMulti-boards
supercomputer
5
Ramon Chips
RC64
64 DSP cores– CEVA X1643
– 300 MHz, 40 GFLOPS, 150 GOPS
HW scheduler
Modem HW accelerators
4 Mbyte shared memory
Fast I/O
Rad-Hard, FDIR
65nm LP TSMC
10 Watt
PBGA & CCGA 624
Designed forSOFTWARE-DEFINED-PAYLOADS
6
Shared Memory
M M M M M M M M
SpFi/sRIO DDR2/3 AD/DA SpW NVM
DMA
schedulerFEC
DSP
$
DSP
$
DSP
$
DSP
$D
SP$
DSP
$
DSP
$
DSP
$
M M M M M M M M
M M M M M M M M
Ramon Chips
RC64 Task-Oriented Programming Model
Shared memory (PRAM)
– No message passing among processors
Single program, bare metal, no OS
– Many-core, not multi-core
Code in TWO parts:
– Task-dependency-graph
– Sequential task codes
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Shared memory
I/O
duplicable tasklock-free sharing
Ramon Chips 8
RC64 SW Development Tools
Compiler, ASM, Linker
Task Compiler Parallel Program Emulator
Compiler
tool chain
Parallel
Programming
Parallel
Program
Profiler
Event Recorder
(time stamp
tracer)
Optimization &
performance
tuning
Parallel DSP
Kernels &
Libraries
Core DSP Libraries
RC64 Cycle SimulatorSimulation Many Core Debugger
Ramon Chips
RC64 Run Time Model
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Hardware (RC64 and Peripherals)
RC64 HW DMA Engines RC64 HW Scheduler
IO API Many-Task API
Boot
Application Tasks
Network
Messaging
Host
Command
Control
Message
Routing
Error Correcting
DDR and Flash
MP
(Multi-
RC64)
HW
Kernel
System
Services
Distributed Executive
Boot
and
FDIR
Ramon Chips
RC64 performance
DVB-S2 modem: 2 Gb/s transmit, 1 Gb/s receive
FFT (complex 16 bit fixed-point): 150 GOPS
FFT (complex SP FP): 18 GFLOPS
None of these use DDR3 external memory.
Only streaming
10 Watt
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Ramon Chips 11
Processors for Space
Ramon Chips
MOD
ENCOD
ADC
ADC
MUX
MUX
CONTRO
SPECTRA MONITOR
DEMOD
DECOD
CONTROL
Transparent / Regenerative SW-Defined PLD
DB
FN
ADC
ADC
DAC
DAC
DAC
DAC
DB
FN
CHANNELIZER
RO
UT
ER
MOD
ENCOD
DEMOD
DECOD
DEMUX
DEMUX
ENCRYPT
SECURITY
DEEP
PACKET
INSPECTION
Frequency Replan & Reallocate
Autonomous Control
Distributed Multi-SAT Control
GeoLocation
Navigation
Swarm
Interference Mitigation
Cognitive Radio
Machine Learning
Statistics
Sub-Nyquist Sampling
Ramon Chips 13
Active Phased Array Antenna Element
Phase array
antenna element
LNA ADC Filter
Combined T/R TDD/FDD antenna element electronics module
PA DAC Filter
Parallelto
multi-serial
Multi-serial
toparallel
Optical Fibers Link
Digitalto
optic
Opticto
digital
OSC Digital processor
dip
lexe
r
OSC SpFiMulti-lane
Fibre
Antenna-
PLD
connect
Ramon Chips
RC64 RC64 RC64 RC64
RC64 RC64 RC64 RC64
RC64 RC64 RC64 RC64
RC64 RC64 RC64 RC64
CTRLCPU
CTRLCPU
CTRLCPU
CTRLCPU
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
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Software-Defined Payload
D/A
C
ON
VE
RT
ER
S
A/D
C
ON
VE
RT
ER
S
Ramon Chips 15
Software-Defined Payload
RC64 RC64 RC64 RC64
RC64 RC64 RC64 RC64
RC64 RC64 RC64 RC64
RC64 RC64 RC64 RC64
CTRLCPU
CTRLCPU
CTRLCPU
CTRLCPU
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
DDR3
FLASH
SSMM CNTL
COMPRESSEX
PLO
IT
ENC
OD
EM
OD
ULA
TE
CA
MER
A
IN
ENCRYPT
D/A
C
ON
VE
RT
ER
S
A/D
C
ON
VE
RT
ER
S
Ramon Chips 16
3U VPX cards
RC64
DD
R3
FLA
SH
CLK
DAC
DAC
CLK
RC64
CLK
RC64
RC64
RC64DDR3
FLASH
Or 2x ADC
Ramon Chips
Summary
High performance DSP/CPU for space
64 cores, large shared memory, high speed I/O
Shared memory programming
For software-defined payloads
Priced for competitive space
Samples EOY 2016
EM 2017
FM 2018
FM2 2019
Future upgrade to 16nm FinFET
5x lower power-per-Gb/s
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Ramon Chips
Funding
Israel Space Agency
Israel Ministry of Defense
EU FP7 & Horizon 2020 programs
– VHiSSI
– QI2S
– MacSpace
– S3NET
Non-funded collaboration with ESA
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Ramon Chips 21
www.ramon-chips.com
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